bfin_gpio.c 20 KB

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  1. /*
  2. * File: arch/blackfin/kernel/bfin_gpio.c
  3. * Based on:
  4. * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
  5. *
  6. * Created:
  7. * Description: GPIO Abstraction Layer
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. /*
  30. * Number BF537/6/4 BF561 BF533/2/1
  31. *
  32. * GPIO_0 PF0 PF0 PF0
  33. * GPIO_1 PF1 PF1 PF1
  34. * GPIO_2 PF2 PF2 PF2
  35. * GPIO_3 PF3 PF3 PF3
  36. * GPIO_4 PF4 PF4 PF4
  37. * GPIO_5 PF5 PF5 PF5
  38. * GPIO_6 PF6 PF6 PF6
  39. * GPIO_7 PF7 PF7 PF7
  40. * GPIO_8 PF8 PF8 PF8
  41. * GPIO_9 PF9 PF9 PF9
  42. * GPIO_10 PF10 PF10 PF10
  43. * GPIO_11 PF11 PF11 PF11
  44. * GPIO_12 PF12 PF12 PF12
  45. * GPIO_13 PF13 PF13 PF13
  46. * GPIO_14 PF14 PF14 PF14
  47. * GPIO_15 PF15 PF15 PF15
  48. * GPIO_16 PG0 PF16
  49. * GPIO_17 PG1 PF17
  50. * GPIO_18 PG2 PF18
  51. * GPIO_19 PG3 PF19
  52. * GPIO_20 PG4 PF20
  53. * GPIO_21 PG5 PF21
  54. * GPIO_22 PG6 PF22
  55. * GPIO_23 PG7 PF23
  56. * GPIO_24 PG8 PF24
  57. * GPIO_25 PG9 PF25
  58. * GPIO_26 PG10 PF26
  59. * GPIO_27 PG11 PF27
  60. * GPIO_28 PG12 PF28
  61. * GPIO_29 PG13 PF29
  62. * GPIO_30 PG14 PF30
  63. * GPIO_31 PG15 PF31
  64. * GPIO_32 PH0 PF32
  65. * GPIO_33 PH1 PF33
  66. * GPIO_34 PH2 PF34
  67. * GPIO_35 PH3 PF35
  68. * GPIO_36 PH4 PF36
  69. * GPIO_37 PH5 PF37
  70. * GPIO_38 PH6 PF38
  71. * GPIO_39 PH7 PF39
  72. * GPIO_40 PH8 PF40
  73. * GPIO_41 PH9 PF41
  74. * GPIO_42 PH10 PF42
  75. * GPIO_43 PH11 PF43
  76. * GPIO_44 PH12 PF44
  77. * GPIO_45 PH13 PF45
  78. * GPIO_46 PH14 PF46
  79. * GPIO_47 PH15 PF47
  80. */
  81. #include <linux/module.h>
  82. #include <linux/err.h>
  83. #include <asm/blackfin.h>
  84. #include <asm/gpio.h>
  85. #include <asm/portmux.h>
  86. #include <linux/irq.h>
  87. #ifdef BF533_FAMILY
  88. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  89. (struct gpio_port_t *) FIO_FLAG_D,
  90. };
  91. #endif
  92. #ifdef BF537_FAMILY
  93. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  94. (struct gpio_port_t *) PORTFIO,
  95. (struct gpio_port_t *) PORTGIO,
  96. (struct gpio_port_t *) PORTHIO,
  97. };
  98. static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  99. (unsigned short *) PORTF_FER,
  100. (unsigned short *) PORTG_FER,
  101. (unsigned short *) PORTH_FER,
  102. };
  103. #endif
  104. #ifdef BF561_FAMILY
  105. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  106. (struct gpio_port_t *) FIO0_FLAG_D,
  107. (struct gpio_port_t *) FIO1_FLAG_D,
  108. (struct gpio_port_t *) FIO2_FLAG_D,
  109. };
  110. #endif
  111. static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  112. static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
  113. char *str_ident = NULL;
  114. #define RESOURCE_LABEL_SIZE 16
  115. #ifdef CONFIG_PM
  116. static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  117. static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
  118. static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
  119. #ifdef BF533_FAMILY
  120. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
  121. #endif
  122. #ifdef BF537_FAMILY
  123. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
  124. #endif
  125. #ifdef BF561_FAMILY
  126. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
  127. #endif
  128. #endif /* CONFIG_PM */
  129. inline int check_gpio(unsigned short gpio)
  130. {
  131. if (gpio >= MAX_BLACKFIN_GPIOS)
  132. return -EINVAL;
  133. return 0;
  134. }
  135. static void set_label(unsigned short ident, const char *label)
  136. {
  137. if (label && str_ident) {
  138. strncpy(str_ident + ident * RESOURCE_LABEL_SIZE, label,
  139. RESOURCE_LABEL_SIZE);
  140. str_ident[ident * RESOURCE_LABEL_SIZE +
  141. RESOURCE_LABEL_SIZE - 1] = 0;
  142. }
  143. }
  144. static char *get_label(unsigned short ident)
  145. {
  146. if (!str_ident)
  147. return "UNKNOWN";
  148. return (str_ident[ident * RESOURCE_LABEL_SIZE] ?
  149. (str_ident + ident * RESOURCE_LABEL_SIZE) : "UNKNOWN");
  150. }
  151. static int cmp_label(unsigned short ident, const char *label)
  152. {
  153. if (label && str_ident)
  154. return strncmp(str_ident + ident * RESOURCE_LABEL_SIZE,
  155. label, strlen(label));
  156. else
  157. return -EINVAL;
  158. }
  159. #ifdef BF537_FAMILY
  160. static void port_setup(unsigned short gpio, unsigned short usage)
  161. {
  162. if (!check_gpio(gpio)) {
  163. if (usage == GPIO_USAGE) {
  164. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  165. } else
  166. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  167. SSYNC();
  168. }
  169. }
  170. #else
  171. # define port_setup(...) do { } while (0)
  172. #endif
  173. #ifdef BF537_FAMILY
  174. #define PMUX_LUT_RES 0
  175. #define PMUX_LUT_OFFSET 1
  176. #define PMUX_LUT_ENTRIES 41
  177. #define PMUX_LUT_SIZE 2
  178. static unsigned short port_mux_lut[PMUX_LUT_ENTRIES][PMUX_LUT_SIZE] = {
  179. {P_PPI0_D13, 11}, {P_PPI0_D14, 11}, {P_PPI0_D15, 11},
  180. {P_SPORT1_TFS, 11}, {P_SPORT1_TSCLK, 11}, {P_SPORT1_DTPRI, 11},
  181. {P_PPI0_D10, 10}, {P_PPI0_D11, 10}, {P_PPI0_D12, 10},
  182. {P_SPORT1_RSCLK, 10}, {P_SPORT1_RFS, 10}, {P_SPORT1_DRPRI, 10},
  183. {P_PPI0_D8, 9}, {P_PPI0_D9, 9}, {P_SPORT1_DRSEC, 9},
  184. {P_SPORT1_DTSEC, 9}, {P_TMR2, 8}, {P_PPI0_FS3, 8}, {P_TMR3, 7},
  185. {P_SPI0_SSEL4, 7}, {P_TMR4, 6}, {P_SPI0_SSEL5, 6}, {P_TMR5, 5},
  186. {P_SPI0_SSEL6, 5}, {P_UART1_RX, 4}, {P_UART1_TX, 4}, {P_TMR6, 4},
  187. {P_TMR7, 4}, {P_UART0_RX, 3}, {P_UART0_TX, 3}, {P_DMAR0, 3},
  188. {P_DMAR1, 3}, {P_SPORT0_DTSEC, 1}, {P_SPORT0_DRSEC, 1},
  189. {P_CAN0_RX, 1}, {P_CAN0_TX, 1}, {P_SPI0_SSEL7, 1},
  190. {P_SPORT0_TFS, 0}, {P_SPORT0_DTPRI, 0}, {P_SPI0_SSEL2, 0},
  191. {P_SPI0_SSEL3, 0}
  192. };
  193. static void portmux_setup(unsigned short per, unsigned short function)
  194. {
  195. u16 y, muxreg, offset;
  196. for (y = 0; y < PMUX_LUT_ENTRIES; y++) {
  197. if (port_mux_lut[y][PMUX_LUT_RES] == per) {
  198. /* SET PORTMUX REG */
  199. offset = port_mux_lut[y][PMUX_LUT_OFFSET];
  200. muxreg = bfin_read_PORT_MUX();
  201. if (offset != 1) {
  202. muxreg &= ~(1 << offset);
  203. } else {
  204. muxreg &= ~(3 << 1);
  205. }
  206. muxreg |= (function << offset);
  207. bfin_write_PORT_MUX(muxreg);
  208. }
  209. }
  210. }
  211. #else
  212. # define portmux_setup(...) do { } while (0)
  213. #endif
  214. static void default_gpio(unsigned short gpio)
  215. {
  216. unsigned short bank, bitmask;
  217. bank = gpio_bank(gpio);
  218. bitmask = gpio_bit(gpio);
  219. gpio_bankb[bank]->maska_clear = bitmask;
  220. gpio_bankb[bank]->maskb_clear = bitmask;
  221. SSYNC();
  222. gpio_bankb[bank]->inen &= ~bitmask;
  223. gpio_bankb[bank]->dir &= ~bitmask;
  224. gpio_bankb[bank]->polar &= ~bitmask;
  225. gpio_bankb[bank]->both &= ~bitmask;
  226. gpio_bankb[bank]->edge &= ~bitmask;
  227. }
  228. static int __init bfin_gpio_init(void)
  229. {
  230. str_ident = kzalloc(RESOURCE_LABEL_SIZE * 256, GFP_KERNEL);
  231. if (!str_ident)
  232. return -ENOMEM;
  233. printk(KERN_INFO "Blackfin GPIO Controller\n");
  234. return 0;
  235. }
  236. arch_initcall(bfin_gpio_init);
  237. /***********************************************************
  238. *
  239. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  240. *
  241. * INPUTS/OUTPUTS:
  242. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  243. *
  244. *
  245. * DESCRIPTION: These functions abstract direct register access
  246. * to Blackfin processor General Purpose
  247. * Ports Regsiters
  248. *
  249. * CAUTION: These functions do not belong to the GPIO Driver API
  250. *************************************************************
  251. * MODIFICATION HISTORY :
  252. **************************************************************/
  253. /* Set a specific bit */
  254. #define SET_GPIO(name) \
  255. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  256. { \
  257. unsigned long flags; \
  258. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  259. local_irq_save(flags); \
  260. if (arg) \
  261. gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  262. else \
  263. gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  264. local_irq_restore(flags); \
  265. } \
  266. EXPORT_SYMBOL(set_gpio_ ## name);
  267. SET_GPIO(dir)
  268. SET_GPIO(inen)
  269. SET_GPIO(polar)
  270. SET_GPIO(edge)
  271. SET_GPIO(both)
  272. #define SET_GPIO_SC(name) \
  273. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  274. { \
  275. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  276. if (arg) \
  277. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  278. else \
  279. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  280. } \
  281. EXPORT_SYMBOL(set_gpio_ ## name);
  282. SET_GPIO_SC(maska)
  283. SET_GPIO_SC(maskb)
  284. #if defined(ANOMALY_05000311)
  285. void set_gpio_data(unsigned short gpio, unsigned short arg)
  286. {
  287. unsigned long flags;
  288. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  289. local_irq_save(flags);
  290. if (arg)
  291. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  292. else
  293. gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  294. bfin_read_CHIPID();
  295. local_irq_restore(flags);
  296. }
  297. EXPORT_SYMBOL(set_gpio_data);
  298. #else
  299. SET_GPIO_SC(data)
  300. #endif
  301. #if defined(ANOMALY_05000311)
  302. void set_gpio_toggle(unsigned short gpio)
  303. {
  304. unsigned long flags;
  305. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  306. local_irq_save(flags);
  307. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  308. bfin_read_CHIPID();
  309. local_irq_restore(flags);
  310. }
  311. #else
  312. void set_gpio_toggle(unsigned short gpio)
  313. {
  314. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  315. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  316. }
  317. #endif
  318. EXPORT_SYMBOL(set_gpio_toggle);
  319. /*Set current PORT date (16-bit word)*/
  320. #define SET_GPIO_P(name) \
  321. void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
  322. { \
  323. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  324. } \
  325. EXPORT_SYMBOL(set_gpiop_ ## name);
  326. SET_GPIO_P(dir)
  327. SET_GPIO_P(inen)
  328. SET_GPIO_P(polar)
  329. SET_GPIO_P(edge)
  330. SET_GPIO_P(both)
  331. SET_GPIO_P(maska)
  332. SET_GPIO_P(maskb)
  333. #if defined(ANOMALY_05000311)
  334. void set_gpiop_data(unsigned short gpio, unsigned short arg)
  335. {
  336. unsigned long flags;
  337. local_irq_save(flags);
  338. gpio_bankb[gpio_bank(gpio)]->data = arg;
  339. bfin_read_CHIPID();
  340. local_irq_restore(flags);
  341. }
  342. EXPORT_SYMBOL(set_gpiop_data);
  343. #else
  344. SET_GPIO_P(data)
  345. #endif
  346. /* Get a specific bit */
  347. #define GET_GPIO(name) \
  348. unsigned short get_gpio_ ## name(unsigned short gpio) \
  349. { \
  350. return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
  351. } \
  352. EXPORT_SYMBOL(get_gpio_ ## name);
  353. GET_GPIO(dir)
  354. GET_GPIO(inen)
  355. GET_GPIO(polar)
  356. GET_GPIO(edge)
  357. GET_GPIO(both)
  358. GET_GPIO(maska)
  359. GET_GPIO(maskb)
  360. #if defined(ANOMALY_05000311)
  361. unsigned short get_gpio_data(unsigned short gpio)
  362. {
  363. unsigned long flags;
  364. unsigned short ret;
  365. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  366. local_irq_save(flags);
  367. ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->data >> gpio_sub_n(gpio));
  368. bfin_read_CHIPID();
  369. local_irq_restore(flags);
  370. return ret;
  371. }
  372. EXPORT_SYMBOL(get_gpio_data);
  373. #else
  374. GET_GPIO(data)
  375. #endif
  376. /*Get current PORT date (16-bit word)*/
  377. #define GET_GPIO_P(name) \
  378. unsigned short get_gpiop_ ## name(unsigned short gpio) \
  379. { \
  380. return (gpio_bankb[gpio_bank(gpio)]->name);\
  381. } \
  382. EXPORT_SYMBOL(get_gpiop_ ## name);
  383. GET_GPIO_P(dir)
  384. GET_GPIO_P(inen)
  385. GET_GPIO_P(polar)
  386. GET_GPIO_P(edge)
  387. GET_GPIO_P(both)
  388. GET_GPIO_P(maska)
  389. GET_GPIO_P(maskb)
  390. #if defined(ANOMALY_05000311)
  391. unsigned short get_gpiop_data(unsigned short gpio)
  392. {
  393. unsigned long flags;
  394. unsigned short ret;
  395. local_irq_save(flags);
  396. ret = gpio_bankb[gpio_bank(gpio)]->data;
  397. bfin_read_CHIPID();
  398. local_irq_restore(flags);
  399. return ret;
  400. }
  401. EXPORT_SYMBOL(get_gpiop_data);
  402. #else
  403. GET_GPIO_P(data)
  404. #endif
  405. #ifdef CONFIG_PM
  406. /***********************************************************
  407. *
  408. * FUNCTIONS: Blackfin PM Setup API
  409. *
  410. * INPUTS/OUTPUTS:
  411. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  412. * type -
  413. * PM_WAKE_RISING
  414. * PM_WAKE_FALLING
  415. * PM_WAKE_HIGH
  416. * PM_WAKE_LOW
  417. * PM_WAKE_BOTH_EDGES
  418. *
  419. * DESCRIPTION: Blackfin PM Driver API
  420. *
  421. * CAUTION:
  422. *************************************************************
  423. * MODIFICATION HISTORY :
  424. **************************************************************/
  425. int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
  426. {
  427. unsigned long flags;
  428. if ((check_gpio(gpio) < 0) || !type)
  429. return -EINVAL;
  430. local_irq_save(flags);
  431. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  432. wakeup_flags_map[gpio] = type;
  433. local_irq_restore(flags);
  434. return 0;
  435. }
  436. EXPORT_SYMBOL(gpio_pm_wakeup_request);
  437. void gpio_pm_wakeup_free(unsigned short gpio)
  438. {
  439. unsigned long flags;
  440. if (check_gpio(gpio) < 0)
  441. return;
  442. local_irq_save(flags);
  443. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  444. local_irq_restore(flags);
  445. }
  446. EXPORT_SYMBOL(gpio_pm_wakeup_free);
  447. static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
  448. {
  449. port_setup(gpio, GPIO_USAGE);
  450. set_gpio_dir(gpio, 0);
  451. set_gpio_inen(gpio, 1);
  452. if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
  453. set_gpio_edge(gpio, 1);
  454. else
  455. set_gpio_edge(gpio, 0);
  456. if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
  457. set_gpio_both(gpio, 1);
  458. else
  459. set_gpio_both(gpio, 0);
  460. if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
  461. set_gpio_polar(gpio, 1);
  462. else
  463. set_gpio_polar(gpio, 0);
  464. SSYNC();
  465. return 0;
  466. }
  467. u32 gpio_pm_setup(void)
  468. {
  469. u32 sic_iwr = 0;
  470. u16 bank, mask, i, gpio;
  471. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  472. mask = wakeup_map[gpio_bank(i)];
  473. bank = gpio_bank(i);
  474. gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
  475. gpio_bankb[bank]->maskb = 0;
  476. if (mask) {
  477. #ifdef BF537_FAMILY
  478. gpio_bank_saved[bank].fer = *port_fer[bank];
  479. #endif
  480. gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
  481. gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
  482. gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
  483. gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
  484. gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
  485. gpio_bank_saved[bank].reserved =
  486. reserved_gpio_map[bank];
  487. gpio = i;
  488. while (mask) {
  489. if (mask & 1) {
  490. reserved_gpio_map[gpio_bank(gpio)] |=
  491. gpio_bit(gpio);
  492. bfin_gpio_wakeup_type(gpio,
  493. wakeup_flags_map[gpio]);
  494. set_gpio_data(gpio, 0); /*Clear*/
  495. }
  496. gpio++;
  497. mask >>= 1;
  498. }
  499. sic_iwr |= 1 <<
  500. (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
  501. gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
  502. }
  503. }
  504. if (sic_iwr)
  505. return sic_iwr;
  506. else
  507. return IWR_ENABLE_ALL;
  508. }
  509. void gpio_pm_restore(void)
  510. {
  511. u16 bank, mask, i;
  512. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  513. mask = wakeup_map[gpio_bank(i)];
  514. bank = gpio_bank(i);
  515. if (mask) {
  516. #ifdef BF537_FAMILY
  517. *port_fer[bank] = gpio_bank_saved[bank].fer;
  518. #endif
  519. gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
  520. gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
  521. gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
  522. gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
  523. gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
  524. reserved_gpio_map[bank] =
  525. gpio_bank_saved[bank].reserved;
  526. }
  527. gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
  528. }
  529. }
  530. #endif
  531. int peripheral_request(unsigned short per, const char *label)
  532. {
  533. unsigned long flags;
  534. unsigned short ident = P_IDENT(per);
  535. /*
  536. * Don't cares are pins with only one dedicated function
  537. */
  538. if (per & P_DONTCARE)
  539. return 0;
  540. if (!(per & P_DEFINED))
  541. return -ENODEV;
  542. local_irq_save(flags);
  543. if (!check_gpio(ident)) {
  544. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  545. printk(KERN_ERR
  546. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  547. __FUNCTION__, ident, get_label(ident));
  548. dump_stack();
  549. local_irq_restore(flags);
  550. return -EBUSY;
  551. }
  552. }
  553. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  554. /*
  555. * Pin functions like AMC address strobes my
  556. * be requested and used by several drivers
  557. */
  558. if (!(per & P_MAYSHARE)) {
  559. /*
  560. * Allow that the identical pin function can
  561. * be requested from the same driver twice
  562. */
  563. if (cmp_label(ident, label) == 0)
  564. goto anyway;
  565. printk(KERN_ERR
  566. "%s: Peripheral %d function %d is already"
  567. "reserved by %s !\n",
  568. __FUNCTION__, ident, P_FUNCT2MUX(per),
  569. get_label(ident));
  570. dump_stack();
  571. local_irq_restore(flags);
  572. return -EBUSY;
  573. }
  574. }
  575. anyway:
  576. portmux_setup(per, P_FUNCT2MUX(per));
  577. port_setup(ident, PERIPHERAL_USAGE);
  578. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  579. local_irq_restore(flags);
  580. set_label(ident, label);
  581. return 0;
  582. }
  583. EXPORT_SYMBOL(peripheral_request);
  584. int peripheral_request_list(unsigned short per[], const char *label)
  585. {
  586. u16 cnt;
  587. int ret;
  588. for (cnt = 0; per[cnt] != 0; cnt++) {
  589. ret = peripheral_request(per[cnt], label);
  590. if (ret < 0)
  591. return ret;
  592. }
  593. return 0;
  594. }
  595. EXPORT_SYMBOL(peripheral_request_list);
  596. void peripheral_free(unsigned short per)
  597. {
  598. unsigned long flags;
  599. unsigned short ident = P_IDENT(per);
  600. if (per & P_DONTCARE)
  601. return;
  602. if (!(per & P_DEFINED))
  603. return;
  604. if (check_gpio(ident) < 0)
  605. return;
  606. local_irq_save(flags);
  607. if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
  608. & gpio_bit(ident)))) {
  609. local_irq_restore(flags);
  610. return;
  611. }
  612. if (!(per & P_MAYSHARE)) {
  613. port_setup(ident, GPIO_USAGE);
  614. }
  615. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  616. local_irq_restore(flags);
  617. }
  618. EXPORT_SYMBOL(peripheral_free);
  619. void peripheral_free_list(unsigned short per[])
  620. {
  621. u16 cnt;
  622. for (cnt = 0; per[cnt] != 0; cnt++) {
  623. peripheral_free(per[cnt]);
  624. }
  625. }
  626. EXPORT_SYMBOL(peripheral_free_list);
  627. /***********************************************************
  628. *
  629. * FUNCTIONS: Blackfin GPIO Driver
  630. *
  631. * INPUTS/OUTPUTS:
  632. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  633. *
  634. *
  635. * DESCRIPTION: Blackfin GPIO Driver API
  636. *
  637. * CAUTION:
  638. *************************************************************
  639. * MODIFICATION HISTORY :
  640. **************************************************************/
  641. int gpio_request(unsigned short gpio, const char *label)
  642. {
  643. unsigned long flags;
  644. if (check_gpio(gpio) < 0)
  645. return -EINVAL;
  646. local_irq_save(flags);
  647. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  648. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved!\n", gpio);
  649. dump_stack();
  650. local_irq_restore(flags);
  651. return -EBUSY;
  652. }
  653. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  654. local_irq_restore(flags);
  655. port_setup(gpio, GPIO_USAGE);
  656. return 0;
  657. }
  658. EXPORT_SYMBOL(gpio_request);
  659. void gpio_free(unsigned short gpio)
  660. {
  661. unsigned long flags;
  662. if (check_gpio(gpio) < 0)
  663. return;
  664. local_irq_save(flags);
  665. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  666. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
  667. dump_stack();
  668. local_irq_restore(flags);
  669. return;
  670. }
  671. default_gpio(gpio);
  672. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  673. local_irq_restore(flags);
  674. }
  675. EXPORT_SYMBOL(gpio_free);
  676. void gpio_direction_input(unsigned short gpio)
  677. {
  678. unsigned long flags;
  679. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  680. local_irq_save(flags);
  681. gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  682. gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  683. local_irq_restore(flags);
  684. }
  685. EXPORT_SYMBOL(gpio_direction_input);
  686. void gpio_direction_output(unsigned short gpio)
  687. {
  688. unsigned long flags;
  689. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  690. local_irq_save(flags);
  691. gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  692. gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  693. local_irq_restore(flags);
  694. }
  695. EXPORT_SYMBOL(gpio_direction_output);