mach-universal_c210.c 28 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/fb.h>
  17. #include <linux/mfd/max8998.h>
  18. #include <linux/regulator/machine.h>
  19. #include <linux/regulator/fixed.h>
  20. #include <linux/regulator/max8952.h>
  21. #include <linux/mmc/host.h>
  22. #include <linux/i2c-gpio.h>
  23. #include <linux/i2c/mcs.h>
  24. #include <linux/i2c/atmel_mxt_ts.h>
  25. #include <drm/exynos_drm.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/hardware/gic.h>
  28. #include <asm/mach-types.h>
  29. #include <plat/regs-serial.h>
  30. #include <plat/clock.h>
  31. #include <plat/cpu.h>
  32. #include <plat/devs.h>
  33. #include <plat/iic.h>
  34. #include <plat/gpio-cfg.h>
  35. #include <plat/fb.h>
  36. #include <plat/mfc.h>
  37. #include <plat/sdhci.h>
  38. #include <plat/pd.h>
  39. #include <plat/regs-fb-v4.h>
  40. #include <plat/fimc-core.h>
  41. #include <plat/s5p-time.h>
  42. #include <plat/camport.h>
  43. #include <plat/mipi_csis.h>
  44. #include <mach/map.h>
  45. #include <media/v4l2-mediabus.h>
  46. #include <media/s5p_fimc.h>
  47. #include <media/m5mols.h>
  48. #include <media/s5k6aa.h>
  49. #include "common.h"
  50. /* Following are default values for UCON, ULCON and UFCON UART registers */
  51. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  52. S3C2410_UCON_RXILEVEL | \
  53. S3C2410_UCON_TXIRQMODE | \
  54. S3C2410_UCON_RXIRQMODE | \
  55. S3C2410_UCON_RXFIFO_TOI | \
  56. S3C2443_UCON_RXERR_IRQEN)
  57. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  58. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  59. S5PV210_UFCON_TXTRIG256 | \
  60. S5PV210_UFCON_RXTRIG256)
  61. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  62. [0] = {
  63. .hwport = 0,
  64. .ucon = UNIVERSAL_UCON_DEFAULT,
  65. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  66. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  67. },
  68. [1] = {
  69. .hwport = 1,
  70. .ucon = UNIVERSAL_UCON_DEFAULT,
  71. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  72. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  73. },
  74. [2] = {
  75. .hwport = 2,
  76. .ucon = UNIVERSAL_UCON_DEFAULT,
  77. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  78. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  79. },
  80. [3] = {
  81. .hwport = 3,
  82. .ucon = UNIVERSAL_UCON_DEFAULT,
  83. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  84. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  85. },
  86. };
  87. static struct regulator_consumer_supply max8952_consumer =
  88. REGULATOR_SUPPLY("vdd_arm", NULL);
  89. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  90. .gpio_vid0 = EXYNOS4_GPX0(3),
  91. .gpio_vid1 = EXYNOS4_GPX0(4),
  92. .gpio_en = -1, /* Not controllable, set "Always High" */
  93. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  94. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  95. .sync_freq = 0, /* default: fastest */
  96. .ramp_speed = 0, /* default: fastest */
  97. .reg_data = {
  98. .constraints = {
  99. .name = "VARM_1.2V",
  100. .min_uV = 770000,
  101. .max_uV = 1400000,
  102. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  103. .always_on = 1,
  104. .boot_on = 1,
  105. },
  106. .num_consumer_supplies = 1,
  107. .consumer_supplies = &max8952_consumer,
  108. },
  109. };
  110. static struct regulator_consumer_supply lp3974_buck1_consumer =
  111. REGULATOR_SUPPLY("vdd_int", NULL);
  112. static struct regulator_consumer_supply lp3974_buck2_consumer =
  113. REGULATOR_SUPPLY("vddg3d", NULL);
  114. static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
  115. REGULATOR_SUPPLY("vdet", "s5p-sdo"),
  116. REGULATOR_SUPPLY("vdd_reg", "0-003c"),
  117. };
  118. static struct regulator_init_data lp3974_buck1_data = {
  119. .constraints = {
  120. .name = "VINT_1.1V",
  121. .min_uV = 750000,
  122. .max_uV = 1500000,
  123. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  124. REGULATOR_CHANGE_STATUS,
  125. .boot_on = 1,
  126. .state_mem = {
  127. .disabled = 1,
  128. },
  129. },
  130. .num_consumer_supplies = 1,
  131. .consumer_supplies = &lp3974_buck1_consumer,
  132. };
  133. static struct regulator_init_data lp3974_buck2_data = {
  134. .constraints = {
  135. .name = "VG3D_1.1V",
  136. .min_uV = 750000,
  137. .max_uV = 1500000,
  138. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  139. REGULATOR_CHANGE_STATUS,
  140. .boot_on = 1,
  141. .state_mem = {
  142. .disabled = 1,
  143. },
  144. },
  145. .num_consumer_supplies = 1,
  146. .consumer_supplies = &lp3974_buck2_consumer,
  147. };
  148. static struct regulator_init_data lp3974_buck3_data = {
  149. .constraints = {
  150. .name = "VCC_1.8V",
  151. .min_uV = 1800000,
  152. .max_uV = 1800000,
  153. .apply_uV = 1,
  154. .always_on = 1,
  155. .state_mem = {
  156. .enabled = 1,
  157. },
  158. },
  159. .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
  160. .consumer_supplies = lp3974_buck3_consumer,
  161. };
  162. static struct regulator_init_data lp3974_buck4_data = {
  163. .constraints = {
  164. .name = "VMEM_1.2V",
  165. .min_uV = 1200000,
  166. .max_uV = 1200000,
  167. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  168. .apply_uV = 1,
  169. .state_mem = {
  170. .disabled = 1,
  171. },
  172. },
  173. };
  174. static struct regulator_init_data lp3974_ldo2_data = {
  175. .constraints = {
  176. .name = "VALIVE_1.2V",
  177. .min_uV = 1200000,
  178. .max_uV = 1200000,
  179. .apply_uV = 1,
  180. .always_on = 1,
  181. .state_mem = {
  182. .enabled = 1,
  183. },
  184. },
  185. };
  186. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  187. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  188. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  189. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
  190. };
  191. static struct regulator_init_data lp3974_ldo3_data = {
  192. .constraints = {
  193. .name = "VUSB+MIPI_1.1V",
  194. .min_uV = 1100000,
  195. .max_uV = 1100000,
  196. .apply_uV = 1,
  197. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  198. .state_mem = {
  199. .disabled = 1,
  200. },
  201. },
  202. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  203. .consumer_supplies = lp3974_ldo3_consumer,
  204. };
  205. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  206. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  207. };
  208. static struct regulator_init_data lp3974_ldo4_data = {
  209. .constraints = {
  210. .name = "VADC_3.3V",
  211. .min_uV = 3300000,
  212. .max_uV = 3300000,
  213. .apply_uV = 1,
  214. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  215. .state_mem = {
  216. .disabled = 1,
  217. },
  218. },
  219. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  220. .consumer_supplies = lp3974_ldo4_consumer,
  221. };
  222. static struct regulator_init_data lp3974_ldo5_data = {
  223. .constraints = {
  224. .name = "VTF_2.8V",
  225. .min_uV = 2800000,
  226. .max_uV = 2800000,
  227. .apply_uV = 1,
  228. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  229. .state_mem = {
  230. .disabled = 1,
  231. },
  232. },
  233. };
  234. static struct regulator_init_data lp3974_ldo6_data = {
  235. .constraints = {
  236. .name = "LDO6",
  237. .min_uV = 2000000,
  238. .max_uV = 2000000,
  239. .apply_uV = 1,
  240. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  241. .state_mem = {
  242. .disabled = 1,
  243. },
  244. },
  245. };
  246. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  247. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
  248. };
  249. static struct regulator_init_data lp3974_ldo7_data = {
  250. .constraints = {
  251. .name = "VLCD+VMIPI_1.8V",
  252. .min_uV = 1800000,
  253. .max_uV = 1800000,
  254. .apply_uV = 1,
  255. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  256. .state_mem = {
  257. .disabled = 1,
  258. },
  259. },
  260. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  261. .consumer_supplies = lp3974_ldo7_consumer,
  262. };
  263. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  264. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  265. };
  266. static struct regulator_init_data lp3974_ldo8_data = {
  267. .constraints = {
  268. .name = "VUSB+VDAC_3.3V",
  269. .min_uV = 3300000,
  270. .max_uV = 3300000,
  271. .apply_uV = 1,
  272. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  273. .state_mem = {
  274. .disabled = 1,
  275. },
  276. },
  277. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  278. .consumer_supplies = lp3974_ldo8_consumer,
  279. };
  280. static struct regulator_consumer_supply lp3974_ldo9_consumer =
  281. REGULATOR_SUPPLY("vddio", "0-003c");
  282. static struct regulator_init_data lp3974_ldo9_data = {
  283. .constraints = {
  284. .name = "VCC_2.8V",
  285. .min_uV = 2800000,
  286. .max_uV = 2800000,
  287. .apply_uV = 1,
  288. .always_on = 1,
  289. .state_mem = {
  290. .enabled = 1,
  291. },
  292. },
  293. .num_consumer_supplies = 1,
  294. .consumer_supplies = &lp3974_ldo9_consumer,
  295. };
  296. static struct regulator_init_data lp3974_ldo10_data = {
  297. .constraints = {
  298. .name = "VPLL_1.1V",
  299. .min_uV = 1100000,
  300. .max_uV = 1100000,
  301. .boot_on = 1,
  302. .apply_uV = 1,
  303. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  304. .state_mem = {
  305. .disabled = 1,
  306. },
  307. },
  308. };
  309. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  310. REGULATOR_SUPPLY("dig_28", "0-001f");
  311. static struct regulator_init_data lp3974_ldo11_data = {
  312. .constraints = {
  313. .name = "CAM_AF_3.3V",
  314. .min_uV = 3300000,
  315. .max_uV = 3300000,
  316. .apply_uV = 1,
  317. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  318. .state_mem = {
  319. .disabled = 1,
  320. },
  321. },
  322. .num_consumer_supplies = 1,
  323. .consumer_supplies = &lp3974_ldo11_consumer,
  324. };
  325. static struct regulator_init_data lp3974_ldo12_data = {
  326. .constraints = {
  327. .name = "PS_2.8V",
  328. .min_uV = 2800000,
  329. .max_uV = 2800000,
  330. .apply_uV = 1,
  331. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  332. .state_mem = {
  333. .disabled = 1,
  334. },
  335. },
  336. };
  337. static struct regulator_init_data lp3974_ldo13_data = {
  338. .constraints = {
  339. .name = "VHIC_1.2V",
  340. .min_uV = 1200000,
  341. .max_uV = 1200000,
  342. .apply_uV = 1,
  343. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  344. .state_mem = {
  345. .disabled = 1,
  346. },
  347. },
  348. };
  349. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  350. REGULATOR_SUPPLY("dig_18", "0-001f");
  351. static struct regulator_init_data lp3974_ldo14_data = {
  352. .constraints = {
  353. .name = "CAM_I_HOST_1.8V",
  354. .min_uV = 1800000,
  355. .max_uV = 1800000,
  356. .apply_uV = 1,
  357. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  358. .state_mem = {
  359. .disabled = 1,
  360. },
  361. },
  362. .num_consumer_supplies = 1,
  363. .consumer_supplies = &lp3974_ldo14_consumer,
  364. };
  365. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  366. REGULATOR_SUPPLY("dig_12", "0-001f");
  367. static struct regulator_init_data lp3974_ldo15_data = {
  368. .constraints = {
  369. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  370. .min_uV = 1200000,
  371. .max_uV = 1200000,
  372. .apply_uV = 1,
  373. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  374. .state_mem = {
  375. .disabled = 1,
  376. },
  377. },
  378. .num_consumer_supplies = 1,
  379. .consumer_supplies = &lp3974_ldo15_consumer,
  380. };
  381. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  382. REGULATOR_SUPPLY("vdda", "0-003c"),
  383. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  384. };
  385. static struct regulator_init_data lp3974_ldo16_data = {
  386. .constraints = {
  387. .name = "CAM_S_ANA_2.8V",
  388. .min_uV = 2800000,
  389. .max_uV = 2800000,
  390. .apply_uV = 1,
  391. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  392. .state_mem = {
  393. .disabled = 1,
  394. },
  395. },
  396. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  397. .consumer_supplies = lp3974_ldo16_consumer,
  398. };
  399. static struct regulator_init_data lp3974_ldo17_data = {
  400. .constraints = {
  401. .name = "VCC_3.0V_LCD",
  402. .min_uV = 3000000,
  403. .max_uV = 3000000,
  404. .apply_uV = 1,
  405. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  406. .boot_on = 1,
  407. .state_mem = {
  408. .disabled = 1,
  409. },
  410. },
  411. };
  412. static struct regulator_init_data lp3974_32khz_ap_data = {
  413. .constraints = {
  414. .name = "32KHz AP",
  415. .always_on = 1,
  416. .state_mem = {
  417. .enabled = 1,
  418. },
  419. },
  420. };
  421. static struct regulator_init_data lp3974_32khz_cp_data = {
  422. .constraints = {
  423. .name = "32KHz CP",
  424. .state_mem = {
  425. .disabled = 1,
  426. },
  427. },
  428. };
  429. static struct regulator_init_data lp3974_vichg_data = {
  430. .constraints = {
  431. .name = "VICHG",
  432. .state_mem = {
  433. .disabled = 1,
  434. },
  435. },
  436. };
  437. static struct regulator_init_data lp3974_esafeout1_data = {
  438. .constraints = {
  439. .name = "SAFEOUT1",
  440. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  441. .state_mem = {
  442. .enabled = 1,
  443. },
  444. },
  445. };
  446. static struct regulator_init_data lp3974_esafeout2_data = {
  447. .constraints = {
  448. .name = "SAFEOUT2",
  449. .boot_on = 1,
  450. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  451. .state_mem = {
  452. .enabled = 1,
  453. },
  454. },
  455. };
  456. static struct max8998_regulator_data lp3974_regulators[] = {
  457. { MAX8998_LDO2, &lp3974_ldo2_data },
  458. { MAX8998_LDO3, &lp3974_ldo3_data },
  459. { MAX8998_LDO4, &lp3974_ldo4_data },
  460. { MAX8998_LDO5, &lp3974_ldo5_data },
  461. { MAX8998_LDO6, &lp3974_ldo6_data },
  462. { MAX8998_LDO7, &lp3974_ldo7_data },
  463. { MAX8998_LDO8, &lp3974_ldo8_data },
  464. { MAX8998_LDO9, &lp3974_ldo9_data },
  465. { MAX8998_LDO10, &lp3974_ldo10_data },
  466. { MAX8998_LDO11, &lp3974_ldo11_data },
  467. { MAX8998_LDO12, &lp3974_ldo12_data },
  468. { MAX8998_LDO13, &lp3974_ldo13_data },
  469. { MAX8998_LDO14, &lp3974_ldo14_data },
  470. { MAX8998_LDO15, &lp3974_ldo15_data },
  471. { MAX8998_LDO16, &lp3974_ldo16_data },
  472. { MAX8998_LDO17, &lp3974_ldo17_data },
  473. { MAX8998_BUCK1, &lp3974_buck1_data },
  474. { MAX8998_BUCK2, &lp3974_buck2_data },
  475. { MAX8998_BUCK3, &lp3974_buck3_data },
  476. { MAX8998_BUCK4, &lp3974_buck4_data },
  477. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  478. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  479. { MAX8998_ENVICHG, &lp3974_vichg_data },
  480. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  481. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  482. };
  483. static struct max8998_platform_data universal_lp3974_pdata = {
  484. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  485. .regulators = lp3974_regulators,
  486. .buck1_voltage1 = 1100000, /* INT */
  487. .buck1_voltage2 = 1000000,
  488. .buck1_voltage3 = 1100000,
  489. .buck1_voltage4 = 1000000,
  490. .buck1_set1 = EXYNOS4_GPX0(5),
  491. .buck1_set2 = EXYNOS4_GPX0(6),
  492. .buck2_voltage1 = 1200000, /* G3D */
  493. .buck2_voltage2 = 1100000,
  494. .buck1_default_idx = 0,
  495. .buck2_set3 = EXYNOS4_GPE2(0),
  496. .buck2_default_idx = 0,
  497. .wakeup = true,
  498. };
  499. enum fixed_regulator_id {
  500. FIXED_REG_ID_MMC0,
  501. FIXED_REG_ID_HDMI_5V,
  502. FIXED_REG_ID_CAM_S_IF,
  503. FIXED_REG_ID_CAM_I_CORE,
  504. FIXED_REG_ID_CAM_VT_DIO,
  505. };
  506. static struct regulator_consumer_supply hdmi_fixed_consumer =
  507. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  508. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  509. .constraints = {
  510. .name = "HDMI_5V",
  511. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  512. },
  513. .num_consumer_supplies = 1,
  514. .consumer_supplies = &hdmi_fixed_consumer,
  515. };
  516. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  517. .supply_name = "HDMI_EN1",
  518. .microvolts = 5000000,
  519. .gpio = EXYNOS4_GPE0(1),
  520. .enable_high = true,
  521. .init_data = &hdmi_fixed_voltage_init_data,
  522. };
  523. static struct platform_device hdmi_fixed_voltage = {
  524. .name = "reg-fixed-voltage",
  525. .id = FIXED_REG_ID_HDMI_5V,
  526. .dev = {
  527. .platform_data = &hdmi_fixed_voltage_config,
  528. },
  529. };
  530. /* GPIO I2C 5 (PMIC) */
  531. static struct i2c_board_info i2c5_devs[] __initdata = {
  532. {
  533. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  534. .platform_data = &universal_max8952_pdata,
  535. }, {
  536. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  537. .platform_data = &universal_lp3974_pdata,
  538. },
  539. };
  540. /* I2C3 (TSP) */
  541. static struct mxt_platform_data qt602240_platform_data = {
  542. .x_line = 19,
  543. .y_line = 11,
  544. .x_size = 800,
  545. .y_size = 480,
  546. .blen = 0x11,
  547. .threshold = 0x28,
  548. .voltage = 2800000, /* 2.8V */
  549. .orient = MXT_DIAGONAL,
  550. .irqflags = IRQF_TRIGGER_FALLING,
  551. };
  552. static struct i2c_board_info i2c3_devs[] __initdata = {
  553. {
  554. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  555. .platform_data = &qt602240_platform_data,
  556. },
  557. };
  558. static void __init universal_tsp_init(void)
  559. {
  560. int gpio;
  561. /* TSP_LDO_ON: XMDMADDR_11 */
  562. gpio = EXYNOS4_GPE2(3);
  563. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
  564. gpio_export(gpio, 0);
  565. /* TSP_INT: XMDMADDR_7 */
  566. gpio = EXYNOS4_GPE1(7);
  567. gpio_request(gpio, "TSP_INT");
  568. s5p_register_gpio_interrupt(gpio);
  569. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  570. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  571. i2c3_devs[0].irq = gpio_to_irq(gpio);
  572. }
  573. /* GPIO I2C 12 (3 Touchkey) */
  574. static uint32_t touchkey_keymap[] = {
  575. /* MCS_KEY_MAP(value, keycode) */
  576. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  577. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  578. };
  579. static struct mcs_platform_data touchkey_data = {
  580. .keymap = touchkey_keymap,
  581. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  582. .key_maxval = 2,
  583. };
  584. /* GPIO I2C 3_TOUCH 2.8V */
  585. #define I2C_GPIO_BUS_12 12
  586. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  587. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  588. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  589. };
  590. static struct platform_device i2c_gpio12 = {
  591. .name = "i2c-gpio",
  592. .id = I2C_GPIO_BUS_12,
  593. .dev = {
  594. .platform_data = &i2c_gpio12_data,
  595. },
  596. };
  597. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  598. {
  599. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  600. .platform_data = &touchkey_data,
  601. },
  602. };
  603. static void __init universal_touchkey_init(void)
  604. {
  605. int gpio;
  606. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  607. gpio_request(gpio, "3_TOUCH_INT");
  608. s5p_register_gpio_interrupt(gpio);
  609. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  610. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  611. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  612. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
  613. }
  614. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  615. .frequency = 300 * 1000,
  616. .sda_delay = 200,
  617. };
  618. /* GPIO KEYS */
  619. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  620. {
  621. .code = KEY_VOLUMEUP,
  622. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  623. .desc = "gpio-keys: KEY_VOLUMEUP",
  624. .type = EV_KEY,
  625. .active_low = 1,
  626. .debounce_interval = 1,
  627. }, {
  628. .code = KEY_VOLUMEDOWN,
  629. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  630. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  631. .type = EV_KEY,
  632. .active_low = 1,
  633. .debounce_interval = 1,
  634. }, {
  635. .code = KEY_CONFIG,
  636. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  637. .desc = "gpio-keys: KEY_CONFIG",
  638. .type = EV_KEY,
  639. .active_low = 1,
  640. .debounce_interval = 1,
  641. }, {
  642. .code = KEY_CAMERA,
  643. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  644. .desc = "gpio-keys: KEY_CAMERA",
  645. .type = EV_KEY,
  646. .active_low = 1,
  647. .debounce_interval = 1,
  648. }, {
  649. .code = KEY_OK,
  650. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  651. .desc = "gpio-keys: KEY_OK",
  652. .type = EV_KEY,
  653. .active_low = 1,
  654. .debounce_interval = 1,
  655. },
  656. };
  657. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  658. .buttons = universal_gpio_keys_tables,
  659. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  660. };
  661. static struct platform_device universal_gpio_keys = {
  662. .name = "gpio-keys",
  663. .dev = {
  664. .platform_data = &universal_gpio_keys_data,
  665. },
  666. };
  667. /* eMMC */
  668. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  669. .max_width = 8,
  670. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  671. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  672. .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
  673. .cd_type = S3C_SDHCI_CD_PERMANENT,
  674. };
  675. static struct regulator_consumer_supply mmc0_supplies[] = {
  676. REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
  677. };
  678. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  679. .constraints = {
  680. .name = "VMEM_VDD_2.8V",
  681. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  682. },
  683. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  684. .consumer_supplies = mmc0_supplies,
  685. };
  686. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  687. .supply_name = "MASSMEMORY_EN",
  688. .microvolts = 2800000,
  689. .gpio = EXYNOS4_GPE1(3),
  690. .enable_high = true,
  691. .init_data = &mmc0_fixed_voltage_init_data,
  692. };
  693. static struct platform_device mmc0_fixed_voltage = {
  694. .name = "reg-fixed-voltage",
  695. .id = FIXED_REG_ID_MMC0,
  696. .dev = {
  697. .platform_data = &mmc0_fixed_voltage_config,
  698. },
  699. };
  700. /* SD */
  701. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  702. .max_width = 4,
  703. .host_caps = MMC_CAP_4_BIT_DATA |
  704. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  705. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  706. .ext_cd_gpio_invert = 1,
  707. .cd_type = S3C_SDHCI_CD_GPIO,
  708. };
  709. /* WiFi */
  710. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  711. .max_width = 4,
  712. .host_caps = MMC_CAP_4_BIT_DATA |
  713. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  714. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  715. };
  716. static void __init universal_sdhci_init(void)
  717. {
  718. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  719. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  720. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  721. }
  722. /* I2C1 */
  723. static struct i2c_board_info i2c1_devs[] __initdata = {
  724. /* Gyro, To be updated */
  725. };
  726. #ifdef CONFIG_DRM_EXYNOS
  727. static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
  728. .panel = {
  729. .timing = {
  730. .left_margin = 16,
  731. .right_margin = 16,
  732. .upper_margin = 2,
  733. .lower_margin = 28,
  734. .hsync_len = 2,
  735. .vsync_len = 1,
  736. .xres = 480,
  737. .yres = 800,
  738. .refresh = 55,
  739. },
  740. },
  741. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  742. VIDCON0_CLKSEL_LCD,
  743. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  744. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  745. .default_win = 3,
  746. .bpp = 32,
  747. };
  748. #else
  749. /* Frame Buffer */
  750. static struct s3c_fb_pd_win universal_fb_win0 = {
  751. .win_mode = {
  752. .left_margin = 16,
  753. .right_margin = 16,
  754. .upper_margin = 2,
  755. .lower_margin = 28,
  756. .hsync_len = 2,
  757. .vsync_len = 1,
  758. .xres = 480,
  759. .yres = 800,
  760. .refresh = 55,
  761. },
  762. .max_bpp = 32,
  763. .default_bpp = 16,
  764. .virtual_x = 480,
  765. .virtual_y = 2 * 800,
  766. };
  767. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  768. .win[0] = &universal_fb_win0,
  769. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  770. VIDCON0_CLKSEL_LCD,
  771. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  772. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  773. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  774. };
  775. #endif
  776. static struct regulator_consumer_supply cam_vt_dio_supply =
  777. REGULATOR_SUPPLY("vdd_core", "0-003c");
  778. static struct regulator_init_data cam_vt_dio_reg_init_data = {
  779. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  780. .num_consumer_supplies = 1,
  781. .consumer_supplies = &cam_vt_dio_supply,
  782. };
  783. static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
  784. .supply_name = "CAM_VT_D_IO",
  785. .microvolts = 2800000,
  786. .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
  787. .enable_high = 1,
  788. .init_data = &cam_vt_dio_reg_init_data,
  789. };
  790. static struct platform_device cam_vt_dio_fixed_reg_dev = {
  791. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
  792. .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
  793. };
  794. static struct regulator_consumer_supply cam_i_core_supply =
  795. REGULATOR_SUPPLY("core", "0-001f");
  796. static struct regulator_init_data cam_i_core_reg_init_data = {
  797. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  798. .num_consumer_supplies = 1,
  799. .consumer_supplies = &cam_i_core_supply,
  800. };
  801. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  802. .supply_name = "CAM_I_CORE_1.2V",
  803. .microvolts = 1200000,
  804. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  805. .enable_high = 1,
  806. .init_data = &cam_i_core_reg_init_data,
  807. };
  808. static struct platform_device cam_i_core_fixed_reg_dev = {
  809. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  810. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  811. };
  812. static struct regulator_consumer_supply cam_s_if_supply =
  813. REGULATOR_SUPPLY("d_sensor", "0-001f");
  814. static struct regulator_init_data cam_s_if_reg_init_data = {
  815. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  816. .num_consumer_supplies = 1,
  817. .consumer_supplies = &cam_s_if_supply,
  818. };
  819. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  820. .supply_name = "CAM_S_IF_1.8V",
  821. .microvolts = 1800000,
  822. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  823. .enable_high = 1,
  824. .init_data = &cam_s_if_reg_init_data,
  825. };
  826. static struct platform_device cam_s_if_fixed_reg_dev = {
  827. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  828. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  829. };
  830. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  831. .clk_rate = 166000000UL,
  832. .lanes = 2,
  833. .alignment = 32,
  834. .hs_settle = 12,
  835. .phy_enable = s5p_csis_phy_enable,
  836. };
  837. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  838. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  839. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  840. #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
  841. #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
  842. static int s5k6aa_set_power(int on)
  843. {
  844. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  845. return 0;
  846. }
  847. static struct s5k6aa_platform_data s5k6aa_platdata = {
  848. .mclk_frequency = 21600000UL,
  849. .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
  850. .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
  851. .bus_type = V4L2_MBUS_PARALLEL,
  852. .horiz_flip = 1,
  853. .set_power = s5k6aa_set_power,
  854. };
  855. static struct i2c_board_info s5k6aa_board_info = {
  856. I2C_BOARD_INFO("S5K6AA", 0x3C),
  857. .platform_data = &s5k6aa_platdata,
  858. };
  859. static int m5mols_set_power(struct device *dev, int on)
  860. {
  861. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  862. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  863. return 0;
  864. }
  865. static struct m5mols_platform_data m5mols_platdata = {
  866. .gpio_reset = GPIO_CAM_MEGA_nRST,
  867. .reset_polarity = 0,
  868. .set_power = m5mols_set_power,
  869. };
  870. static struct i2c_board_info m5mols_board_info = {
  871. I2C_BOARD_INFO("M5MOLS", 0x1F),
  872. .platform_data = &m5mols_platdata,
  873. };
  874. static struct s5p_fimc_isp_info universal_camera_sensors[] = {
  875. {
  876. .mux_id = 0,
  877. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  878. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  879. .bus_type = FIMC_ITU_601,
  880. .board_info = &s5k6aa_board_info,
  881. .i2c_bus_num = 0,
  882. .clk_frequency = 24000000UL,
  883. }, {
  884. .mux_id = 0,
  885. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  886. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  887. .bus_type = FIMC_MIPI_CSI2,
  888. .board_info = &m5mols_board_info,
  889. .i2c_bus_num = 0,
  890. .clk_frequency = 24000000UL,
  891. .csi_data_align = 32,
  892. },
  893. };
  894. static struct s5p_platform_fimc fimc_md_platdata = {
  895. .isp_info = universal_camera_sensors,
  896. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  897. };
  898. static struct gpio universal_camera_gpios[] = {
  899. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  900. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  901. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  902. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  903. { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
  904. { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
  905. };
  906. static void __init universal_camera_init(void)
  907. {
  908. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  909. &s5p_device_mipi_csis0);
  910. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  911. &s5p_device_fimc_md);
  912. if (gpio_request_array(universal_camera_gpios,
  913. ARRAY_SIZE(universal_camera_gpios))) {
  914. pr_err("%s: GPIO request failed\n", __func__);
  915. return;
  916. }
  917. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  918. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  919. else
  920. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  921. /* Free GPIOs controlled directly by the sensor drivers. */
  922. gpio_free(GPIO_CAM_MEGA_nRST);
  923. gpio_free(GPIO_CAM_8M_ISP_INT);
  924. gpio_free(GPIO_CAM_VGA_NRST);
  925. gpio_free(GPIO_CAM_VGA_NSTBY);
  926. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  927. pr_err("Camera port A setup failed\n");
  928. }
  929. static struct platform_device *universal_devices[] __initdata = {
  930. /* Samsung Platform Devices */
  931. &s5p_device_mipi_csis0,
  932. &s5p_device_fimc0,
  933. &s5p_device_fimc1,
  934. &s5p_device_fimc2,
  935. &s5p_device_fimc3,
  936. &s5p_device_g2d,
  937. &mmc0_fixed_voltage,
  938. &s3c_device_hsmmc0,
  939. &s3c_device_hsmmc2,
  940. &s3c_device_hsmmc3,
  941. &s3c_device_i2c0,
  942. &s3c_device_i2c3,
  943. &s3c_device_i2c5,
  944. &s5p_device_i2c_hdmiphy,
  945. &hdmi_fixed_voltage,
  946. &s5p_device_hdmi,
  947. &s5p_device_sdo,
  948. &s5p_device_mixer,
  949. /* Universal Devices */
  950. &i2c_gpio12,
  951. &universal_gpio_keys,
  952. &s5p_device_onenand,
  953. &s5p_device_fimd0,
  954. &s5p_device_jpeg,
  955. #ifdef CONFIG_DRM_EXYNOS
  956. &exynos_device_drm,
  957. #endif
  958. &s5p_device_mfc,
  959. &s5p_device_mfc_l,
  960. &s5p_device_mfc_r,
  961. &cam_vt_dio_fixed_reg_dev,
  962. &cam_i_core_fixed_reg_dev,
  963. &cam_s_if_fixed_reg_dev,
  964. &s5p_device_fimc_md,
  965. };
  966. static void __init universal_map_io(void)
  967. {
  968. clk_xusbxti.rate = 24000000;
  969. exynos_init_io(NULL, 0);
  970. s3c24xx_init_clocks(24000000);
  971. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  972. s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
  973. }
  974. static void s5p_tv_setup(void)
  975. {
  976. /* direct HPD to HDMI chip */
  977. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  978. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  979. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  980. }
  981. static void __init universal_reserve(void)
  982. {
  983. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  984. }
  985. static void __init universal_machine_init(void)
  986. {
  987. universal_sdhci_init();
  988. s5p_tv_setup();
  989. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  990. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  991. universal_tsp_init();
  992. s3c_i2c3_set_platdata(NULL);
  993. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  994. s3c_i2c5_set_platdata(NULL);
  995. s5p_i2c_hdmiphy_set_platdata(NULL);
  996. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  997. #ifdef CONFIG_DRM_EXYNOS
  998. s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
  999. exynos4_fimd0_gpio_setup_24bpp();
  1000. #else
  1001. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  1002. #endif
  1003. universal_touchkey_init();
  1004. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  1005. ARRAY_SIZE(i2c_gpio12_devs));
  1006. universal_camera_init();
  1007. /* Last */
  1008. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  1009. }
  1010. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  1011. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  1012. .atag_offset = 0x100,
  1013. .init_irq = exynos4_init_irq,
  1014. .map_io = universal_map_io,
  1015. .handle_irq = gic_handle_irq,
  1016. .init_machine = universal_machine_init,
  1017. .timer = &s5p_timer,
  1018. .reserve = &universal_reserve,
  1019. .restart = exynos4_restart,
  1020. MACHINE_END