mantis_hif.c 7.2 KB

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  1. /*
  2. Mantis PCI bridge driver
  3. Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include "mantis_common.h"
  17. #include "mantis_hif.h"
  18. #include "mantis_link.h" /* temporary due to physical layer stuff */
  19. static int mantis_hif_data_available(struct mantis_ca *ca)
  20. {
  21. struct mantis_pci *mantis = ca->ca_priv;
  22. int rc = 0;
  23. if (wait_event_interruptible_timeout(ca->hif_data_wq,
  24. ca->sbuf_status & MANTIS_SBUF_DATA_AVAIL,
  25. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  26. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Read wait event timeout !", mantis->num);
  27. rc = -EREMOTEIO;
  28. }
  29. ca->sbuf_status &= ~MANTIS_SBUF_DATA_AVAIL;
  30. udelay(2);
  31. return rc;
  32. }
  33. static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
  34. {
  35. struct mantis_pci *mantis = ca->ca_priv;
  36. int rc = 0;
  37. if (wait_event_timeout(ca->hif_opdone_wq,
  38. ca->hif_event & MANTIS_SBUF_OPDONE,
  39. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  40. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
  41. rc = -EREMOTEIO;
  42. }
  43. dprintk(verbose, MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
  44. ca->hif_event &= ~MANTIS_SBUF_OPDONE;
  45. return rc;
  46. }
  47. static int mantis_hif_write_wait(struct mantis_ca *ca)
  48. {
  49. struct mantis_pci *mantis = ca->ca_priv;
  50. u32 opdone = 0, timeout = 0;
  51. int rc = 0;
  52. if (wait_event_timeout(ca->hif_write_wq,
  53. mantis->gpif_status & MANTIS_GPIF_WRACK,
  54. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  55. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write ACK timed out !", mantis->num);
  56. rc = -EREMOTEIO;
  57. }
  58. dprintk(verbose, MANTIS_DEBUG, 1, "Write Acknowledged");
  59. mantis->gpif_status &= ~MANTIS_GPIF_WRACK;
  60. while (!opdone) {
  61. opdone = (mmread(MANTIS_GPIF_STATUS) & MANTIS_SBUF_OPDONE);
  62. udelay(500);
  63. timeout++;
  64. if (timeout > 100) {
  65. dprintk(verbose, MANTIS_ERROR, 1, "Adater(%d) Slot(0): Write operation timed out!", mantis->num);
  66. rc = -ETIMEDOUT;
  67. break;
  68. }
  69. }
  70. dprintk(verbose, MANTIS_DEBUG, 1, "HIF Write success");
  71. return rc;
  72. }
  73. int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
  74. {
  75. struct mantis_pci *mantis = ca->ca_priv;
  76. u32 hif_addr = 0, data, count = 4;
  77. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
  78. mutex_lock(&ca->ca_lock);
  79. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  80. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  81. hif_addr |= MANTIS_HIF_STATUS;
  82. hif_addr |= addr;
  83. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  84. mmwrite(count, MANTIS_GPIF_BRBYTES);
  85. udelay(20);
  86. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  87. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  88. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
  89. mutex_unlock(&ca->ca_lock);
  90. return -EREMOTEIO;
  91. }
  92. data = mmread(MANTIS_GPIF_DIN);
  93. mutex_unlock(&ca->ca_lock);
  94. dprintk(verbose, MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
  95. return (data >> 24) & 0xff;
  96. }
  97. int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
  98. {
  99. struct mantis_slot *slot = ca->slot;
  100. struct mantis_pci *mantis = ca->ca_priv;
  101. u32 hif_addr = 0;
  102. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
  103. mutex_lock(&ca->ca_lock);
  104. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  105. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  106. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  107. hif_addr |= MANTIS_HIF_STATUS;
  108. hif_addr |= addr;
  109. mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
  110. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  111. mmwrite(data, MANTIS_GPIF_DOUT);
  112. if (mantis_hif_write_wait(ca) != 0) {
  113. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  114. mutex_unlock(&ca->ca_lock);
  115. return -EREMOTEIO;
  116. }
  117. dprintk(verbose, MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
  118. mutex_unlock(&ca->ca_lock);
  119. return 0;
  120. }
  121. int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
  122. {
  123. struct mantis_pci *mantis = ca->ca_priv;
  124. u32 data, hif_addr = 0;
  125. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
  126. mutex_lock(&ca->ca_lock);
  127. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  128. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  129. hif_addr |= MANTIS_HIF_STATUS;
  130. hif_addr |= addr;
  131. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  132. mmwrite(1, MANTIS_GPIF_BRBYTES);
  133. udelay(20);
  134. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  135. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  136. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  137. mutex_unlock(&ca->ca_lock);
  138. return -EREMOTEIO;
  139. }
  140. data = mmread(MANTIS_GPIF_DIN);
  141. dprintk(verbose, MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
  142. udelay(50);
  143. mutex_unlock(&ca->ca_lock);
  144. return (u8) data;
  145. }
  146. int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
  147. {
  148. struct mantis_pci *mantis = ca->ca_priv;
  149. u32 hif_addr = 0;
  150. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
  151. mutex_lock(&ca->ca_lock);
  152. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  153. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  154. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  155. hif_addr |= MANTIS_HIF_STATUS;
  156. hif_addr |= addr;
  157. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  158. mmwrite(data, MANTIS_GPIF_DOUT);
  159. if (mantis_hif_write_wait(ca) != 0) {
  160. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  161. mutex_unlock(&ca->ca_lock);
  162. return -EREMOTEIO;
  163. }
  164. dprintk(verbose, MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
  165. mutex_unlock(&ca->ca_lock);
  166. udelay(50);
  167. return 0;
  168. }
  169. int mantis_hif_init(struct mantis_ca *ca)
  170. {
  171. struct mantis_slot *slot = ca->slot;
  172. struct mantis_pci *mantis = ca->ca_priv;
  173. u32 irqcfg;
  174. slot[0].slave_cfg = 0x70773028;
  175. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
  176. init_waitqueue_head(&ca->hif_data_wq);
  177. init_waitqueue_head(&ca->hif_opdone_wq);
  178. init_waitqueue_head(&ca->hif_write_wq);
  179. mutex_lock(&ca->ca_lock);
  180. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  181. irqcfg = MANTIS_MASK_BRRDY |
  182. MANTIS_MASK_WRACK |
  183. MANTIS_MASK_EXTIRQ |
  184. MANTIS_MASK_WSTO |
  185. MANTIS_MASK_OTHERR |
  186. MANTIS_MASK_OVFLW;
  187. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  188. mutex_unlock(&ca->ca_lock);
  189. return 0;
  190. }
  191. void mantis_hif_exit(struct mantis_ca *ca)
  192. {
  193. struct mantis_pci *mantis = ca->ca_priv;
  194. u32 irqcfg;
  195. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
  196. mutex_lock(&ca->ca_lock);
  197. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  198. irqcfg &= ~MANTIS_MASK_BRRDY;
  199. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  200. mutex_unlock(&ca->ca_lock);
  201. }