proc.c 2.7 KB

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  1. /*
  2. * linux/arch/mips/kernel/proc.c
  3. *
  4. * Copyright (C) 1995, 1996, 2001 Ralf Baechle
  5. * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
  6. * Copyright (C) 2004 Maciej W. Rozycki
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/kernel.h>
  10. #include <linux/sched.h>
  11. #include <linux/seq_file.h>
  12. #include <asm/bootinfo.h>
  13. #include <asm/cpu.h>
  14. #include <asm/cpu-features.h>
  15. #include <asm/mipsregs.h>
  16. #include <asm/processor.h>
  17. unsigned int vced_count, vcei_count;
  18. static int show_cpuinfo(struct seq_file *m, void *v)
  19. {
  20. unsigned long n = (unsigned long) v - 1;
  21. unsigned int version = cpu_data[n].processor_id;
  22. unsigned int fp_vers = cpu_data[n].fpu_id;
  23. char fmt [64];
  24. #ifdef CONFIG_SMP
  25. if (!cpu_isset(n, cpu_online_map))
  26. return 0;
  27. #endif
  28. /*
  29. * For the first processor also print the system type
  30. */
  31. if (n == 0)
  32. seq_printf(m, "system type\t\t: %s\n", get_system_type());
  33. seq_printf(m, "processor\t\t: %ld\n", n);
  34. sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
  35. cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
  36. seq_printf(m, fmt, __cpu_name[smp_processor_id()],
  37. (version >> 4) & 0x0f, version & 0x0f,
  38. (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
  39. seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
  40. cpu_data[n].udelay_val / (500000/HZ),
  41. (cpu_data[n].udelay_val / (5000/HZ)) % 100);
  42. seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
  43. seq_printf(m, "microsecond timers\t: %s\n",
  44. cpu_has_counter ? "yes" : "no");
  45. seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
  46. seq_printf(m, "extra interrupt vector\t: %s\n",
  47. cpu_has_divec ? "yes" : "no");
  48. seq_printf(m, "hardware watchpoint\t: %s\n",
  49. cpu_has_watch ? "yes" : "no");
  50. seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
  51. cpu_has_mips16 ? " mips16" : "",
  52. cpu_has_mdmx ? " mdmx" : "",
  53. cpu_has_mips3d ? " mips3d" : "",
  54. cpu_has_smartmips ? " smartmips" : "",
  55. cpu_has_dsp ? " dsp" : "",
  56. cpu_has_mipsmt ? " mt" : ""
  57. );
  58. seq_printf(m, "shadow register sets\t: %d\n",
  59. cpu_data[n].srsets);
  60. sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
  61. cpu_has_vce ? "%u" : "not available");
  62. seq_printf(m, fmt, 'D', vced_count);
  63. seq_printf(m, fmt, 'I', vcei_count);
  64. seq_printf(m, "\n");
  65. return 0;
  66. }
  67. static void *c_start(struct seq_file *m, loff_t *pos)
  68. {
  69. unsigned long i = *pos;
  70. return i < NR_CPUS ? (void *) (i + 1) : NULL;
  71. }
  72. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  73. {
  74. ++*pos;
  75. return c_start(m, pos);
  76. }
  77. static void c_stop(struct seq_file *m, void *v)
  78. {
  79. }
  80. struct seq_operations cpuinfo_op = {
  81. .start = c_start,
  82. .next = c_next,
  83. .stop = c_stop,
  84. .show = show_cpuinfo,
  85. };