octeon_edac-pc.c 3.3 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2009 Wind River Systems,
  7. * written by Ralf Baechle <ralf@linux-mips.org>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. #include <linux/slab.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/io.h>
  14. #include <linux/edac.h>
  15. #include "edac_core.h"
  16. #include "edac_module.h"
  17. #include <asm/octeon/cvmx.h>
  18. #include <asm/mipsregs.h>
  19. #define EDAC_MOD_STR "octeon"
  20. extern int register_co_cache_error_notifier(struct notifier_block *nb);
  21. extern int unregister_co_cache_error_notifier(struct notifier_block *nb);
  22. extern unsigned long long cache_err_dcache[NR_CPUS];
  23. static struct edac_device_ctl_info *ed_cavium;
  24. /*
  25. * EDAC CPU cache error callback
  26. *
  27. */
  28. static int co_cache_error_event(struct notifier_block *this,
  29. unsigned long event, void *ptr)
  30. {
  31. unsigned int core = cvmx_get_core_num();
  32. unsigned int cpu = smp_processor_id();
  33. uint64_t icache_err = read_octeon_c0_icacheerr();
  34. struct edac_device_ctl_info *ed = ed_cavium;
  35. edac_device_printk(ed, KERN_ERR,
  36. "Cache error exception on core %d / processor %d:\n",
  37. core, cpu);
  38. edac_device_printk(ed, KERN_ERR,
  39. "cp0_errorepc == %lx\n", read_c0_errorepc());
  40. if (icache_err & 1) {
  41. edac_device_printk(ed, KERN_ERR, "CacheErr (Icache) == %llx\n",
  42. (unsigned long long)icache_err);
  43. write_octeon_c0_icacheerr(0);
  44. edac_device_handle_ce(ed, 0, 0, ed->ctl_name);
  45. }
  46. if (cache_err_dcache[core] & 1) {
  47. edac_device_printk(ed, KERN_ERR, "CacheErr (Dcache) == %llx\n",
  48. (unsigned long long)cache_err_dcache[core]);
  49. cache_err_dcache[core] = 0;
  50. edac_device_handle_ue(ed, 0, 0, ed->ctl_name);
  51. }
  52. return NOTIFY_DONE;
  53. }
  54. static struct notifier_block co_cache_error_notifier = {
  55. .notifier_call = co_cache_error_event,
  56. };
  57. static int __devinit co_cache_error_probe(struct platform_device *pdev)
  58. {
  59. struct edac_device_ctl_info *ed;
  60. int res = 0;
  61. ed = edac_device_alloc_ctl_info(0, "cpu", 1, NULL, 0, 0, NULL, 0,
  62. edac_device_alloc_index());
  63. ed->dev = &pdev->dev;
  64. platform_set_drvdata(pdev, ed);
  65. ed->dev_name = dev_name(&pdev->dev);
  66. ed->mod_name = "octeon-cpu";
  67. ed->ctl_name = "co_cpu_err";
  68. if (edac_device_add_device(ed) > 0) {
  69. pr_err("%s: edac_device_add_device() failed\n", __func__);
  70. goto err;
  71. }
  72. register_co_cache_error_notifier(&co_cache_error_notifier);
  73. ed_cavium = ed;
  74. return 0;
  75. err:
  76. edac_device_free_ctl_info(ed);
  77. return res;
  78. }
  79. static int co_cache_error_remove(struct platform_device *pdev)
  80. {
  81. struct edac_device_ctl_info *ed = platform_get_drvdata(pdev);
  82. unregister_co_cache_error_notifier(&co_cache_error_notifier);
  83. ed_cavium = NULL;
  84. edac_device_del_device(&pdev->dev);
  85. edac_device_free_ctl_info(ed);
  86. return 0;
  87. }
  88. static struct platform_driver co_cache_error_driver = {
  89. .probe = co_cache_error_probe,
  90. .remove = co_cache_error_remove,
  91. .driver = {
  92. .name = "co_pc_edac",
  93. }
  94. };
  95. static int __init co_edac_init(void)
  96. {
  97. int ret;
  98. ret = platform_driver_register(&co_cache_error_driver);
  99. if (ret)
  100. pr_warning(EDAC_MOD_STR "CPU err failed to register\n");
  101. return ret;
  102. }
  103. static void __exit co_edac_exit(void)
  104. {
  105. platform_driver_unregister(&co_cache_error_driver);
  106. }
  107. module_init(co_edac_init);
  108. module_exit(co_edac_exit);
  109. MODULE_LICENSE("GPL");
  110. MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");