spear13xx.dtsi 5.8 KB

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  1. /*
  2. * DTS file for all SPEAr13xx SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&gic>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu@0 {
  20. compatible = "arm,cortex-a9";
  21. reg = <0>;
  22. next-level-cache = <&L2>;
  23. };
  24. cpu@1 {
  25. compatible = "arm,cortex-a9";
  26. reg = <1>;
  27. next-level-cache = <&L2>;
  28. };
  29. };
  30. gic: interrupt-controller@ec801000 {
  31. compatible = "arm,cortex-a9-gic";
  32. interrupt-controller;
  33. #interrupt-cells = <3>;
  34. reg = < 0xec801000 0x1000 >,
  35. < 0xec800100 0x0100 >;
  36. };
  37. pmu {
  38. compatible = "arm,cortex-a9-pmu";
  39. interrupts = <0 6 0x04
  40. 0 7 0x04>;
  41. };
  42. L2: l2-cache {
  43. compatible = "arm,pl310-cache";
  44. reg = <0xed000000 0x1000>;
  45. cache-unified;
  46. cache-level = <2>;
  47. };
  48. memory {
  49. name = "memory";
  50. device_type = "memory";
  51. reg = <0 0x40000000>;
  52. };
  53. chosen {
  54. bootargs = "console=ttyAMA0,115200";
  55. };
  56. ahb {
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. compatible = "simple-bus";
  60. ranges = <0x50000000 0x50000000 0x10000000
  61. 0xb0000000 0xb0000000 0x10000000
  62. 0xd0000000 0xd0000000 0x02000000
  63. 0xd8000000 0xd8000000 0x01000000
  64. 0xe0000000 0xe0000000 0x10000000>;
  65. sdhci@b3000000 {
  66. compatible = "st,sdhci-spear";
  67. reg = <0xb3000000 0x100>;
  68. interrupts = <0 28 0x4>;
  69. status = "disabled";
  70. };
  71. cf@b2800000 {
  72. compatible = "arasan,cf-spear1340";
  73. reg = <0xb2800000 0x1000>;
  74. interrupts = <0 29 0x4>;
  75. status = "disabled";
  76. };
  77. dma@ea800000 {
  78. compatible = "snps,dma-spear1340";
  79. reg = <0xea800000 0x1000>;
  80. interrupts = <0 19 0x4>;
  81. status = "disabled";
  82. };
  83. dma@eb000000 {
  84. compatible = "snps,dma-spear1340";
  85. reg = <0xeb000000 0x1000>;
  86. interrupts = <0 59 0x4>;
  87. status = "disabled";
  88. };
  89. fsmc: flash@b0000000 {
  90. compatible = "st,spear600-fsmc-nand";
  91. #address-cells = <1>;
  92. #size-cells = <1>;
  93. reg = <0xb0000000 0x1000 /* FSMC Register */
  94. 0xb0800000 0x0010>; /* NAND Base */
  95. reg-names = "fsmc_regs", "nand_data";
  96. interrupts = <0 20 0x4
  97. 0 21 0x4
  98. 0 22 0x4
  99. 0 23 0x4>;
  100. st,ale-off = <0x20000>;
  101. st,cle-off = <0x10000>;
  102. st,mode = <2>;
  103. status = "disabled";
  104. };
  105. gmac0: eth@e2000000 {
  106. compatible = "st,spear600-gmac";
  107. reg = <0xe2000000 0x8000>;
  108. interrupts = <0 33 0x4
  109. 0 34 0x4>;
  110. interrupt-names = "macirq", "eth_wake_irq";
  111. status = "disabled";
  112. };
  113. smi: flash@ea000000 {
  114. compatible = "st,spear600-smi";
  115. #address-cells = <1>;
  116. #size-cells = <1>;
  117. reg = <0xea000000 0x1000>;
  118. interrupts = <0 30 0x4>;
  119. status = "disabled";
  120. };
  121. ehci@e4800000 {
  122. compatible = "st,spear600-ehci", "usb-ehci";
  123. reg = <0xe4800000 0x1000>;
  124. interrupts = <0 64 0x4>;
  125. usbh0_id = <0>;
  126. status = "disabled";
  127. };
  128. ehci@e5800000 {
  129. compatible = "st,spear600-ehci", "usb-ehci";
  130. reg = <0xe5800000 0x1000>;
  131. interrupts = <0 66 0x4>;
  132. usbh1_id = <1>;
  133. status = "disabled";
  134. };
  135. ohci@e4000000 {
  136. compatible = "st,spear600-ohci", "usb-ohci";
  137. reg = <0xe4000000 0x1000>;
  138. interrupts = <0 65 0x4>;
  139. usbh0_id = <0>;
  140. status = "disabled";
  141. };
  142. ohci@e5000000 {
  143. compatible = "st,spear600-ohci", "usb-ohci";
  144. reg = <0xe5000000 0x1000>;
  145. interrupts = <0 67 0x4>;
  146. usbh1_id = <1>;
  147. status = "disabled";
  148. };
  149. apb {
  150. #address-cells = <1>;
  151. #size-cells = <1>;
  152. compatible = "simple-bus";
  153. ranges = <0x50000000 0x50000000 0x10000000
  154. 0xb0000000 0xb0000000 0x10000000
  155. 0xd0000000 0xd0000000 0x02000000
  156. 0xd8000000 0xd8000000 0x01000000
  157. 0xe0000000 0xe0000000 0x10000000>;
  158. gpio0: gpio@e0600000 {
  159. compatible = "arm,pl061", "arm,primecell";
  160. reg = <0xe0600000 0x1000>;
  161. interrupts = <0 24 0x4>;
  162. gpio-controller;
  163. #gpio-cells = <2>;
  164. interrupt-controller;
  165. #interrupt-cells = <2>;
  166. status = "disabled";
  167. };
  168. gpio1: gpio@e0680000 {
  169. compatible = "arm,pl061", "arm,primecell";
  170. reg = <0xe0680000 0x1000>;
  171. interrupts = <0 25 0x4>;
  172. gpio-controller;
  173. #gpio-cells = <2>;
  174. interrupt-controller;
  175. #interrupt-cells = <2>;
  176. status = "disabled";
  177. };
  178. kbd@e0300000 {
  179. compatible = "st,spear300-kbd";
  180. reg = <0xe0300000 0x1000>;
  181. interrupts = <0 52 0x4>;
  182. status = "disabled";
  183. };
  184. i2c0: i2c@e0280000 {
  185. #address-cells = <1>;
  186. #size-cells = <0>;
  187. compatible = "snps,designware-i2c";
  188. reg = <0xe0280000 0x1000>;
  189. interrupts = <0 41 0x4>;
  190. status = "disabled";
  191. };
  192. spi0: spi@e0100000 {
  193. compatible = "arm,pl022", "arm,primecell";
  194. reg = <0xe0100000 0x1000>;
  195. interrupts = <0 31 0x4>;
  196. status = "disabled";
  197. };
  198. rtc@e0580000 {
  199. compatible = "st,spear600-rtc";
  200. reg = <0xe0580000 0x1000>;
  201. interrupts = <0 36 0x4>;
  202. status = "disabled";
  203. };
  204. serial@e0000000 {
  205. compatible = "arm,pl011", "arm,primecell";
  206. reg = <0xe0000000 0x1000>;
  207. interrupts = <0 35 0x4>;
  208. status = "disabled";
  209. };
  210. adc@e0080000 {
  211. compatible = "st,spear600-adc";
  212. reg = <0xe0080000 0x1000>;
  213. interrupts = <0 12 0x4>;
  214. status = "disabled";
  215. };
  216. timer@e0380000 {
  217. compatible = "st,spear-timer";
  218. reg = <0xe0380000 0x400>;
  219. interrupts = <0 37 0x4>;
  220. };
  221. timer@ec800600 {
  222. compatible = "arm,cortex-a9-twd-timer";
  223. reg = <0xec800600 0x20>;
  224. interrupts = <1 13 0x4>;
  225. status = "disabled";
  226. };
  227. wdt@ec800620 {
  228. compatible = "arm,cortex-a9-twd-wdt";
  229. reg = <0xec800620 0x20>;
  230. status = "disabled";
  231. };
  232. thermal@e07008c4 {
  233. compatible = "st,thermal-spear1340";
  234. reg = <0xe07008c4 0x4>;
  235. thermal_flags = <0x7000>;
  236. };
  237. };
  238. };
  239. };