netxen_nic_main.c 45 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828
  1. /*
  2. * Copyright (C) 2003 - 2009 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen Inc,
  26. * 18922 Forge Drive
  27. * Cupertino, CA 95014-0701
  28. *
  29. */
  30. #include <linux/vmalloc.h>
  31. #include <linux/interrupt.h>
  32. #include "netxen_nic_hw.h"
  33. #include "netxen_nic.h"
  34. #include "netxen_nic_phan_reg.h"
  35. #include <linux/dma-mapping.h>
  36. #include <linux/if_vlan.h>
  37. #include <net/ip.h>
  38. #include <linux/ipv6.h>
  39. MODULE_DESCRIPTION("NetXen Multi port (1/10) Gigabit Network Driver");
  40. MODULE_LICENSE("GPL");
  41. MODULE_VERSION(NETXEN_NIC_LINUX_VERSIONID);
  42. char netxen_nic_driver_name[] = "netxen_nic";
  43. static char netxen_nic_driver_string[] = "NetXen Network Driver version "
  44. NETXEN_NIC_LINUX_VERSIONID;
  45. static int port_mode = NETXEN_PORT_MODE_AUTO_NEG;
  46. /* Default to restricted 1G auto-neg mode */
  47. static int wol_port_mode = 5;
  48. static int use_msi = 1;
  49. static int use_msi_x = 1;
  50. /* Local functions to NetXen NIC driver */
  51. static int __devinit netxen_nic_probe(struct pci_dev *pdev,
  52. const struct pci_device_id *ent);
  53. static void __devexit netxen_nic_remove(struct pci_dev *pdev);
  54. static int netxen_nic_open(struct net_device *netdev);
  55. static int netxen_nic_close(struct net_device *netdev);
  56. static int netxen_nic_xmit_frame(struct sk_buff *, struct net_device *);
  57. static void netxen_tx_timeout(struct net_device *netdev);
  58. static void netxen_tx_timeout_task(struct work_struct *work);
  59. static void netxen_watchdog(unsigned long);
  60. static int netxen_nic_poll(struct napi_struct *napi, int budget);
  61. #ifdef CONFIG_NET_POLL_CONTROLLER
  62. static void netxen_nic_poll_controller(struct net_device *netdev);
  63. #endif
  64. static irqreturn_t netxen_intr(int irq, void *data);
  65. static irqreturn_t netxen_msi_intr(int irq, void *data);
  66. static irqreturn_t netxen_msix_intr(int irq, void *data);
  67. /* PCI Device ID Table */
  68. #define ENTRY(device) \
  69. {PCI_DEVICE(PCI_VENDOR_ID_NETXEN, (device)), \
  70. .class = PCI_CLASS_NETWORK_ETHERNET << 8, .class_mask = ~0}
  71. static struct pci_device_id netxen_pci_tbl[] __devinitdata = {
  72. ENTRY(PCI_DEVICE_ID_NX2031_10GXSR),
  73. ENTRY(PCI_DEVICE_ID_NX2031_10GCX4),
  74. ENTRY(PCI_DEVICE_ID_NX2031_4GCU),
  75. ENTRY(PCI_DEVICE_ID_NX2031_IMEZ),
  76. ENTRY(PCI_DEVICE_ID_NX2031_HMEZ),
  77. ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT),
  78. ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT2),
  79. ENTRY(PCI_DEVICE_ID_NX3031),
  80. {0,}
  81. };
  82. MODULE_DEVICE_TABLE(pci, netxen_pci_tbl);
  83. static struct workqueue_struct *netxen_workq;
  84. #define SCHEDULE_WORK(tp) queue_work(netxen_workq, tp)
  85. #define FLUSH_SCHEDULED_WORK() flush_workqueue(netxen_workq)
  86. static void netxen_watchdog(unsigned long);
  87. static uint32_t crb_cmd_producer[4] = {
  88. CRB_CMD_PRODUCER_OFFSET, CRB_CMD_PRODUCER_OFFSET_1,
  89. CRB_CMD_PRODUCER_OFFSET_2, CRB_CMD_PRODUCER_OFFSET_3
  90. };
  91. void
  92. netxen_nic_update_cmd_producer(struct netxen_adapter *adapter,
  93. struct nx_host_tx_ring *tx_ring)
  94. {
  95. NXWR32(adapter, tx_ring->crb_cmd_producer, tx_ring->producer);
  96. if (netxen_tx_avail(tx_ring) <= TX_STOP_THRESH) {
  97. netif_stop_queue(adapter->netdev);
  98. smp_mb();
  99. }
  100. }
  101. static uint32_t crb_cmd_consumer[4] = {
  102. CRB_CMD_CONSUMER_OFFSET, CRB_CMD_CONSUMER_OFFSET_1,
  103. CRB_CMD_CONSUMER_OFFSET_2, CRB_CMD_CONSUMER_OFFSET_3
  104. };
  105. static inline void
  106. netxen_nic_update_cmd_consumer(struct netxen_adapter *adapter,
  107. struct nx_host_tx_ring *tx_ring)
  108. {
  109. NXWR32(adapter, tx_ring->crb_cmd_consumer, tx_ring->sw_consumer);
  110. }
  111. static uint32_t msi_tgt_status[8] = {
  112. ISR_INT_TARGET_STATUS, ISR_INT_TARGET_STATUS_F1,
  113. ISR_INT_TARGET_STATUS_F2, ISR_INT_TARGET_STATUS_F3,
  114. ISR_INT_TARGET_STATUS_F4, ISR_INT_TARGET_STATUS_F5,
  115. ISR_INT_TARGET_STATUS_F6, ISR_INT_TARGET_STATUS_F7
  116. };
  117. static struct netxen_legacy_intr_set legacy_intr[] = NX_LEGACY_INTR_CONFIG;
  118. static inline void netxen_nic_disable_int(struct nx_host_sds_ring *sds_ring)
  119. {
  120. struct netxen_adapter *adapter = sds_ring->adapter;
  121. NXWR32(adapter, sds_ring->crb_intr_mask, 0);
  122. }
  123. static inline void netxen_nic_enable_int(struct nx_host_sds_ring *sds_ring)
  124. {
  125. struct netxen_adapter *adapter = sds_ring->adapter;
  126. NXWR32(adapter, sds_ring->crb_intr_mask, 0x1);
  127. if (!NETXEN_IS_MSI_FAMILY(adapter))
  128. adapter->pci_write_immediate(adapter,
  129. adapter->legacy_intr.tgt_mask_reg, 0xfbff);
  130. }
  131. static int
  132. netxen_alloc_sds_rings(struct netxen_recv_context *recv_ctx, int count)
  133. {
  134. int size = sizeof(struct nx_host_sds_ring) * count;
  135. recv_ctx->sds_rings = kzalloc(size, GFP_KERNEL);
  136. return (recv_ctx->sds_rings == NULL);
  137. }
  138. static void
  139. netxen_free_sds_rings(struct netxen_recv_context *recv_ctx)
  140. {
  141. if (recv_ctx->sds_rings != NULL)
  142. kfree(recv_ctx->sds_rings);
  143. }
  144. static int
  145. netxen_napi_add(struct netxen_adapter *adapter, struct net_device *netdev)
  146. {
  147. int ring;
  148. struct nx_host_sds_ring *sds_ring;
  149. struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
  150. if (netxen_alloc_sds_rings(recv_ctx, adapter->max_sds_rings))
  151. return 1;
  152. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  153. sds_ring = &recv_ctx->sds_rings[ring];
  154. netif_napi_add(netdev, &sds_ring->napi,
  155. netxen_nic_poll, NETXEN_NETDEV_WEIGHT);
  156. }
  157. return 0;
  158. }
  159. static void
  160. netxen_napi_enable(struct netxen_adapter *adapter)
  161. {
  162. int ring;
  163. struct nx_host_sds_ring *sds_ring;
  164. struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
  165. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  166. sds_ring = &recv_ctx->sds_rings[ring];
  167. napi_enable(&sds_ring->napi);
  168. netxen_nic_enable_int(sds_ring);
  169. }
  170. }
  171. static void
  172. netxen_napi_disable(struct netxen_adapter *adapter)
  173. {
  174. int ring;
  175. struct nx_host_sds_ring *sds_ring;
  176. struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
  177. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  178. sds_ring = &recv_ctx->sds_rings[ring];
  179. netxen_nic_disable_int(sds_ring);
  180. napi_synchronize(&sds_ring->napi);
  181. napi_disable(&sds_ring->napi);
  182. }
  183. }
  184. static int nx_set_dma_mask(struct netxen_adapter *adapter)
  185. {
  186. struct pci_dev *pdev = adapter->pdev;
  187. uint64_t mask, cmask;
  188. adapter->pci_using_dac = 0;
  189. mask = DMA_BIT_MASK(32);
  190. cmask = DMA_BIT_MASK(32);
  191. if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
  192. #ifndef CONFIG_IA64
  193. mask = DMA_BIT_MASK(35);
  194. #endif
  195. } else {
  196. mask = DMA_BIT_MASK(39);
  197. cmask = mask;
  198. }
  199. if (pci_set_dma_mask(pdev, mask) == 0 &&
  200. pci_set_consistent_dma_mask(pdev, cmask) == 0) {
  201. adapter->pci_using_dac = 1;
  202. return 0;
  203. }
  204. return -EIO;
  205. }
  206. /* Update addressable range if firmware supports it */
  207. static int
  208. nx_update_dma_mask(struct netxen_adapter *adapter)
  209. {
  210. int change, shift, err;
  211. uint64_t mask, old_mask, old_cmask;
  212. struct pci_dev *pdev = adapter->pdev;
  213. change = 0;
  214. shift = NXRD32(adapter, CRB_DMA_SHIFT);
  215. if (shift > 32)
  216. return 0;
  217. if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9))
  218. change = 1;
  219. else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4))
  220. change = 1;
  221. if (change) {
  222. old_mask = pdev->dma_mask;
  223. old_cmask = pdev->dev.coherent_dma_mask;
  224. mask = DMA_BIT_MASK(32+shift);
  225. err = pci_set_dma_mask(pdev, mask);
  226. if (err)
  227. goto err_out;
  228. if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
  229. err = pci_set_consistent_dma_mask(pdev, mask);
  230. if (err)
  231. goto err_out;
  232. }
  233. dev_info(&pdev->dev, "using %d-bit dma mask\n", 32+shift);
  234. }
  235. return 0;
  236. err_out:
  237. pci_set_dma_mask(pdev, old_mask);
  238. pci_set_consistent_dma_mask(pdev, old_cmask);
  239. return err;
  240. }
  241. static void netxen_check_options(struct netxen_adapter *adapter)
  242. {
  243. if (adapter->ahw.port_type == NETXEN_NIC_XGBE)
  244. adapter->num_rxd = MAX_RCV_DESCRIPTORS_10G;
  245. else if (adapter->ahw.port_type == NETXEN_NIC_GBE)
  246. adapter->num_rxd = MAX_RCV_DESCRIPTORS_1G;
  247. adapter->msix_supported = 0;
  248. if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
  249. adapter->msix_supported = !!use_msi_x;
  250. adapter->rss_supported = !!use_msi_x;
  251. } else if (adapter->fw_version >= NETXEN_VERSION_CODE(3, 4, 336)) {
  252. switch (adapter->ahw.board_type) {
  253. case NETXEN_BRDTYPE_P2_SB31_10G:
  254. case NETXEN_BRDTYPE_P2_SB31_10G_CX4:
  255. adapter->msix_supported = !!use_msi_x;
  256. adapter->rss_supported = !!use_msi_x;
  257. break;
  258. default:
  259. break;
  260. }
  261. }
  262. adapter->num_txd = MAX_CMD_DESCRIPTORS_HOST;
  263. adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS;
  264. adapter->num_lro_rxd = MAX_LRO_RCV_DESCRIPTORS;
  265. return;
  266. }
  267. static int
  268. netxen_check_hw_init(struct netxen_adapter *adapter, int first_boot)
  269. {
  270. u32 val, timeout;
  271. if (first_boot == 0x55555555) {
  272. /* This is the first boot after power up */
  273. NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
  274. if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
  275. return 0;
  276. /* PCI bus master workaround */
  277. first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4));
  278. if (!(first_boot & 0x4)) {
  279. first_boot |= 0x4;
  280. NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot);
  281. first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4));
  282. }
  283. /* This is the first boot after power up */
  284. first_boot = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
  285. if (first_boot != 0x80000f) {
  286. /* clear the register for future unloads/loads */
  287. NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), 0);
  288. return -EIO;
  289. }
  290. /* Start P2 boot loader */
  291. val = NXRD32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
  292. NXWR32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE, val | 0x1);
  293. timeout = 0;
  294. do {
  295. msleep(1);
  296. val = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc));
  297. if (++timeout > 5000)
  298. return -EIO;
  299. } while (val == NETXEN_BDINFO_MAGIC);
  300. }
  301. return 0;
  302. }
  303. static void netxen_set_port_mode(struct netxen_adapter *adapter)
  304. {
  305. u32 val, data;
  306. val = adapter->ahw.board_type;
  307. if ((val == NETXEN_BRDTYPE_P3_HMEZ) ||
  308. (val == NETXEN_BRDTYPE_P3_XG_LOM)) {
  309. if (port_mode == NETXEN_PORT_MODE_802_3_AP) {
  310. data = NETXEN_PORT_MODE_802_3_AP;
  311. NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
  312. } else if (port_mode == NETXEN_PORT_MODE_XG) {
  313. data = NETXEN_PORT_MODE_XG;
  314. NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
  315. } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_1G) {
  316. data = NETXEN_PORT_MODE_AUTO_NEG_1G;
  317. NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
  318. } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_XG) {
  319. data = NETXEN_PORT_MODE_AUTO_NEG_XG;
  320. NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
  321. } else {
  322. data = NETXEN_PORT_MODE_AUTO_NEG;
  323. NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data);
  324. }
  325. if ((wol_port_mode != NETXEN_PORT_MODE_802_3_AP) &&
  326. (wol_port_mode != NETXEN_PORT_MODE_XG) &&
  327. (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_1G) &&
  328. (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_XG)) {
  329. wol_port_mode = NETXEN_PORT_MODE_AUTO_NEG;
  330. }
  331. NXWR32(adapter, NETXEN_WOL_PORT_MODE, wol_port_mode);
  332. }
  333. }
  334. static void netxen_set_msix_bit(struct pci_dev *pdev, int enable)
  335. {
  336. u32 control;
  337. int pos;
  338. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  339. if (pos) {
  340. pci_read_config_dword(pdev, pos, &control);
  341. if (enable)
  342. control |= PCI_MSIX_FLAGS_ENABLE;
  343. else
  344. control = 0;
  345. pci_write_config_dword(pdev, pos, control);
  346. }
  347. }
  348. static void netxen_init_msix_entries(struct netxen_adapter *adapter, int count)
  349. {
  350. int i;
  351. for (i = 0; i < count; i++)
  352. adapter->msix_entries[i].entry = i;
  353. }
  354. static int
  355. netxen_read_mac_addr(struct netxen_adapter *adapter)
  356. {
  357. int i;
  358. unsigned char *p;
  359. __le64 mac_addr;
  360. struct net_device *netdev = adapter->netdev;
  361. struct pci_dev *pdev = adapter->pdev;
  362. if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
  363. if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0)
  364. return -EIO;
  365. } else {
  366. if (netxen_get_flash_mac_addr(adapter, &mac_addr) != 0)
  367. return -EIO;
  368. }
  369. p = (unsigned char *)&mac_addr;
  370. for (i = 0; i < 6; i++)
  371. netdev->dev_addr[i] = *(p + 5 - i);
  372. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  373. /* set station address */
  374. if (!is_valid_ether_addr(netdev->perm_addr))
  375. dev_warn(&pdev->dev, "Bad MAC address %pM.\n", netdev->dev_addr);
  376. return 0;
  377. }
  378. int netxen_nic_set_mac(struct net_device *netdev, void *p)
  379. {
  380. struct netxen_adapter *adapter = netdev_priv(netdev);
  381. struct sockaddr *addr = p;
  382. if (!is_valid_ether_addr(addr->sa_data))
  383. return -EINVAL;
  384. if (netif_running(netdev)) {
  385. netif_device_detach(netdev);
  386. netxen_napi_disable(adapter);
  387. }
  388. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  389. adapter->macaddr_set(adapter, addr->sa_data);
  390. if (netif_running(netdev)) {
  391. netif_device_attach(netdev);
  392. netxen_napi_enable(adapter);
  393. }
  394. return 0;
  395. }
  396. static void netxen_set_multicast_list(struct net_device *dev)
  397. {
  398. struct netxen_adapter *adapter = netdev_priv(dev);
  399. adapter->set_multi(dev);
  400. }
  401. static const struct net_device_ops netxen_netdev_ops = {
  402. .ndo_open = netxen_nic_open,
  403. .ndo_stop = netxen_nic_close,
  404. .ndo_start_xmit = netxen_nic_xmit_frame,
  405. .ndo_get_stats = netxen_nic_get_stats,
  406. .ndo_validate_addr = eth_validate_addr,
  407. .ndo_set_multicast_list = netxen_set_multicast_list,
  408. .ndo_set_mac_address = netxen_nic_set_mac,
  409. .ndo_change_mtu = netxen_nic_change_mtu,
  410. .ndo_tx_timeout = netxen_tx_timeout,
  411. #ifdef CONFIG_NET_POLL_CONTROLLER
  412. .ndo_poll_controller = netxen_nic_poll_controller,
  413. #endif
  414. };
  415. static void
  416. netxen_setup_intr(struct netxen_adapter *adapter)
  417. {
  418. struct netxen_legacy_intr_set *legacy_intrp;
  419. struct pci_dev *pdev = adapter->pdev;
  420. int err, num_msix;
  421. if (adapter->rss_supported) {
  422. num_msix = (num_online_cpus() >= MSIX_ENTRIES_PER_ADAPTER) ?
  423. MSIX_ENTRIES_PER_ADAPTER : 2;
  424. } else
  425. num_msix = 1;
  426. adapter->max_sds_rings = 1;
  427. adapter->flags &= ~(NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED);
  428. if (adapter->ahw.revision_id >= NX_P3_B0)
  429. legacy_intrp = &legacy_intr[adapter->ahw.pci_func];
  430. else
  431. legacy_intrp = &legacy_intr[0];
  432. adapter->legacy_intr.int_vec_bit = legacy_intrp->int_vec_bit;
  433. adapter->legacy_intr.tgt_status_reg = legacy_intrp->tgt_status_reg;
  434. adapter->legacy_intr.tgt_mask_reg = legacy_intrp->tgt_mask_reg;
  435. adapter->legacy_intr.pci_int_reg = legacy_intrp->pci_int_reg;
  436. netxen_set_msix_bit(pdev, 0);
  437. if (adapter->msix_supported) {
  438. netxen_init_msix_entries(adapter, num_msix);
  439. err = pci_enable_msix(pdev, adapter->msix_entries, num_msix);
  440. if (err == 0) {
  441. adapter->flags |= NETXEN_NIC_MSIX_ENABLED;
  442. netxen_set_msix_bit(pdev, 1);
  443. if (adapter->rss_supported)
  444. adapter->max_sds_rings = num_msix;
  445. dev_info(&pdev->dev, "using msi-x interrupts\n");
  446. return;
  447. }
  448. if (err > 0)
  449. pci_disable_msix(pdev);
  450. /* fall through for msi */
  451. }
  452. if (use_msi && !pci_enable_msi(pdev)) {
  453. adapter->flags |= NETXEN_NIC_MSI_ENABLED;
  454. adapter->msi_tgt_status =
  455. msi_tgt_status[adapter->ahw.pci_func];
  456. dev_info(&pdev->dev, "using msi interrupts\n");
  457. adapter->msix_entries[0].vector = pdev->irq;
  458. return;
  459. }
  460. dev_info(&pdev->dev, "using legacy interrupts\n");
  461. adapter->msix_entries[0].vector = pdev->irq;
  462. }
  463. static void
  464. netxen_teardown_intr(struct netxen_adapter *adapter)
  465. {
  466. if (adapter->flags & NETXEN_NIC_MSIX_ENABLED)
  467. pci_disable_msix(adapter->pdev);
  468. if (adapter->flags & NETXEN_NIC_MSI_ENABLED)
  469. pci_disable_msi(adapter->pdev);
  470. }
  471. static void
  472. netxen_cleanup_pci_map(struct netxen_adapter *adapter)
  473. {
  474. if (adapter->ahw.db_base != NULL)
  475. iounmap(adapter->ahw.db_base);
  476. if (adapter->ahw.pci_base0 != NULL)
  477. iounmap(adapter->ahw.pci_base0);
  478. if (adapter->ahw.pci_base1 != NULL)
  479. iounmap(adapter->ahw.pci_base1);
  480. if (adapter->ahw.pci_base2 != NULL)
  481. iounmap(adapter->ahw.pci_base2);
  482. }
  483. static int
  484. netxen_setup_pci_map(struct netxen_adapter *adapter)
  485. {
  486. void __iomem *mem_ptr0 = NULL;
  487. void __iomem *mem_ptr1 = NULL;
  488. void __iomem *mem_ptr2 = NULL;
  489. void __iomem *db_ptr = NULL;
  490. unsigned long mem_base, mem_len, db_base, db_len = 0, pci_len0 = 0;
  491. struct pci_dev *pdev = adapter->pdev;
  492. int pci_func = adapter->ahw.pci_func;
  493. int err = 0;
  494. /*
  495. * Set the CRB window to invalid. If any register in window 0 is
  496. * accessed it should set the window to 0 and then reset it to 1.
  497. */
  498. adapter->curr_window = 255;
  499. adapter->ahw.qdr_sn_window = -1;
  500. adapter->ahw.ddr_mn_window = -1;
  501. /* remap phys address */
  502. mem_base = pci_resource_start(pdev, 0); /* 0 is for BAR 0 */
  503. mem_len = pci_resource_len(pdev, 0);
  504. pci_len0 = 0;
  505. adapter->hw_write_wx = netxen_nic_hw_write_wx_128M;
  506. adapter->hw_read_wx = netxen_nic_hw_read_wx_128M;
  507. adapter->pci_read_immediate = netxen_nic_pci_read_immediate_128M;
  508. adapter->pci_write_immediate = netxen_nic_pci_write_immediate_128M;
  509. adapter->pci_set_window = netxen_nic_pci_set_window_128M;
  510. adapter->pci_mem_read = netxen_nic_pci_mem_read_128M;
  511. adapter->pci_mem_write = netxen_nic_pci_mem_write_128M;
  512. /* 128 Meg of memory */
  513. if (mem_len == NETXEN_PCI_128MB_SIZE) {
  514. mem_ptr0 = ioremap(mem_base, FIRST_PAGE_GROUP_SIZE);
  515. mem_ptr1 = ioremap(mem_base + SECOND_PAGE_GROUP_START,
  516. SECOND_PAGE_GROUP_SIZE);
  517. mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START,
  518. THIRD_PAGE_GROUP_SIZE);
  519. } else if (mem_len == NETXEN_PCI_32MB_SIZE) {
  520. mem_ptr1 = ioremap(mem_base, SECOND_PAGE_GROUP_SIZE);
  521. mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START -
  522. SECOND_PAGE_GROUP_START, THIRD_PAGE_GROUP_SIZE);
  523. } else if (mem_len == NETXEN_PCI_2MB_SIZE) {
  524. adapter->hw_write_wx = netxen_nic_hw_write_wx_2M;
  525. adapter->hw_read_wx = netxen_nic_hw_read_wx_2M;
  526. adapter->pci_read_immediate = netxen_nic_pci_read_immediate_2M;
  527. adapter->pci_write_immediate =
  528. netxen_nic_pci_write_immediate_2M;
  529. adapter->pci_set_window = netxen_nic_pci_set_window_2M;
  530. adapter->pci_mem_read = netxen_nic_pci_mem_read_2M;
  531. adapter->pci_mem_write = netxen_nic_pci_mem_write_2M;
  532. mem_ptr0 = pci_ioremap_bar(pdev, 0);
  533. if (mem_ptr0 == NULL) {
  534. dev_err(&pdev->dev, "failed to map PCI bar 0\n");
  535. return -EIO;
  536. }
  537. pci_len0 = mem_len;
  538. adapter->ahw.ddr_mn_window = 0;
  539. adapter->ahw.qdr_sn_window = 0;
  540. adapter->ahw.mn_win_crb = 0x100000 + PCIX_MN_WINDOW +
  541. (pci_func * 0x20);
  542. adapter->ahw.ms_win_crb = 0x100000 + PCIX_SN_WINDOW;
  543. if (pci_func < 4)
  544. adapter->ahw.ms_win_crb += (pci_func * 0x20);
  545. else
  546. adapter->ahw.ms_win_crb +=
  547. 0xA0 + ((pci_func - 4) * 0x10);
  548. } else {
  549. return -EIO;
  550. }
  551. dev_info(&pdev->dev, "%dMB memory map\n", (int)(mem_len>>20));
  552. adapter->ahw.pci_base0 = mem_ptr0;
  553. adapter->ahw.pci_len0 = pci_len0;
  554. adapter->ahw.pci_base1 = mem_ptr1;
  555. adapter->ahw.pci_base2 = mem_ptr2;
  556. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  557. goto skip_doorbell;
  558. db_base = pci_resource_start(pdev, 4); /* doorbell is on bar 4 */
  559. db_len = pci_resource_len(pdev, 4);
  560. if (db_len == 0) {
  561. printk(KERN_ERR "%s: doorbell is disabled\n",
  562. netxen_nic_driver_name);
  563. err = -EIO;
  564. goto err_out;
  565. }
  566. db_ptr = ioremap(db_base, NETXEN_DB_MAPSIZE_BYTES);
  567. if (!db_ptr) {
  568. printk(KERN_ERR "%s: Failed to allocate doorbell map.",
  569. netxen_nic_driver_name);
  570. err = -EIO;
  571. goto err_out;
  572. }
  573. skip_doorbell:
  574. adapter->ahw.db_base = db_ptr;
  575. adapter->ahw.db_len = db_len;
  576. return 0;
  577. err_out:
  578. netxen_cleanup_pci_map(adapter);
  579. return err;
  580. }
  581. static int
  582. netxen_start_firmware(struct netxen_adapter *adapter, int request_fw)
  583. {
  584. int val, err, first_boot;
  585. struct pci_dev *pdev = adapter->pdev;
  586. int first_driver = 0;
  587. if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
  588. first_driver = (adapter->portnum == 0);
  589. else
  590. first_driver = (adapter->ahw.pci_func == 0);
  591. if (!first_driver)
  592. goto wait_init;
  593. first_boot = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc));
  594. err = netxen_check_hw_init(adapter, first_boot);
  595. if (err) {
  596. dev_err(&pdev->dev, "error in init HW init sequence\n");
  597. return err;
  598. }
  599. if (request_fw)
  600. netxen_request_firmware(adapter);
  601. err = netxen_need_fw_reset(adapter);
  602. if (err <= 0)
  603. return err;
  604. if (first_boot != 0x55555555) {
  605. NXWR32(adapter, CRB_CMDPEG_STATE, 0);
  606. netxen_pinit_from_rom(adapter, 0);
  607. msleep(1);
  608. }
  609. NXWR32(adapter, CRB_DMA_SHIFT, 0x55555555);
  610. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  611. netxen_set_port_mode(adapter);
  612. netxen_load_firmware(adapter);
  613. if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
  614. /* Initialize multicast addr pool owners */
  615. val = 0x7654;
  616. if (adapter->ahw.port_type == NETXEN_NIC_XGBE)
  617. val |= 0x0f000000;
  618. NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val);
  619. }
  620. err = netxen_initialize_adapter_offload(adapter);
  621. if (err)
  622. return err;
  623. /*
  624. * Tell the hardware our version number.
  625. */
  626. val = (_NETXEN_NIC_LINUX_MAJOR << 16)
  627. | ((_NETXEN_NIC_LINUX_MINOR << 8))
  628. | (_NETXEN_NIC_LINUX_SUBVERSION);
  629. NXWR32(adapter, CRB_DRIVER_VERSION, val);
  630. wait_init:
  631. /* Handshake with the card before we register the devices. */
  632. err = netxen_phantom_init(adapter, NETXEN_NIC_PEG_TUNE);
  633. if (err) {
  634. netxen_free_adapter_offload(adapter);
  635. return err;
  636. }
  637. return 0;
  638. }
  639. static int
  640. netxen_nic_request_irq(struct netxen_adapter *adapter)
  641. {
  642. irq_handler_t handler;
  643. struct nx_host_sds_ring *sds_ring;
  644. int err, ring;
  645. unsigned long flags = IRQF_SAMPLE_RANDOM;
  646. struct net_device *netdev = adapter->netdev;
  647. struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
  648. if (adapter->flags & NETXEN_NIC_MSIX_ENABLED)
  649. handler = netxen_msix_intr;
  650. else if (adapter->flags & NETXEN_NIC_MSI_ENABLED)
  651. handler = netxen_msi_intr;
  652. else {
  653. flags |= IRQF_SHARED;
  654. handler = netxen_intr;
  655. }
  656. adapter->irq = netdev->irq;
  657. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  658. sds_ring = &recv_ctx->sds_rings[ring];
  659. sprintf(sds_ring->name, "%s[%d]", netdev->name, ring);
  660. err = request_irq(sds_ring->irq, handler,
  661. flags, sds_ring->name, sds_ring);
  662. if (err)
  663. return err;
  664. }
  665. return 0;
  666. }
  667. static void
  668. netxen_nic_free_irq(struct netxen_adapter *adapter)
  669. {
  670. int ring;
  671. struct nx_host_sds_ring *sds_ring;
  672. struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
  673. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  674. sds_ring = &recv_ctx->sds_rings[ring];
  675. free_irq(sds_ring->irq, sds_ring);
  676. }
  677. }
  678. static int
  679. netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev)
  680. {
  681. int err;
  682. err = adapter->init_port(adapter, adapter->physical_port);
  683. if (err) {
  684. printk(KERN_ERR "%s: Failed to initialize port %d\n",
  685. netxen_nic_driver_name, adapter->portnum);
  686. return err;
  687. }
  688. if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
  689. adapter->macaddr_set(adapter, netdev->dev_addr);
  690. adapter->set_multi(netdev);
  691. adapter->set_mtu(adapter, netdev->mtu);
  692. adapter->ahw.linkup = 0;
  693. if (adapter->max_sds_rings > 1)
  694. netxen_config_rss(adapter, 1);
  695. netxen_napi_enable(adapter);
  696. if (adapter->capabilities & NX_FW_CAPABILITY_LINK_NOTIFICATION)
  697. netxen_linkevent_request(adapter, 1);
  698. else
  699. netxen_nic_set_link_parameters(adapter);
  700. mod_timer(&adapter->watchdog_timer, jiffies);
  701. return 0;
  702. }
  703. static void
  704. netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev)
  705. {
  706. spin_lock(&adapter->tx_clean_lock);
  707. netif_carrier_off(netdev);
  708. netif_tx_disable(netdev);
  709. if (adapter->stop_port)
  710. adapter->stop_port(adapter);
  711. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  712. netxen_p3_free_mac_list(adapter);
  713. netxen_napi_disable(adapter);
  714. netxen_release_tx_buffers(adapter);
  715. spin_unlock(&adapter->tx_clean_lock);
  716. del_timer_sync(&adapter->watchdog_timer);
  717. FLUSH_SCHEDULED_WORK();
  718. }
  719. static int
  720. netxen_nic_attach(struct netxen_adapter *adapter)
  721. {
  722. struct net_device *netdev = adapter->netdev;
  723. struct pci_dev *pdev = adapter->pdev;
  724. int err, ring;
  725. struct nx_host_rds_ring *rds_ring;
  726. struct nx_host_tx_ring *tx_ring;
  727. err = netxen_init_firmware(adapter);
  728. if (err != 0) {
  729. printk(KERN_ERR "Failed to init firmware\n");
  730. return -EIO;
  731. }
  732. if (adapter->fw_major < 4)
  733. adapter->max_rds_rings = 3;
  734. else
  735. adapter->max_rds_rings = 2;
  736. err = netxen_alloc_sw_resources(adapter);
  737. if (err) {
  738. printk(KERN_ERR "%s: Error in setting sw resources\n",
  739. netdev->name);
  740. return err;
  741. }
  742. netxen_nic_clear_stats(adapter);
  743. err = netxen_alloc_hw_resources(adapter);
  744. if (err) {
  745. printk(KERN_ERR "%s: Error in setting hw resources\n",
  746. netdev->name);
  747. goto err_out_free_sw;
  748. }
  749. if (adapter->fw_major < 4) {
  750. tx_ring = adapter->tx_ring;
  751. tx_ring->crb_cmd_producer = crb_cmd_producer[adapter->portnum];
  752. tx_ring->crb_cmd_consumer = crb_cmd_consumer[adapter->portnum];
  753. tx_ring->producer = 0;
  754. tx_ring->sw_consumer = 0;
  755. netxen_nic_update_cmd_producer(adapter, tx_ring);
  756. netxen_nic_update_cmd_consumer(adapter, tx_ring);
  757. }
  758. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  759. rds_ring = &adapter->recv_ctx.rds_rings[ring];
  760. netxen_post_rx_buffers(adapter, ring, rds_ring);
  761. }
  762. err = netxen_nic_request_irq(adapter);
  763. if (err) {
  764. dev_err(&pdev->dev, "%s: failed to setup interrupt\n",
  765. netdev->name);
  766. goto err_out_free_rxbuf;
  767. }
  768. adapter->is_up = NETXEN_ADAPTER_UP_MAGIC;
  769. return 0;
  770. err_out_free_rxbuf:
  771. netxen_release_rx_buffers(adapter);
  772. netxen_free_hw_resources(adapter);
  773. err_out_free_sw:
  774. netxen_free_sw_resources(adapter);
  775. return err;
  776. }
  777. static void
  778. netxen_nic_detach(struct netxen_adapter *adapter)
  779. {
  780. netxen_free_hw_resources(adapter);
  781. netxen_release_rx_buffers(adapter);
  782. netxen_nic_free_irq(adapter);
  783. netxen_free_sw_resources(adapter);
  784. adapter->is_up = 0;
  785. }
  786. static int __devinit
  787. netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  788. {
  789. struct net_device *netdev = NULL;
  790. struct netxen_adapter *adapter = NULL;
  791. int i = 0, err;
  792. int pci_func_id = PCI_FUNC(pdev->devfn);
  793. uint8_t revision_id;
  794. if (pdev->class != 0x020000) {
  795. printk(KERN_DEBUG "NetXen function %d, class %x will not "
  796. "be enabled.\n",pci_func_id, pdev->class);
  797. return -ENODEV;
  798. }
  799. if (pdev->revision >= NX_P3_A0 && pdev->revision < NX_P3_B1) {
  800. printk(KERN_WARNING "NetXen chip revisions between 0x%x-0x%x"
  801. "will not be enabled.\n",
  802. NX_P3_A0, NX_P3_B1);
  803. return -ENODEV;
  804. }
  805. if ((err = pci_enable_device(pdev)))
  806. return err;
  807. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
  808. err = -ENODEV;
  809. goto err_out_disable_pdev;
  810. }
  811. if ((err = pci_request_regions(pdev, netxen_nic_driver_name)))
  812. goto err_out_disable_pdev;
  813. pci_set_master(pdev);
  814. netdev = alloc_etherdev(sizeof(struct netxen_adapter));
  815. if(!netdev) {
  816. printk(KERN_ERR"%s: Failed to allocate memory for the "
  817. "device block.Check system memory resource"
  818. " usage.\n", netxen_nic_driver_name);
  819. goto err_out_free_res;
  820. }
  821. SET_NETDEV_DEV(netdev, &pdev->dev);
  822. adapter = netdev_priv(netdev);
  823. adapter->netdev = netdev;
  824. adapter->pdev = pdev;
  825. adapter->ahw.pci_func = pci_func_id;
  826. revision_id = pdev->revision;
  827. adapter->ahw.revision_id = revision_id;
  828. err = nx_set_dma_mask(adapter);
  829. if (err)
  830. goto err_out_free_netdev;
  831. rwlock_init(&adapter->adapter_lock);
  832. spin_lock_init(&adapter->tx_clean_lock);
  833. INIT_LIST_HEAD(&adapter->mac_list);
  834. err = netxen_setup_pci_map(adapter);
  835. if (err)
  836. goto err_out_free_netdev;
  837. /* This will be reset for mezz cards */
  838. adapter->portnum = pci_func_id;
  839. adapter->rx_csum = 1;
  840. adapter->mc_enabled = 0;
  841. if (NX_IS_REVISION_P3(revision_id))
  842. adapter->max_mc_count = 38;
  843. else
  844. adapter->max_mc_count = 16;
  845. netdev->netdev_ops = &netxen_netdev_ops;
  846. netdev->watchdog_timeo = 2*HZ;
  847. netxen_nic_change_mtu(netdev, netdev->mtu);
  848. SET_ETHTOOL_OPS(netdev, &netxen_nic_ethtool_ops);
  849. netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO);
  850. netdev->features |= (NETIF_F_GRO);
  851. netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO);
  852. if (NX_IS_REVISION_P3(revision_id)) {
  853. netdev->features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
  854. netdev->vlan_features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
  855. }
  856. if (adapter->pci_using_dac) {
  857. netdev->features |= NETIF_F_HIGHDMA;
  858. netdev->vlan_features |= NETIF_F_HIGHDMA;
  859. }
  860. if (netxen_nic_get_board_info(adapter) != 0) {
  861. printk("%s: Error getting board config info.\n",
  862. netxen_nic_driver_name);
  863. err = -EIO;
  864. goto err_out_iounmap;
  865. }
  866. netxen_initialize_adapter_ops(adapter);
  867. /* Mezz cards have PCI function 0,2,3 enabled */
  868. switch (adapter->ahw.board_type) {
  869. case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ:
  870. case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ:
  871. if (pci_func_id >= 2)
  872. adapter->portnum = pci_func_id - 2;
  873. break;
  874. default:
  875. break;
  876. }
  877. err = netxen_start_firmware(adapter, 1);
  878. if (err)
  879. goto err_out_iounmap;
  880. nx_update_dma_mask(adapter);
  881. netxen_nic_get_firmware_info(adapter);
  882. /*
  883. * See if the firmware gave us a virtual-physical port mapping.
  884. */
  885. adapter->physical_port = adapter->portnum;
  886. if (adapter->fw_major < 4) {
  887. i = NXRD32(adapter, CRB_V2P(adapter->portnum));
  888. if (i != 0x55555555)
  889. adapter->physical_port = i;
  890. }
  891. netxen_check_options(adapter);
  892. netxen_setup_intr(adapter);
  893. netdev->irq = adapter->msix_entries[0].vector;
  894. if (netxen_napi_add(adapter, netdev))
  895. goto err_out_disable_msi;
  896. init_timer(&adapter->watchdog_timer);
  897. adapter->watchdog_timer.function = &netxen_watchdog;
  898. adapter->watchdog_timer.data = (unsigned long)adapter;
  899. INIT_WORK(&adapter->watchdog_task, netxen_watchdog_task);
  900. INIT_WORK(&adapter->tx_timeout_task, netxen_tx_timeout_task);
  901. err = netxen_read_mac_addr(adapter);
  902. if (err)
  903. dev_warn(&pdev->dev, "failed to read mac addr\n");
  904. netif_carrier_off(netdev);
  905. netif_stop_queue(netdev);
  906. if ((err = register_netdev(netdev))) {
  907. printk(KERN_ERR "%s: register_netdev failed port #%d"
  908. " aborting\n", netxen_nic_driver_name,
  909. adapter->portnum);
  910. err = -EIO;
  911. goto err_out_disable_msi;
  912. }
  913. pci_set_drvdata(pdev, adapter);
  914. switch (adapter->ahw.port_type) {
  915. case NETXEN_NIC_GBE:
  916. dev_info(&adapter->pdev->dev, "%s: GbE port initialized\n",
  917. adapter->netdev->name);
  918. break;
  919. case NETXEN_NIC_XGBE:
  920. dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
  921. adapter->netdev->name);
  922. break;
  923. }
  924. return 0;
  925. err_out_disable_msi:
  926. netxen_teardown_intr(adapter);
  927. netxen_free_adapter_offload(adapter);
  928. err_out_iounmap:
  929. netxen_cleanup_pci_map(adapter);
  930. err_out_free_netdev:
  931. free_netdev(netdev);
  932. err_out_free_res:
  933. pci_release_regions(pdev);
  934. err_out_disable_pdev:
  935. pci_set_drvdata(pdev, NULL);
  936. pci_disable_device(pdev);
  937. return err;
  938. }
  939. static void __devexit netxen_nic_remove(struct pci_dev *pdev)
  940. {
  941. struct netxen_adapter *adapter;
  942. struct net_device *netdev;
  943. adapter = pci_get_drvdata(pdev);
  944. if (adapter == NULL)
  945. return;
  946. netdev = adapter->netdev;
  947. unregister_netdev(netdev);
  948. if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) {
  949. netxen_nic_detach(adapter);
  950. }
  951. if (adapter->portnum == 0)
  952. netxen_free_adapter_offload(adapter);
  953. netxen_teardown_intr(adapter);
  954. netxen_free_sds_rings(&adapter->recv_ctx);
  955. netxen_cleanup_pci_map(adapter);
  956. netxen_release_firmware(adapter);
  957. pci_release_regions(pdev);
  958. pci_disable_device(pdev);
  959. pci_set_drvdata(pdev, NULL);
  960. free_netdev(netdev);
  961. }
  962. #ifdef CONFIG_PM
  963. static int
  964. netxen_nic_suspend(struct pci_dev *pdev, pm_message_t state)
  965. {
  966. struct netxen_adapter *adapter = pci_get_drvdata(pdev);
  967. struct net_device *netdev = adapter->netdev;
  968. netif_device_detach(netdev);
  969. if (netif_running(netdev))
  970. netxen_nic_down(adapter, netdev);
  971. if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC)
  972. netxen_nic_detach(adapter);
  973. pci_save_state(pdev);
  974. if (netxen_nic_wol_supported(adapter)) {
  975. pci_enable_wake(pdev, PCI_D3cold, 1);
  976. pci_enable_wake(pdev, PCI_D3hot, 1);
  977. }
  978. pci_disable_device(pdev);
  979. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  980. return 0;
  981. }
  982. static int
  983. netxen_nic_resume(struct pci_dev *pdev)
  984. {
  985. struct netxen_adapter *adapter = pci_get_drvdata(pdev);
  986. struct net_device *netdev = adapter->netdev;
  987. int err;
  988. pci_set_power_state(pdev, PCI_D0);
  989. pci_restore_state(pdev);
  990. err = pci_enable_device(pdev);
  991. if (err)
  992. return err;
  993. adapter->curr_window = 255;
  994. err = netxen_start_firmware(adapter, 0);
  995. if (err) {
  996. dev_err(&pdev->dev, "failed to start firmware\n");
  997. return err;
  998. }
  999. if (netif_running(netdev)) {
  1000. err = netxen_nic_attach(adapter);
  1001. if (err)
  1002. return err;
  1003. err = netxen_nic_up(adapter, netdev);
  1004. if (err)
  1005. return err;
  1006. netif_device_attach(netdev);
  1007. }
  1008. return 0;
  1009. }
  1010. #endif
  1011. static int netxen_nic_open(struct net_device *netdev)
  1012. {
  1013. struct netxen_adapter *adapter = netdev_priv(netdev);
  1014. int err = 0;
  1015. if (adapter->driver_mismatch)
  1016. return -EIO;
  1017. if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC) {
  1018. err = netxen_nic_attach(adapter);
  1019. if (err)
  1020. return err;
  1021. }
  1022. err = netxen_nic_up(adapter, netdev);
  1023. if (err)
  1024. goto err_out;
  1025. netif_start_queue(netdev);
  1026. return 0;
  1027. err_out:
  1028. netxen_nic_detach(adapter);
  1029. return err;
  1030. }
  1031. /*
  1032. * netxen_nic_close - Disables a network interface entry point
  1033. */
  1034. static int netxen_nic_close(struct net_device *netdev)
  1035. {
  1036. struct netxen_adapter *adapter = netdev_priv(netdev);
  1037. netxen_nic_down(adapter, netdev);
  1038. return 0;
  1039. }
  1040. static bool netxen_tso_check(struct net_device *netdev,
  1041. struct cmd_desc_type0 *desc, struct sk_buff *skb)
  1042. {
  1043. bool tso = false;
  1044. u8 opcode = TX_ETHER_PKT;
  1045. __be16 protocol = skb->protocol;
  1046. u16 flags = 0;
  1047. if (protocol == cpu_to_be16(ETH_P_8021Q)) {
  1048. struct vlan_ethhdr *vh = (struct vlan_ethhdr *)skb->data;
  1049. protocol = vh->h_vlan_encapsulated_proto;
  1050. flags = FLAGS_VLAN_TAGGED;
  1051. }
  1052. if ((netdev->features & (NETIF_F_TSO | NETIF_F_TSO6)) &&
  1053. skb_shinfo(skb)->gso_size > 0) {
  1054. desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
  1055. desc->total_hdr_length =
  1056. skb_transport_offset(skb) + tcp_hdrlen(skb);
  1057. opcode = (protocol == cpu_to_be16(ETH_P_IPV6)) ?
  1058. TX_TCP_LSO6 : TX_TCP_LSO;
  1059. tso = true;
  1060. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  1061. u8 l4proto;
  1062. if (protocol == cpu_to_be16(ETH_P_IP)) {
  1063. l4proto = ip_hdr(skb)->protocol;
  1064. if (l4proto == IPPROTO_TCP)
  1065. opcode = TX_TCP_PKT;
  1066. else if(l4proto == IPPROTO_UDP)
  1067. opcode = TX_UDP_PKT;
  1068. } else if (protocol == cpu_to_be16(ETH_P_IPV6)) {
  1069. l4proto = ipv6_hdr(skb)->nexthdr;
  1070. if (l4proto == IPPROTO_TCP)
  1071. opcode = TX_TCPV6_PKT;
  1072. else if(l4proto == IPPROTO_UDP)
  1073. opcode = TX_UDPV6_PKT;
  1074. }
  1075. }
  1076. desc->tcp_hdr_offset = skb_transport_offset(skb);
  1077. desc->ip_hdr_offset = skb_network_offset(skb);
  1078. netxen_set_tx_flags_opcode(desc, flags, opcode);
  1079. return tso;
  1080. }
  1081. static void
  1082. netxen_clean_tx_dma_mapping(struct pci_dev *pdev,
  1083. struct netxen_cmd_buffer *pbuf, int last)
  1084. {
  1085. int k;
  1086. struct netxen_skb_frag *buffrag;
  1087. buffrag = &pbuf->frag_array[0];
  1088. pci_unmap_single(pdev, buffrag->dma,
  1089. buffrag->length, PCI_DMA_TODEVICE);
  1090. for (k = 1; k < last; k++) {
  1091. buffrag = &pbuf->frag_array[k];
  1092. pci_unmap_page(pdev, buffrag->dma,
  1093. buffrag->length, PCI_DMA_TODEVICE);
  1094. }
  1095. }
  1096. static inline void
  1097. netxen_clear_cmddesc(u64 *desc)
  1098. {
  1099. int i;
  1100. for (i = 0; i < 8; i++)
  1101. desc[i] = 0ULL;
  1102. }
  1103. static int
  1104. netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1105. {
  1106. struct netxen_adapter *adapter = netdev_priv(netdev);
  1107. struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
  1108. unsigned int first_seg_len = skb->len - skb->data_len;
  1109. struct netxen_cmd_buffer *pbuf;
  1110. struct netxen_skb_frag *buffrag;
  1111. struct cmd_desc_type0 *hwdesc;
  1112. struct pci_dev *pdev = adapter->pdev;
  1113. dma_addr_t temp_dma;
  1114. int i, k;
  1115. u32 producer;
  1116. int frag_count, no_of_desc;
  1117. u32 num_txd = tx_ring->num_desc;
  1118. bool is_tso = false;
  1119. frag_count = skb_shinfo(skb)->nr_frags + 1;
  1120. /* 4 fragments per cmd des */
  1121. no_of_desc = (frag_count + 3) >> 2;
  1122. if (unlikely(no_of_desc + 2) > netxen_tx_avail(tx_ring)) {
  1123. netif_stop_queue(netdev);
  1124. return NETDEV_TX_BUSY;
  1125. }
  1126. producer = tx_ring->producer;
  1127. hwdesc = &tx_ring->desc_head[producer];
  1128. netxen_clear_cmddesc((u64 *)hwdesc);
  1129. pbuf = &tx_ring->cmd_buf_arr[producer];
  1130. is_tso = netxen_tso_check(netdev, hwdesc, skb);
  1131. pbuf->skb = skb;
  1132. pbuf->frag_count = frag_count;
  1133. buffrag = &pbuf->frag_array[0];
  1134. temp_dma = pci_map_single(pdev, skb->data, first_seg_len,
  1135. PCI_DMA_TODEVICE);
  1136. if (pci_dma_mapping_error(pdev, temp_dma))
  1137. goto drop_packet;
  1138. buffrag->dma = temp_dma;
  1139. buffrag->length = first_seg_len;
  1140. netxen_set_tx_frags_len(hwdesc, frag_count, skb->len);
  1141. netxen_set_tx_port(hwdesc, adapter->portnum);
  1142. hwdesc->buffer_length[0] = cpu_to_le16(first_seg_len);
  1143. hwdesc->addr_buffer1 = cpu_to_le64(buffrag->dma);
  1144. for (i = 1, k = 1; i < frag_count; i++, k++) {
  1145. struct skb_frag_struct *frag;
  1146. int len, temp_len;
  1147. unsigned long offset;
  1148. /* move to next desc. if there is a need */
  1149. if ((i & 0x3) == 0) {
  1150. k = 0;
  1151. producer = get_next_index(producer, num_txd);
  1152. hwdesc = &tx_ring->desc_head[producer];
  1153. netxen_clear_cmddesc((u64 *)hwdesc);
  1154. pbuf = &tx_ring->cmd_buf_arr[producer];
  1155. pbuf->skb = NULL;
  1156. }
  1157. frag = &skb_shinfo(skb)->frags[i - 1];
  1158. len = frag->size;
  1159. offset = frag->page_offset;
  1160. temp_len = len;
  1161. temp_dma = pci_map_page(pdev, frag->page, offset,
  1162. len, PCI_DMA_TODEVICE);
  1163. if (pci_dma_mapping_error(pdev, temp_dma)) {
  1164. netxen_clean_tx_dma_mapping(pdev, pbuf, i);
  1165. goto drop_packet;
  1166. }
  1167. buffrag++;
  1168. buffrag->dma = temp_dma;
  1169. buffrag->length = temp_len;
  1170. hwdesc->buffer_length[k] = cpu_to_le16(temp_len);
  1171. switch (k) {
  1172. case 0:
  1173. hwdesc->addr_buffer1 = cpu_to_le64(temp_dma);
  1174. break;
  1175. case 1:
  1176. hwdesc->addr_buffer2 = cpu_to_le64(temp_dma);
  1177. break;
  1178. case 2:
  1179. hwdesc->addr_buffer3 = cpu_to_le64(temp_dma);
  1180. break;
  1181. case 3:
  1182. hwdesc->addr_buffer4 = cpu_to_le64(temp_dma);
  1183. break;
  1184. }
  1185. frag++;
  1186. }
  1187. producer = get_next_index(producer, num_txd);
  1188. /* For LSO, we need to copy the MAC/IP/TCP headers into
  1189. * the descriptor ring
  1190. */
  1191. if (is_tso) {
  1192. int hdr_len, first_hdr_len, more_hdr;
  1193. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1194. if (hdr_len > (sizeof(struct cmd_desc_type0) - 2)) {
  1195. first_hdr_len = sizeof(struct cmd_desc_type0) - 2;
  1196. more_hdr = 1;
  1197. } else {
  1198. first_hdr_len = hdr_len;
  1199. more_hdr = 0;
  1200. }
  1201. /* copy the MAC/IP/TCP headers to the cmd descriptor list */
  1202. hwdesc = &tx_ring->desc_head[producer];
  1203. pbuf = &tx_ring->cmd_buf_arr[producer];
  1204. pbuf->skb = NULL;
  1205. /* copy the first 64 bytes */
  1206. memcpy(((void *)hwdesc) + 2,
  1207. (void *)(skb->data), first_hdr_len);
  1208. producer = get_next_index(producer, num_txd);
  1209. if (more_hdr) {
  1210. hwdesc = &tx_ring->desc_head[producer];
  1211. pbuf = &tx_ring->cmd_buf_arr[producer];
  1212. pbuf->skb = NULL;
  1213. /* copy the next 64 bytes - should be enough except
  1214. * for pathological case
  1215. */
  1216. skb_copy_from_linear_data_offset(skb, first_hdr_len,
  1217. hwdesc,
  1218. (hdr_len -
  1219. first_hdr_len));
  1220. producer = get_next_index(producer, num_txd);
  1221. }
  1222. }
  1223. tx_ring->producer = producer;
  1224. adapter->stats.txbytes += skb->len;
  1225. netxen_nic_update_cmd_producer(adapter, tx_ring);
  1226. adapter->stats.xmitcalled++;
  1227. return NETDEV_TX_OK;
  1228. drop_packet:
  1229. adapter->stats.txdropped++;
  1230. dev_kfree_skb_any(skb);
  1231. return NETDEV_TX_OK;
  1232. }
  1233. static int netxen_nic_check_temp(struct netxen_adapter *adapter)
  1234. {
  1235. struct net_device *netdev = adapter->netdev;
  1236. uint32_t temp, temp_state, temp_val;
  1237. int rv = 0;
  1238. temp = NXRD32(adapter, CRB_TEMP_STATE);
  1239. temp_state = nx_get_temp_state(temp);
  1240. temp_val = nx_get_temp_val(temp);
  1241. if (temp_state == NX_TEMP_PANIC) {
  1242. printk(KERN_ALERT
  1243. "%s: Device temperature %d degrees C exceeds"
  1244. " maximum allowed. Hardware has been shut down.\n",
  1245. netdev->name, temp_val);
  1246. netif_device_detach(netdev);
  1247. netxen_nic_down(adapter, netdev);
  1248. netxen_nic_detach(adapter);
  1249. rv = 1;
  1250. } else if (temp_state == NX_TEMP_WARN) {
  1251. if (adapter->temp == NX_TEMP_NORMAL) {
  1252. printk(KERN_ALERT
  1253. "%s: Device temperature %d degrees C "
  1254. "exceeds operating range."
  1255. " Immediate action needed.\n",
  1256. netdev->name, temp_val);
  1257. }
  1258. } else {
  1259. if (adapter->temp == NX_TEMP_WARN) {
  1260. printk(KERN_INFO
  1261. "%s: Device temperature is now %d degrees C"
  1262. " in normal range.\n", netdev->name,
  1263. temp_val);
  1264. }
  1265. }
  1266. adapter->temp = temp_state;
  1267. return rv;
  1268. }
  1269. void netxen_advert_link_change(struct netxen_adapter *adapter, int linkup)
  1270. {
  1271. struct net_device *netdev = adapter->netdev;
  1272. if (adapter->ahw.linkup && !linkup) {
  1273. printk(KERN_INFO "%s: %s NIC Link is down\n",
  1274. netxen_nic_driver_name, netdev->name);
  1275. adapter->ahw.linkup = 0;
  1276. if (netif_running(netdev)) {
  1277. netif_carrier_off(netdev);
  1278. netif_stop_queue(netdev);
  1279. }
  1280. if (!adapter->has_link_events)
  1281. netxen_nic_set_link_parameters(adapter);
  1282. } else if (!adapter->ahw.linkup && linkup) {
  1283. printk(KERN_INFO "%s: %s NIC Link is up\n",
  1284. netxen_nic_driver_name, netdev->name);
  1285. adapter->ahw.linkup = 1;
  1286. if (netif_running(netdev)) {
  1287. netif_carrier_on(netdev);
  1288. netif_wake_queue(netdev);
  1289. }
  1290. if (!adapter->has_link_events)
  1291. netxen_nic_set_link_parameters(adapter);
  1292. }
  1293. }
  1294. static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter)
  1295. {
  1296. u32 val, port, linkup;
  1297. port = adapter->physical_port;
  1298. if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
  1299. val = NXRD32(adapter, CRB_XG_STATE_P3);
  1300. val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
  1301. linkup = (val == XG_LINK_UP_P3);
  1302. } else {
  1303. val = NXRD32(adapter, CRB_XG_STATE);
  1304. if (adapter->ahw.port_type == NETXEN_NIC_GBE)
  1305. linkup = (val >> port) & 1;
  1306. else {
  1307. val = (val >> port*8) & 0xff;
  1308. linkup = (val == XG_LINK_UP);
  1309. }
  1310. }
  1311. netxen_advert_link_change(adapter, linkup);
  1312. }
  1313. static void netxen_watchdog(unsigned long v)
  1314. {
  1315. struct netxen_adapter *adapter = (struct netxen_adapter *)v;
  1316. SCHEDULE_WORK(&adapter->watchdog_task);
  1317. }
  1318. void netxen_watchdog_task(struct work_struct *work)
  1319. {
  1320. struct netxen_adapter *adapter =
  1321. container_of(work, struct netxen_adapter, watchdog_task);
  1322. if (netxen_nic_check_temp(adapter))
  1323. return;
  1324. if (!adapter->has_link_events)
  1325. netxen_nic_handle_phy_intr(adapter);
  1326. if (netif_running(adapter->netdev))
  1327. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1328. }
  1329. static void netxen_tx_timeout(struct net_device *netdev)
  1330. {
  1331. struct netxen_adapter *adapter = (struct netxen_adapter *)
  1332. netdev_priv(netdev);
  1333. SCHEDULE_WORK(&adapter->tx_timeout_task);
  1334. }
  1335. static void netxen_tx_timeout_task(struct work_struct *work)
  1336. {
  1337. struct netxen_adapter *adapter =
  1338. container_of(work, struct netxen_adapter, tx_timeout_task);
  1339. if (!netif_running(adapter->netdev))
  1340. return;
  1341. printk(KERN_ERR "%s %s: transmit timeout, resetting.\n",
  1342. netxen_nic_driver_name, adapter->netdev->name);
  1343. netxen_napi_disable(adapter);
  1344. adapter->netdev->trans_start = jiffies;
  1345. netxen_napi_enable(adapter);
  1346. netif_wake_queue(adapter->netdev);
  1347. }
  1348. struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev)
  1349. {
  1350. struct netxen_adapter *adapter = netdev_priv(netdev);
  1351. struct net_device_stats *stats = &adapter->net_stats;
  1352. memset(stats, 0, sizeof(*stats));
  1353. stats->rx_packets = adapter->stats.no_rcv;
  1354. stats->tx_packets = adapter->stats.xmitfinished;
  1355. stats->rx_bytes = adapter->stats.rxbytes;
  1356. stats->tx_bytes = adapter->stats.txbytes;
  1357. stats->rx_dropped = adapter->stats.rxdropped;
  1358. stats->tx_dropped = adapter->stats.txdropped;
  1359. return stats;
  1360. }
  1361. static irqreturn_t netxen_intr(int irq, void *data)
  1362. {
  1363. struct nx_host_sds_ring *sds_ring = data;
  1364. struct netxen_adapter *adapter = sds_ring->adapter;
  1365. u32 status = 0;
  1366. status = adapter->pci_read_immediate(adapter, ISR_INT_VECTOR);
  1367. if (!(status & adapter->legacy_intr.int_vec_bit))
  1368. return IRQ_NONE;
  1369. if (adapter->ahw.revision_id >= NX_P3_B1) {
  1370. /* check interrupt state machine, to be sure */
  1371. status = adapter->pci_read_immediate(adapter,
  1372. ISR_INT_STATE_REG);
  1373. if (!ISR_LEGACY_INT_TRIGGERED(status))
  1374. return IRQ_NONE;
  1375. } else {
  1376. unsigned long our_int = 0;
  1377. our_int = NXRD32(adapter, CRB_INT_VECTOR);
  1378. /* not our interrupt */
  1379. if (!test_and_clear_bit((7 + adapter->portnum), &our_int))
  1380. return IRQ_NONE;
  1381. /* claim interrupt */
  1382. NXWR32(adapter, CRB_INT_VECTOR, (our_int & 0xffffffff));
  1383. }
  1384. /* clear interrupt */
  1385. if (adapter->fw_major < 4)
  1386. netxen_nic_disable_int(sds_ring);
  1387. adapter->pci_write_immediate(adapter,
  1388. adapter->legacy_intr.tgt_status_reg,
  1389. 0xffffffff);
  1390. /* read twice to ensure write is flushed */
  1391. adapter->pci_read_immediate(adapter, ISR_INT_VECTOR);
  1392. adapter->pci_read_immediate(adapter, ISR_INT_VECTOR);
  1393. napi_schedule(&sds_ring->napi);
  1394. return IRQ_HANDLED;
  1395. }
  1396. static irqreturn_t netxen_msi_intr(int irq, void *data)
  1397. {
  1398. struct nx_host_sds_ring *sds_ring = data;
  1399. struct netxen_adapter *adapter = sds_ring->adapter;
  1400. /* clear interrupt */
  1401. adapter->pci_write_immediate(adapter,
  1402. adapter->msi_tgt_status, 0xffffffff);
  1403. napi_schedule(&sds_ring->napi);
  1404. return IRQ_HANDLED;
  1405. }
  1406. static irqreturn_t netxen_msix_intr(int irq, void *data)
  1407. {
  1408. struct nx_host_sds_ring *sds_ring = data;
  1409. napi_schedule(&sds_ring->napi);
  1410. return IRQ_HANDLED;
  1411. }
  1412. static int netxen_nic_poll(struct napi_struct *napi, int budget)
  1413. {
  1414. struct nx_host_sds_ring *sds_ring =
  1415. container_of(napi, struct nx_host_sds_ring, napi);
  1416. struct netxen_adapter *adapter = sds_ring->adapter;
  1417. int tx_complete;
  1418. int work_done;
  1419. tx_complete = netxen_process_cmd_ring(adapter);
  1420. work_done = netxen_process_rcv_ring(sds_ring, budget);
  1421. if ((work_done < budget) && tx_complete) {
  1422. napi_complete(&sds_ring->napi);
  1423. if (netif_running(adapter->netdev))
  1424. netxen_nic_enable_int(sds_ring);
  1425. }
  1426. return work_done;
  1427. }
  1428. #ifdef CONFIG_NET_POLL_CONTROLLER
  1429. static void netxen_nic_poll_controller(struct net_device *netdev)
  1430. {
  1431. struct netxen_adapter *adapter = netdev_priv(netdev);
  1432. disable_irq(adapter->irq);
  1433. netxen_intr(adapter->irq, adapter);
  1434. enable_irq(adapter->irq);
  1435. }
  1436. #endif
  1437. static struct pci_driver netxen_driver = {
  1438. .name = netxen_nic_driver_name,
  1439. .id_table = netxen_pci_tbl,
  1440. .probe = netxen_nic_probe,
  1441. .remove = __devexit_p(netxen_nic_remove),
  1442. #ifdef CONFIG_PM
  1443. .suspend = netxen_nic_suspend,
  1444. .resume = netxen_nic_resume
  1445. #endif
  1446. };
  1447. /* Driver Registration on NetXen card */
  1448. static int __init netxen_init_module(void)
  1449. {
  1450. printk(KERN_INFO "%s\n", netxen_nic_driver_string);
  1451. if ((netxen_workq = create_singlethread_workqueue("netxen")) == NULL)
  1452. return -ENOMEM;
  1453. return pci_register_driver(&netxen_driver);
  1454. }
  1455. module_init(netxen_init_module);
  1456. static void __exit netxen_exit_module(void)
  1457. {
  1458. pci_unregister_driver(&netxen_driver);
  1459. destroy_workqueue(netxen_workq);
  1460. }
  1461. module_exit(netxen_exit_module);