am33xx.dtsi 15 KB

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  1. /*
  2. * Device Tree Source for AM33XX SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/am33xx.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. compatible = "ti,am33xx";
  15. interrupt-parent = <&intc>;
  16. aliases {
  17. serial0 = &uart0;
  18. serial1 = &uart1;
  19. serial2 = &uart2;
  20. serial3 = &uart3;
  21. serial4 = &uart4;
  22. serial5 = &uart5;
  23. d_can0 = &dcan0;
  24. d_can1 = &dcan1;
  25. usb0 = &usb0;
  26. usb1 = &usb1;
  27. phy0 = &usb0_phy;
  28. phy1 = &usb1_phy;
  29. };
  30. cpus {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. cpu@0 {
  34. compatible = "arm,cortex-a8";
  35. device_type = "cpu";
  36. reg = <0>;
  37. /*
  38. * To consider voltage drop between PMIC and SoC,
  39. * tolerance value is reduced to 2% from 4% and
  40. * voltage value is increased as a precaution.
  41. */
  42. operating-points = <
  43. /* kHz uV */
  44. 720000 1285000
  45. 600000 1225000
  46. 500000 1125000
  47. 275000 1125000
  48. >;
  49. voltage-tolerance = <2>; /* 2 percentage */
  50. clock-latency = <300000>; /* From omap-cpufreq driver */
  51. };
  52. };
  53. pmu {
  54. compatible = "arm,cortex-a8-pmu";
  55. interrupts = <3>;
  56. };
  57. /*
  58. * The soc node represents the soc top level view. It is uses for IPs
  59. * that are not memory mapped in the MPU view or for the MPU itself.
  60. */
  61. soc {
  62. compatible = "ti,omap-infra";
  63. mpu {
  64. compatible = "ti,omap3-mpu";
  65. ti,hwmods = "mpu";
  66. };
  67. };
  68. am33xx_pinmux: pinmux@44e10800 {
  69. compatible = "pinctrl-single";
  70. reg = <0x44e10800 0x0238>;
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. pinctrl-single,register-width = <32>;
  74. pinctrl-single,function-mask = <0x7f>;
  75. };
  76. /*
  77. * XXX: Use a flat representation of the AM33XX interconnect.
  78. * The real AM33XX interconnect network is quite complex.Since
  79. * that will not bring real advantage to represent that in DT
  80. * for the moment, just use a fake OCP bus entry to represent
  81. * the whole bus hierarchy.
  82. */
  83. ocp {
  84. compatible = "simple-bus";
  85. #address-cells = <1>;
  86. #size-cells = <1>;
  87. ranges;
  88. ti,hwmods = "l3_main";
  89. intc: interrupt-controller@48200000 {
  90. compatible = "ti,omap2-intc";
  91. interrupt-controller;
  92. #interrupt-cells = <1>;
  93. ti,intc-size = <128>;
  94. reg = <0x48200000 0x1000>;
  95. };
  96. edma: edma@49000000 {
  97. compatible = "ti,edma3";
  98. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  99. reg = <0x49000000 0x10000>,
  100. <0x44e10f90 0x10>;
  101. interrupts = <12 13 14>;
  102. #dma-cells = <1>;
  103. dma-channels = <64>;
  104. ti,edma-regions = <4>;
  105. ti,edma-slots = <256>;
  106. };
  107. gpio0: gpio@44e07000 {
  108. compatible = "ti,omap4-gpio";
  109. ti,hwmods = "gpio1";
  110. gpio-controller;
  111. #gpio-cells = <2>;
  112. interrupt-controller;
  113. #interrupt-cells = <2>;
  114. reg = <0x44e07000 0x1000>;
  115. interrupts = <96>;
  116. };
  117. gpio1: gpio@4804c000 {
  118. compatible = "ti,omap4-gpio";
  119. ti,hwmods = "gpio2";
  120. gpio-controller;
  121. #gpio-cells = <2>;
  122. interrupt-controller;
  123. #interrupt-cells = <2>;
  124. reg = <0x4804c000 0x1000>;
  125. interrupts = <98>;
  126. };
  127. gpio2: gpio@481ac000 {
  128. compatible = "ti,omap4-gpio";
  129. ti,hwmods = "gpio3";
  130. gpio-controller;
  131. #gpio-cells = <2>;
  132. interrupt-controller;
  133. #interrupt-cells = <2>;
  134. reg = <0x481ac000 0x1000>;
  135. interrupts = <32>;
  136. };
  137. gpio3: gpio@481ae000 {
  138. compatible = "ti,omap4-gpio";
  139. ti,hwmods = "gpio4";
  140. gpio-controller;
  141. #gpio-cells = <2>;
  142. interrupt-controller;
  143. #interrupt-cells = <2>;
  144. reg = <0x481ae000 0x1000>;
  145. interrupts = <62>;
  146. };
  147. uart0: serial@44e09000 {
  148. compatible = "ti,omap3-uart";
  149. ti,hwmods = "uart1";
  150. clock-frequency = <48000000>;
  151. reg = <0x44e09000 0x2000>;
  152. interrupts = <72>;
  153. status = "disabled";
  154. };
  155. uart1: serial@48022000 {
  156. compatible = "ti,omap3-uart";
  157. ti,hwmods = "uart2";
  158. clock-frequency = <48000000>;
  159. reg = <0x48022000 0x2000>;
  160. interrupts = <73>;
  161. status = "disabled";
  162. };
  163. uart2: serial@48024000 {
  164. compatible = "ti,omap3-uart";
  165. ti,hwmods = "uart3";
  166. clock-frequency = <48000000>;
  167. reg = <0x48024000 0x2000>;
  168. interrupts = <74>;
  169. status = "disabled";
  170. };
  171. uart3: serial@481a6000 {
  172. compatible = "ti,omap3-uart";
  173. ti,hwmods = "uart4";
  174. clock-frequency = <48000000>;
  175. reg = <0x481a6000 0x2000>;
  176. interrupts = <44>;
  177. status = "disabled";
  178. };
  179. uart4: serial@481a8000 {
  180. compatible = "ti,omap3-uart";
  181. ti,hwmods = "uart5";
  182. clock-frequency = <48000000>;
  183. reg = <0x481a8000 0x2000>;
  184. interrupts = <45>;
  185. status = "disabled";
  186. };
  187. uart5: serial@481aa000 {
  188. compatible = "ti,omap3-uart";
  189. ti,hwmods = "uart6";
  190. clock-frequency = <48000000>;
  191. reg = <0x481aa000 0x2000>;
  192. interrupts = <46>;
  193. status = "disabled";
  194. };
  195. i2c0: i2c@44e0b000 {
  196. compatible = "ti,omap4-i2c";
  197. #address-cells = <1>;
  198. #size-cells = <0>;
  199. ti,hwmods = "i2c1";
  200. reg = <0x44e0b000 0x1000>;
  201. interrupts = <70>;
  202. status = "disabled";
  203. };
  204. i2c1: i2c@4802a000 {
  205. compatible = "ti,omap4-i2c";
  206. #address-cells = <1>;
  207. #size-cells = <0>;
  208. ti,hwmods = "i2c2";
  209. reg = <0x4802a000 0x1000>;
  210. interrupts = <71>;
  211. status = "disabled";
  212. };
  213. i2c2: i2c@4819c000 {
  214. compatible = "ti,omap4-i2c";
  215. #address-cells = <1>;
  216. #size-cells = <0>;
  217. ti,hwmods = "i2c3";
  218. reg = <0x4819c000 0x1000>;
  219. interrupts = <30>;
  220. status = "disabled";
  221. };
  222. wdt2: wdt@44e35000 {
  223. compatible = "ti,omap3-wdt";
  224. ti,hwmods = "wd_timer2";
  225. reg = <0x44e35000 0x1000>;
  226. interrupts = <91>;
  227. };
  228. dcan0: d_can@481cc000 {
  229. compatible = "bosch,d_can";
  230. ti,hwmods = "d_can0";
  231. reg = <0x481cc000 0x2000
  232. 0x44e10644 0x4>;
  233. interrupts = <52>;
  234. status = "disabled";
  235. };
  236. dcan1: d_can@481d0000 {
  237. compatible = "bosch,d_can";
  238. ti,hwmods = "d_can1";
  239. reg = <0x481d0000 0x2000
  240. 0x44e10644 0x4>;
  241. interrupts = <55>;
  242. status = "disabled";
  243. };
  244. timer1: timer@44e31000 {
  245. compatible = "ti,am335x-timer-1ms";
  246. reg = <0x44e31000 0x400>;
  247. interrupts = <67>;
  248. ti,hwmods = "timer1";
  249. ti,timer-alwon;
  250. };
  251. timer2: timer@48040000 {
  252. compatible = "ti,am335x-timer";
  253. reg = <0x48040000 0x400>;
  254. interrupts = <68>;
  255. ti,hwmods = "timer2";
  256. };
  257. timer3: timer@48042000 {
  258. compatible = "ti,am335x-timer";
  259. reg = <0x48042000 0x400>;
  260. interrupts = <69>;
  261. ti,hwmods = "timer3";
  262. };
  263. timer4: timer@48044000 {
  264. compatible = "ti,am335x-timer";
  265. reg = <0x48044000 0x400>;
  266. interrupts = <92>;
  267. ti,hwmods = "timer4";
  268. ti,timer-pwm;
  269. };
  270. timer5: timer@48046000 {
  271. compatible = "ti,am335x-timer";
  272. reg = <0x48046000 0x400>;
  273. interrupts = <93>;
  274. ti,hwmods = "timer5";
  275. ti,timer-pwm;
  276. };
  277. timer6: timer@48048000 {
  278. compatible = "ti,am335x-timer";
  279. reg = <0x48048000 0x400>;
  280. interrupts = <94>;
  281. ti,hwmods = "timer6";
  282. ti,timer-pwm;
  283. };
  284. timer7: timer@4804a000 {
  285. compatible = "ti,am335x-timer";
  286. reg = <0x4804a000 0x400>;
  287. interrupts = <95>;
  288. ti,hwmods = "timer7";
  289. ti,timer-pwm;
  290. };
  291. rtc@44e3e000 {
  292. compatible = "ti,da830-rtc";
  293. reg = <0x44e3e000 0x1000>;
  294. interrupts = <75
  295. 76>;
  296. ti,hwmods = "rtc";
  297. };
  298. spi0: spi@48030000 {
  299. compatible = "ti,omap4-mcspi";
  300. #address-cells = <1>;
  301. #size-cells = <0>;
  302. reg = <0x48030000 0x400>;
  303. interrupts = <65>;
  304. ti,spi-num-cs = <2>;
  305. ti,hwmods = "spi0";
  306. dmas = <&edma 16
  307. &edma 17
  308. &edma 18
  309. &edma 19>;
  310. dma-names = "tx0", "rx0", "tx1", "rx1";
  311. status = "disabled";
  312. };
  313. spi1: spi@481a0000 {
  314. compatible = "ti,omap4-mcspi";
  315. #address-cells = <1>;
  316. #size-cells = <0>;
  317. reg = <0x481a0000 0x400>;
  318. interrupts = <125>;
  319. ti,spi-num-cs = <2>;
  320. ti,hwmods = "spi1";
  321. dmas = <&edma 42
  322. &edma 43
  323. &edma 44
  324. &edma 45>;
  325. dma-names = "tx0", "rx0", "tx1", "rx1";
  326. status = "disabled";
  327. };
  328. usb: usb@47400000 {
  329. compatible = "ti,am33xx-usb";
  330. reg = <0x47400000 0x1000>;
  331. ranges;
  332. #address-cells = <1>;
  333. #size-cells = <1>;
  334. ti,hwmods = "usb_otg_hs";
  335. status = "disabled";
  336. ctrl_mod: control@44e10000 {
  337. compatible = "ti,am335x-usb-ctrl-module";
  338. reg = <0x44e10620 0x10
  339. 0x44e10648 0x4>;
  340. reg-names = "phy_ctrl", "wakeup";
  341. status = "disabled";
  342. };
  343. usb0_phy: usb-phy@47401300 {
  344. compatible = "ti,am335x-usb-phy";
  345. reg = <0x47401300 0x100>;
  346. reg-names = "phy";
  347. status = "disabled";
  348. ti,ctrl_mod = <&ctrl_mod>;
  349. };
  350. usb0: usb@47401000 {
  351. compatible = "ti,musb-am33xx";
  352. status = "disabled";
  353. reg = <0x47401400 0x400
  354. 0x47401000 0x200>;
  355. reg-names = "mc", "control";
  356. interrupts = <18>;
  357. interrupt-names = "mc";
  358. dr_mode = "otg";
  359. mentor,multipoint = <1>;
  360. mentor,num-eps = <16>;
  361. mentor,ram-bits = <12>;
  362. mentor,power = <500>;
  363. phys = <&usb0_phy>;
  364. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  365. &cppi41dma 2 0 &cppi41dma 3 0
  366. &cppi41dma 4 0 &cppi41dma 5 0
  367. &cppi41dma 6 0 &cppi41dma 7 0
  368. &cppi41dma 8 0 &cppi41dma 9 0
  369. &cppi41dma 10 0 &cppi41dma 11 0
  370. &cppi41dma 12 0 &cppi41dma 13 0
  371. &cppi41dma 14 0 &cppi41dma 0 1
  372. &cppi41dma 1 1 &cppi41dma 2 1
  373. &cppi41dma 3 1 &cppi41dma 4 1
  374. &cppi41dma 5 1 &cppi41dma 6 1
  375. &cppi41dma 7 1 &cppi41dma 8 1
  376. &cppi41dma 9 1 &cppi41dma 10 1
  377. &cppi41dma 11 1 &cppi41dma 12 1
  378. &cppi41dma 13 1 &cppi41dma 14 1>;
  379. dma-names =
  380. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  381. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  382. "rx14", "rx15",
  383. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  384. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  385. "tx14", "tx15";
  386. };
  387. usb1_phy: usb-phy@47401b00 {
  388. compatible = "ti,am335x-usb-phy";
  389. reg = <0x47401b00 0x100>;
  390. reg-names = "phy";
  391. status = "disabled";
  392. ti,ctrl_mod = <&ctrl_mod>;
  393. };
  394. usb1: usb@47401800 {
  395. compatible = "ti,musb-am33xx";
  396. status = "disabled";
  397. reg = <0x47401c00 0x400
  398. 0x47401800 0x200>;
  399. reg-names = "mc", "control";
  400. interrupts = <19>;
  401. interrupt-names = "mc";
  402. dr_mode = "otg";
  403. mentor,multipoint = <1>;
  404. mentor,num-eps = <16>;
  405. mentor,ram-bits = <12>;
  406. mentor,power = <500>;
  407. phys = <&usb1_phy>;
  408. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  409. &cppi41dma 17 0 &cppi41dma 18 0
  410. &cppi41dma 19 0 &cppi41dma 20 0
  411. &cppi41dma 21 0 &cppi41dma 22 0
  412. &cppi41dma 23 0 &cppi41dma 24 0
  413. &cppi41dma 25 0 &cppi41dma 26 0
  414. &cppi41dma 27 0 &cppi41dma 28 0
  415. &cppi41dma 29 0 &cppi41dma 15 1
  416. &cppi41dma 16 1 &cppi41dma 17 1
  417. &cppi41dma 18 1 &cppi41dma 19 1
  418. &cppi41dma 20 1 &cppi41dma 21 1
  419. &cppi41dma 22 1 &cppi41dma 23 1
  420. &cppi41dma 24 1 &cppi41dma 25 1
  421. &cppi41dma 26 1 &cppi41dma 27 1
  422. &cppi41dma 28 1 &cppi41dma 29 1>;
  423. dma-names =
  424. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  425. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  426. "rx14", "rx15",
  427. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  428. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  429. "tx14", "tx15";
  430. };
  431. cppi41dma: dma-controller@07402000 {
  432. compatible = "ti,am3359-cppi41";
  433. reg = <0x47400000 0x1000
  434. 0x47402000 0x1000
  435. 0x47403000 0x1000
  436. 0x47404000 0x4000>;
  437. reg-names = "glue", "controller", "scheduler", "queuemgr";
  438. interrupts = <17>;
  439. interrupt-names = "glue";
  440. #dma-cells = <2>;
  441. #dma-channels = <30>;
  442. #dma-requests = <256>;
  443. status = "disabled";
  444. };
  445. };
  446. epwmss0: epwmss@48300000 {
  447. compatible = "ti,am33xx-pwmss";
  448. reg = <0x48300000 0x10>;
  449. ti,hwmods = "epwmss0";
  450. #address-cells = <1>;
  451. #size-cells = <1>;
  452. status = "disabled";
  453. ranges = <0x48300100 0x48300100 0x80 /* ECAP */
  454. 0x48300180 0x48300180 0x80 /* EQEP */
  455. 0x48300200 0x48300200 0x80>; /* EHRPWM */
  456. ecap0: ecap@48300100 {
  457. compatible = "ti,am33xx-ecap";
  458. #pwm-cells = <3>;
  459. reg = <0x48300100 0x80>;
  460. ti,hwmods = "ecap0";
  461. status = "disabled";
  462. };
  463. ehrpwm0: ehrpwm@48300200 {
  464. compatible = "ti,am33xx-ehrpwm";
  465. #pwm-cells = <3>;
  466. reg = <0x48300200 0x80>;
  467. ti,hwmods = "ehrpwm0";
  468. status = "disabled";
  469. };
  470. };
  471. epwmss1: epwmss@48302000 {
  472. compatible = "ti,am33xx-pwmss";
  473. reg = <0x48302000 0x10>;
  474. ti,hwmods = "epwmss1";
  475. #address-cells = <1>;
  476. #size-cells = <1>;
  477. status = "disabled";
  478. ranges = <0x48302100 0x48302100 0x80 /* ECAP */
  479. 0x48302180 0x48302180 0x80 /* EQEP */
  480. 0x48302200 0x48302200 0x80>; /* EHRPWM */
  481. ecap1: ecap@48302100 {
  482. compatible = "ti,am33xx-ecap";
  483. #pwm-cells = <3>;
  484. reg = <0x48302100 0x80>;
  485. ti,hwmods = "ecap1";
  486. status = "disabled";
  487. };
  488. ehrpwm1: ehrpwm@48302200 {
  489. compatible = "ti,am33xx-ehrpwm";
  490. #pwm-cells = <3>;
  491. reg = <0x48302200 0x80>;
  492. ti,hwmods = "ehrpwm1";
  493. status = "disabled";
  494. };
  495. };
  496. epwmss2: epwmss@48304000 {
  497. compatible = "ti,am33xx-pwmss";
  498. reg = <0x48304000 0x10>;
  499. ti,hwmods = "epwmss2";
  500. #address-cells = <1>;
  501. #size-cells = <1>;
  502. status = "disabled";
  503. ranges = <0x48304100 0x48304100 0x80 /* ECAP */
  504. 0x48304180 0x48304180 0x80 /* EQEP */
  505. 0x48304200 0x48304200 0x80>; /* EHRPWM */
  506. ecap2: ecap@48304100 {
  507. compatible = "ti,am33xx-ecap";
  508. #pwm-cells = <3>;
  509. reg = <0x48304100 0x80>;
  510. ti,hwmods = "ecap2";
  511. status = "disabled";
  512. };
  513. ehrpwm2: ehrpwm@48304200 {
  514. compatible = "ti,am33xx-ehrpwm";
  515. #pwm-cells = <3>;
  516. reg = <0x48304200 0x80>;
  517. ti,hwmods = "ehrpwm2";
  518. status = "disabled";
  519. };
  520. };
  521. mac: ethernet@4a100000 {
  522. compatible = "ti,cpsw";
  523. ti,hwmods = "cpgmac0";
  524. cpdma_channels = <8>;
  525. ale_entries = <1024>;
  526. bd_ram_size = <0x2000>;
  527. no_bd_ram = <0>;
  528. rx_descs = <64>;
  529. mac_control = <0x20>;
  530. slaves = <2>;
  531. active_slave = <0>;
  532. cpts_clock_mult = <0x80000000>;
  533. cpts_clock_shift = <29>;
  534. reg = <0x4a100000 0x800
  535. 0x4a101200 0x100>;
  536. #address-cells = <1>;
  537. #size-cells = <1>;
  538. interrupt-parent = <&intc>;
  539. /*
  540. * c0_rx_thresh_pend
  541. * c0_rx_pend
  542. * c0_tx_pend
  543. * c0_misc_pend
  544. */
  545. interrupts = <40 41 42 43>;
  546. ranges;
  547. davinci_mdio: mdio@4a101000 {
  548. compatible = "ti,davinci_mdio";
  549. #address-cells = <1>;
  550. #size-cells = <0>;
  551. ti,hwmods = "davinci_mdio";
  552. bus_freq = <1000000>;
  553. reg = <0x4a101000 0x100>;
  554. };
  555. cpsw_emac0: slave@4a100200 {
  556. /* Filled in by U-Boot */
  557. mac-address = [ 00 00 00 00 00 00 ];
  558. };
  559. cpsw_emac1: slave@4a100300 {
  560. /* Filled in by U-Boot */
  561. mac-address = [ 00 00 00 00 00 00 ];
  562. };
  563. };
  564. ocmcram: ocmcram@40300000 {
  565. compatible = "ti,am3352-ocmcram";
  566. reg = <0x40300000 0x10000>;
  567. ti,hwmods = "ocmcram";
  568. };
  569. wkup_m3: wkup_m3@44d00000 {
  570. compatible = "ti,am3353-wkup-m3";
  571. reg = <0x44d00000 0x4000 /* M3 UMEM */
  572. 0x44d80000 0x2000>; /* M3 DMEM */
  573. ti,hwmods = "wkup_m3";
  574. };
  575. elm: elm@48080000 {
  576. compatible = "ti,am3352-elm";
  577. reg = <0x48080000 0x2000>;
  578. interrupts = <4>;
  579. ti,hwmods = "elm";
  580. status = "disabled";
  581. };
  582. tscadc: tscadc@44e0d000 {
  583. compatible = "ti,am3359-tscadc";
  584. reg = <0x44e0d000 0x1000>;
  585. interrupt-parent = <&intc>;
  586. interrupts = <16>;
  587. ti,hwmods = "adc_tsc";
  588. status = "disabled";
  589. tsc {
  590. compatible = "ti,am3359-tsc";
  591. };
  592. am335x_adc: adc {
  593. #io-channel-cells = <1>;
  594. compatible = "ti,am3359-adc";
  595. };
  596. };
  597. gpmc: gpmc@50000000 {
  598. compatible = "ti,am3352-gpmc";
  599. ti,hwmods = "gpmc";
  600. reg = <0x50000000 0x2000>;
  601. interrupts = <100>;
  602. gpmc,num-cs = <7>;
  603. gpmc,num-waitpins = <2>;
  604. #address-cells = <2>;
  605. #size-cells = <1>;
  606. status = "disabled";
  607. };
  608. };
  609. };