mwl8k.c 100 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <net/mac80211.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/firmware.h>
  24. #include <linux/workqueue.h>
  25. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  26. #define MWL8K_NAME KBUILD_MODNAME
  27. #define MWL8K_VERSION "0.11"
  28. /* Register definitions */
  29. #define MWL8K_HIU_GEN_PTR 0x00000c10
  30. #define MWL8K_MODE_STA 0x0000005a
  31. #define MWL8K_MODE_AP 0x000000a5
  32. #define MWL8K_HIU_INT_CODE 0x00000c14
  33. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  34. #define MWL8K_FWAP_READY 0xf1f2f4a5
  35. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  36. #define MWL8K_HIU_SCRATCH 0x00000c40
  37. /* Host->device communications */
  38. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  39. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  40. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  41. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  42. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  43. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  44. #define MWL8K_H2A_INT_RESET (1 << 15)
  45. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  46. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  47. /* Device->host communications */
  48. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  49. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  50. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  51. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  52. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  53. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  54. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  55. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  56. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  57. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  58. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  59. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  60. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  61. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  62. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  63. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  64. MWL8K_A2H_INT_CHNL_SWITCHED | \
  65. MWL8K_A2H_INT_QUEUE_EMPTY | \
  66. MWL8K_A2H_INT_RADAR_DETECT | \
  67. MWL8K_A2H_INT_RADIO_ON | \
  68. MWL8K_A2H_INT_RADIO_OFF | \
  69. MWL8K_A2H_INT_MAC_EVENT | \
  70. MWL8K_A2H_INT_OPC_DONE | \
  71. MWL8K_A2H_INT_RX_READY | \
  72. MWL8K_A2H_INT_TX_DONE)
  73. #define MWL8K_RX_QUEUES 1
  74. #define MWL8K_TX_QUEUES 4
  75. struct rxd_ops {
  76. int rxd_size;
  77. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  78. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  79. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  80. __le16 *qos);
  81. };
  82. struct mwl8k_device_info {
  83. char *part_name;
  84. char *helper_image;
  85. char *fw_image;
  86. struct rxd_ops *ap_rxd_ops;
  87. };
  88. struct mwl8k_rx_queue {
  89. int rxd_count;
  90. /* hw receives here */
  91. int head;
  92. /* refill descs here */
  93. int tail;
  94. void *rxd;
  95. dma_addr_t rxd_dma;
  96. struct {
  97. struct sk_buff *skb;
  98. DECLARE_PCI_UNMAP_ADDR(dma)
  99. } *buf;
  100. };
  101. struct mwl8k_tx_queue {
  102. /* hw transmits here */
  103. int head;
  104. /* sw appends here */
  105. int tail;
  106. struct ieee80211_tx_queue_stats stats;
  107. struct mwl8k_tx_desc *txd;
  108. dma_addr_t txd_dma;
  109. struct sk_buff **skb;
  110. };
  111. struct mwl8k_priv {
  112. struct ieee80211_hw *hw;
  113. struct pci_dev *pdev;
  114. struct mwl8k_device_info *device_info;
  115. void __iomem *sram;
  116. void __iomem *regs;
  117. /* firmware */
  118. struct firmware *fw_helper;
  119. struct firmware *fw_ucode;
  120. /* hardware/firmware parameters */
  121. bool ap_fw;
  122. struct rxd_ops *rxd_ops;
  123. struct ieee80211_supported_band band_24;
  124. struct ieee80211_channel channels_24[14];
  125. struct ieee80211_rate rates_24[14];
  126. struct ieee80211_supported_band band_50;
  127. struct ieee80211_channel channels_50[4];
  128. struct ieee80211_rate rates_50[9];
  129. /* firmware access */
  130. struct mutex fw_mutex;
  131. struct task_struct *fw_mutex_owner;
  132. int fw_mutex_depth;
  133. struct completion *hostcmd_wait;
  134. /* lock held over TX and TX reap */
  135. spinlock_t tx_lock;
  136. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  137. struct completion *tx_wait;
  138. /* List of interfaces. */
  139. struct list_head vif_list;
  140. /* power management status cookie from firmware */
  141. u32 *cookie;
  142. dma_addr_t cookie_dma;
  143. u16 num_mcaddrs;
  144. u8 hw_rev;
  145. u32 fw_rev;
  146. /*
  147. * Running count of TX packets in flight, to avoid
  148. * iterating over the transmit rings each time.
  149. */
  150. int pending_tx_pkts;
  151. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  152. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  153. bool radio_on;
  154. bool radio_short_preamble;
  155. bool sniffer_enabled;
  156. bool wmm_enabled;
  157. struct work_struct sta_notify_worker;
  158. spinlock_t sta_notify_list_lock;
  159. struct list_head sta_notify_list;
  160. /* XXX need to convert this to handle multiple interfaces */
  161. bool capture_beacon;
  162. u8 capture_bssid[ETH_ALEN];
  163. struct sk_buff *beacon_skb;
  164. /*
  165. * This FJ worker has to be global as it is scheduled from the
  166. * RX handler. At this point we don't know which interface it
  167. * belongs to until the list of bssids waiting to complete join
  168. * is checked.
  169. */
  170. struct work_struct finalize_join_worker;
  171. /* Tasklet to perform TX reclaim. */
  172. struct tasklet_struct poll_tx_task;
  173. /* Tasklet to perform RX. */
  174. struct tasklet_struct poll_rx_task;
  175. };
  176. /* Per interface specific private data */
  177. struct mwl8k_vif {
  178. struct list_head list;
  179. struct ieee80211_vif *vif;
  180. /* Non AMPDU sequence number assigned by driver. */
  181. u16 seqno;
  182. };
  183. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  184. struct mwl8k_sta {
  185. /* Index into station database. Returned by UPDATE_STADB. */
  186. u8 peer_id;
  187. };
  188. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  189. static const struct ieee80211_channel mwl8k_channels_24[] = {
  190. { .center_freq = 2412, .hw_value = 1, },
  191. { .center_freq = 2417, .hw_value = 2, },
  192. { .center_freq = 2422, .hw_value = 3, },
  193. { .center_freq = 2427, .hw_value = 4, },
  194. { .center_freq = 2432, .hw_value = 5, },
  195. { .center_freq = 2437, .hw_value = 6, },
  196. { .center_freq = 2442, .hw_value = 7, },
  197. { .center_freq = 2447, .hw_value = 8, },
  198. { .center_freq = 2452, .hw_value = 9, },
  199. { .center_freq = 2457, .hw_value = 10, },
  200. { .center_freq = 2462, .hw_value = 11, },
  201. { .center_freq = 2467, .hw_value = 12, },
  202. { .center_freq = 2472, .hw_value = 13, },
  203. { .center_freq = 2484, .hw_value = 14, },
  204. };
  205. static const struct ieee80211_rate mwl8k_rates_24[] = {
  206. { .bitrate = 10, .hw_value = 2, },
  207. { .bitrate = 20, .hw_value = 4, },
  208. { .bitrate = 55, .hw_value = 11, },
  209. { .bitrate = 110, .hw_value = 22, },
  210. { .bitrate = 220, .hw_value = 44, },
  211. { .bitrate = 60, .hw_value = 12, },
  212. { .bitrate = 90, .hw_value = 18, },
  213. { .bitrate = 120, .hw_value = 24, },
  214. { .bitrate = 180, .hw_value = 36, },
  215. { .bitrate = 240, .hw_value = 48, },
  216. { .bitrate = 360, .hw_value = 72, },
  217. { .bitrate = 480, .hw_value = 96, },
  218. { .bitrate = 540, .hw_value = 108, },
  219. { .bitrate = 720, .hw_value = 144, },
  220. };
  221. static const struct ieee80211_channel mwl8k_channels_50[] = {
  222. { .center_freq = 5180, .hw_value = 36, },
  223. { .center_freq = 5200, .hw_value = 40, },
  224. { .center_freq = 5220, .hw_value = 44, },
  225. { .center_freq = 5240, .hw_value = 48, },
  226. };
  227. static const struct ieee80211_rate mwl8k_rates_50[] = {
  228. { .bitrate = 60, .hw_value = 12, },
  229. { .bitrate = 90, .hw_value = 18, },
  230. { .bitrate = 120, .hw_value = 24, },
  231. { .bitrate = 180, .hw_value = 36, },
  232. { .bitrate = 240, .hw_value = 48, },
  233. { .bitrate = 360, .hw_value = 72, },
  234. { .bitrate = 480, .hw_value = 96, },
  235. { .bitrate = 540, .hw_value = 108, },
  236. { .bitrate = 720, .hw_value = 144, },
  237. };
  238. /* Set or get info from Firmware */
  239. #define MWL8K_CMD_SET 0x0001
  240. #define MWL8K_CMD_GET 0x0000
  241. /* Firmware command codes */
  242. #define MWL8K_CMD_CODE_DNLD 0x0001
  243. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  244. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  245. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  246. #define MWL8K_CMD_GET_STAT 0x0014
  247. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  248. #define MWL8K_CMD_RF_TX_POWER 0x001e
  249. #define MWL8K_CMD_RF_ANTENNA 0x0020
  250. #define MWL8K_CMD_SET_BEACON 0x0100
  251. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  252. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  253. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  254. #define MWL8K_CMD_SET_AID 0x010d
  255. #define MWL8K_CMD_SET_RATE 0x0110
  256. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  257. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  258. #define MWL8K_CMD_SET_SLOT 0x0114
  259. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  260. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  261. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  262. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  263. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  264. #define MWL8K_CMD_SET_MAC_ADDR 0x0202
  265. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  266. #define MWL8K_CMD_BSS_START 0x1100
  267. #define MWL8K_CMD_SET_NEW_STN 0x1111
  268. #define MWL8K_CMD_UPDATE_STADB 0x1123
  269. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  270. {
  271. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  272. snprintf(buf, bufsize, "%s", #x);\
  273. return buf;\
  274. } while (0)
  275. switch (cmd & ~0x8000) {
  276. MWL8K_CMDNAME(CODE_DNLD);
  277. MWL8K_CMDNAME(GET_HW_SPEC);
  278. MWL8K_CMDNAME(SET_HW_SPEC);
  279. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  280. MWL8K_CMDNAME(GET_STAT);
  281. MWL8K_CMDNAME(RADIO_CONTROL);
  282. MWL8K_CMDNAME(RF_TX_POWER);
  283. MWL8K_CMDNAME(RF_ANTENNA);
  284. MWL8K_CMDNAME(SET_BEACON);
  285. MWL8K_CMDNAME(SET_PRE_SCAN);
  286. MWL8K_CMDNAME(SET_POST_SCAN);
  287. MWL8K_CMDNAME(SET_RF_CHANNEL);
  288. MWL8K_CMDNAME(SET_AID);
  289. MWL8K_CMDNAME(SET_RATE);
  290. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  291. MWL8K_CMDNAME(RTS_THRESHOLD);
  292. MWL8K_CMDNAME(SET_SLOT);
  293. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  294. MWL8K_CMDNAME(SET_WMM_MODE);
  295. MWL8K_CMDNAME(MIMO_CONFIG);
  296. MWL8K_CMDNAME(USE_FIXED_RATE);
  297. MWL8K_CMDNAME(ENABLE_SNIFFER);
  298. MWL8K_CMDNAME(SET_MAC_ADDR);
  299. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  300. MWL8K_CMDNAME(BSS_START);
  301. MWL8K_CMDNAME(SET_NEW_STN);
  302. MWL8K_CMDNAME(UPDATE_STADB);
  303. default:
  304. snprintf(buf, bufsize, "0x%x", cmd);
  305. }
  306. #undef MWL8K_CMDNAME
  307. return buf;
  308. }
  309. /* Hardware and firmware reset */
  310. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  311. {
  312. iowrite32(MWL8K_H2A_INT_RESET,
  313. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  314. iowrite32(MWL8K_H2A_INT_RESET,
  315. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  316. msleep(20);
  317. }
  318. /* Release fw image */
  319. static void mwl8k_release_fw(struct firmware **fw)
  320. {
  321. if (*fw == NULL)
  322. return;
  323. release_firmware(*fw);
  324. *fw = NULL;
  325. }
  326. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  327. {
  328. mwl8k_release_fw(&priv->fw_ucode);
  329. mwl8k_release_fw(&priv->fw_helper);
  330. }
  331. /* Request fw image */
  332. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  333. const char *fname, struct firmware **fw)
  334. {
  335. /* release current image */
  336. if (*fw != NULL)
  337. mwl8k_release_fw(fw);
  338. return request_firmware((const struct firmware **)fw,
  339. fname, &priv->pdev->dev);
  340. }
  341. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  342. {
  343. struct mwl8k_device_info *di = priv->device_info;
  344. int rc;
  345. if (di->helper_image != NULL) {
  346. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  347. if (rc) {
  348. printk(KERN_ERR "%s: Error requesting helper "
  349. "firmware file %s\n", pci_name(priv->pdev),
  350. di->helper_image);
  351. return rc;
  352. }
  353. }
  354. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  355. if (rc) {
  356. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  357. pci_name(priv->pdev), di->fw_image);
  358. mwl8k_release_fw(&priv->fw_helper);
  359. return rc;
  360. }
  361. return 0;
  362. }
  363. struct mwl8k_cmd_pkt {
  364. __le16 code;
  365. __le16 length;
  366. __le16 seq_num;
  367. __le16 result;
  368. char payload[0];
  369. } __attribute__((packed));
  370. /*
  371. * Firmware loading.
  372. */
  373. static int
  374. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  375. {
  376. void __iomem *regs = priv->regs;
  377. dma_addr_t dma_addr;
  378. int loops;
  379. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  380. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  381. return -ENOMEM;
  382. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  383. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  384. iowrite32(MWL8K_H2A_INT_DOORBELL,
  385. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  386. iowrite32(MWL8K_H2A_INT_DUMMY,
  387. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  388. loops = 1000;
  389. do {
  390. u32 int_code;
  391. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  392. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  393. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  394. break;
  395. }
  396. cond_resched();
  397. udelay(1);
  398. } while (--loops);
  399. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  400. return loops ? 0 : -ETIMEDOUT;
  401. }
  402. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  403. const u8 *data, size_t length)
  404. {
  405. struct mwl8k_cmd_pkt *cmd;
  406. int done;
  407. int rc = 0;
  408. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  409. if (cmd == NULL)
  410. return -ENOMEM;
  411. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  412. cmd->seq_num = 0;
  413. cmd->result = 0;
  414. done = 0;
  415. while (length) {
  416. int block_size = length > 256 ? 256 : length;
  417. memcpy(cmd->payload, data + done, block_size);
  418. cmd->length = cpu_to_le16(block_size);
  419. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  420. sizeof(*cmd) + block_size);
  421. if (rc)
  422. break;
  423. done += block_size;
  424. length -= block_size;
  425. }
  426. if (!rc) {
  427. cmd->length = 0;
  428. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  429. }
  430. kfree(cmd);
  431. return rc;
  432. }
  433. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  434. const u8 *data, size_t length)
  435. {
  436. unsigned char *buffer;
  437. int may_continue, rc = 0;
  438. u32 done, prev_block_size;
  439. buffer = kmalloc(1024, GFP_KERNEL);
  440. if (buffer == NULL)
  441. return -ENOMEM;
  442. done = 0;
  443. prev_block_size = 0;
  444. may_continue = 1000;
  445. while (may_continue > 0) {
  446. u32 block_size;
  447. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  448. if (block_size & 1) {
  449. block_size &= ~1;
  450. may_continue--;
  451. } else {
  452. done += prev_block_size;
  453. length -= prev_block_size;
  454. }
  455. if (block_size > 1024 || block_size > length) {
  456. rc = -EOVERFLOW;
  457. break;
  458. }
  459. if (length == 0) {
  460. rc = 0;
  461. break;
  462. }
  463. if (block_size == 0) {
  464. rc = -EPROTO;
  465. may_continue--;
  466. udelay(1);
  467. continue;
  468. }
  469. prev_block_size = block_size;
  470. memcpy(buffer, data + done, block_size);
  471. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  472. if (rc)
  473. break;
  474. }
  475. if (!rc && length != 0)
  476. rc = -EREMOTEIO;
  477. kfree(buffer);
  478. return rc;
  479. }
  480. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  481. {
  482. struct mwl8k_priv *priv = hw->priv;
  483. struct firmware *fw = priv->fw_ucode;
  484. int rc;
  485. int loops;
  486. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  487. struct firmware *helper = priv->fw_helper;
  488. if (helper == NULL) {
  489. printk(KERN_ERR "%s: helper image needed but none "
  490. "given\n", pci_name(priv->pdev));
  491. return -EINVAL;
  492. }
  493. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  494. if (rc) {
  495. printk(KERN_ERR "%s: unable to load firmware "
  496. "helper image\n", pci_name(priv->pdev));
  497. return rc;
  498. }
  499. msleep(5);
  500. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  501. } else {
  502. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  503. }
  504. if (rc) {
  505. printk(KERN_ERR "%s: unable to load firmware image\n",
  506. pci_name(priv->pdev));
  507. return rc;
  508. }
  509. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  510. loops = 500000;
  511. do {
  512. u32 ready_code;
  513. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  514. if (ready_code == MWL8K_FWAP_READY) {
  515. priv->ap_fw = 1;
  516. break;
  517. } else if (ready_code == MWL8K_FWSTA_READY) {
  518. priv->ap_fw = 0;
  519. break;
  520. }
  521. cond_resched();
  522. udelay(1);
  523. } while (--loops);
  524. return loops ? 0 : -ETIMEDOUT;
  525. }
  526. /* DMA header used by firmware and hardware. */
  527. struct mwl8k_dma_data {
  528. __le16 fwlen;
  529. struct ieee80211_hdr wh;
  530. char data[0];
  531. } __attribute__((packed));
  532. /* Routines to add/remove DMA header from skb. */
  533. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  534. {
  535. struct mwl8k_dma_data *tr;
  536. int hdrlen;
  537. tr = (struct mwl8k_dma_data *)skb->data;
  538. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  539. if (hdrlen != sizeof(tr->wh)) {
  540. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  541. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  542. *((__le16 *)(tr->data - 2)) = qos;
  543. } else {
  544. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  545. }
  546. }
  547. if (hdrlen != sizeof(*tr))
  548. skb_pull(skb, sizeof(*tr) - hdrlen);
  549. }
  550. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  551. {
  552. struct ieee80211_hdr *wh;
  553. int hdrlen;
  554. struct mwl8k_dma_data *tr;
  555. /*
  556. * Add a firmware DMA header; the firmware requires that we
  557. * present a 2-byte payload length followed by a 4-address
  558. * header (without QoS field), followed (optionally) by any
  559. * WEP/ExtIV header (but only filled in for CCMP).
  560. */
  561. wh = (struct ieee80211_hdr *)skb->data;
  562. hdrlen = ieee80211_hdrlen(wh->frame_control);
  563. if (hdrlen != sizeof(*tr))
  564. skb_push(skb, sizeof(*tr) - hdrlen);
  565. if (ieee80211_is_data_qos(wh->frame_control))
  566. hdrlen -= 2;
  567. tr = (struct mwl8k_dma_data *)skb->data;
  568. if (wh != &tr->wh)
  569. memmove(&tr->wh, wh, hdrlen);
  570. if (hdrlen != sizeof(tr->wh))
  571. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  572. /*
  573. * Firmware length is the length of the fully formed "802.11
  574. * payload". That is, everything except for the 802.11 header.
  575. * This includes all crypto material including the MIC.
  576. */
  577. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  578. }
  579. /*
  580. * Packet reception for 88w8366 AP firmware.
  581. */
  582. struct mwl8k_rxd_8366_ap {
  583. __le16 pkt_len;
  584. __u8 sq2;
  585. __u8 rate;
  586. __le32 pkt_phys_addr;
  587. __le32 next_rxd_phys_addr;
  588. __le16 qos_control;
  589. __le16 htsig2;
  590. __le32 hw_rssi_info;
  591. __le32 hw_noise_floor_info;
  592. __u8 noise_floor;
  593. __u8 pad0[3];
  594. __u8 rssi;
  595. __u8 rx_status;
  596. __u8 channel;
  597. __u8 rx_ctrl;
  598. } __attribute__((packed));
  599. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  600. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  601. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  602. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  603. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  604. {
  605. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  606. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  607. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  608. }
  609. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  610. {
  611. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  612. rxd->pkt_len = cpu_to_le16(len);
  613. rxd->pkt_phys_addr = cpu_to_le32(addr);
  614. wmb();
  615. rxd->rx_ctrl = 0;
  616. }
  617. static int
  618. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  619. __le16 *qos)
  620. {
  621. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  622. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  623. return -1;
  624. rmb();
  625. memset(status, 0, sizeof(*status));
  626. status->signal = -rxd->rssi;
  627. status->noise = -rxd->noise_floor;
  628. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  629. status->flag |= RX_FLAG_HT;
  630. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  631. status->flag |= RX_FLAG_40MHZ;
  632. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  633. } else {
  634. int i;
  635. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  636. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  637. status->rate_idx = i;
  638. break;
  639. }
  640. }
  641. }
  642. if (rxd->channel > 14) {
  643. status->band = IEEE80211_BAND_5GHZ;
  644. if (!(status->flag & RX_FLAG_HT))
  645. status->rate_idx -= 5;
  646. } else {
  647. status->band = IEEE80211_BAND_2GHZ;
  648. }
  649. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  650. *qos = rxd->qos_control;
  651. return le16_to_cpu(rxd->pkt_len);
  652. }
  653. static struct rxd_ops rxd_8366_ap_ops = {
  654. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  655. .rxd_init = mwl8k_rxd_8366_ap_init,
  656. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  657. .rxd_process = mwl8k_rxd_8366_ap_process,
  658. };
  659. /*
  660. * Packet reception for STA firmware.
  661. */
  662. struct mwl8k_rxd_sta {
  663. __le16 pkt_len;
  664. __u8 link_quality;
  665. __u8 noise_level;
  666. __le32 pkt_phys_addr;
  667. __le32 next_rxd_phys_addr;
  668. __le16 qos_control;
  669. __le16 rate_info;
  670. __le32 pad0[4];
  671. __u8 rssi;
  672. __u8 channel;
  673. __le16 pad1;
  674. __u8 rx_ctrl;
  675. __u8 rx_status;
  676. __u8 pad2[2];
  677. } __attribute__((packed));
  678. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  679. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  680. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  681. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  682. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  683. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  684. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  685. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  686. {
  687. struct mwl8k_rxd_sta *rxd = _rxd;
  688. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  689. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  690. }
  691. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  692. {
  693. struct mwl8k_rxd_sta *rxd = _rxd;
  694. rxd->pkt_len = cpu_to_le16(len);
  695. rxd->pkt_phys_addr = cpu_to_le32(addr);
  696. wmb();
  697. rxd->rx_ctrl = 0;
  698. }
  699. static int
  700. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  701. __le16 *qos)
  702. {
  703. struct mwl8k_rxd_sta *rxd = _rxd;
  704. u16 rate_info;
  705. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  706. return -1;
  707. rmb();
  708. rate_info = le16_to_cpu(rxd->rate_info);
  709. memset(status, 0, sizeof(*status));
  710. status->signal = -rxd->rssi;
  711. status->noise = -rxd->noise_level;
  712. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  713. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  714. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  715. status->flag |= RX_FLAG_SHORTPRE;
  716. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  717. status->flag |= RX_FLAG_40MHZ;
  718. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  719. status->flag |= RX_FLAG_SHORT_GI;
  720. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  721. status->flag |= RX_FLAG_HT;
  722. if (rxd->channel > 14) {
  723. status->band = IEEE80211_BAND_5GHZ;
  724. if (!(status->flag & RX_FLAG_HT))
  725. status->rate_idx -= 5;
  726. } else {
  727. status->band = IEEE80211_BAND_2GHZ;
  728. }
  729. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  730. *qos = rxd->qos_control;
  731. return le16_to_cpu(rxd->pkt_len);
  732. }
  733. static struct rxd_ops rxd_sta_ops = {
  734. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  735. .rxd_init = mwl8k_rxd_sta_init,
  736. .rxd_refill = mwl8k_rxd_sta_refill,
  737. .rxd_process = mwl8k_rxd_sta_process,
  738. };
  739. #define MWL8K_RX_DESCS 256
  740. #define MWL8K_RX_MAXSZ 3800
  741. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  742. {
  743. struct mwl8k_priv *priv = hw->priv;
  744. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  745. int size;
  746. int i;
  747. rxq->rxd_count = 0;
  748. rxq->head = 0;
  749. rxq->tail = 0;
  750. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  751. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  752. if (rxq->rxd == NULL) {
  753. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  754. wiphy_name(hw->wiphy));
  755. return -ENOMEM;
  756. }
  757. memset(rxq->rxd, 0, size);
  758. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  759. if (rxq->buf == NULL) {
  760. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  761. wiphy_name(hw->wiphy));
  762. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  763. return -ENOMEM;
  764. }
  765. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  766. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  767. int desc_size;
  768. void *rxd;
  769. int nexti;
  770. dma_addr_t next_dma_addr;
  771. desc_size = priv->rxd_ops->rxd_size;
  772. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  773. nexti = i + 1;
  774. if (nexti == MWL8K_RX_DESCS)
  775. nexti = 0;
  776. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  777. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  778. }
  779. return 0;
  780. }
  781. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  782. {
  783. struct mwl8k_priv *priv = hw->priv;
  784. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  785. int refilled;
  786. refilled = 0;
  787. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  788. struct sk_buff *skb;
  789. dma_addr_t addr;
  790. int rx;
  791. void *rxd;
  792. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  793. if (skb == NULL)
  794. break;
  795. addr = pci_map_single(priv->pdev, skb->data,
  796. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  797. rxq->rxd_count++;
  798. rx = rxq->tail++;
  799. if (rxq->tail == MWL8K_RX_DESCS)
  800. rxq->tail = 0;
  801. rxq->buf[rx].skb = skb;
  802. pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
  803. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  804. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  805. refilled++;
  806. }
  807. return refilled;
  808. }
  809. /* Must be called only when the card's reception is completely halted */
  810. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  811. {
  812. struct mwl8k_priv *priv = hw->priv;
  813. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  814. int i;
  815. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  816. if (rxq->buf[i].skb != NULL) {
  817. pci_unmap_single(priv->pdev,
  818. pci_unmap_addr(&rxq->buf[i], dma),
  819. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  820. pci_unmap_addr_set(&rxq->buf[i], dma, 0);
  821. kfree_skb(rxq->buf[i].skb);
  822. rxq->buf[i].skb = NULL;
  823. }
  824. }
  825. kfree(rxq->buf);
  826. rxq->buf = NULL;
  827. pci_free_consistent(priv->pdev,
  828. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  829. rxq->rxd, rxq->rxd_dma);
  830. rxq->rxd = NULL;
  831. }
  832. /*
  833. * Scan a list of BSSIDs to process for finalize join.
  834. * Allows for extension to process multiple BSSIDs.
  835. */
  836. static inline int
  837. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  838. {
  839. return priv->capture_beacon &&
  840. ieee80211_is_beacon(wh->frame_control) &&
  841. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  842. }
  843. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  844. struct sk_buff *skb)
  845. {
  846. struct mwl8k_priv *priv = hw->priv;
  847. priv->capture_beacon = false;
  848. memset(priv->capture_bssid, 0, ETH_ALEN);
  849. /*
  850. * Use GFP_ATOMIC as rxq_process is called from
  851. * the primary interrupt handler, memory allocation call
  852. * must not sleep.
  853. */
  854. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  855. if (priv->beacon_skb != NULL)
  856. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  857. }
  858. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  859. {
  860. struct mwl8k_priv *priv = hw->priv;
  861. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  862. int processed;
  863. processed = 0;
  864. while (rxq->rxd_count && limit--) {
  865. struct sk_buff *skb;
  866. void *rxd;
  867. int pkt_len;
  868. struct ieee80211_rx_status status;
  869. __le16 qos;
  870. skb = rxq->buf[rxq->head].skb;
  871. if (skb == NULL)
  872. break;
  873. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  874. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
  875. if (pkt_len < 0)
  876. break;
  877. rxq->buf[rxq->head].skb = NULL;
  878. pci_unmap_single(priv->pdev,
  879. pci_unmap_addr(&rxq->buf[rxq->head], dma),
  880. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  881. pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  882. rxq->head++;
  883. if (rxq->head == MWL8K_RX_DESCS)
  884. rxq->head = 0;
  885. rxq->rxd_count--;
  886. skb_put(skb, pkt_len);
  887. mwl8k_remove_dma_header(skb, qos);
  888. /*
  889. * Check for a pending join operation. Save a
  890. * copy of the beacon and schedule a tasklet to
  891. * send a FINALIZE_JOIN command to the firmware.
  892. */
  893. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  894. mwl8k_save_beacon(hw, skb);
  895. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  896. ieee80211_rx_irqsafe(hw, skb);
  897. processed++;
  898. }
  899. return processed;
  900. }
  901. /*
  902. * Packet transmission.
  903. */
  904. #define MWL8K_TXD_STATUS_OK 0x00000001
  905. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  906. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  907. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  908. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  909. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  910. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  911. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  912. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  913. #define MWL8K_QOS_EOSP 0x0010
  914. struct mwl8k_tx_desc {
  915. __le32 status;
  916. __u8 data_rate;
  917. __u8 tx_priority;
  918. __le16 qos_control;
  919. __le32 pkt_phys_addr;
  920. __le16 pkt_len;
  921. __u8 dest_MAC_addr[ETH_ALEN];
  922. __le32 next_txd_phys_addr;
  923. __le32 reserved;
  924. __le16 rate_info;
  925. __u8 peer_id;
  926. __u8 tx_frag_cnt;
  927. } __attribute__((packed));
  928. #define MWL8K_TX_DESCS 128
  929. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  930. {
  931. struct mwl8k_priv *priv = hw->priv;
  932. struct mwl8k_tx_queue *txq = priv->txq + index;
  933. int size;
  934. int i;
  935. memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
  936. txq->stats.limit = MWL8K_TX_DESCS;
  937. txq->head = 0;
  938. txq->tail = 0;
  939. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  940. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  941. if (txq->txd == NULL) {
  942. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  943. wiphy_name(hw->wiphy));
  944. return -ENOMEM;
  945. }
  946. memset(txq->txd, 0, size);
  947. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  948. if (txq->skb == NULL) {
  949. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  950. wiphy_name(hw->wiphy));
  951. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  952. return -ENOMEM;
  953. }
  954. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  955. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  956. struct mwl8k_tx_desc *tx_desc;
  957. int nexti;
  958. tx_desc = txq->txd + i;
  959. nexti = (i + 1) % MWL8K_TX_DESCS;
  960. tx_desc->status = 0;
  961. tx_desc->next_txd_phys_addr =
  962. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  963. }
  964. return 0;
  965. }
  966. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  967. {
  968. iowrite32(MWL8K_H2A_INT_PPA_READY,
  969. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  970. iowrite32(MWL8K_H2A_INT_DUMMY,
  971. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  972. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  973. }
  974. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  975. {
  976. struct mwl8k_priv *priv = hw->priv;
  977. int i;
  978. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  979. struct mwl8k_tx_queue *txq = priv->txq + i;
  980. int fw_owned = 0;
  981. int drv_owned = 0;
  982. int unused = 0;
  983. int desc;
  984. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  985. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  986. u32 status;
  987. status = le32_to_cpu(tx_desc->status);
  988. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  989. fw_owned++;
  990. else
  991. drv_owned++;
  992. if (tx_desc->pkt_len == 0)
  993. unused++;
  994. }
  995. printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
  996. "fw_owned=%d drv_owned=%d unused=%d\n",
  997. wiphy_name(hw->wiphy), i,
  998. txq->stats.len, txq->head, txq->tail,
  999. fw_owned, drv_owned, unused);
  1000. }
  1001. }
  1002. /*
  1003. * Must be called with priv->fw_mutex held and tx queues stopped.
  1004. */
  1005. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1006. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1007. {
  1008. struct mwl8k_priv *priv = hw->priv;
  1009. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1010. int retry;
  1011. int rc;
  1012. might_sleep();
  1013. /*
  1014. * The TX queues are stopped at this point, so this test
  1015. * doesn't need to take ->tx_lock.
  1016. */
  1017. if (!priv->pending_tx_pkts)
  1018. return 0;
  1019. retry = 0;
  1020. rc = 0;
  1021. spin_lock_bh(&priv->tx_lock);
  1022. priv->tx_wait = &tx_wait;
  1023. while (!rc) {
  1024. int oldcount;
  1025. unsigned long timeout;
  1026. oldcount = priv->pending_tx_pkts;
  1027. spin_unlock_bh(&priv->tx_lock);
  1028. timeout = wait_for_completion_timeout(&tx_wait,
  1029. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1030. spin_lock_bh(&priv->tx_lock);
  1031. if (timeout) {
  1032. WARN_ON(priv->pending_tx_pkts);
  1033. if (retry) {
  1034. printk(KERN_NOTICE "%s: tx rings drained\n",
  1035. wiphy_name(hw->wiphy));
  1036. }
  1037. break;
  1038. }
  1039. if (priv->pending_tx_pkts < oldcount) {
  1040. printk(KERN_NOTICE "%s: waiting for tx rings "
  1041. "to drain (%d -> %d pkts)\n",
  1042. wiphy_name(hw->wiphy), oldcount,
  1043. priv->pending_tx_pkts);
  1044. retry = 1;
  1045. continue;
  1046. }
  1047. priv->tx_wait = NULL;
  1048. printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
  1049. wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
  1050. mwl8k_dump_tx_rings(hw);
  1051. rc = -ETIMEDOUT;
  1052. }
  1053. spin_unlock_bh(&priv->tx_lock);
  1054. return rc;
  1055. }
  1056. #define MWL8K_TXD_SUCCESS(status) \
  1057. ((status) & (MWL8K_TXD_STATUS_OK | \
  1058. MWL8K_TXD_STATUS_OK_RETRY | \
  1059. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1060. static int
  1061. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1062. {
  1063. struct mwl8k_priv *priv = hw->priv;
  1064. struct mwl8k_tx_queue *txq = priv->txq + index;
  1065. int processed;
  1066. processed = 0;
  1067. while (txq->stats.len > 0 && limit--) {
  1068. int tx;
  1069. struct mwl8k_tx_desc *tx_desc;
  1070. unsigned long addr;
  1071. int size;
  1072. struct sk_buff *skb;
  1073. struct ieee80211_tx_info *info;
  1074. u32 status;
  1075. tx = txq->head;
  1076. tx_desc = txq->txd + tx;
  1077. status = le32_to_cpu(tx_desc->status);
  1078. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1079. if (!force)
  1080. break;
  1081. tx_desc->status &=
  1082. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1083. }
  1084. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1085. BUG_ON(txq->stats.len == 0);
  1086. txq->stats.len--;
  1087. priv->pending_tx_pkts--;
  1088. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1089. size = le16_to_cpu(tx_desc->pkt_len);
  1090. skb = txq->skb[tx];
  1091. txq->skb[tx] = NULL;
  1092. BUG_ON(skb == NULL);
  1093. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1094. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1095. /* Mark descriptor as unused */
  1096. tx_desc->pkt_phys_addr = 0;
  1097. tx_desc->pkt_len = 0;
  1098. info = IEEE80211_SKB_CB(skb);
  1099. ieee80211_tx_info_clear_status(info);
  1100. if (MWL8K_TXD_SUCCESS(status))
  1101. info->flags |= IEEE80211_TX_STAT_ACK;
  1102. ieee80211_tx_status_irqsafe(hw, skb);
  1103. processed++;
  1104. }
  1105. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1106. ieee80211_wake_queue(hw, index);
  1107. return processed;
  1108. }
  1109. /* must be called only when the card's transmit is completely halted */
  1110. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1111. {
  1112. struct mwl8k_priv *priv = hw->priv;
  1113. struct mwl8k_tx_queue *txq = priv->txq + index;
  1114. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1115. kfree(txq->skb);
  1116. txq->skb = NULL;
  1117. pci_free_consistent(priv->pdev,
  1118. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1119. txq->txd, txq->txd_dma);
  1120. txq->txd = NULL;
  1121. }
  1122. static int
  1123. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1124. {
  1125. struct mwl8k_priv *priv = hw->priv;
  1126. struct ieee80211_tx_info *tx_info;
  1127. struct mwl8k_vif *mwl8k_vif;
  1128. struct ieee80211_hdr *wh;
  1129. struct mwl8k_tx_queue *txq;
  1130. struct mwl8k_tx_desc *tx;
  1131. dma_addr_t dma;
  1132. u32 txstatus;
  1133. u8 txdatarate;
  1134. u16 qos;
  1135. wh = (struct ieee80211_hdr *)skb->data;
  1136. if (ieee80211_is_data_qos(wh->frame_control))
  1137. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1138. else
  1139. qos = 0;
  1140. mwl8k_add_dma_header(skb);
  1141. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1142. tx_info = IEEE80211_SKB_CB(skb);
  1143. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1144. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1145. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1146. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1147. mwl8k_vif->seqno += 0x10;
  1148. }
  1149. /* Setup firmware control bit fields for each frame type. */
  1150. txstatus = 0;
  1151. txdatarate = 0;
  1152. if (ieee80211_is_mgmt(wh->frame_control) ||
  1153. ieee80211_is_ctl(wh->frame_control)) {
  1154. txdatarate = 0;
  1155. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1156. } else if (ieee80211_is_data(wh->frame_control)) {
  1157. txdatarate = 1;
  1158. if (is_multicast_ether_addr(wh->addr1))
  1159. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1160. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1161. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1162. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1163. else
  1164. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1165. }
  1166. dma = pci_map_single(priv->pdev, skb->data,
  1167. skb->len, PCI_DMA_TODEVICE);
  1168. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1169. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1170. "dropping TX frame.\n", wiphy_name(hw->wiphy));
  1171. dev_kfree_skb(skb);
  1172. return NETDEV_TX_OK;
  1173. }
  1174. spin_lock_bh(&priv->tx_lock);
  1175. txq = priv->txq + index;
  1176. BUG_ON(txq->skb[txq->tail] != NULL);
  1177. txq->skb[txq->tail] = skb;
  1178. tx = txq->txd + txq->tail;
  1179. tx->data_rate = txdatarate;
  1180. tx->tx_priority = index;
  1181. tx->qos_control = cpu_to_le16(qos);
  1182. tx->pkt_phys_addr = cpu_to_le32(dma);
  1183. tx->pkt_len = cpu_to_le16(skb->len);
  1184. tx->rate_info = 0;
  1185. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1186. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1187. else
  1188. tx->peer_id = 0;
  1189. wmb();
  1190. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1191. txq->stats.count++;
  1192. txq->stats.len++;
  1193. priv->pending_tx_pkts++;
  1194. txq->tail++;
  1195. if (txq->tail == MWL8K_TX_DESCS)
  1196. txq->tail = 0;
  1197. if (txq->head == txq->tail)
  1198. ieee80211_stop_queue(hw, index);
  1199. mwl8k_tx_start(priv);
  1200. spin_unlock_bh(&priv->tx_lock);
  1201. return NETDEV_TX_OK;
  1202. }
  1203. /*
  1204. * Firmware access.
  1205. *
  1206. * We have the following requirements for issuing firmware commands:
  1207. * - Some commands require that the packet transmit path is idle when
  1208. * the command is issued. (For simplicity, we'll just quiesce the
  1209. * transmit path for every command.)
  1210. * - There are certain sequences of commands that need to be issued to
  1211. * the hardware sequentially, with no other intervening commands.
  1212. *
  1213. * This leads to an implementation of a "firmware lock" as a mutex that
  1214. * can be taken recursively, and which is taken by both the low-level
  1215. * command submission function (mwl8k_post_cmd) as well as any users of
  1216. * that function that require issuing of an atomic sequence of commands,
  1217. * and quiesces the transmit path whenever it's taken.
  1218. */
  1219. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1220. {
  1221. struct mwl8k_priv *priv = hw->priv;
  1222. if (priv->fw_mutex_owner != current) {
  1223. int rc;
  1224. mutex_lock(&priv->fw_mutex);
  1225. ieee80211_stop_queues(hw);
  1226. rc = mwl8k_tx_wait_empty(hw);
  1227. if (rc) {
  1228. ieee80211_wake_queues(hw);
  1229. mutex_unlock(&priv->fw_mutex);
  1230. return rc;
  1231. }
  1232. priv->fw_mutex_owner = current;
  1233. }
  1234. priv->fw_mutex_depth++;
  1235. return 0;
  1236. }
  1237. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1238. {
  1239. struct mwl8k_priv *priv = hw->priv;
  1240. if (!--priv->fw_mutex_depth) {
  1241. ieee80211_wake_queues(hw);
  1242. priv->fw_mutex_owner = NULL;
  1243. mutex_unlock(&priv->fw_mutex);
  1244. }
  1245. }
  1246. /*
  1247. * Command processing.
  1248. */
  1249. /* Timeout firmware commands after 10s */
  1250. #define MWL8K_CMD_TIMEOUT_MS 10000
  1251. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1252. {
  1253. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1254. struct mwl8k_priv *priv = hw->priv;
  1255. void __iomem *regs = priv->regs;
  1256. dma_addr_t dma_addr;
  1257. unsigned int dma_size;
  1258. int rc;
  1259. unsigned long timeout = 0;
  1260. u8 buf[32];
  1261. cmd->result = 0xffff;
  1262. dma_size = le16_to_cpu(cmd->length);
  1263. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1264. PCI_DMA_BIDIRECTIONAL);
  1265. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1266. return -ENOMEM;
  1267. rc = mwl8k_fw_lock(hw);
  1268. if (rc) {
  1269. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1270. PCI_DMA_BIDIRECTIONAL);
  1271. return rc;
  1272. }
  1273. priv->hostcmd_wait = &cmd_wait;
  1274. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1275. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1276. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1277. iowrite32(MWL8K_H2A_INT_DUMMY,
  1278. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1279. timeout = wait_for_completion_timeout(&cmd_wait,
  1280. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1281. priv->hostcmd_wait = NULL;
  1282. mwl8k_fw_unlock(hw);
  1283. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1284. PCI_DMA_BIDIRECTIONAL);
  1285. if (!timeout) {
  1286. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1287. wiphy_name(hw->wiphy),
  1288. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1289. MWL8K_CMD_TIMEOUT_MS);
  1290. rc = -ETIMEDOUT;
  1291. } else {
  1292. int ms;
  1293. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1294. rc = cmd->result ? -EINVAL : 0;
  1295. if (rc)
  1296. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1297. wiphy_name(hw->wiphy),
  1298. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1299. le16_to_cpu(cmd->result));
  1300. else if (ms > 2000)
  1301. printk(KERN_NOTICE "%s: Command %s took %d ms\n",
  1302. wiphy_name(hw->wiphy),
  1303. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1304. ms);
  1305. }
  1306. return rc;
  1307. }
  1308. /*
  1309. * Setup code shared between STA and AP firmware images.
  1310. */
  1311. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1312. {
  1313. struct mwl8k_priv *priv = hw->priv;
  1314. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1315. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1316. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1317. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1318. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1319. priv->band_24.channels = priv->channels_24;
  1320. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1321. priv->band_24.bitrates = priv->rates_24;
  1322. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1323. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1324. }
  1325. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1326. {
  1327. struct mwl8k_priv *priv = hw->priv;
  1328. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1329. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1330. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1331. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1332. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1333. priv->band_50.channels = priv->channels_50;
  1334. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1335. priv->band_50.bitrates = priv->rates_50;
  1336. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1337. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1338. }
  1339. /*
  1340. * CMD_GET_HW_SPEC (STA version).
  1341. */
  1342. struct mwl8k_cmd_get_hw_spec_sta {
  1343. struct mwl8k_cmd_pkt header;
  1344. __u8 hw_rev;
  1345. __u8 host_interface;
  1346. __le16 num_mcaddrs;
  1347. __u8 perm_addr[ETH_ALEN];
  1348. __le16 region_code;
  1349. __le32 fw_rev;
  1350. __le32 ps_cookie;
  1351. __le32 caps;
  1352. __u8 mcs_bitmap[16];
  1353. __le32 rx_queue_ptr;
  1354. __le32 num_tx_queues;
  1355. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1356. __le32 caps2;
  1357. __le32 num_tx_desc_per_queue;
  1358. __le32 total_rxd;
  1359. } __attribute__((packed));
  1360. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1361. #define MWL8K_CAP_GREENFIELD 0x08000000
  1362. #define MWL8K_CAP_AMPDU 0x04000000
  1363. #define MWL8K_CAP_RX_STBC 0x01000000
  1364. #define MWL8K_CAP_TX_STBC 0x00800000
  1365. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1366. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1367. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1368. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1369. #define MWL8K_CAP_DELAY_BA 0x00003000
  1370. #define MWL8K_CAP_MIMO 0x00000200
  1371. #define MWL8K_CAP_40MHZ 0x00000100
  1372. #define MWL8K_CAP_BAND_MASK 0x00000007
  1373. #define MWL8K_CAP_5GHZ 0x00000004
  1374. #define MWL8K_CAP_2GHZ4 0x00000001
  1375. static void
  1376. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1377. struct ieee80211_supported_band *band, u32 cap)
  1378. {
  1379. int rx_streams;
  1380. int tx_streams;
  1381. band->ht_cap.ht_supported = 1;
  1382. if (cap & MWL8K_CAP_MAX_AMSDU)
  1383. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1384. if (cap & MWL8K_CAP_GREENFIELD)
  1385. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1386. if (cap & MWL8K_CAP_AMPDU) {
  1387. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1388. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1389. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1390. }
  1391. if (cap & MWL8K_CAP_RX_STBC)
  1392. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1393. if (cap & MWL8K_CAP_TX_STBC)
  1394. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1395. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1396. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1397. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1398. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1399. if (cap & MWL8K_CAP_DELAY_BA)
  1400. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1401. if (cap & MWL8K_CAP_40MHZ)
  1402. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1403. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1404. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1405. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1406. if (rx_streams >= 2)
  1407. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1408. if (rx_streams >= 3)
  1409. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1410. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1411. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1412. if (rx_streams != tx_streams) {
  1413. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1414. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1415. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1416. }
  1417. }
  1418. static void
  1419. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1420. {
  1421. struct mwl8k_priv *priv = hw->priv;
  1422. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1423. mwl8k_setup_2ghz_band(hw);
  1424. if (caps & MWL8K_CAP_MIMO)
  1425. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1426. }
  1427. if (caps & MWL8K_CAP_5GHZ) {
  1428. mwl8k_setup_5ghz_band(hw);
  1429. if (caps & MWL8K_CAP_MIMO)
  1430. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1431. }
  1432. }
  1433. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1434. {
  1435. struct mwl8k_priv *priv = hw->priv;
  1436. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1437. int rc;
  1438. int i;
  1439. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1440. if (cmd == NULL)
  1441. return -ENOMEM;
  1442. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1443. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1444. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1445. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1446. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1447. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1448. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1449. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1450. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1451. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1452. rc = mwl8k_post_cmd(hw, &cmd->header);
  1453. if (!rc) {
  1454. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1455. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1456. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1457. priv->hw_rev = cmd->hw_rev;
  1458. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1459. }
  1460. kfree(cmd);
  1461. return rc;
  1462. }
  1463. /*
  1464. * CMD_GET_HW_SPEC (AP version).
  1465. */
  1466. struct mwl8k_cmd_get_hw_spec_ap {
  1467. struct mwl8k_cmd_pkt header;
  1468. __u8 hw_rev;
  1469. __u8 host_interface;
  1470. __le16 num_wcb;
  1471. __le16 num_mcaddrs;
  1472. __u8 perm_addr[ETH_ALEN];
  1473. __le16 region_code;
  1474. __le16 num_antenna;
  1475. __le32 fw_rev;
  1476. __le32 wcbbase0;
  1477. __le32 rxwrptr;
  1478. __le32 rxrdptr;
  1479. __le32 ps_cookie;
  1480. __le32 wcbbase1;
  1481. __le32 wcbbase2;
  1482. __le32 wcbbase3;
  1483. } __attribute__((packed));
  1484. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1485. {
  1486. struct mwl8k_priv *priv = hw->priv;
  1487. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1488. int rc;
  1489. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1490. if (cmd == NULL)
  1491. return -ENOMEM;
  1492. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1493. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1494. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1495. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1496. rc = mwl8k_post_cmd(hw, &cmd->header);
  1497. if (!rc) {
  1498. int off;
  1499. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1500. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1501. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1502. priv->hw_rev = cmd->hw_rev;
  1503. mwl8k_setup_2ghz_band(hw);
  1504. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1505. iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
  1506. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1507. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1508. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1509. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1510. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1511. iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
  1512. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1513. iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
  1514. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1515. iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
  1516. }
  1517. kfree(cmd);
  1518. return rc;
  1519. }
  1520. /*
  1521. * CMD_SET_HW_SPEC.
  1522. */
  1523. struct mwl8k_cmd_set_hw_spec {
  1524. struct mwl8k_cmd_pkt header;
  1525. __u8 hw_rev;
  1526. __u8 host_interface;
  1527. __le16 num_mcaddrs;
  1528. __u8 perm_addr[ETH_ALEN];
  1529. __le16 region_code;
  1530. __le32 fw_rev;
  1531. __le32 ps_cookie;
  1532. __le32 caps;
  1533. __le32 rx_queue_ptr;
  1534. __le32 num_tx_queues;
  1535. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1536. __le32 flags;
  1537. __le32 num_tx_desc_per_queue;
  1538. __le32 total_rxd;
  1539. } __attribute__((packed));
  1540. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1541. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1542. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1543. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1544. {
  1545. struct mwl8k_priv *priv = hw->priv;
  1546. struct mwl8k_cmd_set_hw_spec *cmd;
  1547. int rc;
  1548. int i;
  1549. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1550. if (cmd == NULL)
  1551. return -ENOMEM;
  1552. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1553. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1554. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1555. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1556. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1557. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1558. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1559. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1560. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1561. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1562. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1563. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1564. rc = mwl8k_post_cmd(hw, &cmd->header);
  1565. kfree(cmd);
  1566. return rc;
  1567. }
  1568. /*
  1569. * CMD_MAC_MULTICAST_ADR.
  1570. */
  1571. struct mwl8k_cmd_mac_multicast_adr {
  1572. struct mwl8k_cmd_pkt header;
  1573. __le16 action;
  1574. __le16 numaddr;
  1575. __u8 addr[0][ETH_ALEN];
  1576. };
  1577. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1578. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1579. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1580. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1581. static struct mwl8k_cmd_pkt *
  1582. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1583. int mc_count, struct dev_addr_list *mclist)
  1584. {
  1585. struct mwl8k_priv *priv = hw->priv;
  1586. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1587. int size;
  1588. if (allmulti || mc_count > priv->num_mcaddrs) {
  1589. allmulti = 1;
  1590. mc_count = 0;
  1591. }
  1592. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1593. cmd = kzalloc(size, GFP_ATOMIC);
  1594. if (cmd == NULL)
  1595. return NULL;
  1596. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1597. cmd->header.length = cpu_to_le16(size);
  1598. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1599. MWL8K_ENABLE_RX_BROADCAST);
  1600. if (allmulti) {
  1601. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1602. } else if (mc_count) {
  1603. int i;
  1604. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1605. cmd->numaddr = cpu_to_le16(mc_count);
  1606. for (i = 0; i < mc_count && mclist; i++) {
  1607. if (mclist->da_addrlen != ETH_ALEN) {
  1608. kfree(cmd);
  1609. return NULL;
  1610. }
  1611. memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
  1612. mclist = mclist->next;
  1613. }
  1614. }
  1615. return &cmd->header;
  1616. }
  1617. /*
  1618. * CMD_GET_STAT.
  1619. */
  1620. struct mwl8k_cmd_get_stat {
  1621. struct mwl8k_cmd_pkt header;
  1622. __le32 stats[64];
  1623. } __attribute__((packed));
  1624. #define MWL8K_STAT_ACK_FAILURE 9
  1625. #define MWL8K_STAT_RTS_FAILURE 12
  1626. #define MWL8K_STAT_FCS_ERROR 24
  1627. #define MWL8K_STAT_RTS_SUCCESS 11
  1628. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1629. struct ieee80211_low_level_stats *stats)
  1630. {
  1631. struct mwl8k_cmd_get_stat *cmd;
  1632. int rc;
  1633. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1634. if (cmd == NULL)
  1635. return -ENOMEM;
  1636. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1637. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1638. rc = mwl8k_post_cmd(hw, &cmd->header);
  1639. if (!rc) {
  1640. stats->dot11ACKFailureCount =
  1641. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1642. stats->dot11RTSFailureCount =
  1643. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1644. stats->dot11FCSErrorCount =
  1645. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1646. stats->dot11RTSSuccessCount =
  1647. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1648. }
  1649. kfree(cmd);
  1650. return rc;
  1651. }
  1652. /*
  1653. * CMD_RADIO_CONTROL.
  1654. */
  1655. struct mwl8k_cmd_radio_control {
  1656. struct mwl8k_cmd_pkt header;
  1657. __le16 action;
  1658. __le16 control;
  1659. __le16 radio_on;
  1660. } __attribute__((packed));
  1661. static int
  1662. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1663. {
  1664. struct mwl8k_priv *priv = hw->priv;
  1665. struct mwl8k_cmd_radio_control *cmd;
  1666. int rc;
  1667. if (enable == priv->radio_on && !force)
  1668. return 0;
  1669. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1670. if (cmd == NULL)
  1671. return -ENOMEM;
  1672. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1673. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1674. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1675. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1676. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1677. rc = mwl8k_post_cmd(hw, &cmd->header);
  1678. kfree(cmd);
  1679. if (!rc)
  1680. priv->radio_on = enable;
  1681. return rc;
  1682. }
  1683. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1684. {
  1685. return mwl8k_cmd_radio_control(hw, 0, 0);
  1686. }
  1687. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1688. {
  1689. return mwl8k_cmd_radio_control(hw, 1, 0);
  1690. }
  1691. static int
  1692. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1693. {
  1694. struct mwl8k_priv *priv = hw->priv;
  1695. priv->radio_short_preamble = short_preamble;
  1696. return mwl8k_cmd_radio_control(hw, 1, 1);
  1697. }
  1698. /*
  1699. * CMD_RF_TX_POWER.
  1700. */
  1701. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1702. struct mwl8k_cmd_rf_tx_power {
  1703. struct mwl8k_cmd_pkt header;
  1704. __le16 action;
  1705. __le16 support_level;
  1706. __le16 current_level;
  1707. __le16 reserved;
  1708. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1709. } __attribute__((packed));
  1710. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1711. {
  1712. struct mwl8k_cmd_rf_tx_power *cmd;
  1713. int rc;
  1714. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1715. if (cmd == NULL)
  1716. return -ENOMEM;
  1717. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1718. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1719. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1720. cmd->support_level = cpu_to_le16(dBm);
  1721. rc = mwl8k_post_cmd(hw, &cmd->header);
  1722. kfree(cmd);
  1723. return rc;
  1724. }
  1725. /*
  1726. * CMD_RF_ANTENNA.
  1727. */
  1728. struct mwl8k_cmd_rf_antenna {
  1729. struct mwl8k_cmd_pkt header;
  1730. __le16 antenna;
  1731. __le16 mode;
  1732. } __attribute__((packed));
  1733. #define MWL8K_RF_ANTENNA_RX 1
  1734. #define MWL8K_RF_ANTENNA_TX 2
  1735. static int
  1736. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1737. {
  1738. struct mwl8k_cmd_rf_antenna *cmd;
  1739. int rc;
  1740. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1741. if (cmd == NULL)
  1742. return -ENOMEM;
  1743. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1744. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1745. cmd->antenna = cpu_to_le16(antenna);
  1746. cmd->mode = cpu_to_le16(mask);
  1747. rc = mwl8k_post_cmd(hw, &cmd->header);
  1748. kfree(cmd);
  1749. return rc;
  1750. }
  1751. /*
  1752. * CMD_SET_BEACON.
  1753. */
  1754. struct mwl8k_cmd_set_beacon {
  1755. struct mwl8k_cmd_pkt header;
  1756. __le16 beacon_len;
  1757. __u8 beacon[0];
  1758. };
  1759. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
  1760. {
  1761. struct mwl8k_cmd_set_beacon *cmd;
  1762. int rc;
  1763. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1764. if (cmd == NULL)
  1765. return -ENOMEM;
  1766. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1767. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1768. cmd->beacon_len = cpu_to_le16(len);
  1769. memcpy(cmd->beacon, beacon, len);
  1770. rc = mwl8k_post_cmd(hw, &cmd->header);
  1771. kfree(cmd);
  1772. return rc;
  1773. }
  1774. /*
  1775. * CMD_SET_PRE_SCAN.
  1776. */
  1777. struct mwl8k_cmd_set_pre_scan {
  1778. struct mwl8k_cmd_pkt header;
  1779. } __attribute__((packed));
  1780. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1781. {
  1782. struct mwl8k_cmd_set_pre_scan *cmd;
  1783. int rc;
  1784. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1785. if (cmd == NULL)
  1786. return -ENOMEM;
  1787. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1788. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1789. rc = mwl8k_post_cmd(hw, &cmd->header);
  1790. kfree(cmd);
  1791. return rc;
  1792. }
  1793. /*
  1794. * CMD_SET_POST_SCAN.
  1795. */
  1796. struct mwl8k_cmd_set_post_scan {
  1797. struct mwl8k_cmd_pkt header;
  1798. __le32 isibss;
  1799. __u8 bssid[ETH_ALEN];
  1800. } __attribute__((packed));
  1801. static int
  1802. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1803. {
  1804. struct mwl8k_cmd_set_post_scan *cmd;
  1805. int rc;
  1806. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1807. if (cmd == NULL)
  1808. return -ENOMEM;
  1809. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1810. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1811. cmd->isibss = 0;
  1812. memcpy(cmd->bssid, mac, ETH_ALEN);
  1813. rc = mwl8k_post_cmd(hw, &cmd->header);
  1814. kfree(cmd);
  1815. return rc;
  1816. }
  1817. /*
  1818. * CMD_SET_RF_CHANNEL.
  1819. */
  1820. struct mwl8k_cmd_set_rf_channel {
  1821. struct mwl8k_cmd_pkt header;
  1822. __le16 action;
  1823. __u8 current_channel;
  1824. __le32 channel_flags;
  1825. } __attribute__((packed));
  1826. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1827. struct ieee80211_conf *conf)
  1828. {
  1829. struct ieee80211_channel *channel = conf->channel;
  1830. struct mwl8k_cmd_set_rf_channel *cmd;
  1831. int rc;
  1832. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1833. if (cmd == NULL)
  1834. return -ENOMEM;
  1835. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1836. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1837. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1838. cmd->current_channel = channel->hw_value;
  1839. if (channel->band == IEEE80211_BAND_2GHZ)
  1840. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1841. else if (channel->band == IEEE80211_BAND_5GHZ)
  1842. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1843. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1844. conf->channel_type == NL80211_CHAN_HT20)
  1845. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1846. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1847. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1848. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1849. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1850. rc = mwl8k_post_cmd(hw, &cmd->header);
  1851. kfree(cmd);
  1852. return rc;
  1853. }
  1854. /*
  1855. * CMD_SET_AID.
  1856. */
  1857. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1858. #define MWL8K_FRAME_PROT_11G 0x07
  1859. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1860. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1861. struct mwl8k_cmd_update_set_aid {
  1862. struct mwl8k_cmd_pkt header;
  1863. __le16 aid;
  1864. /* AP's MAC address (BSSID) */
  1865. __u8 bssid[ETH_ALEN];
  1866. __le16 protection_mode;
  1867. __u8 supp_rates[14];
  1868. } __attribute__((packed));
  1869. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1870. {
  1871. int i;
  1872. int j;
  1873. /*
  1874. * Clear nonstandard rates 4 and 13.
  1875. */
  1876. mask &= 0x1fef;
  1877. for (i = 0, j = 0; i < 14; i++) {
  1878. if (mask & (1 << i))
  1879. rates[j++] = mwl8k_rates_24[i].hw_value;
  1880. }
  1881. }
  1882. static int
  1883. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1884. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1885. {
  1886. struct mwl8k_cmd_update_set_aid *cmd;
  1887. u16 prot_mode;
  1888. int rc;
  1889. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1890. if (cmd == NULL)
  1891. return -ENOMEM;
  1892. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1893. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1894. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1895. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1896. if (vif->bss_conf.use_cts_prot) {
  1897. prot_mode = MWL8K_FRAME_PROT_11G;
  1898. } else {
  1899. switch (vif->bss_conf.ht_operation_mode &
  1900. IEEE80211_HT_OP_MODE_PROTECTION) {
  1901. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1902. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1903. break;
  1904. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1905. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1906. break;
  1907. default:
  1908. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1909. break;
  1910. }
  1911. }
  1912. cmd->protection_mode = cpu_to_le16(prot_mode);
  1913. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1914. rc = mwl8k_post_cmd(hw, &cmd->header);
  1915. kfree(cmd);
  1916. return rc;
  1917. }
  1918. /*
  1919. * CMD_SET_RATE.
  1920. */
  1921. struct mwl8k_cmd_set_rate {
  1922. struct mwl8k_cmd_pkt header;
  1923. __u8 legacy_rates[14];
  1924. /* Bitmap for supported MCS codes. */
  1925. __u8 mcs_set[16];
  1926. __u8 reserved[16];
  1927. } __attribute__((packed));
  1928. static int
  1929. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1930. u32 legacy_rate_mask, u8 *mcs_rates)
  1931. {
  1932. struct mwl8k_cmd_set_rate *cmd;
  1933. int rc;
  1934. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1935. if (cmd == NULL)
  1936. return -ENOMEM;
  1937. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1938. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1939. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1940. memcpy(cmd->mcs_set, mcs_rates, 16);
  1941. rc = mwl8k_post_cmd(hw, &cmd->header);
  1942. kfree(cmd);
  1943. return rc;
  1944. }
  1945. /*
  1946. * CMD_FINALIZE_JOIN.
  1947. */
  1948. #define MWL8K_FJ_BEACON_MAXLEN 128
  1949. struct mwl8k_cmd_finalize_join {
  1950. struct mwl8k_cmd_pkt header;
  1951. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1952. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1953. } __attribute__((packed));
  1954. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1955. int framelen, int dtim)
  1956. {
  1957. struct mwl8k_cmd_finalize_join *cmd;
  1958. struct ieee80211_mgmt *payload = frame;
  1959. int payload_len;
  1960. int rc;
  1961. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1962. if (cmd == NULL)
  1963. return -ENOMEM;
  1964. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1965. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1966. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1967. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1968. if (payload_len < 0)
  1969. payload_len = 0;
  1970. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1971. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1972. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1973. rc = mwl8k_post_cmd(hw, &cmd->header);
  1974. kfree(cmd);
  1975. return rc;
  1976. }
  1977. /*
  1978. * CMD_SET_RTS_THRESHOLD.
  1979. */
  1980. struct mwl8k_cmd_set_rts_threshold {
  1981. struct mwl8k_cmd_pkt header;
  1982. __le16 action;
  1983. __le16 threshold;
  1984. } __attribute__((packed));
  1985. static int
  1986. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  1987. {
  1988. struct mwl8k_cmd_set_rts_threshold *cmd;
  1989. int rc;
  1990. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1991. if (cmd == NULL)
  1992. return -ENOMEM;
  1993. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1994. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1995. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1996. cmd->threshold = cpu_to_le16(rts_thresh);
  1997. rc = mwl8k_post_cmd(hw, &cmd->header);
  1998. kfree(cmd);
  1999. return rc;
  2000. }
  2001. /*
  2002. * CMD_SET_SLOT.
  2003. */
  2004. struct mwl8k_cmd_set_slot {
  2005. struct mwl8k_cmd_pkt header;
  2006. __le16 action;
  2007. __u8 short_slot;
  2008. } __attribute__((packed));
  2009. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2010. {
  2011. struct mwl8k_cmd_set_slot *cmd;
  2012. int rc;
  2013. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2014. if (cmd == NULL)
  2015. return -ENOMEM;
  2016. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2017. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2018. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2019. cmd->short_slot = short_slot_time;
  2020. rc = mwl8k_post_cmd(hw, &cmd->header);
  2021. kfree(cmd);
  2022. return rc;
  2023. }
  2024. /*
  2025. * CMD_SET_EDCA_PARAMS.
  2026. */
  2027. struct mwl8k_cmd_set_edca_params {
  2028. struct mwl8k_cmd_pkt header;
  2029. /* See MWL8K_SET_EDCA_XXX below */
  2030. __le16 action;
  2031. /* TX opportunity in units of 32 us */
  2032. __le16 txop;
  2033. union {
  2034. struct {
  2035. /* Log exponent of max contention period: 0...15 */
  2036. __le32 log_cw_max;
  2037. /* Log exponent of min contention period: 0...15 */
  2038. __le32 log_cw_min;
  2039. /* Adaptive interframe spacing in units of 32us */
  2040. __u8 aifs;
  2041. /* TX queue to configure */
  2042. __u8 txq;
  2043. } ap;
  2044. struct {
  2045. /* Log exponent of max contention period: 0...15 */
  2046. __u8 log_cw_max;
  2047. /* Log exponent of min contention period: 0...15 */
  2048. __u8 log_cw_min;
  2049. /* Adaptive interframe spacing in units of 32us */
  2050. __u8 aifs;
  2051. /* TX queue to configure */
  2052. __u8 txq;
  2053. } sta;
  2054. };
  2055. } __attribute__((packed));
  2056. #define MWL8K_SET_EDCA_CW 0x01
  2057. #define MWL8K_SET_EDCA_TXOP 0x02
  2058. #define MWL8K_SET_EDCA_AIFS 0x04
  2059. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2060. MWL8K_SET_EDCA_TXOP | \
  2061. MWL8K_SET_EDCA_AIFS)
  2062. static int
  2063. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2064. __u16 cw_min, __u16 cw_max,
  2065. __u8 aifs, __u16 txop)
  2066. {
  2067. struct mwl8k_priv *priv = hw->priv;
  2068. struct mwl8k_cmd_set_edca_params *cmd;
  2069. int rc;
  2070. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2071. if (cmd == NULL)
  2072. return -ENOMEM;
  2073. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2074. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2075. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2076. cmd->txop = cpu_to_le16(txop);
  2077. if (priv->ap_fw) {
  2078. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2079. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2080. cmd->ap.aifs = aifs;
  2081. cmd->ap.txq = qnum;
  2082. } else {
  2083. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2084. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2085. cmd->sta.aifs = aifs;
  2086. cmd->sta.txq = qnum;
  2087. }
  2088. rc = mwl8k_post_cmd(hw, &cmd->header);
  2089. kfree(cmd);
  2090. return rc;
  2091. }
  2092. /*
  2093. * CMD_SET_WMM_MODE.
  2094. */
  2095. struct mwl8k_cmd_set_wmm_mode {
  2096. struct mwl8k_cmd_pkt header;
  2097. __le16 action;
  2098. } __attribute__((packed));
  2099. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2100. {
  2101. struct mwl8k_priv *priv = hw->priv;
  2102. struct mwl8k_cmd_set_wmm_mode *cmd;
  2103. int rc;
  2104. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2105. if (cmd == NULL)
  2106. return -ENOMEM;
  2107. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2108. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2109. cmd->action = cpu_to_le16(!!enable);
  2110. rc = mwl8k_post_cmd(hw, &cmd->header);
  2111. kfree(cmd);
  2112. if (!rc)
  2113. priv->wmm_enabled = enable;
  2114. return rc;
  2115. }
  2116. /*
  2117. * CMD_MIMO_CONFIG.
  2118. */
  2119. struct mwl8k_cmd_mimo_config {
  2120. struct mwl8k_cmd_pkt header;
  2121. __le32 action;
  2122. __u8 rx_antenna_map;
  2123. __u8 tx_antenna_map;
  2124. } __attribute__((packed));
  2125. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2126. {
  2127. struct mwl8k_cmd_mimo_config *cmd;
  2128. int rc;
  2129. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2130. if (cmd == NULL)
  2131. return -ENOMEM;
  2132. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2133. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2134. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2135. cmd->rx_antenna_map = rx;
  2136. cmd->tx_antenna_map = tx;
  2137. rc = mwl8k_post_cmd(hw, &cmd->header);
  2138. kfree(cmd);
  2139. return rc;
  2140. }
  2141. /*
  2142. * CMD_USE_FIXED_RATE (STA version).
  2143. */
  2144. struct mwl8k_cmd_use_fixed_rate_sta {
  2145. struct mwl8k_cmd_pkt header;
  2146. __le32 action;
  2147. __le32 allow_rate_drop;
  2148. __le32 num_rates;
  2149. struct {
  2150. __le32 is_ht_rate;
  2151. __le32 enable_retry;
  2152. __le32 rate;
  2153. __le32 retry_count;
  2154. } rate_entry[8];
  2155. __le32 rate_type;
  2156. __le32 reserved1;
  2157. __le32 reserved2;
  2158. } __attribute__((packed));
  2159. #define MWL8K_USE_AUTO_RATE 0x0002
  2160. #define MWL8K_UCAST_RATE 0
  2161. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2162. {
  2163. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2164. int rc;
  2165. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2166. if (cmd == NULL)
  2167. return -ENOMEM;
  2168. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2169. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2170. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2171. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2172. rc = mwl8k_post_cmd(hw, &cmd->header);
  2173. kfree(cmd);
  2174. return rc;
  2175. }
  2176. /*
  2177. * CMD_USE_FIXED_RATE (AP version).
  2178. */
  2179. struct mwl8k_cmd_use_fixed_rate_ap {
  2180. struct mwl8k_cmd_pkt header;
  2181. __le32 action;
  2182. __le32 allow_rate_drop;
  2183. __le32 num_rates;
  2184. struct mwl8k_rate_entry_ap {
  2185. __le32 is_ht_rate;
  2186. __le32 enable_retry;
  2187. __le32 rate;
  2188. __le32 retry_count;
  2189. } rate_entry[4];
  2190. u8 multicast_rate;
  2191. u8 multicast_rate_type;
  2192. u8 management_rate;
  2193. } __attribute__((packed));
  2194. static int
  2195. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2196. {
  2197. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2198. int rc;
  2199. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2200. if (cmd == NULL)
  2201. return -ENOMEM;
  2202. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2203. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2204. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2205. cmd->multicast_rate = mcast;
  2206. cmd->management_rate = mgmt;
  2207. rc = mwl8k_post_cmd(hw, &cmd->header);
  2208. kfree(cmd);
  2209. return rc;
  2210. }
  2211. /*
  2212. * CMD_ENABLE_SNIFFER.
  2213. */
  2214. struct mwl8k_cmd_enable_sniffer {
  2215. struct mwl8k_cmd_pkt header;
  2216. __le32 action;
  2217. } __attribute__((packed));
  2218. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2219. {
  2220. struct mwl8k_cmd_enable_sniffer *cmd;
  2221. int rc;
  2222. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2223. if (cmd == NULL)
  2224. return -ENOMEM;
  2225. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2226. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2227. cmd->action = cpu_to_le32(!!enable);
  2228. rc = mwl8k_post_cmd(hw, &cmd->header);
  2229. kfree(cmd);
  2230. return rc;
  2231. }
  2232. /*
  2233. * CMD_SET_MAC_ADDR.
  2234. */
  2235. struct mwl8k_cmd_set_mac_addr {
  2236. struct mwl8k_cmd_pkt header;
  2237. union {
  2238. struct {
  2239. __le16 mac_type;
  2240. __u8 mac_addr[ETH_ALEN];
  2241. } mbss;
  2242. __u8 mac_addr[ETH_ALEN];
  2243. };
  2244. } __attribute__((packed));
  2245. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2246. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2247. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
  2248. {
  2249. struct mwl8k_priv *priv = hw->priv;
  2250. struct mwl8k_cmd_set_mac_addr *cmd;
  2251. int rc;
  2252. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2253. if (cmd == NULL)
  2254. return -ENOMEM;
  2255. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2256. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2257. if (priv->ap_fw) {
  2258. cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
  2259. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2260. } else {
  2261. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2262. }
  2263. rc = mwl8k_post_cmd(hw, &cmd->header);
  2264. kfree(cmd);
  2265. return rc;
  2266. }
  2267. /*
  2268. * CMD_SET_RATEADAPT_MODE.
  2269. */
  2270. struct mwl8k_cmd_set_rate_adapt_mode {
  2271. struct mwl8k_cmd_pkt header;
  2272. __le16 action;
  2273. __le16 mode;
  2274. } __attribute__((packed));
  2275. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2276. {
  2277. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2278. int rc;
  2279. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2280. if (cmd == NULL)
  2281. return -ENOMEM;
  2282. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2283. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2284. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2285. cmd->mode = cpu_to_le16(mode);
  2286. rc = mwl8k_post_cmd(hw, &cmd->header);
  2287. kfree(cmd);
  2288. return rc;
  2289. }
  2290. /*
  2291. * CMD_BSS_START.
  2292. */
  2293. struct mwl8k_cmd_bss_start {
  2294. struct mwl8k_cmd_pkt header;
  2295. __le32 enable;
  2296. } __attribute__((packed));
  2297. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
  2298. {
  2299. struct mwl8k_cmd_bss_start *cmd;
  2300. int rc;
  2301. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2302. if (cmd == NULL)
  2303. return -ENOMEM;
  2304. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2305. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2306. cmd->enable = cpu_to_le32(enable);
  2307. rc = mwl8k_post_cmd(hw, &cmd->header);
  2308. kfree(cmd);
  2309. return rc;
  2310. }
  2311. /*
  2312. * CMD_SET_NEW_STN.
  2313. */
  2314. struct mwl8k_cmd_set_new_stn {
  2315. struct mwl8k_cmd_pkt header;
  2316. __le16 aid;
  2317. __u8 mac_addr[6];
  2318. __le16 stn_id;
  2319. __le16 action;
  2320. __le16 rsvd;
  2321. __le32 legacy_rates;
  2322. __u8 ht_rates[4];
  2323. __le16 cap_info;
  2324. __le16 ht_capabilities_info;
  2325. __u8 mac_ht_param_info;
  2326. __u8 rev;
  2327. __u8 control_channel;
  2328. __u8 add_channel;
  2329. __le16 op_mode;
  2330. __le16 stbc;
  2331. __u8 add_qos_info;
  2332. __u8 is_qos_sta;
  2333. __le32 fw_sta_ptr;
  2334. } __attribute__((packed));
  2335. #define MWL8K_STA_ACTION_ADD 0
  2336. #define MWL8K_STA_ACTION_REMOVE 2
  2337. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2338. struct ieee80211_vif *vif,
  2339. struct ieee80211_sta *sta)
  2340. {
  2341. struct mwl8k_cmd_set_new_stn *cmd;
  2342. u32 rates;
  2343. int rc;
  2344. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2345. if (cmd == NULL)
  2346. return -ENOMEM;
  2347. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2348. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2349. cmd->aid = cpu_to_le16(sta->aid);
  2350. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2351. cmd->stn_id = cpu_to_le16(sta->aid);
  2352. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2353. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2354. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2355. else
  2356. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2357. cmd->legacy_rates = cpu_to_le32(rates);
  2358. if (sta->ht_cap.ht_supported) {
  2359. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2360. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2361. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2362. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2363. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2364. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2365. ((sta->ht_cap.ampdu_density & 7) << 2);
  2366. cmd->is_qos_sta = 1;
  2367. }
  2368. rc = mwl8k_post_cmd(hw, &cmd->header);
  2369. kfree(cmd);
  2370. return rc;
  2371. }
  2372. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2373. struct ieee80211_vif *vif)
  2374. {
  2375. struct mwl8k_cmd_set_new_stn *cmd;
  2376. int rc;
  2377. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2378. if (cmd == NULL)
  2379. return -ENOMEM;
  2380. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2381. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2382. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2383. rc = mwl8k_post_cmd(hw, &cmd->header);
  2384. kfree(cmd);
  2385. return rc;
  2386. }
  2387. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2388. struct ieee80211_vif *vif, u8 *addr)
  2389. {
  2390. struct mwl8k_cmd_set_new_stn *cmd;
  2391. int rc;
  2392. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2393. if (cmd == NULL)
  2394. return -ENOMEM;
  2395. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2396. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2397. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2398. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2399. rc = mwl8k_post_cmd(hw, &cmd->header);
  2400. kfree(cmd);
  2401. return rc;
  2402. }
  2403. /*
  2404. * CMD_UPDATE_STADB.
  2405. */
  2406. struct ewc_ht_info {
  2407. __le16 control1;
  2408. __le16 control2;
  2409. __le16 control3;
  2410. } __attribute__((packed));
  2411. struct peer_capability_info {
  2412. /* Peer type - AP vs. STA. */
  2413. __u8 peer_type;
  2414. /* Basic 802.11 capabilities from assoc resp. */
  2415. __le16 basic_caps;
  2416. /* Set if peer supports 802.11n high throughput (HT). */
  2417. __u8 ht_support;
  2418. /* Valid if HT is supported. */
  2419. __le16 ht_caps;
  2420. __u8 extended_ht_caps;
  2421. struct ewc_ht_info ewc_info;
  2422. /* Legacy rate table. Intersection of our rates and peer rates. */
  2423. __u8 legacy_rates[12];
  2424. /* HT rate table. Intersection of our rates and peer rates. */
  2425. __u8 ht_rates[16];
  2426. __u8 pad[16];
  2427. /* If set, interoperability mode, no proprietary extensions. */
  2428. __u8 interop;
  2429. __u8 pad2;
  2430. __u8 station_id;
  2431. __le16 amsdu_enabled;
  2432. } __attribute__((packed));
  2433. struct mwl8k_cmd_update_stadb {
  2434. struct mwl8k_cmd_pkt header;
  2435. /* See STADB_ACTION_TYPE */
  2436. __le32 action;
  2437. /* Peer MAC address */
  2438. __u8 peer_addr[ETH_ALEN];
  2439. __le32 reserved;
  2440. /* Peer info - valid during add/update. */
  2441. struct peer_capability_info peer_info;
  2442. } __attribute__((packed));
  2443. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2444. #define MWL8K_STA_DB_DEL_ENTRY 2
  2445. /* Peer Entry flags - used to define the type of the peer node */
  2446. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2447. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2448. struct ieee80211_vif *vif,
  2449. struct ieee80211_sta *sta)
  2450. {
  2451. struct mwl8k_cmd_update_stadb *cmd;
  2452. struct peer_capability_info *p;
  2453. u32 rates;
  2454. int rc;
  2455. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2456. if (cmd == NULL)
  2457. return -ENOMEM;
  2458. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2459. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2460. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2461. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2462. p = &cmd->peer_info;
  2463. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2464. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2465. p->ht_support = sta->ht_cap.ht_supported;
  2466. p->ht_caps = sta->ht_cap.cap;
  2467. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2468. ((sta->ht_cap.ampdu_density & 7) << 2);
  2469. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2470. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2471. else
  2472. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2473. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2474. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2475. p->interop = 1;
  2476. p->amsdu_enabled = 0;
  2477. rc = mwl8k_post_cmd(hw, &cmd->header);
  2478. kfree(cmd);
  2479. return rc ? rc : p->station_id;
  2480. }
  2481. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2482. struct ieee80211_vif *vif, u8 *addr)
  2483. {
  2484. struct mwl8k_cmd_update_stadb *cmd;
  2485. int rc;
  2486. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2487. if (cmd == NULL)
  2488. return -ENOMEM;
  2489. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2490. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2491. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2492. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2493. rc = mwl8k_post_cmd(hw, &cmd->header);
  2494. kfree(cmd);
  2495. return rc;
  2496. }
  2497. /*
  2498. * Interrupt handling.
  2499. */
  2500. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2501. {
  2502. struct ieee80211_hw *hw = dev_id;
  2503. struct mwl8k_priv *priv = hw->priv;
  2504. u32 status;
  2505. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2506. if (!status)
  2507. return IRQ_NONE;
  2508. if (status & MWL8K_A2H_INT_TX_DONE) {
  2509. status &= ~MWL8K_A2H_INT_TX_DONE;
  2510. tasklet_schedule(&priv->poll_tx_task);
  2511. }
  2512. if (status & MWL8K_A2H_INT_RX_READY) {
  2513. status &= ~MWL8K_A2H_INT_RX_READY;
  2514. tasklet_schedule(&priv->poll_rx_task);
  2515. }
  2516. if (status)
  2517. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2518. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2519. if (priv->hostcmd_wait != NULL)
  2520. complete(priv->hostcmd_wait);
  2521. }
  2522. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2523. if (!mutex_is_locked(&priv->fw_mutex) &&
  2524. priv->radio_on && priv->pending_tx_pkts)
  2525. mwl8k_tx_start(priv);
  2526. }
  2527. return IRQ_HANDLED;
  2528. }
  2529. static void mwl8k_tx_poll(unsigned long data)
  2530. {
  2531. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2532. struct mwl8k_priv *priv = hw->priv;
  2533. int limit;
  2534. int i;
  2535. limit = 32;
  2536. spin_lock_bh(&priv->tx_lock);
  2537. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2538. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2539. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2540. complete(priv->tx_wait);
  2541. priv->tx_wait = NULL;
  2542. }
  2543. spin_unlock_bh(&priv->tx_lock);
  2544. if (limit) {
  2545. writel(~MWL8K_A2H_INT_TX_DONE,
  2546. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2547. } else {
  2548. tasklet_schedule(&priv->poll_tx_task);
  2549. }
  2550. }
  2551. static void mwl8k_rx_poll(unsigned long data)
  2552. {
  2553. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2554. struct mwl8k_priv *priv = hw->priv;
  2555. int limit;
  2556. limit = 32;
  2557. limit -= rxq_process(hw, 0, limit);
  2558. limit -= rxq_refill(hw, 0, limit);
  2559. if (limit) {
  2560. writel(~MWL8K_A2H_INT_RX_READY,
  2561. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2562. } else {
  2563. tasklet_schedule(&priv->poll_rx_task);
  2564. }
  2565. }
  2566. /*
  2567. * Core driver operations.
  2568. */
  2569. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2570. {
  2571. struct mwl8k_priv *priv = hw->priv;
  2572. int index = skb_get_queue_mapping(skb);
  2573. int rc;
  2574. if (!priv->radio_on) {
  2575. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2576. "disabled\n", wiphy_name(hw->wiphy));
  2577. dev_kfree_skb(skb);
  2578. return NETDEV_TX_OK;
  2579. }
  2580. rc = mwl8k_txq_xmit(hw, index, skb);
  2581. return rc;
  2582. }
  2583. static int mwl8k_start(struct ieee80211_hw *hw)
  2584. {
  2585. struct mwl8k_priv *priv = hw->priv;
  2586. int rc;
  2587. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2588. IRQF_SHARED, MWL8K_NAME, hw);
  2589. if (rc) {
  2590. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2591. wiphy_name(hw->wiphy));
  2592. return -EIO;
  2593. }
  2594. /* Enable TX reclaim and RX tasklets. */
  2595. tasklet_enable(&priv->poll_tx_task);
  2596. tasklet_enable(&priv->poll_rx_task);
  2597. /* Enable interrupts */
  2598. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2599. rc = mwl8k_fw_lock(hw);
  2600. if (!rc) {
  2601. rc = mwl8k_cmd_radio_enable(hw);
  2602. if (!priv->ap_fw) {
  2603. if (!rc)
  2604. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2605. if (!rc)
  2606. rc = mwl8k_cmd_set_pre_scan(hw);
  2607. if (!rc)
  2608. rc = mwl8k_cmd_set_post_scan(hw,
  2609. "\x00\x00\x00\x00\x00\x00");
  2610. }
  2611. if (!rc)
  2612. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2613. if (!rc)
  2614. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2615. mwl8k_fw_unlock(hw);
  2616. }
  2617. if (rc) {
  2618. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2619. free_irq(priv->pdev->irq, hw);
  2620. tasklet_disable(&priv->poll_tx_task);
  2621. tasklet_disable(&priv->poll_rx_task);
  2622. }
  2623. return rc;
  2624. }
  2625. static void mwl8k_stop(struct ieee80211_hw *hw)
  2626. {
  2627. struct mwl8k_priv *priv = hw->priv;
  2628. int i;
  2629. mwl8k_cmd_radio_disable(hw);
  2630. ieee80211_stop_queues(hw);
  2631. /* Disable interrupts */
  2632. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2633. free_irq(priv->pdev->irq, hw);
  2634. /* Stop finalize join worker */
  2635. cancel_work_sync(&priv->finalize_join_worker);
  2636. if (priv->beacon_skb != NULL)
  2637. dev_kfree_skb(priv->beacon_skb);
  2638. /* Stop TX reclaim and RX tasklets. */
  2639. tasklet_disable(&priv->poll_tx_task);
  2640. tasklet_disable(&priv->poll_rx_task);
  2641. /* Return all skbs to mac80211 */
  2642. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2643. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2644. }
  2645. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2646. struct ieee80211_vif *vif)
  2647. {
  2648. struct mwl8k_priv *priv = hw->priv;
  2649. struct mwl8k_vif *mwl8k_vif;
  2650. /*
  2651. * We only support one active interface at a time.
  2652. */
  2653. if (!list_empty(&priv->vif_list))
  2654. return -EBUSY;
  2655. /*
  2656. * Reject interface creation if sniffer mode is active, as
  2657. * STA operation is mutually exclusive with hardware sniffer
  2658. * mode. (Sniffer mode is only used on STA firmware.)
  2659. */
  2660. if (priv->sniffer_enabled) {
  2661. printk(KERN_INFO "%s: unable to create STA "
  2662. "interface due to sniffer mode being enabled\n",
  2663. wiphy_name(hw->wiphy));
  2664. return -EINVAL;
  2665. }
  2666. /* Set the mac address. */
  2667. mwl8k_cmd_set_mac_addr(hw, vif->addr);
  2668. if (priv->ap_fw)
  2669. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2670. /* Setup driver private area. */
  2671. mwl8k_vif = MWL8K_VIF(vif);
  2672. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2673. mwl8k_vif->vif = vif;
  2674. mwl8k_vif->seqno = 0;
  2675. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2676. return 0;
  2677. }
  2678. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2679. struct ieee80211_vif *vif)
  2680. {
  2681. struct mwl8k_priv *priv = hw->priv;
  2682. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2683. if (priv->ap_fw)
  2684. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2685. mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
  2686. list_del(&mwl8k_vif->list);
  2687. }
  2688. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2689. {
  2690. struct ieee80211_conf *conf = &hw->conf;
  2691. struct mwl8k_priv *priv = hw->priv;
  2692. int rc;
  2693. if (conf->flags & IEEE80211_CONF_IDLE) {
  2694. mwl8k_cmd_radio_disable(hw);
  2695. return 0;
  2696. }
  2697. rc = mwl8k_fw_lock(hw);
  2698. if (rc)
  2699. return rc;
  2700. rc = mwl8k_cmd_radio_enable(hw);
  2701. if (rc)
  2702. goto out;
  2703. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2704. if (rc)
  2705. goto out;
  2706. if (conf->power_level > 18)
  2707. conf->power_level = 18;
  2708. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2709. if (rc)
  2710. goto out;
  2711. if (priv->ap_fw) {
  2712. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2713. if (!rc)
  2714. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2715. } else {
  2716. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2717. }
  2718. out:
  2719. mwl8k_fw_unlock(hw);
  2720. return rc;
  2721. }
  2722. static void
  2723. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2724. struct ieee80211_bss_conf *info, u32 changed)
  2725. {
  2726. struct mwl8k_priv *priv = hw->priv;
  2727. u32 ap_legacy_rates;
  2728. u8 ap_mcs_rates[16];
  2729. int rc;
  2730. if (mwl8k_fw_lock(hw))
  2731. return;
  2732. /*
  2733. * No need to capture a beacon if we're no longer associated.
  2734. */
  2735. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2736. priv->capture_beacon = false;
  2737. /*
  2738. * Get the AP's legacy and MCS rates.
  2739. */
  2740. if (vif->bss_conf.assoc) {
  2741. struct ieee80211_sta *ap;
  2742. rcu_read_lock();
  2743. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2744. if (ap == NULL) {
  2745. rcu_read_unlock();
  2746. goto out;
  2747. }
  2748. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2749. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2750. } else {
  2751. ap_legacy_rates =
  2752. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2753. }
  2754. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2755. rcu_read_unlock();
  2756. }
  2757. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2758. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2759. if (rc)
  2760. goto out;
  2761. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2762. if (rc)
  2763. goto out;
  2764. }
  2765. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2766. rc = mwl8k_set_radio_preamble(hw,
  2767. vif->bss_conf.use_short_preamble);
  2768. if (rc)
  2769. goto out;
  2770. }
  2771. if (changed & BSS_CHANGED_ERP_SLOT) {
  2772. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2773. if (rc)
  2774. goto out;
  2775. }
  2776. if (vif->bss_conf.assoc &&
  2777. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2778. BSS_CHANGED_HT))) {
  2779. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2780. if (rc)
  2781. goto out;
  2782. }
  2783. if (vif->bss_conf.assoc &&
  2784. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2785. /*
  2786. * Finalize the join. Tell rx handler to process
  2787. * next beacon from our BSSID.
  2788. */
  2789. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2790. priv->capture_beacon = true;
  2791. }
  2792. out:
  2793. mwl8k_fw_unlock(hw);
  2794. }
  2795. static void
  2796. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2797. struct ieee80211_bss_conf *info, u32 changed)
  2798. {
  2799. int rc;
  2800. if (mwl8k_fw_lock(hw))
  2801. return;
  2802. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2803. rc = mwl8k_set_radio_preamble(hw,
  2804. vif->bss_conf.use_short_preamble);
  2805. if (rc)
  2806. goto out;
  2807. }
  2808. if (changed & BSS_CHANGED_BASIC_RATES) {
  2809. int idx;
  2810. int rate;
  2811. /*
  2812. * Use lowest supported basic rate for multicasts
  2813. * and management frames (such as probe responses --
  2814. * beacons will always go out at 1 Mb/s).
  2815. */
  2816. idx = ffs(vif->bss_conf.basic_rates);
  2817. if (idx)
  2818. idx--;
  2819. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2820. rate = mwl8k_rates_24[idx].hw_value;
  2821. else
  2822. rate = mwl8k_rates_50[idx].hw_value;
  2823. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2824. }
  2825. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2826. struct sk_buff *skb;
  2827. skb = ieee80211_beacon_get(hw, vif);
  2828. if (skb != NULL) {
  2829. mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
  2830. kfree_skb(skb);
  2831. }
  2832. }
  2833. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2834. mwl8k_cmd_bss_start(hw, info->enable_beacon);
  2835. out:
  2836. mwl8k_fw_unlock(hw);
  2837. }
  2838. static void
  2839. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2840. struct ieee80211_bss_conf *info, u32 changed)
  2841. {
  2842. struct mwl8k_priv *priv = hw->priv;
  2843. if (!priv->ap_fw)
  2844. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2845. else
  2846. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2847. }
  2848. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2849. int mc_count, struct dev_addr_list *mclist)
  2850. {
  2851. struct mwl8k_cmd_pkt *cmd;
  2852. /*
  2853. * Synthesize and return a command packet that programs the
  2854. * hardware multicast address filter. At this point we don't
  2855. * know whether FIF_ALLMULTI is being requested, but if it is,
  2856. * we'll end up throwing this packet away and creating a new
  2857. * one in mwl8k_configure_filter().
  2858. */
  2859. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
  2860. return (unsigned long)cmd;
  2861. }
  2862. static int
  2863. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2864. unsigned int changed_flags,
  2865. unsigned int *total_flags)
  2866. {
  2867. struct mwl8k_priv *priv = hw->priv;
  2868. /*
  2869. * Hardware sniffer mode is mutually exclusive with STA
  2870. * operation, so refuse to enable sniffer mode if a STA
  2871. * interface is active.
  2872. */
  2873. if (!list_empty(&priv->vif_list)) {
  2874. if (net_ratelimit())
  2875. printk(KERN_INFO "%s: not enabling sniffer "
  2876. "mode because STA interface is active\n",
  2877. wiphy_name(hw->wiphy));
  2878. return 0;
  2879. }
  2880. if (!priv->sniffer_enabled) {
  2881. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2882. return 0;
  2883. priv->sniffer_enabled = true;
  2884. }
  2885. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2886. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2887. FIF_OTHER_BSS;
  2888. return 1;
  2889. }
  2890. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2891. {
  2892. if (!list_empty(&priv->vif_list))
  2893. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2894. return NULL;
  2895. }
  2896. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2897. unsigned int changed_flags,
  2898. unsigned int *total_flags,
  2899. u64 multicast)
  2900. {
  2901. struct mwl8k_priv *priv = hw->priv;
  2902. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2903. /*
  2904. * AP firmware doesn't allow fine-grained control over
  2905. * the receive filter.
  2906. */
  2907. if (priv->ap_fw) {
  2908. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2909. kfree(cmd);
  2910. return;
  2911. }
  2912. /*
  2913. * Enable hardware sniffer mode if FIF_CONTROL or
  2914. * FIF_OTHER_BSS is requested.
  2915. */
  2916. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2917. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2918. kfree(cmd);
  2919. return;
  2920. }
  2921. /* Clear unsupported feature flags */
  2922. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2923. if (mwl8k_fw_lock(hw)) {
  2924. kfree(cmd);
  2925. return;
  2926. }
  2927. if (priv->sniffer_enabled) {
  2928. mwl8k_cmd_enable_sniffer(hw, 0);
  2929. priv->sniffer_enabled = false;
  2930. }
  2931. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2932. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2933. /*
  2934. * Disable the BSS filter.
  2935. */
  2936. mwl8k_cmd_set_pre_scan(hw);
  2937. } else {
  2938. struct mwl8k_vif *mwl8k_vif;
  2939. const u8 *bssid;
  2940. /*
  2941. * Enable the BSS filter.
  2942. *
  2943. * If there is an active STA interface, use that
  2944. * interface's BSSID, otherwise use a dummy one
  2945. * (where the OUI part needs to be nonzero for
  2946. * the BSSID to be accepted by POST_SCAN).
  2947. */
  2948. mwl8k_vif = mwl8k_first_vif(priv);
  2949. if (mwl8k_vif != NULL)
  2950. bssid = mwl8k_vif->vif->bss_conf.bssid;
  2951. else
  2952. bssid = "\x01\x00\x00\x00\x00\x00";
  2953. mwl8k_cmd_set_post_scan(hw, bssid);
  2954. }
  2955. }
  2956. /*
  2957. * If FIF_ALLMULTI is being requested, throw away the command
  2958. * packet that ->prepare_multicast() built and replace it with
  2959. * a command packet that enables reception of all multicast
  2960. * packets.
  2961. */
  2962. if (*total_flags & FIF_ALLMULTI) {
  2963. kfree(cmd);
  2964. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
  2965. }
  2966. if (cmd != NULL) {
  2967. mwl8k_post_cmd(hw, cmd);
  2968. kfree(cmd);
  2969. }
  2970. mwl8k_fw_unlock(hw);
  2971. }
  2972. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2973. {
  2974. return mwl8k_cmd_set_rts_threshold(hw, value);
  2975. }
  2976. struct mwl8k_sta_notify_item
  2977. {
  2978. struct list_head list;
  2979. struct ieee80211_vif *vif;
  2980. enum sta_notify_cmd cmd;
  2981. struct ieee80211_sta sta;
  2982. };
  2983. static void
  2984. mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
  2985. {
  2986. struct mwl8k_priv *priv = hw->priv;
  2987. /*
  2988. * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
  2989. */
  2990. if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  2991. int rc;
  2992. rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
  2993. if (rc >= 0) {
  2994. struct ieee80211_sta *sta;
  2995. rcu_read_lock();
  2996. sta = ieee80211_find_sta(s->vif, s->sta.addr);
  2997. if (sta != NULL)
  2998. MWL8K_STA(sta)->peer_id = rc;
  2999. rcu_read_unlock();
  3000. }
  3001. } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  3002. mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
  3003. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  3004. mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
  3005. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  3006. mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
  3007. }
  3008. }
  3009. static void mwl8k_sta_notify_worker(struct work_struct *work)
  3010. {
  3011. struct mwl8k_priv *priv =
  3012. container_of(work, struct mwl8k_priv, sta_notify_worker);
  3013. struct ieee80211_hw *hw = priv->hw;
  3014. spin_lock_bh(&priv->sta_notify_list_lock);
  3015. while (!list_empty(&priv->sta_notify_list)) {
  3016. struct mwl8k_sta_notify_item *s;
  3017. s = list_entry(priv->sta_notify_list.next,
  3018. struct mwl8k_sta_notify_item, list);
  3019. list_del(&s->list);
  3020. spin_unlock_bh(&priv->sta_notify_list_lock);
  3021. mwl8k_do_sta_notify(hw, s);
  3022. kfree(s);
  3023. spin_lock_bh(&priv->sta_notify_list_lock);
  3024. }
  3025. spin_unlock_bh(&priv->sta_notify_list_lock);
  3026. }
  3027. static void
  3028. mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3029. enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
  3030. {
  3031. struct mwl8k_priv *priv = hw->priv;
  3032. struct mwl8k_sta_notify_item *s;
  3033. if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
  3034. return;
  3035. s = kmalloc(sizeof(*s), GFP_ATOMIC);
  3036. if (s != NULL) {
  3037. s->vif = vif;
  3038. s->cmd = cmd;
  3039. s->sta = *sta;
  3040. spin_lock(&priv->sta_notify_list_lock);
  3041. list_add_tail(&s->list, &priv->sta_notify_list);
  3042. spin_unlock(&priv->sta_notify_list_lock);
  3043. ieee80211_queue_work(hw, &priv->sta_notify_worker);
  3044. }
  3045. }
  3046. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3047. const struct ieee80211_tx_queue_params *params)
  3048. {
  3049. struct mwl8k_priv *priv = hw->priv;
  3050. int rc;
  3051. rc = mwl8k_fw_lock(hw);
  3052. if (!rc) {
  3053. if (!priv->wmm_enabled)
  3054. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3055. if (!rc)
  3056. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3057. params->cw_min,
  3058. params->cw_max,
  3059. params->aifs,
  3060. params->txop);
  3061. mwl8k_fw_unlock(hw);
  3062. }
  3063. return rc;
  3064. }
  3065. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  3066. struct ieee80211_tx_queue_stats *stats)
  3067. {
  3068. struct mwl8k_priv *priv = hw->priv;
  3069. struct mwl8k_tx_queue *txq;
  3070. int index;
  3071. spin_lock_bh(&priv->tx_lock);
  3072. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  3073. txq = priv->txq + index;
  3074. memcpy(&stats[index], &txq->stats,
  3075. sizeof(struct ieee80211_tx_queue_stats));
  3076. }
  3077. spin_unlock_bh(&priv->tx_lock);
  3078. return 0;
  3079. }
  3080. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3081. struct ieee80211_low_level_stats *stats)
  3082. {
  3083. return mwl8k_cmd_get_stat(hw, stats);
  3084. }
  3085. static int
  3086. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3087. enum ieee80211_ampdu_mlme_action action,
  3088. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3089. {
  3090. switch (action) {
  3091. case IEEE80211_AMPDU_RX_START:
  3092. case IEEE80211_AMPDU_RX_STOP:
  3093. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3094. return -ENOTSUPP;
  3095. return 0;
  3096. default:
  3097. return -ENOTSUPP;
  3098. }
  3099. }
  3100. static const struct ieee80211_ops mwl8k_ops = {
  3101. .tx = mwl8k_tx,
  3102. .start = mwl8k_start,
  3103. .stop = mwl8k_stop,
  3104. .add_interface = mwl8k_add_interface,
  3105. .remove_interface = mwl8k_remove_interface,
  3106. .config = mwl8k_config,
  3107. .bss_info_changed = mwl8k_bss_info_changed,
  3108. .prepare_multicast = mwl8k_prepare_multicast,
  3109. .configure_filter = mwl8k_configure_filter,
  3110. .set_rts_threshold = mwl8k_set_rts_threshold,
  3111. .sta_notify = mwl8k_sta_notify,
  3112. .conf_tx = mwl8k_conf_tx,
  3113. .get_tx_stats = mwl8k_get_tx_stats,
  3114. .get_stats = mwl8k_get_stats,
  3115. .ampdu_action = mwl8k_ampdu_action,
  3116. };
  3117. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3118. {
  3119. struct mwl8k_priv *priv =
  3120. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3121. struct sk_buff *skb = priv->beacon_skb;
  3122. struct mwl8k_vif *mwl8k_vif;
  3123. mwl8k_vif = mwl8k_first_vif(priv);
  3124. if (mwl8k_vif != NULL)
  3125. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
  3126. mwl8k_vif->vif->bss_conf.dtim_period);
  3127. dev_kfree_skb(skb);
  3128. priv->beacon_skb = NULL;
  3129. }
  3130. enum {
  3131. MWL8363 = 0,
  3132. MWL8687,
  3133. MWL8366,
  3134. };
  3135. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3136. [MWL8363] = {
  3137. .part_name = "88w8363",
  3138. .helper_image = "mwl8k/helper_8363.fw",
  3139. .fw_image = "mwl8k/fmimage_8363.fw",
  3140. },
  3141. [MWL8687] = {
  3142. .part_name = "88w8687",
  3143. .helper_image = "mwl8k/helper_8687.fw",
  3144. .fw_image = "mwl8k/fmimage_8687.fw",
  3145. },
  3146. [MWL8366] = {
  3147. .part_name = "88w8366",
  3148. .helper_image = "mwl8k/helper_8366.fw",
  3149. .fw_image = "mwl8k/fmimage_8366.fw",
  3150. .ap_rxd_ops = &rxd_8366_ap_ops,
  3151. },
  3152. };
  3153. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3154. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3155. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3156. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3157. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3158. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3159. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3160. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3161. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3162. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3163. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3164. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3165. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3166. { },
  3167. };
  3168. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3169. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3170. const struct pci_device_id *id)
  3171. {
  3172. static int printed_version = 0;
  3173. struct ieee80211_hw *hw;
  3174. struct mwl8k_priv *priv;
  3175. int rc;
  3176. int i;
  3177. if (!printed_version) {
  3178. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3179. printed_version = 1;
  3180. }
  3181. rc = pci_enable_device(pdev);
  3182. if (rc) {
  3183. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3184. MWL8K_NAME);
  3185. return rc;
  3186. }
  3187. rc = pci_request_regions(pdev, MWL8K_NAME);
  3188. if (rc) {
  3189. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3190. MWL8K_NAME);
  3191. goto err_disable_device;
  3192. }
  3193. pci_set_master(pdev);
  3194. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3195. if (hw == NULL) {
  3196. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3197. rc = -ENOMEM;
  3198. goto err_free_reg;
  3199. }
  3200. SET_IEEE80211_DEV(hw, &pdev->dev);
  3201. pci_set_drvdata(pdev, hw);
  3202. priv = hw->priv;
  3203. priv->hw = hw;
  3204. priv->pdev = pdev;
  3205. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3206. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3207. if (priv->sram == NULL) {
  3208. printk(KERN_ERR "%s: Cannot map device SRAM\n",
  3209. wiphy_name(hw->wiphy));
  3210. goto err_iounmap;
  3211. }
  3212. /*
  3213. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3214. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3215. */
  3216. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3217. if (priv->regs == NULL) {
  3218. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3219. if (priv->regs == NULL) {
  3220. printk(KERN_ERR "%s: Cannot map device registers\n",
  3221. wiphy_name(hw->wiphy));
  3222. goto err_iounmap;
  3223. }
  3224. }
  3225. /* Reset firmware and hardware */
  3226. mwl8k_hw_reset(priv);
  3227. /* Ask userland hotplug daemon for the device firmware */
  3228. rc = mwl8k_request_firmware(priv);
  3229. if (rc) {
  3230. printk(KERN_ERR "%s: Firmware files not found\n",
  3231. wiphy_name(hw->wiphy));
  3232. goto err_stop_firmware;
  3233. }
  3234. /* Load firmware into hardware */
  3235. rc = mwl8k_load_firmware(hw);
  3236. if (rc) {
  3237. printk(KERN_ERR "%s: Cannot start firmware\n",
  3238. wiphy_name(hw->wiphy));
  3239. goto err_stop_firmware;
  3240. }
  3241. /* Reclaim memory once firmware is successfully loaded */
  3242. mwl8k_release_firmware(priv);
  3243. if (priv->ap_fw) {
  3244. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3245. if (priv->rxd_ops == NULL) {
  3246. printk(KERN_ERR "%s: Driver does not have AP "
  3247. "firmware image support for this hardware\n",
  3248. wiphy_name(hw->wiphy));
  3249. goto err_stop_firmware;
  3250. }
  3251. } else {
  3252. priv->rxd_ops = &rxd_sta_ops;
  3253. }
  3254. priv->sniffer_enabled = false;
  3255. priv->wmm_enabled = false;
  3256. priv->pending_tx_pkts = 0;
  3257. /*
  3258. * Extra headroom is the size of the required DMA header
  3259. * minus the size of the smallest 802.11 frame (CTS frame).
  3260. */
  3261. hw->extra_tx_headroom =
  3262. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3263. hw->channel_change_time = 10;
  3264. hw->queues = MWL8K_TX_QUEUES;
  3265. /* Set rssi and noise values to dBm */
  3266. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
  3267. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3268. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3269. INIT_LIST_HEAD(&priv->vif_list);
  3270. /* Set default radio state and preamble */
  3271. priv->radio_on = 0;
  3272. priv->radio_short_preamble = 0;
  3273. /* Station database handling */
  3274. INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
  3275. spin_lock_init(&priv->sta_notify_list_lock);
  3276. INIT_LIST_HEAD(&priv->sta_notify_list);
  3277. /* Finalize join worker */
  3278. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3279. /* TX reclaim and RX tasklets. */
  3280. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3281. tasklet_disable(&priv->poll_tx_task);
  3282. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3283. tasklet_disable(&priv->poll_rx_task);
  3284. /* Power management cookie */
  3285. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3286. if (priv->cookie == NULL)
  3287. goto err_stop_firmware;
  3288. rc = mwl8k_rxq_init(hw, 0);
  3289. if (rc)
  3290. goto err_free_cookie;
  3291. rxq_refill(hw, 0, INT_MAX);
  3292. mutex_init(&priv->fw_mutex);
  3293. priv->fw_mutex_owner = NULL;
  3294. priv->fw_mutex_depth = 0;
  3295. priv->hostcmd_wait = NULL;
  3296. spin_lock_init(&priv->tx_lock);
  3297. priv->tx_wait = NULL;
  3298. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3299. rc = mwl8k_txq_init(hw, i);
  3300. if (rc)
  3301. goto err_free_queues;
  3302. }
  3303. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3304. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3305. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3306. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3307. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3308. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3309. IRQF_SHARED, MWL8K_NAME, hw);
  3310. if (rc) {
  3311. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  3312. wiphy_name(hw->wiphy));
  3313. goto err_free_queues;
  3314. }
  3315. /*
  3316. * Temporarily enable interrupts. Initial firmware host
  3317. * commands use interrupts and avoid polling. Disable
  3318. * interrupts when done.
  3319. */
  3320. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3321. /* Get config data, mac addrs etc */
  3322. if (priv->ap_fw) {
  3323. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3324. if (!rc)
  3325. rc = mwl8k_cmd_set_hw_spec(hw);
  3326. hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
  3327. } else {
  3328. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3329. hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  3330. }
  3331. if (rc) {
  3332. printk(KERN_ERR "%s: Cannot initialise firmware\n",
  3333. wiphy_name(hw->wiphy));
  3334. goto err_free_irq;
  3335. }
  3336. /* Turn radio off */
  3337. rc = mwl8k_cmd_radio_disable(hw);
  3338. if (rc) {
  3339. printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
  3340. goto err_free_irq;
  3341. }
  3342. /* Clear MAC address */
  3343. rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
  3344. if (rc) {
  3345. printk(KERN_ERR "%s: Cannot clear MAC address\n",
  3346. wiphy_name(hw->wiphy));
  3347. goto err_free_irq;
  3348. }
  3349. /* Disable interrupts */
  3350. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3351. free_irq(priv->pdev->irq, hw);
  3352. rc = ieee80211_register_hw(hw);
  3353. if (rc) {
  3354. printk(KERN_ERR "%s: Cannot register device\n",
  3355. wiphy_name(hw->wiphy));
  3356. goto err_free_queues;
  3357. }
  3358. printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
  3359. wiphy_name(hw->wiphy), priv->device_info->part_name,
  3360. priv->hw_rev, hw->wiphy->perm_addr,
  3361. priv->ap_fw ? "AP" : "STA",
  3362. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3363. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3364. return 0;
  3365. err_free_irq:
  3366. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3367. free_irq(priv->pdev->irq, hw);
  3368. err_free_queues:
  3369. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3370. mwl8k_txq_deinit(hw, i);
  3371. mwl8k_rxq_deinit(hw, 0);
  3372. err_free_cookie:
  3373. if (priv->cookie != NULL)
  3374. pci_free_consistent(priv->pdev, 4,
  3375. priv->cookie, priv->cookie_dma);
  3376. err_stop_firmware:
  3377. mwl8k_hw_reset(priv);
  3378. mwl8k_release_firmware(priv);
  3379. err_iounmap:
  3380. if (priv->regs != NULL)
  3381. pci_iounmap(pdev, priv->regs);
  3382. if (priv->sram != NULL)
  3383. pci_iounmap(pdev, priv->sram);
  3384. pci_set_drvdata(pdev, NULL);
  3385. ieee80211_free_hw(hw);
  3386. err_free_reg:
  3387. pci_release_regions(pdev);
  3388. err_disable_device:
  3389. pci_disable_device(pdev);
  3390. return rc;
  3391. }
  3392. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3393. {
  3394. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3395. }
  3396. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3397. {
  3398. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3399. struct mwl8k_priv *priv;
  3400. int i;
  3401. if (hw == NULL)
  3402. return;
  3403. priv = hw->priv;
  3404. ieee80211_stop_queues(hw);
  3405. ieee80211_unregister_hw(hw);
  3406. /* Remove TX reclaim and RX tasklets. */
  3407. tasklet_kill(&priv->poll_tx_task);
  3408. tasklet_kill(&priv->poll_rx_task);
  3409. /* Stop hardware */
  3410. mwl8k_hw_reset(priv);
  3411. /* Return all skbs to mac80211 */
  3412. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3413. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3414. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3415. mwl8k_txq_deinit(hw, i);
  3416. mwl8k_rxq_deinit(hw, 0);
  3417. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3418. pci_iounmap(pdev, priv->regs);
  3419. pci_iounmap(pdev, priv->sram);
  3420. pci_set_drvdata(pdev, NULL);
  3421. ieee80211_free_hw(hw);
  3422. pci_release_regions(pdev);
  3423. pci_disable_device(pdev);
  3424. }
  3425. static struct pci_driver mwl8k_driver = {
  3426. .name = MWL8K_NAME,
  3427. .id_table = mwl8k_pci_id_table,
  3428. .probe = mwl8k_probe,
  3429. .remove = __devexit_p(mwl8k_remove),
  3430. .shutdown = __devexit_p(mwl8k_shutdown),
  3431. };
  3432. static int __init mwl8k_init(void)
  3433. {
  3434. return pci_register_driver(&mwl8k_driver);
  3435. }
  3436. static void __exit mwl8k_exit(void)
  3437. {
  3438. pci_unregister_driver(&mwl8k_driver);
  3439. }
  3440. module_init(mwl8k_init);
  3441. module_exit(mwl8k_exit);
  3442. MODULE_DESCRIPTION(MWL8K_DESC);
  3443. MODULE_VERSION(MWL8K_VERSION);
  3444. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3445. MODULE_LICENSE("GPL");