db1000.c 6.8 KB

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  1. /*
  2. * DBAu1000/1500/1100 board support
  3. *
  4. * Copyright 2000, 2008 MontaVista Software Inc.
  5. * Author: MontaVista Software, Inc. <source@mvista.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/gpio.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/pm.h>
  27. #include <asm/mach-au1x00/au1000.h>
  28. #include <asm/mach-au1x00/au1000_dma.h>
  29. #include <asm/mach-db1x00/bcsr.h>
  30. #include <asm/reboot.h>
  31. #include <prom.h>
  32. #include "platform.h"
  33. #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  34. struct pci_dev;
  35. static const char *board_type_str(void)
  36. {
  37. switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
  38. case BCSR_WHOAMI_DB1000:
  39. return "DB1000";
  40. case BCSR_WHOAMI_DB1500:
  41. return "DB1500";
  42. case BCSR_WHOAMI_DB1100:
  43. return "DB1100";
  44. default:
  45. return "(unknown)";
  46. }
  47. }
  48. const char *get_system_type(void)
  49. {
  50. return board_type_str();
  51. }
  52. void __init board_setup(void)
  53. {
  54. /* initialize board register space */
  55. bcsr_init(DB1000_BCSR_PHYS_ADDR,
  56. DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
  57. printk(KERN_INFO "AMD Alchemy %s Board\n", board_type_str());
  58. #if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR)
  59. {
  60. u32 pin_func;
  61. /* Set IRFIRSEL instead of GPIO15 */
  62. pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
  63. au_writel(pin_func, SYS_PINFUNC);
  64. /* Power off until the driver is in use */
  65. bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
  66. BCSR_RESETS_IRDA_MODE_OFF);
  67. }
  68. #endif
  69. bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
  70. /* Enable GPIO[31:0] inputs */
  71. alchemy_gpio1_input_enable();
  72. }
  73. static int db1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
  74. {
  75. if ((slot < 12) || (slot > 13) || pin == 0)
  76. return -1;
  77. if (slot == 12)
  78. return (pin == 1) ? AU1500_PCI_INTA : 0xff;
  79. if (slot == 13) {
  80. switch (pin) {
  81. case 1: return AU1500_PCI_INTA;
  82. case 2: return AU1500_PCI_INTB;
  83. case 3: return AU1500_PCI_INTC;
  84. case 4: return AU1500_PCI_INTD;
  85. }
  86. }
  87. return -1;
  88. }
  89. static struct resource alchemy_pci_host_res[] = {
  90. [0] = {
  91. .start = AU1500_PCI_PHYS_ADDR,
  92. .end = AU1500_PCI_PHYS_ADDR + 0xfff,
  93. .flags = IORESOURCE_MEM,
  94. },
  95. };
  96. static struct alchemy_pci_platdata db1500_pci_pd = {
  97. .board_map_irq = db1500_map_pci_irq,
  98. };
  99. static struct platform_device db1500_pci_host_dev = {
  100. .dev.platform_data = &db1500_pci_pd,
  101. .name = "alchemy-pci",
  102. .id = 0,
  103. .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
  104. .resource = alchemy_pci_host_res,
  105. };
  106. static int __init db1500_pci_init(void)
  107. {
  108. if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1500)
  109. return platform_device_register(&db1500_pci_host_dev);
  110. return 0;
  111. }
  112. /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
  113. arch_initcall(db1500_pci_init);
  114. static struct resource au1100_lcd_resources[] = {
  115. [0] = {
  116. .start = AU1100_LCD_PHYS_ADDR,
  117. .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
  118. .flags = IORESOURCE_MEM,
  119. },
  120. [1] = {
  121. .start = AU1100_LCD_INT,
  122. .end = AU1100_LCD_INT,
  123. .flags = IORESOURCE_IRQ,
  124. }
  125. };
  126. static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
  127. static struct platform_device au1100_lcd_device = {
  128. .name = "au1100-lcd",
  129. .id = 0,
  130. .dev = {
  131. .dma_mask = &au1100_lcd_dmamask,
  132. .coherent_dma_mask = DMA_BIT_MASK(32),
  133. },
  134. .num_resources = ARRAY_SIZE(au1100_lcd_resources),
  135. .resource = au1100_lcd_resources,
  136. };
  137. static struct resource alchemy_ac97c_res[] = {
  138. [0] = {
  139. .start = AU1000_AC97_PHYS_ADDR,
  140. .end = AU1000_AC97_PHYS_ADDR + 0xfff,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. [1] = {
  144. .start = DMA_ID_AC97C_TX,
  145. .end = DMA_ID_AC97C_TX,
  146. .flags = IORESOURCE_DMA,
  147. },
  148. [2] = {
  149. .start = DMA_ID_AC97C_RX,
  150. .end = DMA_ID_AC97C_RX,
  151. .flags = IORESOURCE_DMA,
  152. },
  153. };
  154. static struct platform_device alchemy_ac97c_dev = {
  155. .name = "alchemy-ac97c",
  156. .id = -1,
  157. .resource = alchemy_ac97c_res,
  158. .num_resources = ARRAY_SIZE(alchemy_ac97c_res),
  159. };
  160. static struct platform_device alchemy_ac97c_dma_dev = {
  161. .name = "alchemy-pcm-dma",
  162. .id = 0,
  163. };
  164. static struct platform_device db1x00_codec_dev = {
  165. .name = "ac97-codec",
  166. .id = -1,
  167. };
  168. static struct platform_device db1x00_audio_dev = {
  169. .name = "db1000-audio",
  170. };
  171. static struct platform_device *db1x00_devs[] = {
  172. &db1x00_codec_dev,
  173. &alchemy_ac97c_dma_dev,
  174. &alchemy_ac97c_dev,
  175. &db1x00_audio_dev,
  176. };
  177. static struct platform_device *db1100_devs[] = {
  178. &au1100_lcd_device,
  179. };
  180. static int __init db1000_dev_init(void)
  181. {
  182. int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
  183. int c0, c1, d0, d1, s0, s1;
  184. if (board == BCSR_WHOAMI_DB1500) {
  185. c0 = AU1500_GPIO2_INT;
  186. c1 = AU1500_GPIO5_INT;
  187. d0 = AU1500_GPIO0_INT;
  188. d1 = AU1500_GPIO3_INT;
  189. s0 = AU1500_GPIO1_INT;
  190. s1 = AU1500_GPIO4_INT;
  191. } else if (board == BCSR_WHOAMI_DB1100) {
  192. c0 = AU1100_GPIO2_INT;
  193. c1 = AU1100_GPIO5_INT;
  194. d0 = AU1100_GPIO0_INT;
  195. d1 = AU1100_GPIO3_INT;
  196. s0 = AU1100_GPIO1_INT;
  197. s1 = AU1100_GPIO4_INT;
  198. platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
  199. } else if (board == BCSR_WHOAMI_DB1000) {
  200. c0 = AU1000_GPIO2_INT;
  201. c1 = AU1000_GPIO5_INT;
  202. d0 = AU1000_GPIO0_INT;
  203. d1 = AU1000_GPIO3_INT;
  204. s0 = AU1000_GPIO1_INT;
  205. s1 = AU1000_GPIO4_INT;
  206. } else
  207. return 0; /* unknown board, no further dev setup to do */
  208. irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH);
  209. irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH);
  210. irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW);
  211. irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
  212. irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);
  213. irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
  214. db1x_register_pcmcia_socket(
  215. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  216. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
  217. AU1000_PCMCIA_MEM_PHYS_ADDR,
  218. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
  219. AU1000_PCMCIA_IO_PHYS_ADDR,
  220. AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
  221. c0, d0, /*s0*/0, 0, 0);
  222. db1x_register_pcmcia_socket(
  223. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
  224. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
  225. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
  226. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
  227. AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
  228. AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
  229. c1, d1, /*s1*/0, 0, 1);
  230. platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs));
  231. db1x_register_norflash(32 << 20, 4 /* 32bit */, F_SWAPPED);
  232. return 0;
  233. }
  234. device_initcall(db1000_dev_init);