uhci-hub.c 8.5 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
  13. */
  14. static __u8 root_hub_hub_des[] =
  15. {
  16. 0x09, /* __u8 bLength; */
  17. 0x29, /* __u8 bDescriptorType; Hub-descriptor */
  18. 0x02, /* __u8 bNbrPorts; */
  19. 0x0a, /* __u16 wHubCharacteristics; */
  20. 0x00, /* (per-port OC, no power switching) */
  21. 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
  22. 0x00, /* __u8 bHubContrCurrent; 0 mA */
  23. 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
  24. 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
  25. };
  26. #define UHCI_RH_MAXCHILD 7
  27. /* must write as zeroes */
  28. #define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
  29. /* status change bits: nonzero writes will clear */
  30. #define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
  31. /* A port that either is connected or has a changed-bit set will prevent
  32. * us from AUTO_STOPPING.
  33. */
  34. static int any_ports_active(struct uhci_hcd *uhci)
  35. {
  36. int port;
  37. for (port = 0; port < uhci->rh_numports; ++port) {
  38. if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  39. (USBPORTSC_CCS | RWC_BITS)) ||
  40. test_bit(port, &uhci->port_c_suspend))
  41. return 1;
  42. }
  43. return 0;
  44. }
  45. static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
  46. {
  47. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  48. int port;
  49. *buf = 0;
  50. for (port = 0; port < uhci->rh_numports; ++port) {
  51. if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & RWC_BITS) ||
  52. test_bit(port, &uhci->port_c_suspend))
  53. *buf |= (1 << (port + 1));
  54. }
  55. if (*buf && uhci->state == UHCI_SUSPENDED)
  56. uhci->resume_detect = 1;
  57. return !!*buf;
  58. }
  59. #define OK(x) len = (x); break
  60. #define CLR_RH_PORTSTAT(x) \
  61. status = inw(port_addr); \
  62. status &= ~(RWC_BITS|WZ_BITS); \
  63. status &= ~(x); \
  64. status |= RWC_BITS & (x); \
  65. outw(status, port_addr)
  66. #define SET_RH_PORTSTAT(x) \
  67. status = inw(port_addr); \
  68. status |= (x); \
  69. status &= ~(RWC_BITS|WZ_BITS); \
  70. outw(status, port_addr)
  71. /* UHCI controllers don't automatically stop resume signalling after 20 msec,
  72. * so we have to poll and check timeouts in order to take care of it.
  73. */
  74. static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
  75. unsigned long port_addr)
  76. {
  77. int status;
  78. if (test_bit(port, &uhci->suspended_ports)) {
  79. CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD);
  80. clear_bit(port, &uhci->suspended_ports);
  81. clear_bit(port, &uhci->resuming_ports);
  82. set_bit(port, &uhci->port_c_suspend);
  83. /* The controller won't actually turn off the RD bit until
  84. * it has had a chance to send a low-speed EOP sequence,
  85. * which takes 3 bit times (= 2 microseconds). We'll delay
  86. * slightly longer for good luck. */
  87. udelay(4);
  88. }
  89. }
  90. static void uhci_check_ports(struct uhci_hcd *uhci)
  91. {
  92. unsigned int port;
  93. unsigned long port_addr;
  94. int status;
  95. for (port = 0; port < uhci->rh_numports; ++port) {
  96. port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
  97. status = inw(port_addr);
  98. if (unlikely(status & USBPORTSC_PR)) {
  99. if (time_after_eq(jiffies, uhci->ports_timeout)) {
  100. CLR_RH_PORTSTAT(USBPORTSC_PR);
  101. udelay(10);
  102. /* If the port was enabled before, turning
  103. * reset on caused a port enable change.
  104. * Turning reset off causes a port connect
  105. * status change. Clear these changes. */
  106. CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
  107. SET_RH_PORTSTAT(USBPORTSC_PE);
  108. }
  109. }
  110. if (unlikely(status & USBPORTSC_RD)) {
  111. if (!test_bit(port, &uhci->resuming_ports)) {
  112. /* Port received a wakeup request */
  113. set_bit(port, &uhci->resuming_ports);
  114. uhci->ports_timeout = jiffies +
  115. msecs_to_jiffies(20);
  116. } else if (time_after_eq(jiffies,
  117. uhci->ports_timeout)) {
  118. uhci_finish_suspend(uhci, port, port_addr);
  119. }
  120. }
  121. }
  122. }
  123. /* size of returned buffer is part of USB spec */
  124. static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
  125. u16 wIndex, char *buf, u16 wLength)
  126. {
  127. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  128. int status, lstatus, retval = 0, len = 0;
  129. unsigned int port = wIndex - 1;
  130. unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
  131. u16 wPortChange, wPortStatus;
  132. unsigned long flags;
  133. spin_lock_irqsave(&uhci->lock, flags);
  134. switch (typeReq) {
  135. case GetHubStatus:
  136. *(__le32 *)buf = cpu_to_le32(0);
  137. OK(4); /* hub power */
  138. case GetPortStatus:
  139. if (port >= uhci->rh_numports)
  140. goto err;
  141. uhci_check_ports(uhci);
  142. status = inw(port_addr);
  143. /* Intel controllers report the OverCurrent bit active on.
  144. * VIA controllers report it active off, so we'll adjust the
  145. * bit value. (It's not standardized in the UHCI spec.)
  146. */
  147. if (to_pci_dev(hcd->self.controller)->vendor ==
  148. PCI_VENDOR_ID_VIA)
  149. status ^= USBPORTSC_OC;
  150. /* UHCI doesn't support C_RESET (always false) */
  151. wPortChange = lstatus = 0;
  152. if (status & USBPORTSC_CSC)
  153. wPortChange |= USB_PORT_STAT_C_CONNECTION;
  154. if (status & USBPORTSC_PEC)
  155. wPortChange |= USB_PORT_STAT_C_ENABLE;
  156. if (status & USBPORTSC_OCC)
  157. wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
  158. if (test_bit(port, &uhci->port_c_suspend)) {
  159. wPortChange |= USB_PORT_STAT_C_SUSPEND;
  160. lstatus |= 1;
  161. }
  162. if (test_bit(port, &uhci->suspended_ports))
  163. lstatus |= 2;
  164. if (test_bit(port, &uhci->resuming_ports))
  165. lstatus |= 4;
  166. /* UHCI has no power switching (always on) */
  167. wPortStatus = USB_PORT_STAT_POWER;
  168. if (status & USBPORTSC_CCS)
  169. wPortStatus |= USB_PORT_STAT_CONNECTION;
  170. if (status & USBPORTSC_PE) {
  171. wPortStatus |= USB_PORT_STAT_ENABLE;
  172. if (status & (USBPORTSC_SUSP | USBPORTSC_RD))
  173. wPortStatus |= USB_PORT_STAT_SUSPEND;
  174. }
  175. if (status & USBPORTSC_OC)
  176. wPortStatus |= USB_PORT_STAT_OVERCURRENT;
  177. if (status & USBPORTSC_PR)
  178. wPortStatus |= USB_PORT_STAT_RESET;
  179. if (status & USBPORTSC_LSDA)
  180. wPortStatus |= USB_PORT_STAT_LOW_SPEED;
  181. if (wPortChange)
  182. dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
  183. wIndex, status, lstatus);
  184. *(__le16 *)buf = cpu_to_le16(wPortStatus);
  185. *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
  186. OK(4);
  187. case SetHubFeature: /* We don't implement these */
  188. case ClearHubFeature:
  189. switch (wValue) {
  190. case C_HUB_OVER_CURRENT:
  191. case C_HUB_LOCAL_POWER:
  192. OK(0);
  193. default:
  194. goto err;
  195. }
  196. break;
  197. case SetPortFeature:
  198. if (port >= uhci->rh_numports)
  199. goto err;
  200. switch (wValue) {
  201. case USB_PORT_FEAT_SUSPEND:
  202. set_bit(port, &uhci->suspended_ports);
  203. SET_RH_PORTSTAT(USBPORTSC_SUSP);
  204. OK(0);
  205. case USB_PORT_FEAT_RESET:
  206. SET_RH_PORTSTAT(USBPORTSC_PR);
  207. /* Reset terminates Resume signalling */
  208. uhci_finish_suspend(uhci, port, port_addr);
  209. /* USB v2.0 7.1.7.5 */
  210. uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
  211. OK(0);
  212. case USB_PORT_FEAT_POWER:
  213. /* UHCI has no power switching */
  214. OK(0);
  215. default:
  216. goto err;
  217. }
  218. break;
  219. case ClearPortFeature:
  220. if (port >= uhci->rh_numports)
  221. goto err;
  222. switch (wValue) {
  223. case USB_PORT_FEAT_ENABLE:
  224. CLR_RH_PORTSTAT(USBPORTSC_PE);
  225. /* Disable terminates Resume signalling */
  226. uhci_finish_suspend(uhci, port, port_addr);
  227. OK(0);
  228. case USB_PORT_FEAT_C_ENABLE:
  229. CLR_RH_PORTSTAT(USBPORTSC_PEC);
  230. OK(0);
  231. case USB_PORT_FEAT_SUSPEND:
  232. if (test_bit(port, &uhci->suspended_ports) &&
  233. !test_and_set_bit(port,
  234. &uhci->resuming_ports)) {
  235. SET_RH_PORTSTAT(USBPORTSC_RD);
  236. /* The controller won't allow RD to be set
  237. * if the port is disabled. When this happens
  238. * just skip the Resume signalling.
  239. */
  240. if (!(inw(port_addr) & USBPORTSC_RD))
  241. uhci_finish_suspend(uhci, port,
  242. port_addr);
  243. else
  244. /* USB v2.0 7.1.7.7 */
  245. uhci->ports_timeout = jiffies +
  246. msecs_to_jiffies(20);
  247. }
  248. OK(0);
  249. case USB_PORT_FEAT_C_SUSPEND:
  250. clear_bit(port, &uhci->port_c_suspend);
  251. OK(0);
  252. case USB_PORT_FEAT_POWER:
  253. /* UHCI has no power switching */
  254. goto err;
  255. case USB_PORT_FEAT_C_CONNECTION:
  256. CLR_RH_PORTSTAT(USBPORTSC_CSC);
  257. OK(0);
  258. case USB_PORT_FEAT_C_OVER_CURRENT:
  259. CLR_RH_PORTSTAT(USBPORTSC_OCC);
  260. OK(0);
  261. case USB_PORT_FEAT_C_RESET:
  262. /* this driver won't report these */
  263. OK(0);
  264. default:
  265. goto err;
  266. }
  267. break;
  268. case GetHubDescriptor:
  269. len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
  270. memcpy(buf, root_hub_hub_des, len);
  271. if (len > 2)
  272. buf[2] = uhci->rh_numports;
  273. OK(len);
  274. default:
  275. err:
  276. retval = -EPIPE;
  277. }
  278. spin_unlock_irqrestore(&uhci->lock, flags);
  279. return retval;
  280. }