cx88-dvb.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868
  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #ifdef HAVE_MT352
  34. # include "mt352.h"
  35. # include "mt352_priv.h"
  36. # ifdef HAVE_VP3054_I2C
  37. # include "cx88-vp3054-i2c.h"
  38. # endif
  39. #endif
  40. #ifdef HAVE_ZL10353
  41. # include "zl10353.h"
  42. #endif
  43. #ifdef HAVE_CX22702
  44. # include "cx22702.h"
  45. #endif
  46. #ifdef HAVE_OR51132
  47. # include "or51132.h"
  48. #endif
  49. #ifdef HAVE_LGDT330X
  50. # include "lgdt330x.h"
  51. # include "fe_lgh06xf.h"
  52. #endif
  53. #ifdef HAVE_NXT200X
  54. # include "nxt200x.h"
  55. #endif
  56. #ifdef HAVE_CX24123
  57. # include "cx24123.h"
  58. #endif
  59. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  60. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  61. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  62. MODULE_LICENSE("GPL");
  63. static unsigned int debug = 0;
  64. module_param(debug, int, 0644);
  65. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  66. #define dprintk(level,fmt, arg...) if (debug >= level) \
  67. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  68. /* ------------------------------------------------------------------ */
  69. static int dvb_buf_setup(struct videobuf_queue *q,
  70. unsigned int *count, unsigned int *size)
  71. {
  72. struct cx8802_dev *dev = q->priv_data;
  73. dev->ts_packet_size = 188 * 4;
  74. dev->ts_packet_count = 32;
  75. *size = dev->ts_packet_size * dev->ts_packet_count;
  76. *count = 32;
  77. return 0;
  78. }
  79. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  80. enum v4l2_field field)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  84. }
  85. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  86. {
  87. struct cx8802_dev *dev = q->priv_data;
  88. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  89. }
  90. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  91. {
  92. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  93. }
  94. static struct videobuf_queue_ops dvb_qops = {
  95. .buf_setup = dvb_buf_setup,
  96. .buf_prepare = dvb_buf_prepare,
  97. .buf_queue = dvb_buf_queue,
  98. .buf_release = dvb_buf_release,
  99. };
  100. /* ------------------------------------------------------------------ */
  101. #ifdef HAVE_MT352
  102. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  103. {
  104. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  105. static u8 reset [] = { RESET, 0x80 };
  106. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  107. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  108. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  109. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  110. mt352_write(fe, clock_config, sizeof(clock_config));
  111. udelay(200);
  112. mt352_write(fe, reset, sizeof(reset));
  113. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  114. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  115. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  116. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  117. return 0;
  118. }
  119. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  120. {
  121. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  122. static u8 reset [] = { RESET, 0x80 };
  123. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  124. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  125. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  126. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  127. mt352_write(fe, clock_config, sizeof(clock_config));
  128. udelay(200);
  129. mt352_write(fe, reset, sizeof(reset));
  130. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  131. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  132. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  133. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  134. return 0;
  135. }
  136. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  137. {
  138. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  139. static u8 reset [] = { 0x50, 0x80 };
  140. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  141. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  142. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  143. static u8 dntv_extra[] = { 0xB5, 0x7A };
  144. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  145. mt352_write(fe, clock_config, sizeof(clock_config));
  146. udelay(2000);
  147. mt352_write(fe, reset, sizeof(reset));
  148. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  149. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  150. udelay(2000);
  151. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  152. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  153. return 0;
  154. }
  155. static struct mt352_config dvico_fusionhdtv = {
  156. .demod_address = 0x0F,
  157. .demod_init = dvico_fusionhdtv_demod_init,
  158. };
  159. static struct mt352_config dntv_live_dvbt_config = {
  160. .demod_address = 0x0f,
  161. .demod_init = dntv_live_dvbt_demod_init,
  162. };
  163. static struct mt352_config dvico_fusionhdtv_dual = {
  164. .demod_address = 0x0F,
  165. .demod_init = dvico_dual_demod_init,
  166. };
  167. #ifdef HAVE_VP3054_I2C
  168. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  169. {
  170. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  171. static u8 reset [] = { 0x50, 0x80 };
  172. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  173. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  174. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  175. static u8 dntv_extra[] = { 0xB5, 0x7A };
  176. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  177. mt352_write(fe, clock_config, sizeof(clock_config));
  178. udelay(2000);
  179. mt352_write(fe, reset, sizeof(reset));
  180. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  181. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  182. udelay(2000);
  183. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  184. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  185. return 0;
  186. }
  187. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  188. {
  189. struct cx8802_dev *dev= fe->dvb->priv;
  190. /* this message is to set up ATC and ALC */
  191. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  192. struct i2c_msg msg =
  193. { .addr = dev->core->pll_addr, .flags = 0,
  194. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  195. int err;
  196. if (fe->ops->i2c_gate_ctrl)
  197. fe->ops->i2c_gate_ctrl(fe, 1);
  198. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  199. if (err < 0)
  200. return err;
  201. else
  202. return -EREMOTEIO;
  203. }
  204. return 0;
  205. }
  206. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  207. struct dvb_frontend_parameters* params)
  208. {
  209. struct cx8802_dev *dev= fe->dvb->priv;
  210. u8 buf[4];
  211. struct i2c_msg msg =
  212. { .addr = dev->core->pll_addr, .flags = 0,
  213. .buf = buf, .len = 4 };
  214. int err;
  215. /* Switch PLL to DVB mode */
  216. err = philips_fmd1216_pll_init(fe);
  217. if (err)
  218. return err;
  219. /* Tune PLL */
  220. dvb_pll_configure(dev->core->pll_desc, buf,
  221. params->frequency,
  222. params->u.ofdm.bandwidth);
  223. if (fe->ops->i2c_gate_ctrl)
  224. fe->ops->i2c_gate_ctrl(fe, 1);
  225. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  226. printk(KERN_WARNING "cx88-dvb: %s error "
  227. "(addr %02x <- %02x, err = %i)\n",
  228. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  229. if (err < 0)
  230. return err;
  231. else
  232. return -EREMOTEIO;
  233. }
  234. return 0;
  235. }
  236. static struct mt352_config dntv_live_dvbt_pro_config = {
  237. .demod_address = 0x0f,
  238. .no_tuner = 1,
  239. .demod_init = dntv_live_dvbt_pro_demod_init,
  240. };
  241. #endif
  242. #endif
  243. #ifdef HAVE_ZL10353
  244. static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
  245. struct dvb_frontend_parameters *params)
  246. {
  247. u8 pllbuf[4];
  248. struct cx8802_dev *dev= fe->dvb->priv;
  249. struct i2c_msg msg =
  250. { .addr = dev->core->pll_addr, .flags = 0,
  251. .buf = pllbuf, .len = 4 };
  252. int err;
  253. dvb_pll_configure(dev->core->pll_desc, pllbuf,
  254. params->frequency,
  255. params->u.ofdm.bandwidth);
  256. if (fe->ops->i2c_gate_ctrl)
  257. fe->ops->i2c_gate_ctrl(fe, 1);
  258. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  259. printk(KERN_WARNING "cx88-dvb: %s error "
  260. "(addr %02x <- %02x, err = %i)\n",
  261. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  262. if (err < 0)
  263. return err;
  264. else
  265. return -EREMOTEIO;
  266. }
  267. return 0;
  268. }
  269. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  270. .demod_address = 0x0F,
  271. .no_tuner = 1,
  272. };
  273. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  274. .demod_address = 0x0F,
  275. };
  276. #endif
  277. #ifdef HAVE_CX22702
  278. static struct cx22702_config connexant_refboard_config = {
  279. .demod_address = 0x43,
  280. .output_mode = CX22702_SERIAL_OUTPUT,
  281. };
  282. static struct cx22702_config hauppauge_novat_config = {
  283. .demod_address = 0x43,
  284. .output_mode = CX22702_SERIAL_OUTPUT,
  285. };
  286. static struct cx22702_config hauppauge_hvr1100_config = {
  287. .demod_address = 0x63,
  288. .output_mode = CX22702_SERIAL_OUTPUT,
  289. };
  290. #endif
  291. #ifdef HAVE_OR51132
  292. static int or51132_set_ts_param(struct dvb_frontend* fe,
  293. int is_punctured)
  294. {
  295. struct cx8802_dev *dev= fe->dvb->priv;
  296. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  297. return 0;
  298. }
  299. static struct or51132_config pchdtv_hd3000 = {
  300. .demod_address = 0x15,
  301. .set_ts_params = or51132_set_ts_param,
  302. };
  303. #endif
  304. #ifdef HAVE_LGDT330X
  305. static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
  306. struct dvb_frontend_parameters* params)
  307. {
  308. /* FIXME make this routine use the tuner-simple code.
  309. * It could probably be shared with a number of ATSC
  310. * frontends. Many share the same tuner with analog TV. */
  311. struct cx8802_dev *dev= fe->dvb->priv;
  312. struct cx88_core *core = dev->core;
  313. u8 buf[4];
  314. struct i2c_msg msg =
  315. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  316. int err;
  317. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  318. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  319. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  320. if (fe->ops->i2c_gate_ctrl)
  321. fe->ops->i2c_gate_ctrl(fe, 1);
  322. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  323. printk(KERN_WARNING "cx88-dvb: %s error "
  324. "(addr %02x <- %02x, err = %i)\n",
  325. __FUNCTION__, buf[0], buf[1], err);
  326. if (err < 0)
  327. return err;
  328. else
  329. return -EREMOTEIO;
  330. }
  331. return 0;
  332. }
  333. static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
  334. struct dvb_frontend_parameters* params)
  335. {
  336. struct cx8802_dev *dev= fe->dvb->priv;
  337. struct cx88_core *core = dev->core;
  338. /* Put the analog decoder in standby to keep it quiet */
  339. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  340. return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
  341. }
  342. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  343. {
  344. struct cx8802_dev *dev= fe->dvb->priv;
  345. struct cx88_core *core = dev->core;
  346. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  347. if (index == 0)
  348. cx_clear(MO_GP0_IO, 8);
  349. else
  350. cx_set(MO_GP0_IO, 8);
  351. return 0;
  352. }
  353. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  354. {
  355. struct cx8802_dev *dev= fe->dvb->priv;
  356. if (is_punctured)
  357. dev->ts_gen_cntrl |= 0x04;
  358. else
  359. dev->ts_gen_cntrl &= ~0x04;
  360. return 0;
  361. }
  362. static struct lgdt330x_config fusionhdtv_3_gold = {
  363. .demod_address = 0x0e,
  364. .demod_chip = LGDT3302,
  365. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  366. .set_ts_params = lgdt330x_set_ts_param,
  367. };
  368. static struct lgdt330x_config fusionhdtv_5_gold = {
  369. .demod_address = 0x0e,
  370. .demod_chip = LGDT3303,
  371. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  372. .set_ts_params = lgdt330x_set_ts_param,
  373. };
  374. static struct lgdt330x_config pchdtv_hd5500 = {
  375. .demod_address = 0x59,
  376. .demod_chip = LGDT3303,
  377. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  378. .set_ts_params = lgdt330x_set_ts_param,
  379. };
  380. #endif
  381. #ifdef HAVE_NXT200X
  382. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  383. int is_punctured)
  384. {
  385. struct cx8802_dev *dev= fe->dvb->priv;
  386. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  387. return 0;
  388. }
  389. static int nxt200x_set_pll_input(u8* buf, int input)
  390. {
  391. if (input)
  392. buf[3] |= 0x08;
  393. else
  394. buf[3] &= ~0x08;
  395. return 0;
  396. }
  397. static struct nxt200x_config ati_hdtvwonder = {
  398. .demod_address = 0x0a,
  399. .set_pll_input = nxt200x_set_pll_input,
  400. .set_ts_params = nxt200x_set_ts_param,
  401. };
  402. #endif
  403. #ifdef HAVE_CX24123
  404. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  405. int is_punctured)
  406. {
  407. struct cx8802_dev *dev= fe->dvb->priv;
  408. dev->ts_gen_cntrl = 0x2;
  409. return 0;
  410. }
  411. static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
  412. {
  413. struct cx8802_dev *dev= fe->dvb->priv;
  414. struct cx88_core *core = dev->core;
  415. if (on)
  416. cx_write(MO_GP0_IO, 0x000006f9);
  417. else
  418. cx_write(MO_GP0_IO, 0x000006fB);
  419. }
  420. static struct cx24123_config hauppauge_novas_config = {
  421. .demod_address = 0x55,
  422. .use_isl6421 = 1,
  423. .set_ts_params = cx24123_set_ts_param,
  424. };
  425. static struct cx24123_config kworld_dvbs_100_config = {
  426. .demod_address = 0x15,
  427. .use_isl6421 = 0,
  428. .set_ts_params = cx24123_set_ts_param,
  429. .enable_lnb_voltage = cx24123_enable_lnb_voltage,
  430. };
  431. #endif
  432. static int dvb_register(struct cx8802_dev *dev)
  433. {
  434. /* init struct videobuf_dvb */
  435. dev->dvb.name = dev->core->name;
  436. dev->ts_gen_cntrl = 0x0c;
  437. /* init frontend */
  438. switch (dev->core->board) {
  439. #ifdef HAVE_CX22702
  440. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  441. dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
  442. &dev->core->i2c_adap);
  443. if (dev->dvb.frontend != NULL) {
  444. dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt759x);
  445. }
  446. break;
  447. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  448. case CX88_BOARD_CONEXANT_DVB_T1:
  449. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  450. case CX88_BOARD_WINFAST_DTV1000:
  451. dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
  452. &dev->core->i2c_adap);
  453. if (dev->dvb.frontend != NULL) {
  454. dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
  455. }
  456. break;
  457. case CX88_BOARD_HAUPPAUGE_HVR1100:
  458. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  459. dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
  460. &dev->core->i2c_adap);
  461. if (dev->dvb.frontend != NULL) {
  462. dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_fmd1216me);
  463. }
  464. break;
  465. #endif
  466. #if defined(HAVE_MT352) || defined(HAVE_ZL10353)
  467. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  468. #ifdef HAVE_MT352
  469. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  470. &dev->core->i2c_adap);
  471. if (dev->dvb.frontend != NULL) {
  472. dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
  473. break;
  474. }
  475. #endif
  476. #ifdef HAVE_ZL10353
  477. /* ZL10353 replaces MT352 on later cards */
  478. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_plus_v1_1,
  479. &dev->core->i2c_adap);
  480. if (dev->dvb.frontend != NULL) {
  481. dvb_pll_attach(dev->dvb.frontend, 0x60, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
  482. }
  483. #endif
  484. break;
  485. #endif /* HAVE_MT352 || HAVE_ZL10353 */
  486. #ifdef HAVE_MT352
  487. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  488. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  489. &dev->core->i2c_adap);
  490. if (dev->dvb.frontend != NULL) {
  491. dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_lg_z201);
  492. }
  493. break;
  494. case CX88_BOARD_KWORLD_DVB_T:
  495. case CX88_BOARD_DNTV_LIVE_DVB_T:
  496. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  497. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
  498. &dev->core->i2c_adap);
  499. if (dev->dvb.frontend != NULL) {
  500. dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_unknown_1);
  501. }
  502. break;
  503. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  504. #ifdef HAVE_VP3054_I2C
  505. dev->core->pll_addr = 0x61;
  506. dev->core->pll_desc = &dvb_pll_fmd1216me;
  507. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
  508. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  509. if (dev->dvb.frontend != NULL) {
  510. dev->dvb.frontend->ops->tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  511. }
  512. #else
  513. printk("%s: built without vp3054 support\n", dev->core->name);
  514. #endif
  515. break;
  516. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  517. /* The tin box says DEE1601, but it seems to be DTT7579
  518. * compatible, with a slightly different MT352 AGC gain. */
  519. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
  520. &dev->core->i2c_adap);
  521. if (dev->dvb.frontend != NULL) {
  522. dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt7579);
  523. }
  524. break;
  525. #endif
  526. #ifdef HAVE_ZL10353
  527. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  528. dev->core->pll_addr = 0x61;
  529. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  530. dev->dvb.frontend = zl10353_attach(&dvico_fusionhdtv_hybrid,
  531. &dev->core->i2c_adap);
  532. if (dev->dvb.frontend != NULL) {
  533. dev->dvb.frontend->ops->tuner_ops.set_params = dvico_hybrid_tuner_set_params;
  534. }
  535. break;
  536. #endif
  537. #ifdef HAVE_OR51132
  538. case CX88_BOARD_PCHDTV_HD3000:
  539. dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
  540. &dev->core->i2c_adap);
  541. if (dev->dvb.frontend != NULL) {
  542. dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_thomson_dtt761x);
  543. }
  544. break;
  545. #endif
  546. #ifdef HAVE_LGDT330X
  547. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  548. dev->ts_gen_cntrl = 0x08;
  549. {
  550. /* Do a hardware reset of chip before using it. */
  551. struct cx88_core *core = dev->core;
  552. cx_clear(MO_GP0_IO, 1);
  553. mdelay(100);
  554. cx_set(MO_GP0_IO, 1);
  555. mdelay(200);
  556. /* Select RF connector callback */
  557. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  558. dev->core->pll_addr = 0x61;
  559. dev->core->pll_desc = &dvb_pll_microtune_4042;
  560. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  561. &dev->core->i2c_adap);
  562. if (dev->dvb.frontend != NULL) {
  563. dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3302_tuner_set_params;
  564. }
  565. }
  566. break;
  567. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  568. dev->ts_gen_cntrl = 0x08;
  569. {
  570. /* Do a hardware reset of chip before using it. */
  571. struct cx88_core *core = dev->core;
  572. cx_clear(MO_GP0_IO, 1);
  573. mdelay(100);
  574. cx_set(MO_GP0_IO, 9);
  575. mdelay(200);
  576. dev->core->pll_addr = 0x61;
  577. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  578. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  579. &dev->core->i2c_adap);
  580. if (dev->dvb.frontend != NULL) {
  581. dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3302_tuner_set_params;
  582. }
  583. }
  584. break;
  585. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  586. dev->ts_gen_cntrl = 0x08;
  587. {
  588. /* Do a hardware reset of chip before using it. */
  589. struct cx88_core *core = dev->core;
  590. cx_clear(MO_GP0_IO, 1);
  591. mdelay(100);
  592. cx_set(MO_GP0_IO, 1);
  593. mdelay(200);
  594. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
  595. &dev->core->i2c_adap);
  596. if (dev->dvb.frontend != NULL) {
  597. dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3303_tuner_set_params;
  598. }
  599. }
  600. break;
  601. case CX88_BOARD_PCHDTV_HD5500:
  602. dev->ts_gen_cntrl = 0x08;
  603. {
  604. /* Do a hardware reset of chip before using it. */
  605. struct cx88_core *core = dev->core;
  606. cx_clear(MO_GP0_IO, 1);
  607. mdelay(100);
  608. cx_set(MO_GP0_IO, 1);
  609. mdelay(200);
  610. dev->dvb.frontend = lgdt330x_attach(&pchdtv_hd5500,
  611. &dev->core->i2c_adap);
  612. if (dev->dvb.frontend != NULL) {
  613. dev->dvb.frontend->ops->tuner_ops.set_params = lgdt3303_tuner_set_params;
  614. }
  615. }
  616. break;
  617. #endif
  618. #ifdef HAVE_NXT200X
  619. case CX88_BOARD_ATI_HDTVWONDER:
  620. dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
  621. &dev->core->i2c_adap);
  622. if (dev->dvb.frontend != NULL) {
  623. dvb_pll_attach(dev->dvb.frontend, 0x61, &dev->core->i2c_adap, &dvb_pll_tuv1236d);
  624. }
  625. break;
  626. #endif
  627. #ifdef HAVE_CX24123
  628. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  629. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  630. dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
  631. &dev->core->i2c_adap);
  632. break;
  633. case CX88_BOARD_KWORLD_DVBS_100:
  634. dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
  635. &dev->core->i2c_adap);
  636. break;
  637. #endif
  638. default:
  639. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  640. dev->core->name);
  641. break;
  642. }
  643. if (NULL == dev->dvb.frontend) {
  644. printk("%s: frontend initialization failed\n",dev->core->name);
  645. return -1;
  646. }
  647. if (dev->core->pll_desc) {
  648. dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
  649. dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
  650. }
  651. /* Put the analog decoder in standby to keep it quiet */
  652. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  653. /* register everything */
  654. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  655. }
  656. /* ----------------------------------------------------------- */
  657. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  658. const struct pci_device_id *pci_id)
  659. {
  660. struct cx8802_dev *dev;
  661. struct cx88_core *core;
  662. int err;
  663. /* general setup */
  664. core = cx88_core_get(pci_dev);
  665. if (NULL == core)
  666. return -EINVAL;
  667. err = -ENODEV;
  668. if (!cx88_boards[core->board].dvb)
  669. goto fail_core;
  670. err = -ENOMEM;
  671. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  672. if (NULL == dev)
  673. goto fail_core;
  674. dev->pci = pci_dev;
  675. dev->core = core;
  676. err = cx8802_init_common(dev);
  677. if (0 != err)
  678. goto fail_free;
  679. #ifdef HAVE_VP3054_I2C
  680. err = vp3054_i2c_probe(dev);
  681. if (0 != err)
  682. goto fail_free;
  683. #endif
  684. /* dvb stuff */
  685. printk("%s/2: cx2388x based dvb card\n", core->name);
  686. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  687. dev->pci, &dev->slock,
  688. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  689. V4L2_FIELD_TOP,
  690. sizeof(struct cx88_buffer),
  691. dev);
  692. err = dvb_register(dev);
  693. if (0 != err)
  694. goto fail_fini;
  695. /* Maintain a reference to cx88-video can query the 8802 device. */
  696. core->dvbdev = dev;
  697. return 0;
  698. fail_fini:
  699. cx8802_fini_common(dev);
  700. fail_free:
  701. kfree(dev);
  702. fail_core:
  703. cx88_core_put(core,pci_dev);
  704. return err;
  705. }
  706. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  707. {
  708. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  709. /* Destroy any 8802 reference. */
  710. dev->core->dvbdev = NULL;
  711. /* dvb */
  712. videobuf_dvb_unregister(&dev->dvb);
  713. #ifdef HAVE_VP3054_I2C
  714. vp3054_i2c_remove(dev);
  715. #endif
  716. /* common */
  717. cx8802_fini_common(dev);
  718. cx88_core_put(dev->core,dev->pci);
  719. kfree(dev);
  720. }
  721. static struct pci_device_id cx8802_pci_tbl[] = {
  722. {
  723. .vendor = 0x14f1,
  724. .device = 0x8802,
  725. .subvendor = PCI_ANY_ID,
  726. .subdevice = PCI_ANY_ID,
  727. },{
  728. /* --- end of list --- */
  729. }
  730. };
  731. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  732. static struct pci_driver dvb_pci_driver = {
  733. .name = "cx88-dvb",
  734. .id_table = cx8802_pci_tbl,
  735. .probe = dvb_probe,
  736. .remove = __devexit_p(dvb_remove),
  737. .suspend = cx8802_suspend_common,
  738. .resume = cx8802_resume_common,
  739. };
  740. static int dvb_init(void)
  741. {
  742. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  743. (CX88_VERSION_CODE >> 16) & 0xff,
  744. (CX88_VERSION_CODE >> 8) & 0xff,
  745. CX88_VERSION_CODE & 0xff);
  746. #ifdef SNAPSHOT
  747. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  748. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  749. #endif
  750. return pci_register_driver(&dvb_pci_driver);
  751. }
  752. static void dvb_fini(void)
  753. {
  754. pci_unregister_driver(&dvb_pci_driver);
  755. }
  756. module_init(dvb_init);
  757. module_exit(dvb_fini);
  758. /*
  759. * Local variables:
  760. * c-basic-offset: 8
  761. * compile-command: "make DVB=1"
  762. * End:
  763. */