mach-smdk6410.c 8.7 KB

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  1. /* linux/arch/arm/mach-s3c6410/mach-smdk6410.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/i2c.h>
  23. #include <linux/fb.h>
  24. #include <linux/gpio.h>
  25. #include <linux/delay.h>
  26. #include <linux/smsc911x.h>
  27. #ifdef CONFIG_SMDK6410_WM1190_EV1
  28. #include <linux/mfd/wm8350/core.h>
  29. #include <linux/mfd/wm8350/pmic.h>
  30. #endif
  31. #include <video/platform_lcd.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/map.h>
  34. #include <asm/mach/irq.h>
  35. #include <mach/hardware.h>
  36. #include <mach/regs-fb.h>
  37. #include <mach/map.h>
  38. #include <asm/irq.h>
  39. #include <asm/mach-types.h>
  40. #include <plat/regs-serial.h>
  41. #include <plat/regs-modem.h>
  42. #include <plat/regs-gpio.h>
  43. #include <plat/regs-sys.h>
  44. #include <plat/iic.h>
  45. #include <plat/fb.h>
  46. #include <plat/gpio-cfg.h>
  47. #include <plat/s3c6410.h>
  48. #include <plat/clock.h>
  49. #include <plat/devs.h>
  50. #include <plat/cpu.h>
  51. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  52. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  53. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  54. static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  55. [0] = {
  56. .hwport = 0,
  57. .flags = 0,
  58. .ucon = 0x3c5,
  59. .ulcon = 0x03,
  60. .ufcon = 0x51,
  61. },
  62. [1] = {
  63. .hwport = 1,
  64. .flags = 0,
  65. .ucon = 0x3c5,
  66. .ulcon = 0x03,
  67. .ufcon = 0x51,
  68. },
  69. };
  70. /* framebuffer and LCD setup. */
  71. /* GPF15 = LCD backlight control
  72. * GPF13 => Panel power
  73. * GPN5 = LCD nRESET signal
  74. * PWM_TOUT1 => backlight brightness
  75. */
  76. static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
  77. unsigned int power)
  78. {
  79. if (power) {
  80. gpio_direction_output(S3C64XX_GPF(13), 1);
  81. gpio_direction_output(S3C64XX_GPF(15), 1);
  82. /* fire nRESET on power up */
  83. gpio_direction_output(S3C64XX_GPN(5), 0);
  84. msleep(10);
  85. gpio_direction_output(S3C64XX_GPN(5), 1);
  86. msleep(1);
  87. } else {
  88. gpio_direction_output(S3C64XX_GPF(15), 0);
  89. gpio_direction_output(S3C64XX_GPF(13), 0);
  90. }
  91. }
  92. static struct plat_lcd_data smdk6410_lcd_power_data = {
  93. .set_power = smdk6410_lcd_power_set,
  94. };
  95. static struct platform_device smdk6410_lcd_powerdev = {
  96. .name = "platform-lcd",
  97. .dev.parent = &s3c_device_fb.dev,
  98. .dev.platform_data = &smdk6410_lcd_power_data,
  99. };
  100. static struct s3c_fb_pd_win smdk6410_fb_win0 = {
  101. /* this is to ensure we use win0 */
  102. .win_mode = {
  103. .pixclock = 41094,
  104. .left_margin = 8,
  105. .right_margin = 13,
  106. .upper_margin = 7,
  107. .lower_margin = 5,
  108. .hsync_len = 3,
  109. .vsync_len = 1,
  110. .xres = 800,
  111. .yres = 480,
  112. },
  113. .max_bpp = 32,
  114. .default_bpp = 16,
  115. };
  116. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  117. static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
  118. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  119. .win[0] = &smdk6410_fb_win0,
  120. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  121. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  122. };
  123. static struct resource smdk6410_smsc911x_resources[] = {
  124. [0] = {
  125. .start = 0x18000000,
  126. .end = 0x18000000 + SZ_64K - 1,
  127. .flags = IORESOURCE_MEM,
  128. },
  129. [1] = {
  130. .start = S3C_EINT(10),
  131. .end = S3C_EINT(10),
  132. .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
  133. },
  134. };
  135. static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
  136. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  137. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  138. .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
  139. .phy_interface = PHY_INTERFACE_MODE_MII,
  140. };
  141. static struct platform_device smdk6410_smsc911x = {
  142. .name = "smsc911x",
  143. .id = -1,
  144. .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
  145. .resource = &smdk6410_smsc911x_resources[0],
  146. .dev = {
  147. .platform_data = &smdk6410_smsc911x_pdata,
  148. },
  149. };
  150. static struct map_desc smdk6410_iodesc[] = {};
  151. static struct platform_device *smdk6410_devices[] __initdata = {
  152. #ifdef CONFIG_SMDK6410_SD_CH0
  153. &s3c_device_hsmmc0,
  154. #endif
  155. #ifdef CONFIG_SMDK6410_SD_CH1
  156. &s3c_device_hsmmc1,
  157. #endif
  158. &s3c_device_i2c0,
  159. &s3c_device_i2c1,
  160. &s3c_device_fb,
  161. &smdk6410_lcd_powerdev,
  162. &smdk6410_smsc911x,
  163. };
  164. #ifdef CONFIG_SMDK6410_WM1190_EV1
  165. /* S3C64xx internal logic & PLL */
  166. static struct regulator_init_data wm8350_dcdc1_data = {
  167. .constraints = {
  168. .name = "PVDD_INT/PVDD_PLL",
  169. .min_uV = 1200000,
  170. .max_uV = 1200000,
  171. .always_on = 1,
  172. .apply_uV = 1,
  173. },
  174. };
  175. /* Memory */
  176. static struct regulator_init_data wm8350_dcdc3_data = {
  177. .constraints = {
  178. .name = "PVDD_MEM",
  179. .min_uV = 1800000,
  180. .max_uV = 1800000,
  181. .always_on = 1,
  182. .state_mem = {
  183. .uV = 1800000,
  184. .mode = REGULATOR_MODE_NORMAL,
  185. .enabled = 1,
  186. },
  187. .initial_state = PM_SUSPEND_MEM,
  188. },
  189. };
  190. /* USB, EXT, PCM, ADC/DAC, USB, MMC */
  191. static struct regulator_init_data wm8350_dcdc4_data = {
  192. .constraints = {
  193. .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
  194. .min_uV = 3000000,
  195. .max_uV = 3000000,
  196. .always_on = 1,
  197. },
  198. };
  199. /* ARM core */
  200. static struct regulator_init_data wm8350_dcdc6_data = {
  201. .constraints = {
  202. .name = "PVDD_ARM",
  203. .min_uV = 1000000,
  204. .max_uV = 1300000,
  205. .always_on = 1,
  206. },
  207. };
  208. /* Alive */
  209. static struct regulator_init_data wm8350_ldo1_data = {
  210. .constraints = {
  211. .name = "PVDD_ALIVE",
  212. .min_uV = 1200000,
  213. .max_uV = 1200000,
  214. .always_on = 1,
  215. .apply_uV = 1,
  216. },
  217. };
  218. /* OTG */
  219. static struct regulator_init_data wm8350_ldo2_data = {
  220. .constraints = {
  221. .name = "PVDD_OTG",
  222. .min_uV = 3300000,
  223. .max_uV = 3300000,
  224. .always_on = 1,
  225. },
  226. };
  227. /* LCD */
  228. static struct regulator_init_data wm8350_ldo3_data = {
  229. .constraints = {
  230. .name = "PVDD_LCD",
  231. .min_uV = 3000000,
  232. .max_uV = 3000000,
  233. .always_on = 1,
  234. },
  235. };
  236. /* OTGi/1190-EV1 HPVDD & AVDD */
  237. static struct regulator_init_data wm8350_ldo4_data = {
  238. .constraints = {
  239. .name = "PVDD_OTGI/HPVDD/AVDD",
  240. .min_uV = 1200000,
  241. .max_uV = 1200000,
  242. .apply_uV = 1,
  243. .always_on = 1,
  244. },
  245. };
  246. static struct {
  247. int regulator;
  248. struct regulator_init_data *initdata;
  249. } wm1190_regulators[] = {
  250. { WM8350_DCDC_1, &wm8350_dcdc1_data },
  251. { WM8350_DCDC_3, &wm8350_dcdc3_data },
  252. { WM8350_DCDC_4, &wm8350_dcdc4_data },
  253. { WM8350_DCDC_6, &wm8350_dcdc6_data },
  254. { WM8350_LDO_1, &wm8350_ldo1_data },
  255. { WM8350_LDO_2, &wm8350_ldo2_data },
  256. { WM8350_LDO_3, &wm8350_ldo3_data },
  257. { WM8350_LDO_4, &wm8350_ldo4_data },
  258. };
  259. static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
  260. {
  261. int i;
  262. /* Instantiate the regulators */
  263. for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
  264. wm8350_register_regulator(wm8350,
  265. wm1190_regulators[i].regulator,
  266. wm1190_regulators[i].initdata);
  267. return 0;
  268. }
  269. static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
  270. .init = smdk6410_wm8350_init,
  271. .irq_high = 1,
  272. };
  273. #endif
  274. static struct i2c_board_info i2c_devs0[] __initdata = {
  275. { I2C_BOARD_INFO("24c08", 0x50), },
  276. { I2C_BOARD_INFO("wm8580", 0x1b), },
  277. #ifdef CONFIG_SMDK6410_WM1190_EV1
  278. { I2C_BOARD_INFO("wm8350", 0x1a),
  279. .platform_data = &smdk6410_wm8350_pdata,
  280. .irq = S3C_EINT(12),
  281. },
  282. #endif
  283. };
  284. static struct i2c_board_info i2c_devs1[] __initdata = {
  285. { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
  286. };
  287. static void __init smdk6410_map_io(void)
  288. {
  289. u32 tmp;
  290. s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
  291. s3c24xx_init_clocks(12000000);
  292. s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
  293. /* set the LCD type */
  294. tmp = __raw_readl(S3C64XX_SPCON);
  295. tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
  296. tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
  297. __raw_writel(tmp, S3C64XX_SPCON);
  298. /* remove the lcd bypass */
  299. tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
  300. tmp &= ~MIFPCON_LCD_BYPASS;
  301. __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
  302. }
  303. static void __init smdk6410_machine_init(void)
  304. {
  305. s3c_i2c0_set_platdata(NULL);
  306. s3c_i2c1_set_platdata(NULL);
  307. s3c_fb_set_platdata(&smdk6410_lcd_pdata);
  308. gpio_request(S3C64XX_GPN(5), "LCD power");
  309. gpio_request(S3C64XX_GPF(13), "LCD power");
  310. gpio_request(S3C64XX_GPF(15), "LCD power");
  311. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  312. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  313. platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
  314. }
  315. MACHINE_START(SMDK6410, "SMDK6410")
  316. /* Maintainer: Ben Dooks <ben@fluff.org> */
  317. .phys_io = S3C_PA_UART & 0xfff00000,
  318. .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
  319. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  320. .init_irq = s3c6410_init_irq,
  321. .map_io = smdk6410_map_io,
  322. .init_machine = smdk6410_machine_init,
  323. .timer = &s3c24xx_timer,
  324. MACHINE_END