exynos5440.dtsi 2.9 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. gic:interrupt-controller@2E0000 {
  16. compatible = "arm,cortex-a15-gic";
  17. #interrupt-cells = <3>;
  18. interrupt-controller;
  19. reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
  20. };
  21. cpus {
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. cpu@0 {
  25. compatible = "arm,cortex-a15";
  26. reg = <0>;
  27. };
  28. cpu@1 {
  29. compatible = "arm,cortex-a15";
  30. reg = <1>;
  31. };
  32. cpu@2 {
  33. compatible = "arm,cortex-a15";
  34. reg = <2>;
  35. };
  36. cpu@3 {
  37. compatible = "arm,cortex-a15";
  38. reg = <3>;
  39. };
  40. };
  41. timer {
  42. compatible = "arm,cortex-a15-timer",
  43. "arm,armv7-timer";
  44. interrupts = <1 13 0xf08>,
  45. <1 14 0xf08>,
  46. <1 11 0xf08>,
  47. <1 10 0xf08>;
  48. clock-frequency = <50000000>;
  49. };
  50. serial@B0000 {
  51. compatible = "samsung,exynos4210-uart";
  52. reg = <0xB0000 0x1000>;
  53. interrupts = <0 2 0>;
  54. };
  55. serial@C0000 {
  56. compatible = "samsung,exynos4210-uart";
  57. reg = <0xC0000 0x1000>;
  58. interrupts = <0 3 0>;
  59. };
  60. spi {
  61. compatible = "samsung,exynos4210-spi";
  62. reg = <0xD0000 0x1000>;
  63. interrupts = <0 4 0>;
  64. tx-dma-channel = <&pdma0 5>; /* preliminary */
  65. rx-dma-channel = <&pdma0 4>; /* preliminary */
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. };
  69. pinctrl {
  70. compatible = "samsung,exynos5440-pinctrl";
  71. reg = <0xE0000 0x1000>;
  72. interrupt-controller;
  73. #interrupt-cells = <2>;
  74. #gpio-cells = <2>;
  75. fan: fan {
  76. samsung,exynos5440-pin-function = <1>;
  77. };
  78. hdd_led0: hdd_led0 {
  79. samsung,exynos5440-pin-function = <2>;
  80. };
  81. hdd_led1: hdd_led1 {
  82. samsung,exynos5440-pin-function = <3>;
  83. };
  84. uart1: uart1 {
  85. samsung,exynos5440-pin-function = <4>;
  86. };
  87. };
  88. i2c@F0000 {
  89. compatible = "samsung,exynos5440-i2c";
  90. reg = <0xF0000 0x1000>;
  91. interrupts = <0 5 0>;
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. };
  95. i2c@100000 {
  96. compatible = "samsung,exynos5440-i2c";
  97. reg = <0x100000 0x1000>;
  98. interrupts = <0 6 0>;
  99. #address-cells = <1>;
  100. #size-cells = <0>;
  101. };
  102. watchdog {
  103. compatible = "samsung,s3c2410-wdt";
  104. reg = <0x110000 0x1000>;
  105. interrupts = <0 1 0>;
  106. };
  107. amba {
  108. #address-cells = <1>;
  109. #size-cells = <1>;
  110. compatible = "arm,amba-bus";
  111. interrupt-parent = <&gic>;
  112. ranges;
  113. pdma0: pdma@121A0000 {
  114. compatible = "arm,pl330", "arm,primecell";
  115. reg = <0x120000 0x1000>;
  116. interrupts = <0 34 0>;
  117. };
  118. pdma1: pdma@121B0000 {
  119. compatible = "arm,pl330", "arm,primecell";
  120. reg = <0x121000 0x1000>;
  121. interrupts = <0 35 0>;
  122. };
  123. };
  124. rtc {
  125. compatible = "samsung,s3c6410-rtc";
  126. reg = <0x130000 0x1000>;
  127. interrupts = <0 17 0>, <0 16 0>;
  128. };
  129. };