mthca_provider.c 35 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 4859 2006-01-09 21:55:10Z roland $
  37. */
  38. #include <rdma/ib_smi.h>
  39. #include <rdma/ib_user_verbs.h>
  40. #include <linux/mm.h>
  41. #include "mthca_dev.h"
  42. #include "mthca_cmd.h"
  43. #include "mthca_user.h"
  44. #include "mthca_memfree.h"
  45. static void init_query_mad(struct ib_smp *mad)
  46. {
  47. mad->base_version = 1;
  48. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  49. mad->class_version = 1;
  50. mad->method = IB_MGMT_METHOD_GET;
  51. }
  52. static int mthca_query_device(struct ib_device *ibdev,
  53. struct ib_device_attr *props)
  54. {
  55. struct ib_smp *in_mad = NULL;
  56. struct ib_smp *out_mad = NULL;
  57. int err = -ENOMEM;
  58. struct mthca_dev* mdev = to_mdev(ibdev);
  59. u8 status;
  60. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  61. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  62. if (!in_mad || !out_mad)
  63. goto out;
  64. memset(props, 0, sizeof *props);
  65. props->fw_ver = mdev->fw_ver;
  66. init_query_mad(in_mad);
  67. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  68. err = mthca_MAD_IFC(mdev, 1, 1,
  69. 1, NULL, NULL, in_mad, out_mad,
  70. &status);
  71. if (err)
  72. goto out;
  73. if (status) {
  74. err = -EINVAL;
  75. goto out;
  76. }
  77. props->device_cap_flags = mdev->device_cap_flags;
  78. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  79. 0xffffff;
  80. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  81. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  82. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  83. props->max_mr_size = ~0ull;
  84. props->page_size_cap = mdev->limits.page_size_cap;
  85. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  86. props->max_qp_wr = mdev->limits.max_wqes;
  87. props->max_sge = mdev->limits.max_sg;
  88. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  89. props->max_cqe = mdev->limits.max_cqes;
  90. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  91. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  92. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  93. props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
  94. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  95. props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
  96. props->max_srq_wr = mdev->limits.max_srq_wqes;
  97. props->max_srq_sge = mdev->limits.max_srq_sge;
  98. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  99. props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
  100. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  101. props->max_pkeys = mdev->limits.pkey_table_len;
  102. props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
  103. props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
  104. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  105. props->max_mcast_grp;
  106. /*
  107. * If Sinai memory key optimization is being used, then only
  108. * the 8-bit key portion will change. For other HCAs, the
  109. * unused index bits will also be used for FMR remapping.
  110. */
  111. if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  112. props->max_map_per_fmr = 255;
  113. else
  114. props->max_map_per_fmr =
  115. (1 << (32 - ilog2(mdev->limits.num_mpts))) - 1;
  116. err = 0;
  117. out:
  118. kfree(in_mad);
  119. kfree(out_mad);
  120. return err;
  121. }
  122. static int mthca_query_port(struct ib_device *ibdev,
  123. u8 port, struct ib_port_attr *props)
  124. {
  125. struct ib_smp *in_mad = NULL;
  126. struct ib_smp *out_mad = NULL;
  127. int err = -ENOMEM;
  128. u8 status;
  129. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  130. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  131. if (!in_mad || !out_mad)
  132. goto out;
  133. memset(props, 0, sizeof *props);
  134. init_query_mad(in_mad);
  135. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  136. in_mad->attr_mod = cpu_to_be32(port);
  137. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  138. port, NULL, NULL, in_mad, out_mad,
  139. &status);
  140. if (err)
  141. goto out;
  142. if (status) {
  143. err = -EINVAL;
  144. goto out;
  145. }
  146. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  147. props->lmc = out_mad->data[34] & 0x7;
  148. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  149. props->sm_sl = out_mad->data[36] & 0xf;
  150. props->state = out_mad->data[32] & 0xf;
  151. props->phys_state = out_mad->data[33] >> 4;
  152. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  153. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  154. props->max_msg_sz = 0x80000000;
  155. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  156. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  157. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  158. props->active_width = out_mad->data[31] & 0xf;
  159. props->active_speed = out_mad->data[35] >> 4;
  160. props->max_mtu = out_mad->data[41] & 0xf;
  161. props->active_mtu = out_mad->data[36] >> 4;
  162. props->subnet_timeout = out_mad->data[51] & 0x1f;
  163. props->max_vl_num = out_mad->data[37] >> 4;
  164. props->init_type_reply = out_mad->data[41] >> 4;
  165. out:
  166. kfree(in_mad);
  167. kfree(out_mad);
  168. return err;
  169. }
  170. static int mthca_modify_device(struct ib_device *ibdev,
  171. int mask,
  172. struct ib_device_modify *props)
  173. {
  174. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  175. return -EOPNOTSUPP;
  176. if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
  177. if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  178. return -ERESTARTSYS;
  179. memcpy(ibdev->node_desc, props->node_desc, 64);
  180. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  181. }
  182. return 0;
  183. }
  184. static int mthca_modify_port(struct ib_device *ibdev,
  185. u8 port, int port_modify_mask,
  186. struct ib_port_modify *props)
  187. {
  188. struct mthca_set_ib_param set_ib;
  189. struct ib_port_attr attr;
  190. int err;
  191. u8 status;
  192. if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  193. return -ERESTARTSYS;
  194. err = mthca_query_port(ibdev, port, &attr);
  195. if (err)
  196. goto out;
  197. set_ib.set_si_guid = 0;
  198. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  199. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  200. ~props->clr_port_cap_mask;
  201. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  202. if (err)
  203. goto out;
  204. if (status) {
  205. err = -EINVAL;
  206. goto out;
  207. }
  208. out:
  209. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  210. return err;
  211. }
  212. static int mthca_query_pkey(struct ib_device *ibdev,
  213. u8 port, u16 index, u16 *pkey)
  214. {
  215. struct ib_smp *in_mad = NULL;
  216. struct ib_smp *out_mad = NULL;
  217. int err = -ENOMEM;
  218. u8 status;
  219. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  220. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  221. if (!in_mad || !out_mad)
  222. goto out;
  223. init_query_mad(in_mad);
  224. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  225. in_mad->attr_mod = cpu_to_be32(index / 32);
  226. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  227. port, NULL, NULL, in_mad, out_mad,
  228. &status);
  229. if (err)
  230. goto out;
  231. if (status) {
  232. err = -EINVAL;
  233. goto out;
  234. }
  235. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  236. out:
  237. kfree(in_mad);
  238. kfree(out_mad);
  239. return err;
  240. }
  241. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  242. int index, union ib_gid *gid)
  243. {
  244. struct ib_smp *in_mad = NULL;
  245. struct ib_smp *out_mad = NULL;
  246. int err = -ENOMEM;
  247. u8 status;
  248. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  249. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  250. if (!in_mad || !out_mad)
  251. goto out;
  252. init_query_mad(in_mad);
  253. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  254. in_mad->attr_mod = cpu_to_be32(port);
  255. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  256. port, NULL, NULL, in_mad, out_mad,
  257. &status);
  258. if (err)
  259. goto out;
  260. if (status) {
  261. err = -EINVAL;
  262. goto out;
  263. }
  264. memcpy(gid->raw, out_mad->data + 8, 8);
  265. init_query_mad(in_mad);
  266. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  267. in_mad->attr_mod = cpu_to_be32(index / 8);
  268. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  269. port, NULL, NULL, in_mad, out_mad,
  270. &status);
  271. if (err)
  272. goto out;
  273. if (status) {
  274. err = -EINVAL;
  275. goto out;
  276. }
  277. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  278. out:
  279. kfree(in_mad);
  280. kfree(out_mad);
  281. return err;
  282. }
  283. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  284. struct ib_udata *udata)
  285. {
  286. struct mthca_alloc_ucontext_resp uresp;
  287. struct mthca_ucontext *context;
  288. int err;
  289. memset(&uresp, 0, sizeof uresp);
  290. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  291. if (mthca_is_memfree(to_mdev(ibdev)))
  292. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  293. else
  294. uresp.uarc_size = 0;
  295. context = kmalloc(sizeof *context, GFP_KERNEL);
  296. if (!context)
  297. return ERR_PTR(-ENOMEM);
  298. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  299. if (err) {
  300. kfree(context);
  301. return ERR_PTR(err);
  302. }
  303. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  304. if (IS_ERR(context->db_tab)) {
  305. err = PTR_ERR(context->db_tab);
  306. mthca_uar_free(to_mdev(ibdev), &context->uar);
  307. kfree(context);
  308. return ERR_PTR(err);
  309. }
  310. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  311. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  312. mthca_uar_free(to_mdev(ibdev), &context->uar);
  313. kfree(context);
  314. return ERR_PTR(-EFAULT);
  315. }
  316. return &context->ibucontext;
  317. }
  318. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  319. {
  320. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  321. to_mucontext(context)->db_tab);
  322. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  323. kfree(to_mucontext(context));
  324. return 0;
  325. }
  326. static int mthca_mmap_uar(struct ib_ucontext *context,
  327. struct vm_area_struct *vma)
  328. {
  329. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  330. return -EINVAL;
  331. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  332. if (io_remap_pfn_range(vma, vma->vm_start,
  333. to_mucontext(context)->uar.pfn,
  334. PAGE_SIZE, vma->vm_page_prot))
  335. return -EAGAIN;
  336. return 0;
  337. }
  338. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  339. struct ib_ucontext *context,
  340. struct ib_udata *udata)
  341. {
  342. struct mthca_pd *pd;
  343. int err;
  344. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  345. if (!pd)
  346. return ERR_PTR(-ENOMEM);
  347. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  348. if (err) {
  349. kfree(pd);
  350. return ERR_PTR(err);
  351. }
  352. if (context) {
  353. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  354. mthca_pd_free(to_mdev(ibdev), pd);
  355. kfree(pd);
  356. return ERR_PTR(-EFAULT);
  357. }
  358. }
  359. return &pd->ibpd;
  360. }
  361. static int mthca_dealloc_pd(struct ib_pd *pd)
  362. {
  363. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  364. kfree(pd);
  365. return 0;
  366. }
  367. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  368. struct ib_ah_attr *ah_attr)
  369. {
  370. int err;
  371. struct mthca_ah *ah;
  372. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  373. if (!ah)
  374. return ERR_PTR(-ENOMEM);
  375. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  376. if (err) {
  377. kfree(ah);
  378. return ERR_PTR(err);
  379. }
  380. return &ah->ibah;
  381. }
  382. static int mthca_ah_destroy(struct ib_ah *ah)
  383. {
  384. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  385. kfree(ah);
  386. return 0;
  387. }
  388. static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
  389. struct ib_srq_init_attr *init_attr,
  390. struct ib_udata *udata)
  391. {
  392. struct mthca_create_srq ucmd;
  393. struct mthca_ucontext *context = NULL;
  394. struct mthca_srq *srq;
  395. int err;
  396. srq = kmalloc(sizeof *srq, GFP_KERNEL);
  397. if (!srq)
  398. return ERR_PTR(-ENOMEM);
  399. if (pd->uobject) {
  400. context = to_mucontext(pd->uobject->context);
  401. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  402. err = -EFAULT;
  403. goto err_free;
  404. }
  405. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  406. context->db_tab, ucmd.db_index,
  407. ucmd.db_page);
  408. if (err)
  409. goto err_free;
  410. srq->mr.ibmr.lkey = ucmd.lkey;
  411. srq->db_index = ucmd.db_index;
  412. }
  413. err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
  414. &init_attr->attr, srq);
  415. if (err && pd->uobject)
  416. mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
  417. context->db_tab, ucmd.db_index);
  418. if (err)
  419. goto err_free;
  420. if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
  421. mthca_free_srq(to_mdev(pd->device), srq);
  422. err = -EFAULT;
  423. goto err_free;
  424. }
  425. return &srq->ibsrq;
  426. err_free:
  427. kfree(srq);
  428. return ERR_PTR(err);
  429. }
  430. static int mthca_destroy_srq(struct ib_srq *srq)
  431. {
  432. struct mthca_ucontext *context;
  433. if (srq->uobject) {
  434. context = to_mucontext(srq->uobject->context);
  435. mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
  436. context->db_tab, to_msrq(srq)->db_index);
  437. }
  438. mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
  439. kfree(srq);
  440. return 0;
  441. }
  442. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  443. struct ib_qp_init_attr *init_attr,
  444. struct ib_udata *udata)
  445. {
  446. struct mthca_create_qp ucmd;
  447. struct mthca_qp *qp;
  448. int err;
  449. switch (init_attr->qp_type) {
  450. case IB_QPT_RC:
  451. case IB_QPT_UC:
  452. case IB_QPT_UD:
  453. {
  454. struct mthca_ucontext *context;
  455. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  456. if (!qp)
  457. return ERR_PTR(-ENOMEM);
  458. if (pd->uobject) {
  459. context = to_mucontext(pd->uobject->context);
  460. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  461. kfree(qp);
  462. return ERR_PTR(-EFAULT);
  463. }
  464. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  465. context->db_tab,
  466. ucmd.sq_db_index, ucmd.sq_db_page);
  467. if (err) {
  468. kfree(qp);
  469. return ERR_PTR(err);
  470. }
  471. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  472. context->db_tab,
  473. ucmd.rq_db_index, ucmd.rq_db_page);
  474. if (err) {
  475. mthca_unmap_user_db(to_mdev(pd->device),
  476. &context->uar,
  477. context->db_tab,
  478. ucmd.sq_db_index);
  479. kfree(qp);
  480. return ERR_PTR(err);
  481. }
  482. qp->mr.ibmr.lkey = ucmd.lkey;
  483. qp->sq.db_index = ucmd.sq_db_index;
  484. qp->rq.db_index = ucmd.rq_db_index;
  485. }
  486. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  487. to_mcq(init_attr->send_cq),
  488. to_mcq(init_attr->recv_cq),
  489. init_attr->qp_type, init_attr->sq_sig_type,
  490. &init_attr->cap, qp);
  491. if (err && pd->uobject) {
  492. context = to_mucontext(pd->uobject->context);
  493. mthca_unmap_user_db(to_mdev(pd->device),
  494. &context->uar,
  495. context->db_tab,
  496. ucmd.sq_db_index);
  497. mthca_unmap_user_db(to_mdev(pd->device),
  498. &context->uar,
  499. context->db_tab,
  500. ucmd.rq_db_index);
  501. }
  502. qp->ibqp.qp_num = qp->qpn;
  503. break;
  504. }
  505. case IB_QPT_SMI:
  506. case IB_QPT_GSI:
  507. {
  508. /* Don't allow userspace to create special QPs */
  509. if (pd->uobject)
  510. return ERR_PTR(-EINVAL);
  511. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  512. if (!qp)
  513. return ERR_PTR(-ENOMEM);
  514. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  515. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  516. to_mcq(init_attr->send_cq),
  517. to_mcq(init_attr->recv_cq),
  518. init_attr->sq_sig_type, &init_attr->cap,
  519. qp->ibqp.qp_num, init_attr->port_num,
  520. to_msqp(qp));
  521. break;
  522. }
  523. default:
  524. /* Don't support raw QPs */
  525. return ERR_PTR(-ENOSYS);
  526. }
  527. if (err) {
  528. kfree(qp);
  529. return ERR_PTR(err);
  530. }
  531. init_attr->cap.max_send_wr = qp->sq.max;
  532. init_attr->cap.max_recv_wr = qp->rq.max;
  533. init_attr->cap.max_send_sge = qp->sq.max_gs;
  534. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  535. init_attr->cap.max_inline_data = qp->max_inline_data;
  536. return &qp->ibqp;
  537. }
  538. static int mthca_destroy_qp(struct ib_qp *qp)
  539. {
  540. if (qp->uobject) {
  541. mthca_unmap_user_db(to_mdev(qp->device),
  542. &to_mucontext(qp->uobject->context)->uar,
  543. to_mucontext(qp->uobject->context)->db_tab,
  544. to_mqp(qp)->sq.db_index);
  545. mthca_unmap_user_db(to_mdev(qp->device),
  546. &to_mucontext(qp->uobject->context)->uar,
  547. to_mucontext(qp->uobject->context)->db_tab,
  548. to_mqp(qp)->rq.db_index);
  549. }
  550. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  551. kfree(qp);
  552. return 0;
  553. }
  554. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  555. int comp_vector,
  556. struct ib_ucontext *context,
  557. struct ib_udata *udata)
  558. {
  559. struct mthca_create_cq ucmd;
  560. struct mthca_cq *cq;
  561. int nent;
  562. int err;
  563. if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
  564. return ERR_PTR(-EINVAL);
  565. if (context) {
  566. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  567. return ERR_PTR(-EFAULT);
  568. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  569. to_mucontext(context)->db_tab,
  570. ucmd.set_db_index, ucmd.set_db_page);
  571. if (err)
  572. return ERR_PTR(err);
  573. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  574. to_mucontext(context)->db_tab,
  575. ucmd.arm_db_index, ucmd.arm_db_page);
  576. if (err)
  577. goto err_unmap_set;
  578. }
  579. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  580. if (!cq) {
  581. err = -ENOMEM;
  582. goto err_unmap_arm;
  583. }
  584. if (context) {
  585. cq->buf.mr.ibmr.lkey = ucmd.lkey;
  586. cq->set_ci_db_index = ucmd.set_db_index;
  587. cq->arm_db_index = ucmd.arm_db_index;
  588. }
  589. for (nent = 1; nent <= entries; nent <<= 1)
  590. ; /* nothing */
  591. err = mthca_init_cq(to_mdev(ibdev), nent,
  592. context ? to_mucontext(context) : NULL,
  593. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  594. cq);
  595. if (err)
  596. goto err_free;
  597. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  598. mthca_free_cq(to_mdev(ibdev), cq);
  599. goto err_free;
  600. }
  601. cq->resize_buf = NULL;
  602. return &cq->ibcq;
  603. err_free:
  604. kfree(cq);
  605. err_unmap_arm:
  606. if (context)
  607. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  608. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  609. err_unmap_set:
  610. if (context)
  611. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  612. to_mucontext(context)->db_tab, ucmd.set_db_index);
  613. return ERR_PTR(err);
  614. }
  615. static int mthca_alloc_resize_buf(struct mthca_dev *dev, struct mthca_cq *cq,
  616. int entries)
  617. {
  618. int ret;
  619. spin_lock_irq(&cq->lock);
  620. if (cq->resize_buf) {
  621. ret = -EBUSY;
  622. goto unlock;
  623. }
  624. cq->resize_buf = kmalloc(sizeof *cq->resize_buf, GFP_ATOMIC);
  625. if (!cq->resize_buf) {
  626. ret = -ENOMEM;
  627. goto unlock;
  628. }
  629. cq->resize_buf->state = CQ_RESIZE_ALLOC;
  630. ret = 0;
  631. unlock:
  632. spin_unlock_irq(&cq->lock);
  633. if (ret)
  634. return ret;
  635. ret = mthca_alloc_cq_buf(dev, &cq->resize_buf->buf, entries);
  636. if (ret) {
  637. spin_lock_irq(&cq->lock);
  638. kfree(cq->resize_buf);
  639. cq->resize_buf = NULL;
  640. spin_unlock_irq(&cq->lock);
  641. return ret;
  642. }
  643. cq->resize_buf->cqe = entries - 1;
  644. spin_lock_irq(&cq->lock);
  645. cq->resize_buf->state = CQ_RESIZE_READY;
  646. spin_unlock_irq(&cq->lock);
  647. return 0;
  648. }
  649. static int mthca_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata)
  650. {
  651. struct mthca_dev *dev = to_mdev(ibcq->device);
  652. struct mthca_cq *cq = to_mcq(ibcq);
  653. struct mthca_resize_cq ucmd;
  654. u32 lkey;
  655. u8 status;
  656. int ret;
  657. if (entries < 1 || entries > dev->limits.max_cqes)
  658. return -EINVAL;
  659. mutex_lock(&cq->mutex);
  660. entries = roundup_pow_of_two(entries + 1);
  661. if (entries == ibcq->cqe + 1) {
  662. ret = 0;
  663. goto out;
  664. }
  665. if (cq->is_kernel) {
  666. ret = mthca_alloc_resize_buf(dev, cq, entries);
  667. if (ret)
  668. goto out;
  669. lkey = cq->resize_buf->buf.mr.ibmr.lkey;
  670. } else {
  671. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  672. ret = -EFAULT;
  673. goto out;
  674. }
  675. lkey = ucmd.lkey;
  676. }
  677. ret = mthca_RESIZE_CQ(dev, cq->cqn, lkey, ilog2(entries), &status);
  678. if (status)
  679. ret = -EINVAL;
  680. if (ret) {
  681. if (cq->resize_buf) {
  682. mthca_free_cq_buf(dev, &cq->resize_buf->buf,
  683. cq->resize_buf->cqe);
  684. kfree(cq->resize_buf);
  685. spin_lock_irq(&cq->lock);
  686. cq->resize_buf = NULL;
  687. spin_unlock_irq(&cq->lock);
  688. }
  689. goto out;
  690. }
  691. if (cq->is_kernel) {
  692. struct mthca_cq_buf tbuf;
  693. int tcqe;
  694. spin_lock_irq(&cq->lock);
  695. if (cq->resize_buf->state == CQ_RESIZE_READY) {
  696. mthca_cq_resize_copy_cqes(cq);
  697. tbuf = cq->buf;
  698. tcqe = cq->ibcq.cqe;
  699. cq->buf = cq->resize_buf->buf;
  700. cq->ibcq.cqe = cq->resize_buf->cqe;
  701. } else {
  702. tbuf = cq->resize_buf->buf;
  703. tcqe = cq->resize_buf->cqe;
  704. }
  705. kfree(cq->resize_buf);
  706. cq->resize_buf = NULL;
  707. spin_unlock_irq(&cq->lock);
  708. mthca_free_cq_buf(dev, &tbuf, tcqe);
  709. } else
  710. ibcq->cqe = entries - 1;
  711. out:
  712. mutex_unlock(&cq->mutex);
  713. return ret;
  714. }
  715. static int mthca_destroy_cq(struct ib_cq *cq)
  716. {
  717. if (cq->uobject) {
  718. mthca_unmap_user_db(to_mdev(cq->device),
  719. &to_mucontext(cq->uobject->context)->uar,
  720. to_mucontext(cq->uobject->context)->db_tab,
  721. to_mcq(cq)->arm_db_index);
  722. mthca_unmap_user_db(to_mdev(cq->device),
  723. &to_mucontext(cq->uobject->context)->uar,
  724. to_mucontext(cq->uobject->context)->db_tab,
  725. to_mcq(cq)->set_ci_db_index);
  726. }
  727. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  728. kfree(cq);
  729. return 0;
  730. }
  731. static inline u32 convert_access(int acc)
  732. {
  733. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  734. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  735. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  736. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  737. MTHCA_MPT_FLAG_LOCAL_READ;
  738. }
  739. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  740. {
  741. struct mthca_mr *mr;
  742. int err;
  743. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  744. if (!mr)
  745. return ERR_PTR(-ENOMEM);
  746. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  747. to_mpd(pd)->pd_num,
  748. convert_access(acc), mr);
  749. if (err) {
  750. kfree(mr);
  751. return ERR_PTR(err);
  752. }
  753. return &mr->ibmr;
  754. }
  755. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  756. struct ib_phys_buf *buffer_list,
  757. int num_phys_buf,
  758. int acc,
  759. u64 *iova_start)
  760. {
  761. struct mthca_mr *mr;
  762. u64 *page_list;
  763. u64 total_size;
  764. u64 mask;
  765. int shift;
  766. int npages;
  767. int err;
  768. int i, j, n;
  769. /* First check that we have enough alignment */
  770. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  771. return ERR_PTR(-EINVAL);
  772. mask = 0;
  773. total_size = 0;
  774. for (i = 0; i < num_phys_buf; ++i) {
  775. if (i != 0)
  776. mask |= buffer_list[i].addr;
  777. if (i != num_phys_buf - 1)
  778. mask |= buffer_list[i].addr + buffer_list[i].size;
  779. total_size += buffer_list[i].size;
  780. }
  781. if (mask & ~PAGE_MASK)
  782. return ERR_PTR(-EINVAL);
  783. /* Find largest page shift we can use to cover buffers */
  784. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  785. if (num_phys_buf > 1) {
  786. if ((1ULL << shift) & mask)
  787. break;
  788. } else {
  789. if (1ULL << shift >=
  790. buffer_list[0].size +
  791. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  792. break;
  793. }
  794. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  795. buffer_list[0].addr &= ~0ull << shift;
  796. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  797. if (!mr)
  798. return ERR_PTR(-ENOMEM);
  799. npages = 0;
  800. for (i = 0; i < num_phys_buf; ++i)
  801. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  802. if (!npages)
  803. return &mr->ibmr;
  804. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  805. if (!page_list) {
  806. kfree(mr);
  807. return ERR_PTR(-ENOMEM);
  808. }
  809. n = 0;
  810. for (i = 0; i < num_phys_buf; ++i)
  811. for (j = 0;
  812. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  813. ++j)
  814. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  815. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  816. "in PD %x; shift %d, npages %d.\n",
  817. (unsigned long long) buffer_list[0].addr,
  818. (unsigned long long) *iova_start,
  819. to_mpd(pd)->pd_num,
  820. shift, npages);
  821. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  822. to_mpd(pd)->pd_num,
  823. page_list, shift, npages,
  824. *iova_start, total_size,
  825. convert_access(acc), mr);
  826. if (err) {
  827. kfree(page_list);
  828. kfree(mr);
  829. return ERR_PTR(err);
  830. }
  831. kfree(page_list);
  832. return &mr->ibmr;
  833. }
  834. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  835. int acc, struct ib_udata *udata)
  836. {
  837. struct mthca_dev *dev = to_mdev(pd->device);
  838. struct ib_umem_chunk *chunk;
  839. struct mthca_mr *mr;
  840. u64 *pages;
  841. int shift, n, len;
  842. int i, j, k;
  843. int err = 0;
  844. int write_mtt_size;
  845. shift = ffs(region->page_size) - 1;
  846. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  847. if (!mr)
  848. return ERR_PTR(-ENOMEM);
  849. n = 0;
  850. list_for_each_entry(chunk, &region->chunk_list, list)
  851. n += chunk->nents;
  852. mr->mtt = mthca_alloc_mtt(dev, n);
  853. if (IS_ERR(mr->mtt)) {
  854. err = PTR_ERR(mr->mtt);
  855. goto err;
  856. }
  857. pages = (u64 *) __get_free_page(GFP_KERNEL);
  858. if (!pages) {
  859. err = -ENOMEM;
  860. goto err_mtt;
  861. }
  862. i = n = 0;
  863. write_mtt_size = min(mthca_write_mtt_size(dev), (int) (PAGE_SIZE / sizeof *pages));
  864. list_for_each_entry(chunk, &region->chunk_list, list)
  865. for (j = 0; j < chunk->nmap; ++j) {
  866. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  867. for (k = 0; k < len; ++k) {
  868. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  869. region->page_size * k;
  870. /*
  871. * Be friendly to write_mtt and pass it chunks
  872. * of appropriate size.
  873. */
  874. if (i == write_mtt_size) {
  875. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  876. if (err)
  877. goto mtt_done;
  878. n += i;
  879. i = 0;
  880. }
  881. }
  882. }
  883. if (i)
  884. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  885. mtt_done:
  886. free_page((unsigned long) pages);
  887. if (err)
  888. goto err_mtt;
  889. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  890. region->length, convert_access(acc), mr);
  891. if (err)
  892. goto err_mtt;
  893. return &mr->ibmr;
  894. err_mtt:
  895. mthca_free_mtt(dev, mr->mtt);
  896. err:
  897. kfree(mr);
  898. return ERR_PTR(err);
  899. }
  900. static int mthca_dereg_mr(struct ib_mr *mr)
  901. {
  902. struct mthca_mr *mmr = to_mmr(mr);
  903. mthca_free_mr(to_mdev(mr->device), mmr);
  904. kfree(mmr);
  905. return 0;
  906. }
  907. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  908. struct ib_fmr_attr *fmr_attr)
  909. {
  910. struct mthca_fmr *fmr;
  911. int err;
  912. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  913. if (!fmr)
  914. return ERR_PTR(-ENOMEM);
  915. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  916. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  917. convert_access(mr_access_flags), fmr);
  918. if (err) {
  919. kfree(fmr);
  920. return ERR_PTR(err);
  921. }
  922. return &fmr->ibmr;
  923. }
  924. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  925. {
  926. struct mthca_fmr *mfmr = to_mfmr(fmr);
  927. int err;
  928. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  929. if (err)
  930. return err;
  931. kfree(mfmr);
  932. return 0;
  933. }
  934. static int mthca_unmap_fmr(struct list_head *fmr_list)
  935. {
  936. struct ib_fmr *fmr;
  937. int err;
  938. u8 status;
  939. struct mthca_dev *mdev = NULL;
  940. list_for_each_entry(fmr, fmr_list, list) {
  941. if (mdev && to_mdev(fmr->device) != mdev)
  942. return -EINVAL;
  943. mdev = to_mdev(fmr->device);
  944. }
  945. if (!mdev)
  946. return 0;
  947. if (mthca_is_memfree(mdev)) {
  948. list_for_each_entry(fmr, fmr_list, list)
  949. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  950. wmb();
  951. } else
  952. list_for_each_entry(fmr, fmr_list, list)
  953. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  954. err = mthca_SYNC_TPT(mdev, &status);
  955. if (err)
  956. return err;
  957. if (status)
  958. return -EINVAL;
  959. return 0;
  960. }
  961. static ssize_t show_rev(struct class_device *cdev, char *buf)
  962. {
  963. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  964. return sprintf(buf, "%x\n", dev->rev_id);
  965. }
  966. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  967. {
  968. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  969. return sprintf(buf, "%d.%d.%d\n", (int) (dev->fw_ver >> 32),
  970. (int) (dev->fw_ver >> 16) & 0xffff,
  971. (int) dev->fw_ver & 0xffff);
  972. }
  973. static ssize_t show_hca(struct class_device *cdev, char *buf)
  974. {
  975. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  976. switch (dev->pdev->device) {
  977. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  978. return sprintf(buf, "MT23108\n");
  979. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  980. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  981. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  982. return sprintf(buf, "MT25208\n");
  983. case PCI_DEVICE_ID_MELLANOX_SINAI:
  984. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  985. return sprintf(buf, "MT25204\n");
  986. default:
  987. return sprintf(buf, "unknown\n");
  988. }
  989. }
  990. static ssize_t show_board(struct class_device *cdev, char *buf)
  991. {
  992. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  993. return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
  994. }
  995. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  996. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  997. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  998. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  999. static struct class_device_attribute *mthca_class_attributes[] = {
  1000. &class_device_attr_hw_rev,
  1001. &class_device_attr_fw_ver,
  1002. &class_device_attr_hca_type,
  1003. &class_device_attr_board_id
  1004. };
  1005. static int mthca_init_node_data(struct mthca_dev *dev)
  1006. {
  1007. struct ib_smp *in_mad = NULL;
  1008. struct ib_smp *out_mad = NULL;
  1009. int err = -ENOMEM;
  1010. u8 status;
  1011. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  1012. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  1013. if (!in_mad || !out_mad)
  1014. goto out;
  1015. init_query_mad(in_mad);
  1016. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  1017. err = mthca_MAD_IFC(dev, 1, 1,
  1018. 1, NULL, NULL, in_mad, out_mad,
  1019. &status);
  1020. if (err)
  1021. goto out;
  1022. if (status) {
  1023. err = -EINVAL;
  1024. goto out;
  1025. }
  1026. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  1027. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  1028. err = mthca_MAD_IFC(dev, 1, 1,
  1029. 1, NULL, NULL, in_mad, out_mad,
  1030. &status);
  1031. if (err)
  1032. goto out;
  1033. if (status) {
  1034. err = -EINVAL;
  1035. goto out;
  1036. }
  1037. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  1038. out:
  1039. kfree(in_mad);
  1040. kfree(out_mad);
  1041. return err;
  1042. }
  1043. int mthca_register_device(struct mthca_dev *dev)
  1044. {
  1045. int ret;
  1046. int i;
  1047. ret = mthca_init_node_data(dev);
  1048. if (ret)
  1049. return ret;
  1050. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  1051. dev->ib_dev.owner = THIS_MODULE;
  1052. dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
  1053. dev->ib_dev.uverbs_cmd_mask =
  1054. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1055. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1056. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1057. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1058. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1059. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1060. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1061. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1062. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1063. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1064. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1065. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1066. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1067. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1068. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1069. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1070. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
  1071. dev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1072. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  1073. dev->ib_dev.num_comp_vectors = 1;
  1074. dev->ib_dev.dma_device = &dev->pdev->dev;
  1075. dev->ib_dev.query_device = mthca_query_device;
  1076. dev->ib_dev.query_port = mthca_query_port;
  1077. dev->ib_dev.modify_device = mthca_modify_device;
  1078. dev->ib_dev.modify_port = mthca_modify_port;
  1079. dev->ib_dev.query_pkey = mthca_query_pkey;
  1080. dev->ib_dev.query_gid = mthca_query_gid;
  1081. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  1082. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  1083. dev->ib_dev.mmap = mthca_mmap_uar;
  1084. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  1085. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  1086. dev->ib_dev.create_ah = mthca_ah_create;
  1087. dev->ib_dev.query_ah = mthca_ah_query;
  1088. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  1089. if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
  1090. dev->ib_dev.create_srq = mthca_create_srq;
  1091. dev->ib_dev.modify_srq = mthca_modify_srq;
  1092. dev->ib_dev.query_srq = mthca_query_srq;
  1093. dev->ib_dev.destroy_srq = mthca_destroy_srq;
  1094. dev->ib_dev.uverbs_cmd_mask |=
  1095. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1096. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1097. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1098. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  1099. if (mthca_is_memfree(dev))
  1100. dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
  1101. else
  1102. dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
  1103. }
  1104. dev->ib_dev.create_qp = mthca_create_qp;
  1105. dev->ib_dev.modify_qp = mthca_modify_qp;
  1106. dev->ib_dev.query_qp = mthca_query_qp;
  1107. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  1108. dev->ib_dev.create_cq = mthca_create_cq;
  1109. dev->ib_dev.resize_cq = mthca_resize_cq;
  1110. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  1111. dev->ib_dev.poll_cq = mthca_poll_cq;
  1112. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  1113. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  1114. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  1115. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  1116. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  1117. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  1118. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  1119. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  1120. if (mthca_is_memfree(dev))
  1121. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  1122. else
  1123. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  1124. }
  1125. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  1126. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  1127. dev->ib_dev.process_mad = mthca_process_mad;
  1128. if (mthca_is_memfree(dev)) {
  1129. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  1130. dev->ib_dev.post_send = mthca_arbel_post_send;
  1131. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  1132. } else {
  1133. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  1134. dev->ib_dev.post_send = mthca_tavor_post_send;
  1135. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  1136. }
  1137. mutex_init(&dev->cap_mask_mutex);
  1138. ret = ib_register_device(&dev->ib_dev);
  1139. if (ret)
  1140. return ret;
  1141. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  1142. ret = class_device_create_file(&dev->ib_dev.class_dev,
  1143. mthca_class_attributes[i]);
  1144. if (ret) {
  1145. ib_unregister_device(&dev->ib_dev);
  1146. return ret;
  1147. }
  1148. }
  1149. mthca_start_catas_poll(dev);
  1150. return 0;
  1151. }
  1152. void mthca_unregister_device(struct mthca_dev *dev)
  1153. {
  1154. mthca_stop_catas_poll(dev);
  1155. ib_unregister_device(&dev->ib_dev);
  1156. }