onenand_base.c 54 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright (C) 2005-2006 Samsung Electronics
  5. * Kyungmin Park <kyungmin.park@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/mtd/mtd.h>
  18. #include <linux/mtd/onenand.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <asm/io.h>
  21. /**
  22. * onenand_oob_64 - oob info for large (2KB) page
  23. */
  24. static struct nand_ecclayout onenand_oob_64 = {
  25. .eccbytes = 20,
  26. .eccpos = {
  27. 8, 9, 10, 11, 12,
  28. 24, 25, 26, 27, 28,
  29. 40, 41, 42, 43, 44,
  30. 56, 57, 58, 59, 60,
  31. },
  32. .oobfree = {
  33. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  34. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  35. }
  36. };
  37. /**
  38. * onenand_oob_32 - oob info for middle (1KB) page
  39. */
  40. static struct nand_ecclayout onenand_oob_32 = {
  41. .eccbytes = 10,
  42. .eccpos = {
  43. 8, 9, 10, 11, 12,
  44. 24, 25, 26, 27, 28,
  45. },
  46. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  47. };
  48. static const unsigned char ffchars[] = {
  49. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  50. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  51. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  52. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  53. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  54. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  55. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  56. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  57. };
  58. /**
  59. * onenand_readw - [OneNAND Interface] Read OneNAND register
  60. * @param addr address to read
  61. *
  62. * Read OneNAND register
  63. */
  64. static unsigned short onenand_readw(void __iomem *addr)
  65. {
  66. return readw(addr);
  67. }
  68. /**
  69. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  70. * @param value value to write
  71. * @param addr address to write
  72. *
  73. * Write OneNAND register with value
  74. */
  75. static void onenand_writew(unsigned short value, void __iomem *addr)
  76. {
  77. writew(value, addr);
  78. }
  79. /**
  80. * onenand_block_address - [DEFAULT] Get block address
  81. * @param this onenand chip data structure
  82. * @param block the block
  83. * @return translated block address if DDP, otherwise same
  84. *
  85. * Setup Start Address 1 Register (F100h)
  86. */
  87. static int onenand_block_address(struct onenand_chip *this, int block)
  88. {
  89. if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  90. /* Device Flash Core select, NAND Flash Block Address */
  91. int dfs = 0;
  92. if (block & this->density_mask)
  93. dfs = 1;
  94. return (dfs << ONENAND_DDP_SHIFT) |
  95. (block & (this->density_mask - 1));
  96. }
  97. return block;
  98. }
  99. /**
  100. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  101. * @param this onenand chip data structure
  102. * @param block the block
  103. * @return set DBS value if DDP, otherwise 0
  104. *
  105. * Setup Start Address 2 Register (F101h) for DDP
  106. */
  107. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  108. {
  109. if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  110. /* Device BufferRAM Select */
  111. int dbs = 0;
  112. if (block & this->density_mask)
  113. dbs = 1;
  114. return (dbs << ONENAND_DDP_SHIFT);
  115. }
  116. return 0;
  117. }
  118. /**
  119. * onenand_page_address - [DEFAULT] Get page address
  120. * @param page the page address
  121. * @param sector the sector address
  122. * @return combined page and sector address
  123. *
  124. * Setup Start Address 8 Register (F107h)
  125. */
  126. static int onenand_page_address(int page, int sector)
  127. {
  128. /* Flash Page Address, Flash Sector Address */
  129. int fpa, fsa;
  130. fpa = page & ONENAND_FPA_MASK;
  131. fsa = sector & ONENAND_FSA_MASK;
  132. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  133. }
  134. /**
  135. * onenand_buffer_address - [DEFAULT] Get buffer address
  136. * @param dataram1 DataRAM index
  137. * @param sectors the sector address
  138. * @param count the number of sectors
  139. * @return the start buffer value
  140. *
  141. * Setup Start Buffer Register (F200h)
  142. */
  143. static int onenand_buffer_address(int dataram1, int sectors, int count)
  144. {
  145. int bsa, bsc;
  146. /* BufferRAM Sector Address */
  147. bsa = sectors & ONENAND_BSA_MASK;
  148. if (dataram1)
  149. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  150. else
  151. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  152. /* BufferRAM Sector Count */
  153. bsc = count & ONENAND_BSC_MASK;
  154. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  155. }
  156. /**
  157. * onenand_command - [DEFAULT] Send command to OneNAND device
  158. * @param mtd MTD device structure
  159. * @param cmd the command to be sent
  160. * @param addr offset to read from or write to
  161. * @param len number of bytes to read or write
  162. *
  163. * Send command to OneNAND device. This function is used for middle/large page
  164. * devices (1KB/2KB Bytes per page)
  165. */
  166. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
  167. {
  168. struct onenand_chip *this = mtd->priv;
  169. int value, readcmd = 0, block_cmd = 0;
  170. int block, page;
  171. /* Now we use page size operation */
  172. int sectors = 4, count = 4;
  173. /* Address translation */
  174. switch (cmd) {
  175. case ONENAND_CMD_UNLOCK:
  176. case ONENAND_CMD_LOCK:
  177. case ONENAND_CMD_LOCK_TIGHT:
  178. case ONENAND_CMD_UNLOCK_ALL:
  179. block = -1;
  180. page = -1;
  181. break;
  182. case ONENAND_CMD_ERASE:
  183. case ONENAND_CMD_BUFFERRAM:
  184. case ONENAND_CMD_OTP_ACCESS:
  185. block_cmd = 1;
  186. block = (int) (addr >> this->erase_shift);
  187. page = -1;
  188. break;
  189. default:
  190. block = (int) (addr >> this->erase_shift);
  191. page = (int) (addr >> this->page_shift);
  192. page &= this->page_mask;
  193. break;
  194. }
  195. /* NOTE: The setting order of the registers is very important! */
  196. if (cmd == ONENAND_CMD_BUFFERRAM) {
  197. /* Select DataRAM for DDP */
  198. value = onenand_bufferram_address(this, block);
  199. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  200. /* Switch to the next data buffer */
  201. ONENAND_SET_NEXT_BUFFERRAM(this);
  202. return 0;
  203. }
  204. if (block != -1) {
  205. /* Write 'DFS, FBA' of Flash */
  206. value = onenand_block_address(this, block);
  207. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  208. if (block_cmd) {
  209. /* Select DataRAM for DDP */
  210. value = onenand_bufferram_address(this, block);
  211. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  212. }
  213. }
  214. if (page != -1) {
  215. int dataram;
  216. switch (cmd) {
  217. case ONENAND_CMD_READ:
  218. case ONENAND_CMD_READOOB:
  219. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  220. readcmd = 1;
  221. break;
  222. default:
  223. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  224. break;
  225. }
  226. /* Write 'FPA, FSA' of Flash */
  227. value = onenand_page_address(page, sectors);
  228. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
  229. /* Write 'BSA, BSC' of DataRAM */
  230. value = onenand_buffer_address(dataram, sectors, count);
  231. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  232. if (readcmd) {
  233. /* Select DataRAM for DDP */
  234. value = onenand_bufferram_address(this, block);
  235. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  236. }
  237. }
  238. /* Interrupt clear */
  239. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  240. /* Write command */
  241. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  242. return 0;
  243. }
  244. /**
  245. * onenand_wait - [DEFAULT] wait until the command is done
  246. * @param mtd MTD device structure
  247. * @param state state to select the max. timeout value
  248. *
  249. * Wait for command done. This applies to all OneNAND command
  250. * Read can take up to 30us, erase up to 2ms and program up to 350us
  251. * according to general OneNAND specs
  252. */
  253. static int onenand_wait(struct mtd_info *mtd, int state)
  254. {
  255. struct onenand_chip * this = mtd->priv;
  256. unsigned long timeout;
  257. unsigned int flags = ONENAND_INT_MASTER;
  258. unsigned int interrupt = 0;
  259. unsigned int ctrl, ecc;
  260. /* The 20 msec is enough */
  261. timeout = jiffies + msecs_to_jiffies(20);
  262. while (time_before(jiffies, timeout)) {
  263. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  264. if (interrupt & flags)
  265. break;
  266. if (state != FL_READING)
  267. cond_resched();
  268. touch_softlockup_watchdog();
  269. }
  270. /* To get correct interrupt status in timeout case */
  271. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  272. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  273. if (ctrl & ONENAND_CTRL_ERROR) {
  274. /* It maybe occur at initial bad block */
  275. DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
  276. /* Clear other interrupt bits for preventing ECC error */
  277. interrupt &= ONENAND_INT_MASTER;
  278. }
  279. if (ctrl & ONENAND_CTRL_LOCK) {
  280. DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
  281. return -EACCES;
  282. }
  283. if (interrupt & ONENAND_INT_READ) {
  284. ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  285. if (ecc) {
  286. DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
  287. if (ecc & ONENAND_ECC_2BIT_ALL)
  288. mtd->ecc_stats.failed++;
  289. else if (ecc & ONENAND_ECC_1BIT_ALL)
  290. mtd->ecc_stats.corrected++;
  291. }
  292. }
  293. return 0;
  294. }
  295. /*
  296. * onenand_interrupt - [DEFAULT] onenand interrupt handler
  297. * @param irq onenand interrupt number
  298. * @param dev_id interrupt data
  299. *
  300. * complete the work
  301. */
  302. static irqreturn_t onenand_interrupt(int irq, void *data)
  303. {
  304. struct onenand_chip *this = (struct onenand_chip *) data;
  305. /* To handle shared interrupt */
  306. if (!this->complete.done)
  307. complete(&this->complete);
  308. return IRQ_HANDLED;
  309. }
  310. /*
  311. * onenand_interrupt_wait - [DEFAULT] wait until the command is done
  312. * @param mtd MTD device structure
  313. * @param state state to select the max. timeout value
  314. *
  315. * Wait for command done.
  316. */
  317. static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
  318. {
  319. struct onenand_chip *this = mtd->priv;
  320. /* To prevent soft lockup */
  321. touch_softlockup_watchdog();
  322. wait_for_completion(&this->complete);
  323. return onenand_wait(mtd, state);
  324. }
  325. /*
  326. * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
  327. * @param mtd MTD device structure
  328. * @param state state to select the max. timeout value
  329. *
  330. * Try interrupt based wait (It is used one-time)
  331. */
  332. static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
  333. {
  334. struct onenand_chip *this = mtd->priv;
  335. unsigned long remain, timeout;
  336. /* We use interrupt wait first */
  337. this->wait = onenand_interrupt_wait;
  338. /* To prevent soft lockup */
  339. touch_softlockup_watchdog();
  340. timeout = msecs_to_jiffies(100);
  341. remain = wait_for_completion_timeout(&this->complete, timeout);
  342. if (!remain) {
  343. printk(KERN_INFO "OneNAND: There's no interrupt. "
  344. "We use the normal wait\n");
  345. /* Release the irq */
  346. free_irq(this->irq, this);
  347. this->wait = onenand_wait;
  348. }
  349. return onenand_wait(mtd, state);
  350. }
  351. /*
  352. * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
  353. * @param mtd MTD device structure
  354. *
  355. * There's two method to wait onenand work
  356. * 1. polling - read interrupt status register
  357. * 2. interrupt - use the kernel interrupt method
  358. */
  359. static void onenand_setup_wait(struct mtd_info *mtd)
  360. {
  361. struct onenand_chip *this = mtd->priv;
  362. int syscfg;
  363. init_completion(&this->complete);
  364. if (this->irq <= 0) {
  365. this->wait = onenand_wait;
  366. return;
  367. }
  368. if (request_irq(this->irq, &onenand_interrupt,
  369. IRQF_SHARED, "onenand", this)) {
  370. /* If we can't get irq, use the normal wait */
  371. this->wait = onenand_wait;
  372. return;
  373. }
  374. /* Enable interrupt */
  375. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  376. syscfg |= ONENAND_SYS_CFG1_IOBE;
  377. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  378. this->wait = onenand_try_interrupt_wait;
  379. }
  380. /**
  381. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  382. * @param mtd MTD data structure
  383. * @param area BufferRAM area
  384. * @return offset given area
  385. *
  386. * Return BufferRAM offset given area
  387. */
  388. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  389. {
  390. struct onenand_chip *this = mtd->priv;
  391. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  392. if (area == ONENAND_DATARAM)
  393. return mtd->writesize;
  394. if (area == ONENAND_SPARERAM)
  395. return mtd->oobsize;
  396. }
  397. return 0;
  398. }
  399. /**
  400. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  401. * @param mtd MTD data structure
  402. * @param area BufferRAM area
  403. * @param buffer the databuffer to put/get data
  404. * @param offset offset to read from or write to
  405. * @param count number of bytes to read/write
  406. *
  407. * Read the BufferRAM area
  408. */
  409. static int onenand_read_bufferram(struct mtd_info *mtd, int area,
  410. unsigned char *buffer, int offset, size_t count)
  411. {
  412. struct onenand_chip *this = mtd->priv;
  413. void __iomem *bufferram;
  414. bufferram = this->base + area;
  415. bufferram += onenand_bufferram_offset(mtd, area);
  416. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  417. unsigned short word;
  418. /* Align with word(16-bit) size */
  419. count--;
  420. /* Read word and save byte */
  421. word = this->read_word(bufferram + offset + count);
  422. buffer[count] = (word & 0xff);
  423. }
  424. memcpy(buffer, bufferram + offset, count);
  425. return 0;
  426. }
  427. /**
  428. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  429. * @param mtd MTD data structure
  430. * @param area BufferRAM area
  431. * @param buffer the databuffer to put/get data
  432. * @param offset offset to read from or write to
  433. * @param count number of bytes to read/write
  434. *
  435. * Read the BufferRAM area with Sync. Burst Mode
  436. */
  437. static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
  438. unsigned char *buffer, int offset, size_t count)
  439. {
  440. struct onenand_chip *this = mtd->priv;
  441. void __iomem *bufferram;
  442. bufferram = this->base + area;
  443. bufferram += onenand_bufferram_offset(mtd, area);
  444. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  445. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  446. unsigned short word;
  447. /* Align with word(16-bit) size */
  448. count--;
  449. /* Read word and save byte */
  450. word = this->read_word(bufferram + offset + count);
  451. buffer[count] = (word & 0xff);
  452. }
  453. memcpy(buffer, bufferram + offset, count);
  454. this->mmcontrol(mtd, 0);
  455. return 0;
  456. }
  457. /**
  458. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  459. * @param mtd MTD data structure
  460. * @param area BufferRAM area
  461. * @param buffer the databuffer to put/get data
  462. * @param offset offset to read from or write to
  463. * @param count number of bytes to read/write
  464. *
  465. * Write the BufferRAM area
  466. */
  467. static int onenand_write_bufferram(struct mtd_info *mtd, int area,
  468. const unsigned char *buffer, int offset, size_t count)
  469. {
  470. struct onenand_chip *this = mtd->priv;
  471. void __iomem *bufferram;
  472. bufferram = this->base + area;
  473. bufferram += onenand_bufferram_offset(mtd, area);
  474. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  475. unsigned short word;
  476. int byte_offset;
  477. /* Align with word(16-bit) size */
  478. count--;
  479. /* Calculate byte access offset */
  480. byte_offset = offset + count;
  481. /* Read word and save byte */
  482. word = this->read_word(bufferram + byte_offset);
  483. word = (word & ~0xff) | buffer[count];
  484. this->write_word(word, bufferram + byte_offset);
  485. }
  486. memcpy(bufferram + offset, buffer, count);
  487. return 0;
  488. }
  489. /**
  490. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  491. * @param mtd MTD data structure
  492. * @param addr address to check
  493. * @return 1 if there are valid data, otherwise 0
  494. *
  495. * Check bufferram if there is data we required
  496. */
  497. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  498. {
  499. struct onenand_chip *this = mtd->priv;
  500. int block, page;
  501. int i;
  502. block = (int) (addr >> this->erase_shift);
  503. page = (int) (addr >> this->page_shift);
  504. page &= this->page_mask;
  505. i = ONENAND_CURRENT_BUFFERRAM(this);
  506. /* Is there valid data? */
  507. if (this->bufferram[i].block == block &&
  508. this->bufferram[i].page == page &&
  509. this->bufferram[i].valid)
  510. return 1;
  511. return 0;
  512. }
  513. /**
  514. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  515. * @param mtd MTD data structure
  516. * @param addr address to update
  517. * @param valid valid flag
  518. *
  519. * Update BufferRAM information
  520. */
  521. static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  522. int valid)
  523. {
  524. struct onenand_chip *this = mtd->priv;
  525. int block, page;
  526. int i;
  527. block = (int) (addr >> this->erase_shift);
  528. page = (int) (addr >> this->page_shift);
  529. page &= this->page_mask;
  530. /* Invalidate BufferRAM */
  531. for (i = 0; i < MAX_BUFFERRAM; i++) {
  532. if (this->bufferram[i].block == block &&
  533. this->bufferram[i].page == page)
  534. this->bufferram[i].valid = 0;
  535. }
  536. /* Update BufferRAM */
  537. i = ONENAND_CURRENT_BUFFERRAM(this);
  538. this->bufferram[i].block = block;
  539. this->bufferram[i].page = page;
  540. this->bufferram[i].valid = valid;
  541. return 0;
  542. }
  543. /**
  544. * onenand_get_device - [GENERIC] Get chip for selected access
  545. * @param mtd MTD device structure
  546. * @param new_state the state which is requested
  547. *
  548. * Get the device and lock it for exclusive access
  549. */
  550. static int onenand_get_device(struct mtd_info *mtd, int new_state)
  551. {
  552. struct onenand_chip *this = mtd->priv;
  553. DECLARE_WAITQUEUE(wait, current);
  554. /*
  555. * Grab the lock and see if the device is available
  556. */
  557. while (1) {
  558. spin_lock(&this->chip_lock);
  559. if (this->state == FL_READY) {
  560. this->state = new_state;
  561. spin_unlock(&this->chip_lock);
  562. break;
  563. }
  564. if (new_state == FL_PM_SUSPENDED) {
  565. spin_unlock(&this->chip_lock);
  566. return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
  567. }
  568. set_current_state(TASK_UNINTERRUPTIBLE);
  569. add_wait_queue(&this->wq, &wait);
  570. spin_unlock(&this->chip_lock);
  571. schedule();
  572. remove_wait_queue(&this->wq, &wait);
  573. }
  574. return 0;
  575. }
  576. /**
  577. * onenand_release_device - [GENERIC] release chip
  578. * @param mtd MTD device structure
  579. *
  580. * Deselect, release chip lock and wake up anyone waiting on the device
  581. */
  582. static void onenand_release_device(struct mtd_info *mtd)
  583. {
  584. struct onenand_chip *this = mtd->priv;
  585. /* Release the chip */
  586. spin_lock(&this->chip_lock);
  587. this->state = FL_READY;
  588. wake_up(&this->wq);
  589. spin_unlock(&this->chip_lock);
  590. }
  591. /**
  592. * onenand_read - [MTD Interface] Read data from flash
  593. * @param mtd MTD device structure
  594. * @param from offset to read from
  595. * @param len number of bytes to read
  596. * @param retlen pointer to variable to store the number of read bytes
  597. * @param buf the databuffer to put data
  598. *
  599. * Read with ecc
  600. */
  601. static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  602. size_t *retlen, u_char *buf)
  603. {
  604. struct onenand_chip *this = mtd->priv;
  605. struct mtd_ecc_stats stats;
  606. int read = 0, column;
  607. int thislen;
  608. int ret = 0;
  609. DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
  610. /* Do not allow reads past end of device */
  611. if ((from + len) > mtd->size) {
  612. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
  613. *retlen = 0;
  614. return -EINVAL;
  615. }
  616. /* Grab the lock and see if the device is available */
  617. onenand_get_device(mtd, FL_READING);
  618. /* TODO handling oob */
  619. stats = mtd->ecc_stats;
  620. while (read < len) {
  621. thislen = min_t(int, mtd->writesize, len - read);
  622. column = from & (mtd->writesize - 1);
  623. if (column + thislen > mtd->writesize)
  624. thislen = mtd->writesize - column;
  625. if (!onenand_check_bufferram(mtd, from)) {
  626. this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
  627. ret = this->wait(mtd, FL_READING);
  628. /* First copy data and check return value for ECC handling */
  629. onenand_update_bufferram(mtd, from, 1);
  630. }
  631. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  632. read += thislen;
  633. if (read == len)
  634. break;
  635. if (ret) {
  636. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
  637. goto out;
  638. }
  639. from += thislen;
  640. buf += thislen;
  641. }
  642. out:
  643. /* Deselect and wake up anyone waiting on the device */
  644. onenand_release_device(mtd);
  645. /*
  646. * Return success, if no ECC failures, else -EBADMSG
  647. * fs driver will take care of that, because
  648. * retlen == desired len and result == -EBADMSG
  649. */
  650. *retlen = read;
  651. if (mtd->ecc_stats.failed - stats.failed)
  652. return -EBADMSG;
  653. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  654. }
  655. /**
  656. * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
  657. * @param mtd MTD device structure
  658. * @param from offset to read from
  659. * @param len number of bytes to read
  660. * @param retlen pointer to variable to store the number of read bytes
  661. * @param buf the databuffer to put data
  662. *
  663. * OneNAND read out-of-band data from the spare area
  664. */
  665. int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
  666. size_t *retlen, u_char *buf)
  667. {
  668. struct onenand_chip *this = mtd->priv;
  669. int read = 0, thislen, column;
  670. int ret = 0;
  671. DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
  672. /* Initialize return length value */
  673. *retlen = 0;
  674. /* Do not allow reads past end of device */
  675. if (unlikely((from + len) > mtd->size)) {
  676. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
  677. return -EINVAL;
  678. }
  679. /* Grab the lock and see if the device is available */
  680. onenand_get_device(mtd, FL_READING);
  681. column = from & (mtd->oobsize - 1);
  682. while (read < len) {
  683. thislen = mtd->oobsize - column;
  684. thislen = min_t(int, thislen, len);
  685. this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
  686. onenand_update_bufferram(mtd, from, 0);
  687. ret = this->wait(mtd, FL_READING);
  688. /* First copy data and check return value for ECC handling */
  689. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  690. read += thislen;
  691. if (read == len)
  692. break;
  693. if (ret) {
  694. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
  695. goto out;
  696. }
  697. buf += thislen;
  698. /* Read more? */
  699. if (read < len) {
  700. /* Page size */
  701. from += mtd->writesize;
  702. column = 0;
  703. }
  704. }
  705. out:
  706. /* Deselect and wake up anyone waiting on the device */
  707. onenand_release_device(mtd);
  708. *retlen = read;
  709. return ret;
  710. }
  711. /**
  712. * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
  713. * @mtd: MTD device structure
  714. * @from: offset to read from
  715. * @ops: oob operation description structure
  716. */
  717. static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  718. struct mtd_oob_ops *ops)
  719. {
  720. BUG_ON(ops->mode != MTD_OOB_PLACE);
  721. return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->len,
  722. &ops->retlen, ops->oobbuf);
  723. }
  724. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  725. /**
  726. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  727. * @param mtd MTD device structure
  728. * @param buf the databuffer to verify
  729. * @param to offset to read from
  730. * @param len number of bytes to read and compare
  731. *
  732. */
  733. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
  734. {
  735. struct onenand_chip *this = mtd->priv;
  736. char *readp = this->page_buf;
  737. int column = to & (mtd->oobsize - 1);
  738. int status, i;
  739. this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
  740. onenand_update_bufferram(mtd, to, 0);
  741. status = this->wait(mtd, FL_READING);
  742. if (status)
  743. return status;
  744. this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
  745. for(i = 0; i < len; i++)
  746. if (buf[i] != 0xFF && buf[i] != readp[i])
  747. return -EBADMSG;
  748. return 0;
  749. }
  750. /**
  751. * onenand_verify_page - [GENERIC] verify the chip contents after a write
  752. * @param mtd MTD device structure
  753. * @param buf the databuffer to verify
  754. *
  755. * Check DataRAM area directly
  756. */
  757. static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
  758. {
  759. struct onenand_chip *this = mtd->priv;
  760. void __iomem *dataram0, *dataram1;
  761. int ret = 0;
  762. this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
  763. ret = this->wait(mtd, FL_READING);
  764. if (ret)
  765. return ret;
  766. onenand_update_bufferram(mtd, addr, 1);
  767. /* Check, if the two dataram areas are same */
  768. dataram0 = this->base + ONENAND_DATARAM;
  769. dataram1 = dataram0 + mtd->writesize;
  770. if (memcmp(dataram0, dataram1, mtd->writesize))
  771. return -EBADMSG;
  772. return 0;
  773. }
  774. #else
  775. #define onenand_verify_page(...) (0)
  776. #define onenand_verify_oob(...) (0)
  777. #endif
  778. #define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
  779. /**
  780. * onenand_write - [MTD Interface] write buffer to FLASH
  781. * @param mtd MTD device structure
  782. * @param to offset to write to
  783. * @param len number of bytes to write
  784. * @param retlen pointer to variable to store the number of written bytes
  785. * @param buf the data to write
  786. *
  787. * Write with ECC
  788. */
  789. static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  790. size_t *retlen, const u_char *buf)
  791. {
  792. struct onenand_chip *this = mtd->priv;
  793. int written = 0;
  794. int ret = 0;
  795. DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
  796. /* Initialize retlen, in case of early exit */
  797. *retlen = 0;
  798. /* Do not allow writes past end of device */
  799. if (unlikely((to + len) > mtd->size)) {
  800. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
  801. return -EINVAL;
  802. }
  803. /* Reject writes, which are not page aligned */
  804. if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
  805. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
  806. return -EINVAL;
  807. }
  808. /* Grab the lock and see if the device is available */
  809. onenand_get_device(mtd, FL_WRITING);
  810. /* Loop until all data write */
  811. while (written < len) {
  812. int thislen = min_t(int, mtd->writesize, len - written);
  813. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
  814. this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
  815. this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
  816. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  817. onenand_update_bufferram(mtd, to, 1);
  818. ret = this->wait(mtd, FL_WRITING);
  819. if (ret) {
  820. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
  821. goto out;
  822. }
  823. written += thislen;
  824. /* Only check verify write turn on */
  825. ret = onenand_verify_page(mtd, (u_char *) buf, to);
  826. if (ret) {
  827. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
  828. goto out;
  829. }
  830. if (written == len)
  831. break;
  832. to += thislen;
  833. buf += thislen;
  834. }
  835. out:
  836. /* Deselect and wake up anyone waiting on the device */
  837. onenand_release_device(mtd);
  838. *retlen = written;
  839. return ret;
  840. }
  841. /**
  842. * onenand_do_write_oob - [Internal] OneNAND write out-of-band
  843. * @param mtd MTD device structure
  844. * @param to offset to write to
  845. * @param len number of bytes to write
  846. * @param retlen pointer to variable to store the number of written bytes
  847. * @param buf the data to write
  848. *
  849. * OneNAND write out-of-band
  850. */
  851. static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
  852. size_t *retlen, const u_char *buf)
  853. {
  854. struct onenand_chip *this = mtd->priv;
  855. int column, ret = 0;
  856. int written = 0;
  857. DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
  858. /* Initialize retlen, in case of early exit */
  859. *retlen = 0;
  860. /* Do not allow writes past end of device */
  861. if (unlikely((to + len) > mtd->size)) {
  862. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
  863. return -EINVAL;
  864. }
  865. /* Grab the lock and see if the device is available */
  866. onenand_get_device(mtd, FL_WRITING);
  867. /* Loop until all data write */
  868. while (written < len) {
  869. int thislen = min_t(int, mtd->oobsize, len - written);
  870. column = to & (mtd->oobsize - 1);
  871. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  872. /* We send data to spare ram with oobsize
  873. * to prevent byte access */
  874. memset(this->page_buf, 0xff, mtd->oobsize);
  875. memcpy(this->page_buf + column, buf, thislen);
  876. this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
  877. this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
  878. onenand_update_bufferram(mtd, to, 0);
  879. ret = this->wait(mtd, FL_WRITING);
  880. if (ret) {
  881. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
  882. goto out;
  883. }
  884. ret = onenand_verify_oob(mtd, buf, to, thislen);
  885. if (ret) {
  886. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
  887. goto out;
  888. }
  889. written += thislen;
  890. if (written == len)
  891. break;
  892. to += thislen;
  893. buf += thislen;
  894. }
  895. out:
  896. /* Deselect and wake up anyone waiting on the device */
  897. onenand_release_device(mtd);
  898. *retlen = written;
  899. return ret;
  900. }
  901. /**
  902. * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  903. * @mtd: MTD device structure
  904. * @from: offset to read from
  905. * @ops: oob operation description structure
  906. */
  907. static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  908. struct mtd_oob_ops *ops)
  909. {
  910. BUG_ON(ops->mode != MTD_OOB_PLACE);
  911. return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->len,
  912. &ops->retlen, ops->oobbuf);
  913. }
  914. /**
  915. * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
  916. * @param mtd MTD device structure
  917. * @param ofs offset from device start
  918. * @param getchip 0, if the chip is already selected
  919. * @param allowbbt 1, if its allowed to access the bbt area
  920. *
  921. * Check, if the block is bad. Either by reading the bad block table or
  922. * calling of the scan function.
  923. */
  924. static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
  925. {
  926. struct onenand_chip *this = mtd->priv;
  927. struct bbm_info *bbm = this->bbm;
  928. /* Return info from the table */
  929. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  930. }
  931. /**
  932. * onenand_erase - [MTD Interface] erase block(s)
  933. * @param mtd MTD device structure
  934. * @param instr erase instruction
  935. *
  936. * Erase one ore more blocks
  937. */
  938. static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  939. {
  940. struct onenand_chip *this = mtd->priv;
  941. unsigned int block_size;
  942. loff_t addr;
  943. int len;
  944. int ret = 0;
  945. DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
  946. block_size = (1 << this->erase_shift);
  947. /* Start address must align on block boundary */
  948. if (unlikely(instr->addr & (block_size - 1))) {
  949. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
  950. return -EINVAL;
  951. }
  952. /* Length must align on block boundary */
  953. if (unlikely(instr->len & (block_size - 1))) {
  954. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
  955. return -EINVAL;
  956. }
  957. /* Do not allow erase past end of device */
  958. if (unlikely((instr->len + instr->addr) > mtd->size)) {
  959. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
  960. return -EINVAL;
  961. }
  962. instr->fail_addr = 0xffffffff;
  963. /* Grab the lock and see if the device is available */
  964. onenand_get_device(mtd, FL_ERASING);
  965. /* Loop throught the pages */
  966. len = instr->len;
  967. addr = instr->addr;
  968. instr->state = MTD_ERASING;
  969. while (len) {
  970. /* Check if we have a bad block, we do not erase bad blocks */
  971. if (onenand_block_checkbad(mtd, addr, 0, 0)) {
  972. printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
  973. instr->state = MTD_ERASE_FAILED;
  974. goto erase_exit;
  975. }
  976. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  977. ret = this->wait(mtd, FL_ERASING);
  978. /* Check, if it is write protected */
  979. if (ret) {
  980. if (ret == -EPERM)
  981. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
  982. else
  983. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
  984. instr->state = MTD_ERASE_FAILED;
  985. instr->fail_addr = addr;
  986. goto erase_exit;
  987. }
  988. len -= block_size;
  989. addr += block_size;
  990. }
  991. instr->state = MTD_ERASE_DONE;
  992. erase_exit:
  993. ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
  994. /* Do call back function */
  995. if (!ret)
  996. mtd_erase_callback(instr);
  997. /* Deselect and wake up anyone waiting on the device */
  998. onenand_release_device(mtd);
  999. return ret;
  1000. }
  1001. /**
  1002. * onenand_sync - [MTD Interface] sync
  1003. * @param mtd MTD device structure
  1004. *
  1005. * Sync is actually a wait for chip ready function
  1006. */
  1007. static void onenand_sync(struct mtd_info *mtd)
  1008. {
  1009. DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
  1010. /* Grab the lock and see if the device is available */
  1011. onenand_get_device(mtd, FL_SYNCING);
  1012. /* Release it and go back */
  1013. onenand_release_device(mtd);
  1014. }
  1015. /**
  1016. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  1017. * @param mtd MTD device structure
  1018. * @param ofs offset relative to mtd start
  1019. *
  1020. * Check whether the block is bad
  1021. */
  1022. static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  1023. {
  1024. /* Check for invalid offset */
  1025. if (ofs > mtd->size)
  1026. return -EINVAL;
  1027. return onenand_block_checkbad(mtd, ofs, 1, 0);
  1028. }
  1029. /**
  1030. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  1031. * @param mtd MTD device structure
  1032. * @param ofs offset from device start
  1033. *
  1034. * This is the default implementation, which can be overridden by
  1035. * a hardware specific driver.
  1036. */
  1037. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1038. {
  1039. struct onenand_chip *this = mtd->priv;
  1040. struct bbm_info *bbm = this->bbm;
  1041. u_char buf[2] = {0, 0};
  1042. size_t retlen;
  1043. int block;
  1044. /* Get block number */
  1045. block = ((int) ofs) >> bbm->bbt_erase_shift;
  1046. if (bbm->bbt)
  1047. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  1048. /* We write two bytes, so we dont have to mess with 16 bit access */
  1049. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  1050. return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
  1051. }
  1052. /**
  1053. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  1054. * @param mtd MTD device structure
  1055. * @param ofs offset relative to mtd start
  1056. *
  1057. * Mark the block as bad
  1058. */
  1059. static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1060. {
  1061. struct onenand_chip *this = mtd->priv;
  1062. int ret;
  1063. ret = onenand_block_isbad(mtd, ofs);
  1064. if (ret) {
  1065. /* If it was bad already, return success and do nothing */
  1066. if (ret > 0)
  1067. return 0;
  1068. return ret;
  1069. }
  1070. return this->block_markbad(mtd, ofs);
  1071. }
  1072. /**
  1073. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  1074. * @param mtd MTD device structure
  1075. * @param ofs offset relative to mtd start
  1076. * @param len number of bytes to lock or unlock
  1077. *
  1078. * Lock or unlock one or more blocks
  1079. */
  1080. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  1081. {
  1082. struct onenand_chip *this = mtd->priv;
  1083. int start, end, block, value, status;
  1084. int wp_status_mask;
  1085. start = ofs >> this->erase_shift;
  1086. end = len >> this->erase_shift;
  1087. if (cmd == ONENAND_CMD_LOCK)
  1088. wp_status_mask = ONENAND_WP_LS;
  1089. else
  1090. wp_status_mask = ONENAND_WP_US;
  1091. /* Continuous lock scheme */
  1092. if (this->options & ONENAND_HAS_CONT_LOCK) {
  1093. /* Set start block address */
  1094. this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1095. /* Set end block address */
  1096. this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  1097. /* Write lock command */
  1098. this->command(mtd, cmd, 0, 0);
  1099. /* There's no return value */
  1100. this->wait(mtd, FL_LOCKING);
  1101. /* Sanity check */
  1102. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1103. & ONENAND_CTRL_ONGO)
  1104. continue;
  1105. /* Check lock status */
  1106. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1107. if (!(status & wp_status_mask))
  1108. printk(KERN_ERR "wp status = 0x%x\n", status);
  1109. return 0;
  1110. }
  1111. /* Block lock scheme */
  1112. for (block = start; block < start + end; block++) {
  1113. /* Set block address */
  1114. value = onenand_block_address(this, block);
  1115. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1116. /* Select DataRAM for DDP */
  1117. value = onenand_bufferram_address(this, block);
  1118. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1119. /* Set start block address */
  1120. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1121. /* Write lock command */
  1122. this->command(mtd, cmd, 0, 0);
  1123. /* There's no return value */
  1124. this->wait(mtd, FL_LOCKING);
  1125. /* Sanity check */
  1126. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1127. & ONENAND_CTRL_ONGO)
  1128. continue;
  1129. /* Check lock status */
  1130. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1131. if (!(status & wp_status_mask))
  1132. printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
  1133. }
  1134. return 0;
  1135. }
  1136. /**
  1137. * onenand_lock - [MTD Interface] Lock block(s)
  1138. * @param mtd MTD device structure
  1139. * @param ofs offset relative to mtd start
  1140. * @param len number of bytes to unlock
  1141. *
  1142. * Lock one or more blocks
  1143. */
  1144. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1145. {
  1146. return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  1147. }
  1148. /**
  1149. * onenand_unlock - [MTD Interface] Unlock block(s)
  1150. * @param mtd MTD device structure
  1151. * @param ofs offset relative to mtd start
  1152. * @param len number of bytes to unlock
  1153. *
  1154. * Unlock one or more blocks
  1155. */
  1156. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1157. {
  1158. return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  1159. }
  1160. /**
  1161. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  1162. * @param this onenand chip data structure
  1163. *
  1164. * Check lock status
  1165. */
  1166. static void onenand_check_lock_status(struct onenand_chip *this)
  1167. {
  1168. unsigned int value, block, status;
  1169. unsigned int end;
  1170. end = this->chipsize >> this->erase_shift;
  1171. for (block = 0; block < end; block++) {
  1172. /* Set block address */
  1173. value = onenand_block_address(this, block);
  1174. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1175. /* Select DataRAM for DDP */
  1176. value = onenand_bufferram_address(this, block);
  1177. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1178. /* Set start block address */
  1179. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1180. /* Check lock status */
  1181. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1182. if (!(status & ONENAND_WP_US))
  1183. printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
  1184. }
  1185. }
  1186. /**
  1187. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  1188. * @param mtd MTD device structure
  1189. *
  1190. * Unlock all blocks
  1191. */
  1192. static int onenand_unlock_all(struct mtd_info *mtd)
  1193. {
  1194. struct onenand_chip *this = mtd->priv;
  1195. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  1196. /* Write unlock command */
  1197. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  1198. /* There's no return value */
  1199. this->wait(mtd, FL_LOCKING);
  1200. /* Sanity check */
  1201. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1202. & ONENAND_CTRL_ONGO)
  1203. continue;
  1204. /* Workaround for all block unlock in DDP */
  1205. if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  1206. loff_t ofs;
  1207. size_t len;
  1208. /* 1st block on another chip */
  1209. ofs = this->chipsize >> 1;
  1210. len = 1 << this->erase_shift;
  1211. onenand_unlock(mtd, ofs, len);
  1212. }
  1213. onenand_check_lock_status(this);
  1214. return 0;
  1215. }
  1216. onenand_unlock(mtd, 0x0, this->chipsize);
  1217. return 0;
  1218. }
  1219. #ifdef CONFIG_MTD_ONENAND_OTP
  1220. /* Interal OTP operation */
  1221. typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
  1222. size_t *retlen, u_char *buf);
  1223. /**
  1224. * do_otp_read - [DEFAULT] Read OTP block area
  1225. * @param mtd MTD device structure
  1226. * @param from The offset to read
  1227. * @param len number of bytes to read
  1228. * @param retlen pointer to variable to store the number of readbytes
  1229. * @param buf the databuffer to put/get data
  1230. *
  1231. * Read OTP block area.
  1232. */
  1233. static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
  1234. size_t *retlen, u_char *buf)
  1235. {
  1236. struct onenand_chip *this = mtd->priv;
  1237. int ret;
  1238. /* Enter OTP access mode */
  1239. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1240. this->wait(mtd, FL_OTPING);
  1241. ret = mtd->read(mtd, from, len, retlen, buf);
  1242. /* Exit OTP access mode */
  1243. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1244. this->wait(mtd, FL_RESETING);
  1245. return ret;
  1246. }
  1247. /**
  1248. * do_otp_write - [DEFAULT] Write OTP block area
  1249. * @param mtd MTD device structure
  1250. * @param from The offset to write
  1251. * @param len number of bytes to write
  1252. * @param retlen pointer to variable to store the number of write bytes
  1253. * @param buf the databuffer to put/get data
  1254. *
  1255. * Write OTP block area.
  1256. */
  1257. static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
  1258. size_t *retlen, u_char *buf)
  1259. {
  1260. struct onenand_chip *this = mtd->priv;
  1261. unsigned char *pbuf = buf;
  1262. int ret;
  1263. /* Force buffer page aligned */
  1264. if (len < mtd->writesize) {
  1265. memcpy(this->page_buf, buf, len);
  1266. memset(this->page_buf + len, 0xff, mtd->writesize - len);
  1267. pbuf = this->page_buf;
  1268. len = mtd->writesize;
  1269. }
  1270. /* Enter OTP access mode */
  1271. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1272. this->wait(mtd, FL_OTPING);
  1273. ret = mtd->write(mtd, from, len, retlen, pbuf);
  1274. /* Exit OTP access mode */
  1275. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1276. this->wait(mtd, FL_RESETING);
  1277. return ret;
  1278. }
  1279. /**
  1280. * do_otp_lock - [DEFAULT] Lock OTP block area
  1281. * @param mtd MTD device structure
  1282. * @param from The offset to lock
  1283. * @param len number of bytes to lock
  1284. * @param retlen pointer to variable to store the number of lock bytes
  1285. * @param buf the databuffer to put/get data
  1286. *
  1287. * Lock OTP block area.
  1288. */
  1289. static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
  1290. size_t *retlen, u_char *buf)
  1291. {
  1292. struct onenand_chip *this = mtd->priv;
  1293. int ret;
  1294. /* Enter OTP access mode */
  1295. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1296. this->wait(mtd, FL_OTPING);
  1297. ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
  1298. /* Exit OTP access mode */
  1299. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1300. this->wait(mtd, FL_RESETING);
  1301. return ret;
  1302. }
  1303. /**
  1304. * onenand_otp_walk - [DEFAULT] Handle OTP operation
  1305. * @param mtd MTD device structure
  1306. * @param from The offset to read/write
  1307. * @param len number of bytes to read/write
  1308. * @param retlen pointer to variable to store the number of read bytes
  1309. * @param buf the databuffer to put/get data
  1310. * @param action do given action
  1311. * @param mode specify user and factory
  1312. *
  1313. * Handle OTP operation.
  1314. */
  1315. static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
  1316. size_t *retlen, u_char *buf,
  1317. otp_op_t action, int mode)
  1318. {
  1319. struct onenand_chip *this = mtd->priv;
  1320. int otp_pages;
  1321. int density;
  1322. int ret = 0;
  1323. *retlen = 0;
  1324. density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1325. if (density < ONENAND_DEVICE_DENSITY_512Mb)
  1326. otp_pages = 20;
  1327. else
  1328. otp_pages = 10;
  1329. if (mode == MTD_OTP_FACTORY) {
  1330. from += mtd->writesize * otp_pages;
  1331. otp_pages = 64 - otp_pages;
  1332. }
  1333. /* Check User/Factory boundary */
  1334. if (((mtd->writesize * otp_pages) - (from + len)) < 0)
  1335. return 0;
  1336. while (len > 0 && otp_pages > 0) {
  1337. if (!action) { /* OTP Info functions */
  1338. struct otp_info *otpinfo;
  1339. len -= sizeof(struct otp_info);
  1340. if (len <= 0)
  1341. return -ENOSPC;
  1342. otpinfo = (struct otp_info *) buf;
  1343. otpinfo->start = from;
  1344. otpinfo->length = mtd->writesize;
  1345. otpinfo->locked = 0;
  1346. from += mtd->writesize;
  1347. buf += sizeof(struct otp_info);
  1348. *retlen += sizeof(struct otp_info);
  1349. } else {
  1350. size_t tmp_retlen;
  1351. int size = len;
  1352. ret = action(mtd, from, len, &tmp_retlen, buf);
  1353. buf += size;
  1354. len -= size;
  1355. *retlen += size;
  1356. if (ret < 0)
  1357. return ret;
  1358. }
  1359. otp_pages--;
  1360. }
  1361. return 0;
  1362. }
  1363. /**
  1364. * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
  1365. * @param mtd MTD device structure
  1366. * @param buf the databuffer to put/get data
  1367. * @param len number of bytes to read
  1368. *
  1369. * Read factory OTP info.
  1370. */
  1371. static int onenand_get_fact_prot_info(struct mtd_info *mtd,
  1372. struct otp_info *buf, size_t len)
  1373. {
  1374. size_t retlen;
  1375. int ret;
  1376. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
  1377. return ret ? : retlen;
  1378. }
  1379. /**
  1380. * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
  1381. * @param mtd MTD device structure
  1382. * @param from The offset to read
  1383. * @param len number of bytes to read
  1384. * @param retlen pointer to variable to store the number of read bytes
  1385. * @param buf the databuffer to put/get data
  1386. *
  1387. * Read factory OTP area.
  1388. */
  1389. static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
  1390. size_t len, size_t *retlen, u_char *buf)
  1391. {
  1392. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
  1393. }
  1394. /**
  1395. * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
  1396. * @param mtd MTD device structure
  1397. * @param buf the databuffer to put/get data
  1398. * @param len number of bytes to read
  1399. *
  1400. * Read user OTP info.
  1401. */
  1402. static int onenand_get_user_prot_info(struct mtd_info *mtd,
  1403. struct otp_info *buf, size_t len)
  1404. {
  1405. size_t retlen;
  1406. int ret;
  1407. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
  1408. return ret ? : retlen;
  1409. }
  1410. /**
  1411. * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
  1412. * @param mtd MTD device structure
  1413. * @param from The offset to read
  1414. * @param len number of bytes to read
  1415. * @param retlen pointer to variable to store the number of read bytes
  1416. * @param buf the databuffer to put/get data
  1417. *
  1418. * Read user OTP area.
  1419. */
  1420. static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1421. size_t len, size_t *retlen, u_char *buf)
  1422. {
  1423. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
  1424. }
  1425. /**
  1426. * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
  1427. * @param mtd MTD device structure
  1428. * @param from The offset to write
  1429. * @param len number of bytes to write
  1430. * @param retlen pointer to variable to store the number of write bytes
  1431. * @param buf the databuffer to put/get data
  1432. *
  1433. * Write user OTP area.
  1434. */
  1435. static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1436. size_t len, size_t *retlen, u_char *buf)
  1437. {
  1438. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
  1439. }
  1440. /**
  1441. * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
  1442. * @param mtd MTD device structure
  1443. * @param from The offset to lock
  1444. * @param len number of bytes to unlock
  1445. *
  1446. * Write lock mark on spare area in page 0 in OTP block
  1447. */
  1448. static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1449. size_t len)
  1450. {
  1451. unsigned char oob_buf[64];
  1452. size_t retlen;
  1453. int ret;
  1454. memset(oob_buf, 0xff, mtd->oobsize);
  1455. /*
  1456. * Note: OTP lock operation
  1457. * OTP block : 0xXXFC
  1458. * 1st block : 0xXXF3 (If chip support)
  1459. * Both : 0xXXF0 (If chip support)
  1460. */
  1461. oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
  1462. /*
  1463. * Write lock mark to 8th word of sector0 of page0 of the spare0.
  1464. * We write 16 bytes spare area instead of 2 bytes.
  1465. */
  1466. from = 0;
  1467. len = 16;
  1468. ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
  1469. return ret ? : retlen;
  1470. }
  1471. #endif /* CONFIG_MTD_ONENAND_OTP */
  1472. /**
  1473. * onenand_lock_scheme - Check and set OneNAND lock scheme
  1474. * @param mtd MTD data structure
  1475. *
  1476. * Check and set OneNAND lock scheme
  1477. */
  1478. static void onenand_lock_scheme(struct mtd_info *mtd)
  1479. {
  1480. struct onenand_chip *this = mtd->priv;
  1481. unsigned int density, process;
  1482. /* Lock scheme depends on density and process */
  1483. density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1484. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  1485. /* Lock scheme */
  1486. if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
  1487. /* A-Die has all block unlock */
  1488. if (process) {
  1489. printk(KERN_DEBUG "Chip support all block unlock\n");
  1490. this->options |= ONENAND_HAS_UNLOCK_ALL;
  1491. }
  1492. } else {
  1493. /* Some OneNAND has continues lock scheme */
  1494. if (!process) {
  1495. printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
  1496. this->options |= ONENAND_HAS_CONT_LOCK;
  1497. }
  1498. }
  1499. }
  1500. /**
  1501. * onenand_print_device_info - Print device ID
  1502. * @param device device ID
  1503. *
  1504. * Print device ID
  1505. */
  1506. static void onenand_print_device_info(int device, int version)
  1507. {
  1508. int vcc, demuxed, ddp, density;
  1509. vcc = device & ONENAND_DEVICE_VCC_MASK;
  1510. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  1511. ddp = device & ONENAND_DEVICE_IS_DDP;
  1512. density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
  1513. printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
  1514. demuxed ? "" : "Muxed ",
  1515. ddp ? "(DDP)" : "",
  1516. (16 << density),
  1517. vcc ? "2.65/3.3" : "1.8",
  1518. device);
  1519. printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
  1520. }
  1521. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  1522. {ONENAND_MFR_SAMSUNG, "Samsung"},
  1523. };
  1524. /**
  1525. * onenand_check_maf - Check manufacturer ID
  1526. * @param manuf manufacturer ID
  1527. *
  1528. * Check manufacturer ID
  1529. */
  1530. static int onenand_check_maf(int manuf)
  1531. {
  1532. int size = ARRAY_SIZE(onenand_manuf_ids);
  1533. char *name;
  1534. int i;
  1535. for (i = 0; i < size; i++)
  1536. if (manuf == onenand_manuf_ids[i].id)
  1537. break;
  1538. if (i < size)
  1539. name = onenand_manuf_ids[i].name;
  1540. else
  1541. name = "Unknown";
  1542. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  1543. return (i == size);
  1544. }
  1545. /**
  1546. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  1547. * @param mtd MTD device structure
  1548. *
  1549. * OneNAND detection method:
  1550. * Compare the the values from command with ones from register
  1551. */
  1552. static int onenand_probe(struct mtd_info *mtd)
  1553. {
  1554. struct onenand_chip *this = mtd->priv;
  1555. int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
  1556. int density;
  1557. int syscfg;
  1558. /* Save system configuration 1 */
  1559. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  1560. /* Clear Sync. Burst Read mode to read BootRAM */
  1561. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
  1562. /* Send the command for reading device ID from BootRAM */
  1563. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  1564. /* Read manufacturer and device IDs from BootRAM */
  1565. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  1566. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  1567. /* Reset OneNAND to read default register values */
  1568. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  1569. /* Wait reset */
  1570. this->wait(mtd, FL_RESETING);
  1571. /* Restore system configuration 1 */
  1572. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  1573. /* Check manufacturer ID */
  1574. if (onenand_check_maf(bram_maf_id))
  1575. return -ENXIO;
  1576. /* Read manufacturer and device IDs from Register */
  1577. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  1578. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  1579. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  1580. /* Check OneNAND device */
  1581. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  1582. return -ENXIO;
  1583. /* Flash device information */
  1584. onenand_print_device_info(dev_id, ver_id);
  1585. this->device_id = dev_id;
  1586. this->version_id = ver_id;
  1587. density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1588. this->chipsize = (16 << density) << 20;
  1589. /* Set density mask. it is used for DDP */
  1590. this->density_mask = (1 << (density + 6));
  1591. /* OneNAND page size & block size */
  1592. /* The data buffer size is equal to page size */
  1593. mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  1594. mtd->oobsize = mtd->writesize >> 5;
  1595. /* Pagers per block is always 64 in OneNAND */
  1596. mtd->erasesize = mtd->writesize << 6;
  1597. this->erase_shift = ffs(mtd->erasesize) - 1;
  1598. this->page_shift = ffs(mtd->writesize) - 1;
  1599. this->ppb_shift = (this->erase_shift - this->page_shift);
  1600. this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
  1601. /* REVIST: Multichip handling */
  1602. mtd->size = this->chipsize;
  1603. /* Check OneNAND lock scheme */
  1604. onenand_lock_scheme(mtd);
  1605. return 0;
  1606. }
  1607. /**
  1608. * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
  1609. * @param mtd MTD device structure
  1610. */
  1611. static int onenand_suspend(struct mtd_info *mtd)
  1612. {
  1613. return onenand_get_device(mtd, FL_PM_SUSPENDED);
  1614. }
  1615. /**
  1616. * onenand_resume - [MTD Interface] Resume the OneNAND flash
  1617. * @param mtd MTD device structure
  1618. */
  1619. static void onenand_resume(struct mtd_info *mtd)
  1620. {
  1621. struct onenand_chip *this = mtd->priv;
  1622. if (this->state == FL_PM_SUSPENDED)
  1623. onenand_release_device(mtd);
  1624. else
  1625. printk(KERN_ERR "resume() called for the chip which is not"
  1626. "in suspended state\n");
  1627. }
  1628. /**
  1629. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  1630. * @param mtd MTD device structure
  1631. * @param maxchips Number of chips to scan for
  1632. *
  1633. * This fills out all the not initialized function pointers
  1634. * with the defaults.
  1635. * The flash ID is read and the mtd/chip structures are
  1636. * filled with the appropriate values.
  1637. */
  1638. int onenand_scan(struct mtd_info *mtd, int maxchips)
  1639. {
  1640. struct onenand_chip *this = mtd->priv;
  1641. if (!this->read_word)
  1642. this->read_word = onenand_readw;
  1643. if (!this->write_word)
  1644. this->write_word = onenand_writew;
  1645. if (!this->command)
  1646. this->command = onenand_command;
  1647. if (!this->wait)
  1648. onenand_setup_wait(mtd);
  1649. if (!this->read_bufferram)
  1650. this->read_bufferram = onenand_read_bufferram;
  1651. if (!this->write_bufferram)
  1652. this->write_bufferram = onenand_write_bufferram;
  1653. if (!this->block_markbad)
  1654. this->block_markbad = onenand_default_block_markbad;
  1655. if (!this->scan_bbt)
  1656. this->scan_bbt = onenand_default_bbt;
  1657. if (onenand_probe(mtd))
  1658. return -ENXIO;
  1659. /* Set Sync. Burst Read after probing */
  1660. if (this->mmcontrol) {
  1661. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  1662. this->read_bufferram = onenand_sync_read_bufferram;
  1663. }
  1664. /* Allocate buffers, if necessary */
  1665. if (!this->page_buf) {
  1666. size_t len;
  1667. len = mtd->writesize + mtd->oobsize;
  1668. this->page_buf = kmalloc(len, GFP_KERNEL);
  1669. if (!this->page_buf) {
  1670. printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
  1671. return -ENOMEM;
  1672. }
  1673. this->options |= ONENAND_PAGEBUF_ALLOC;
  1674. }
  1675. this->state = FL_READY;
  1676. init_waitqueue_head(&this->wq);
  1677. spin_lock_init(&this->chip_lock);
  1678. switch (mtd->oobsize) {
  1679. case 64:
  1680. this->ecclayout = &onenand_oob_64;
  1681. break;
  1682. case 32:
  1683. this->ecclayout = &onenand_oob_32;
  1684. break;
  1685. default:
  1686. printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
  1687. mtd->oobsize);
  1688. /* To prevent kernel oops */
  1689. this->ecclayout = &onenand_oob_32;
  1690. break;
  1691. }
  1692. mtd->ecclayout = this->ecclayout;
  1693. /* Fill in remaining MTD driver data */
  1694. mtd->type = MTD_NANDFLASH;
  1695. mtd->flags = MTD_CAP_NANDFLASH;
  1696. mtd->ecctype = MTD_ECC_SW;
  1697. mtd->erase = onenand_erase;
  1698. mtd->point = NULL;
  1699. mtd->unpoint = NULL;
  1700. mtd->read = onenand_read;
  1701. mtd->write = onenand_write;
  1702. mtd->read_oob = onenand_read_oob;
  1703. mtd->write_oob = onenand_write_oob;
  1704. #ifdef CONFIG_MTD_ONENAND_OTP
  1705. mtd->get_fact_prot_info = onenand_get_fact_prot_info;
  1706. mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
  1707. mtd->get_user_prot_info = onenand_get_user_prot_info;
  1708. mtd->read_user_prot_reg = onenand_read_user_prot_reg;
  1709. mtd->write_user_prot_reg = onenand_write_user_prot_reg;
  1710. mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
  1711. #endif
  1712. mtd->sync = onenand_sync;
  1713. mtd->lock = onenand_lock;
  1714. mtd->unlock = onenand_unlock;
  1715. mtd->suspend = onenand_suspend;
  1716. mtd->resume = onenand_resume;
  1717. mtd->block_isbad = onenand_block_isbad;
  1718. mtd->block_markbad = onenand_block_markbad;
  1719. mtd->owner = THIS_MODULE;
  1720. /* Unlock whole block */
  1721. onenand_unlock_all(mtd);
  1722. return this->scan_bbt(mtd);
  1723. }
  1724. /**
  1725. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  1726. * @param mtd MTD device structure
  1727. */
  1728. void onenand_release(struct mtd_info *mtd)
  1729. {
  1730. struct onenand_chip *this = mtd->priv;
  1731. #ifdef CONFIG_MTD_PARTITIONS
  1732. /* Deregister partitions */
  1733. del_mtd_partitions (mtd);
  1734. #endif
  1735. /* Deregister the device */
  1736. del_mtd_device (mtd);
  1737. /* Free bad block table memory, if allocated */
  1738. if (this->bbm)
  1739. kfree(this->bbm);
  1740. /* Buffer allocated by onenand_scan */
  1741. if (this->options & ONENAND_PAGEBUF_ALLOC)
  1742. kfree(this->page_buf);
  1743. }
  1744. EXPORT_SYMBOL_GPL(onenand_scan);
  1745. EXPORT_SYMBOL_GPL(onenand_release);
  1746. MODULE_LICENSE("GPL");
  1747. MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
  1748. MODULE_DESCRIPTION("Generic OneNAND flash driver code");