patch_sigmatel.c 117 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include <sound/tlv.h>
  35. #include "hda_codec.h"
  36. #include "hda_local.h"
  37. #include "hda_auto_parser.h"
  38. #include "hda_beep.h"
  39. #include "hda_jack.h"
  40. #include "hda_generic.h"
  41. enum {
  42. STAC_VREF_EVENT = 8,
  43. STAC_PWR_EVENT,
  44. };
  45. enum {
  46. STAC_REF,
  47. STAC_9200_OQO,
  48. STAC_9200_DELL_D21,
  49. STAC_9200_DELL_D22,
  50. STAC_9200_DELL_D23,
  51. STAC_9200_DELL_M21,
  52. STAC_9200_DELL_M22,
  53. STAC_9200_DELL_M23,
  54. STAC_9200_DELL_M24,
  55. STAC_9200_DELL_M25,
  56. STAC_9200_DELL_M26,
  57. STAC_9200_DELL_M27,
  58. STAC_9200_M4,
  59. STAC_9200_M4_2,
  60. STAC_9200_PANASONIC,
  61. STAC_9200_EAPD_INIT,
  62. STAC_9200_MODELS
  63. };
  64. enum {
  65. STAC_9205_REF,
  66. STAC_9205_DELL_M42,
  67. STAC_9205_DELL_M43,
  68. STAC_9205_DELL_M44,
  69. STAC_9205_EAPD,
  70. STAC_9205_MODELS
  71. };
  72. enum {
  73. STAC_92HD73XX_NO_JD, /* no jack-detection */
  74. STAC_92HD73XX_REF,
  75. STAC_92HD73XX_INTEL,
  76. STAC_DELL_M6_AMIC,
  77. STAC_DELL_M6_DMIC,
  78. STAC_DELL_M6_BOTH,
  79. STAC_DELL_EQ,
  80. STAC_ALIENWARE_M17X,
  81. STAC_92HD73XX_MODELS
  82. };
  83. enum {
  84. STAC_92HD83XXX_REF,
  85. STAC_92HD83XXX_PWR_REF,
  86. STAC_DELL_S14,
  87. STAC_DELL_VOSTRO_3500,
  88. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  89. STAC_HP_DV7_4000,
  90. STAC_HP_ZEPHYR,
  91. STAC_92HD83XXX_HP_LED,
  92. STAC_92HD83XXX_HP_INV_LED,
  93. STAC_92HD83XXX_HP_MIC_LED,
  94. STAC_92HD83XXX_HEADSET_JACK,
  95. STAC_92HD83XXX_HP,
  96. STAC_HP_ENVY_BASS,
  97. STAC_92HD83XXX_MODELS
  98. };
  99. enum {
  100. STAC_92HD71BXX_REF,
  101. STAC_DELL_M4_1,
  102. STAC_DELL_M4_2,
  103. STAC_DELL_M4_3,
  104. STAC_HP_M4,
  105. STAC_HP_DV4,
  106. STAC_HP_DV5,
  107. STAC_HP_HDX,
  108. STAC_92HD71BXX_HP,
  109. STAC_92HD71BXX_NO_DMIC,
  110. STAC_92HD71BXX_NO_SMUX,
  111. STAC_92HD71BXX_MODELS
  112. };
  113. enum {
  114. STAC_925x_REF,
  115. STAC_M1,
  116. STAC_M1_2,
  117. STAC_M2,
  118. STAC_M2_2,
  119. STAC_M3,
  120. STAC_M5,
  121. STAC_M6,
  122. STAC_925x_MODELS
  123. };
  124. enum {
  125. STAC_D945_REF,
  126. STAC_D945GTP3,
  127. STAC_D945GTP5,
  128. STAC_INTEL_MAC_V1,
  129. STAC_INTEL_MAC_V2,
  130. STAC_INTEL_MAC_V3,
  131. STAC_INTEL_MAC_V4,
  132. STAC_INTEL_MAC_V5,
  133. STAC_INTEL_MAC_AUTO,
  134. STAC_ECS_202,
  135. STAC_922X_DELL_D81,
  136. STAC_922X_DELL_D82,
  137. STAC_922X_DELL_M81,
  138. STAC_922X_DELL_M82,
  139. STAC_922X_INTEL_MAC_GPIO,
  140. STAC_922X_MODELS
  141. };
  142. enum {
  143. STAC_D965_REF_NO_JD, /* no jack-detection */
  144. STAC_D965_REF,
  145. STAC_D965_3ST,
  146. STAC_D965_5ST,
  147. STAC_D965_5ST_NO_FP,
  148. STAC_D965_VERBS,
  149. STAC_DELL_3ST,
  150. STAC_DELL_BIOS,
  151. STAC_DELL_BIOS_SPDIF,
  152. STAC_927X_DELL_DMIC,
  153. STAC_927X_VOLKNOB,
  154. STAC_927X_MODELS
  155. };
  156. enum {
  157. STAC_9872_VAIO,
  158. STAC_9872_MODELS
  159. };
  160. struct sigmatel_spec {
  161. struct hda_gen_spec gen;
  162. unsigned int eapd_switch: 1;
  163. unsigned int linear_tone_beep:1;
  164. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  165. unsigned int volknob_init:1; /* special volume-knob initialization */
  166. unsigned int powerdown_adcs:1;
  167. unsigned int have_spdif_mux:1;
  168. /* gpio lines */
  169. unsigned int eapd_mask;
  170. unsigned int gpio_mask;
  171. unsigned int gpio_dir;
  172. unsigned int gpio_data;
  173. unsigned int gpio_mute;
  174. unsigned int gpio_led;
  175. unsigned int gpio_led_polarity;
  176. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  177. unsigned int vref_led;
  178. int default_polarity;
  179. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  180. bool mic_mute_led_on; /* current mic mute state */
  181. /* stream */
  182. unsigned int stream_delay;
  183. /* analog loopback */
  184. const struct snd_kcontrol_new *aloopback_ctl;
  185. unsigned int aloopback;
  186. unsigned char aloopback_mask;
  187. unsigned char aloopback_shift;
  188. /* power management */
  189. unsigned int power_map_bits;
  190. unsigned int num_pwrs;
  191. const hda_nid_t *pwr_nids;
  192. unsigned int active_adcs;
  193. /* beep widgets */
  194. hda_nid_t anabeep_nid;
  195. hda_nid_t digbeep_nid;
  196. /* SPDIF-out mux */
  197. const char * const *spdif_labels;
  198. struct hda_input_mux spdif_mux;
  199. unsigned int cur_smux[2];
  200. };
  201. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  202. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  203. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  204. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  205. 0x0f, 0x10, 0x11
  206. };
  207. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  208. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  209. 0x0f, 0x10
  210. };
  211. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  212. 0x0a, 0x0d, 0x0f
  213. };
  214. /*
  215. * PCM hooks
  216. */
  217. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  218. struct hda_codec *codec,
  219. struct snd_pcm_substream *substream,
  220. int action)
  221. {
  222. struct sigmatel_spec *spec = codec->spec;
  223. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  224. msleep(spec->stream_delay);
  225. }
  226. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  227. struct hda_codec *codec,
  228. struct snd_pcm_substream *substream,
  229. int action)
  230. {
  231. struct sigmatel_spec *spec = codec->spec;
  232. int i, idx = 0;
  233. if (!spec->powerdown_adcs)
  234. return;
  235. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  236. if (spec->gen.all_adcs[i] == hinfo->nid) {
  237. idx = i;
  238. break;
  239. }
  240. }
  241. switch (action) {
  242. case HDA_GEN_PCM_ACT_OPEN:
  243. msleep(40);
  244. snd_hda_codec_write(codec, hinfo->nid, 0,
  245. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  246. spec->active_adcs |= (1 << idx);
  247. break;
  248. case HDA_GEN_PCM_ACT_CLOSE:
  249. snd_hda_codec_write(codec, hinfo->nid, 0,
  250. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  251. spec->active_adcs &= ~(1 << idx);
  252. break;
  253. }
  254. }
  255. /*
  256. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  257. * funky external mute control using GPIO pins.
  258. */
  259. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  260. unsigned int dir_mask, unsigned int data)
  261. {
  262. unsigned int gpiostate, gpiomask, gpiodir;
  263. snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  264. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  265. AC_VERB_GET_GPIO_DATA, 0);
  266. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  267. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  268. AC_VERB_GET_GPIO_MASK, 0);
  269. gpiomask |= mask;
  270. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  271. AC_VERB_GET_GPIO_DIRECTION, 0);
  272. gpiodir |= dir_mask;
  273. /* Configure GPIOx as CMOS */
  274. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  275. snd_hda_codec_write(codec, codec->afg, 0,
  276. AC_VERB_SET_GPIO_MASK, gpiomask);
  277. snd_hda_codec_read(codec, codec->afg, 0,
  278. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  279. msleep(1);
  280. snd_hda_codec_read(codec, codec->afg, 0,
  281. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  282. }
  283. /* hook for controlling mic-mute LED GPIO */
  284. static void stac_capture_led_hook(struct hda_codec *codec,
  285. struct snd_ctl_elem_value *ucontrol)
  286. {
  287. struct sigmatel_spec *spec = codec->spec;
  288. bool mute;
  289. if (!ucontrol)
  290. return;
  291. mute = !(ucontrol->value.integer.value[0] ||
  292. ucontrol->value.integer.value[1]);
  293. if (spec->mic_mute_led_on != mute) {
  294. spec->mic_mute_led_on = mute;
  295. if (mute)
  296. spec->gpio_data |= spec->mic_mute_led_gpio;
  297. else
  298. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  299. stac_gpio_set(codec, spec->gpio_mask,
  300. spec->gpio_dir, spec->gpio_data);
  301. }
  302. }
  303. static int stac_vrefout_set(struct hda_codec *codec,
  304. hda_nid_t nid, unsigned int new_vref)
  305. {
  306. int error, pinctl;
  307. snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
  308. pinctl = snd_hda_codec_read(codec, nid, 0,
  309. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  310. if (pinctl < 0)
  311. return pinctl;
  312. pinctl &= 0xff;
  313. pinctl &= ~AC_PINCTL_VREFEN;
  314. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  315. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  316. if (error < 0)
  317. return error;
  318. return 1;
  319. }
  320. /* update mute-LED accoring to the master switch */
  321. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  322. {
  323. struct sigmatel_spec *spec = codec->spec;
  324. int muted = !enabled;
  325. if (!spec->gpio_led)
  326. return;
  327. /* LED state is inverted on these systems */
  328. if (spec->gpio_led_polarity)
  329. muted = !muted;
  330. if (!spec->vref_mute_led_nid) {
  331. if (muted)
  332. spec->gpio_data |= spec->gpio_led;
  333. else
  334. spec->gpio_data &= ~spec->gpio_led;
  335. stac_gpio_set(codec, spec->gpio_mask,
  336. spec->gpio_dir, spec->gpio_data);
  337. } else {
  338. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  339. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  340. spec->vref_led);
  341. }
  342. }
  343. /* vmaster hook to update mute LED */
  344. static void stac_vmaster_hook(void *private_data, int val)
  345. {
  346. stac_update_led_status(private_data, val);
  347. }
  348. /* automute hook to handle GPIO mute and EAPD updates */
  349. static void stac_update_outputs(struct hda_codec *codec)
  350. {
  351. struct sigmatel_spec *spec = codec->spec;
  352. if (spec->gpio_mute)
  353. spec->gen.master_mute =
  354. !(snd_hda_codec_read(codec, codec->afg, 0,
  355. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  356. snd_hda_gen_update_outputs(codec);
  357. if (spec->eapd_mask && spec->eapd_switch) {
  358. unsigned int val = spec->gpio_data;
  359. if (spec->gen.speaker_muted)
  360. val &= ~spec->eapd_mask;
  361. else
  362. val |= spec->eapd_mask;
  363. if (spec->gpio_data != val)
  364. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  365. val);
  366. }
  367. }
  368. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  369. bool enable, bool do_write)
  370. {
  371. struct sigmatel_spec *spec = codec->spec;
  372. unsigned int idx, val;
  373. for (idx = 0; idx < spec->num_pwrs; idx++) {
  374. if (spec->pwr_nids[idx] == nid)
  375. break;
  376. }
  377. if (idx >= spec->num_pwrs)
  378. return;
  379. idx = 1 << idx;
  380. val = spec->power_map_bits;
  381. if (enable)
  382. val &= ~idx;
  383. else
  384. val |= idx;
  385. /* power down unused output ports */
  386. if (val != spec->power_map_bits) {
  387. spec->power_map_bits = val;
  388. if (do_write)
  389. snd_hda_codec_write(codec, codec->afg, 0,
  390. AC_VERB_IDT_SET_POWER_MAP, val);
  391. }
  392. }
  393. /* update power bit per jack plug/unplug */
  394. static void jack_update_power(struct hda_codec *codec,
  395. struct hda_jack_tbl *jack)
  396. {
  397. struct sigmatel_spec *spec = codec->spec;
  398. int i;
  399. if (!spec->num_pwrs)
  400. return;
  401. if (jack && jack->nid) {
  402. stac_toggle_power_map(codec, jack->nid,
  403. snd_hda_jack_detect(codec, jack->nid),
  404. true);
  405. return;
  406. }
  407. /* update all jacks */
  408. for (i = 0; i < spec->num_pwrs; i++) {
  409. hda_nid_t nid = spec->pwr_nids[i];
  410. jack = snd_hda_jack_tbl_get(codec, nid);
  411. if (!jack || !jack->action)
  412. continue;
  413. if (jack->action == STAC_PWR_EVENT ||
  414. jack->action <= HDA_GEN_LAST_EVENT)
  415. stac_toggle_power_map(codec, nid,
  416. snd_hda_jack_detect(codec, nid),
  417. false);
  418. }
  419. snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
  420. spec->power_map_bits);
  421. }
  422. static void stac_hp_automute(struct hda_codec *codec,
  423. struct hda_jack_tbl *jack)
  424. {
  425. snd_hda_gen_hp_automute(codec, jack);
  426. jack_update_power(codec, jack);
  427. }
  428. static void stac_line_automute(struct hda_codec *codec,
  429. struct hda_jack_tbl *jack)
  430. {
  431. snd_hda_gen_line_automute(codec, jack);
  432. jack_update_power(codec, jack);
  433. }
  434. static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
  435. {
  436. unsigned int data;
  437. data = snd_hda_codec_read(codec, codec->afg, 0,
  438. AC_VERB_GET_GPIO_DATA, 0);
  439. /* toggle VREF state based on GPIOx status */
  440. snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
  441. !!(data & (1 << event->private_data)));
  442. }
  443. /* initialize the power map and enable the power event to jacks that
  444. * haven't been assigned to automute
  445. */
  446. static void stac_init_power_map(struct hda_codec *codec)
  447. {
  448. struct sigmatel_spec *spec = codec->spec;
  449. int i;
  450. for (i = 0; i < spec->num_pwrs; i++) {
  451. hda_nid_t nid = spec->pwr_nids[i];
  452. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  453. def_conf = get_defcfg_connect(def_conf);
  454. if (snd_hda_jack_tbl_get(codec, nid))
  455. continue;
  456. if (def_conf == AC_JACK_PORT_COMPLEX &&
  457. !(spec->vref_mute_led_nid == nid ||
  458. is_jack_detectable(codec, nid))) {
  459. snd_hda_jack_detect_enable_callback(codec, nid,
  460. STAC_PWR_EVENT,
  461. jack_update_power);
  462. } else {
  463. if (def_conf == AC_JACK_PORT_NONE)
  464. stac_toggle_power_map(codec, nid, false, false);
  465. else
  466. stac_toggle_power_map(codec, nid, true, false);
  467. }
  468. }
  469. }
  470. /*
  471. */
  472. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  473. int *valp)
  474. {
  475. return !snd_hda_get_int_hint(codec, key, valp);
  476. }
  477. /* override some hints from the hwdep entry */
  478. static void stac_store_hints(struct hda_codec *codec)
  479. {
  480. struct sigmatel_spec *spec = codec->spec;
  481. int val;
  482. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  483. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  484. spec->gpio_mask;
  485. }
  486. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  487. spec->gpio_mask &= spec->gpio_mask;
  488. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  489. spec->gpio_dir &= spec->gpio_mask;
  490. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  491. spec->eapd_mask &= spec->gpio_mask;
  492. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  493. spec->gpio_mute &= spec->gpio_mask;
  494. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  495. if (val >= 0)
  496. spec->eapd_switch = val;
  497. }
  498. /*
  499. * loopback controls
  500. */
  501. #define stac_aloopback_info snd_ctl_boolean_mono_info
  502. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  503. struct snd_ctl_elem_value *ucontrol)
  504. {
  505. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  506. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  507. struct sigmatel_spec *spec = codec->spec;
  508. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  509. (spec->aloopback_mask << idx));
  510. return 0;
  511. }
  512. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  513. struct snd_ctl_elem_value *ucontrol)
  514. {
  515. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  516. struct sigmatel_spec *spec = codec->spec;
  517. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  518. unsigned int dac_mode;
  519. unsigned int val, idx_val;
  520. idx_val = spec->aloopback_mask << idx;
  521. if (ucontrol->value.integer.value[0])
  522. val = spec->aloopback | idx_val;
  523. else
  524. val = spec->aloopback & ~idx_val;
  525. if (spec->aloopback == val)
  526. return 0;
  527. spec->aloopback = val;
  528. /* Only return the bits defined by the shift value of the
  529. * first two bytes of the mask
  530. */
  531. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  532. kcontrol->private_value & 0xFFFF, 0x0);
  533. dac_mode >>= spec->aloopback_shift;
  534. if (spec->aloopback & idx_val) {
  535. snd_hda_power_up(codec);
  536. dac_mode |= idx_val;
  537. } else {
  538. snd_hda_power_down(codec);
  539. dac_mode &= ~idx_val;
  540. }
  541. snd_hda_codec_write_cache(codec, codec->afg, 0,
  542. kcontrol->private_value >> 16, dac_mode);
  543. return 1;
  544. }
  545. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  546. { \
  547. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  548. .name = "Analog Loopback", \
  549. .count = cnt, \
  550. .info = stac_aloopback_info, \
  551. .get = stac_aloopback_get, \
  552. .put = stac_aloopback_put, \
  553. .private_value = verb_read | (verb_write << 16), \
  554. }
  555. /*
  556. * Mute LED handling on HP laptops
  557. */
  558. /* check whether it's a HP laptop with a docking port */
  559. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  560. {
  561. if (codec->vendor_id != 0x111d7605 &&
  562. codec->vendor_id != 0x111d76d1)
  563. return false;
  564. switch (codec->subsystem_id) {
  565. case 0x103c1618:
  566. case 0x103c1619:
  567. case 0x103c161a:
  568. case 0x103c161b:
  569. case 0x103c161c:
  570. case 0x103c161d:
  571. case 0x103c161e:
  572. case 0x103c161f:
  573. case 0x103c162a:
  574. case 0x103c162b:
  575. case 0x103c1630:
  576. case 0x103c1631:
  577. case 0x103c1633:
  578. case 0x103c1634:
  579. case 0x103c1635:
  580. case 0x103c3587:
  581. case 0x103c3588:
  582. case 0x103c3589:
  583. case 0x103c358a:
  584. case 0x103c3667:
  585. case 0x103c3668:
  586. case 0x103c3669:
  587. return true;
  588. }
  589. return false;
  590. }
  591. static bool hp_blike_system(u32 subsystem_id)
  592. {
  593. switch (subsystem_id) {
  594. case 0x103c1520:
  595. case 0x103c1521:
  596. case 0x103c1523:
  597. case 0x103c1524:
  598. case 0x103c1525:
  599. case 0x103c1722:
  600. case 0x103c1723:
  601. case 0x103c1724:
  602. case 0x103c1725:
  603. case 0x103c1726:
  604. case 0x103c1727:
  605. case 0x103c1728:
  606. case 0x103c1729:
  607. case 0x103c172a:
  608. case 0x103c172b:
  609. case 0x103c307e:
  610. case 0x103c307f:
  611. case 0x103c3080:
  612. case 0x103c3081:
  613. case 0x103c7007:
  614. case 0x103c7008:
  615. return true;
  616. }
  617. return false;
  618. }
  619. static void set_hp_led_gpio(struct hda_codec *codec)
  620. {
  621. struct sigmatel_spec *spec = codec->spec;
  622. unsigned int gpio;
  623. if (spec->gpio_led)
  624. return;
  625. gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
  626. gpio &= AC_GPIO_IO_COUNT;
  627. if (gpio > 3)
  628. spec->gpio_led = 0x08; /* GPIO 3 */
  629. else
  630. spec->gpio_led = 0x01; /* GPIO 0 */
  631. }
  632. /*
  633. * This method searches for the mute LED GPIO configuration
  634. * provided as OEM string in SMBIOS. The format of that string
  635. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  636. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  637. * that corresponds to the NOT muted state of the master volume
  638. * and G is the index of the GPIO to use as the mute LED control (0..9)
  639. * If _G portion is missing it is assigned based on the codec ID
  640. *
  641. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  642. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  643. *
  644. *
  645. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  646. * SMBIOS - at least the ones I have seen do not have them - which include
  647. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  648. * HP Pavilion dv9500t CTO.
  649. * Need more information on whether it is true across the entire series.
  650. * -- kunal
  651. */
  652. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  653. {
  654. struct sigmatel_spec *spec = codec->spec;
  655. const struct dmi_device *dev = NULL;
  656. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  657. get_int_hint(codec, "gpio_led_polarity",
  658. &spec->gpio_led_polarity);
  659. return 1;
  660. }
  661. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  662. if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
  663. &spec->gpio_led_polarity,
  664. &spec->gpio_led) == 2) {
  665. unsigned int max_gpio;
  666. max_gpio = snd_hda_param_read(codec, codec->afg,
  667. AC_PAR_GPIO_CAP);
  668. max_gpio &= AC_GPIO_IO_COUNT;
  669. if (spec->gpio_led < max_gpio)
  670. spec->gpio_led = 1 << spec->gpio_led;
  671. else
  672. spec->vref_mute_led_nid = spec->gpio_led;
  673. return 1;
  674. }
  675. if (sscanf(dev->name, "HP_Mute_LED_%d",
  676. &spec->gpio_led_polarity) == 1) {
  677. set_hp_led_gpio(codec);
  678. return 1;
  679. }
  680. /* BIOS bug: unfilled OEM string */
  681. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  682. set_hp_led_gpio(codec);
  683. if (default_polarity >= 0)
  684. spec->gpio_led_polarity = default_polarity;
  685. else
  686. spec->gpio_led_polarity = 1;
  687. return 1;
  688. }
  689. }
  690. /*
  691. * Fallback case - if we don't find the DMI strings,
  692. * we statically set the GPIO - if not a B-series system
  693. * and default polarity is provided
  694. */
  695. if (!hp_blike_system(codec->subsystem_id) &&
  696. (default_polarity == 0 || default_polarity == 1)) {
  697. set_hp_led_gpio(codec);
  698. spec->gpio_led_polarity = default_polarity;
  699. return 1;
  700. }
  701. return 0;
  702. }
  703. /*
  704. * PC beep controls
  705. */
  706. /* create PC beep volume controls */
  707. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  708. hda_nid_t nid)
  709. {
  710. struct sigmatel_spec *spec = codec->spec;
  711. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  712. struct snd_kcontrol_new *knew;
  713. static struct snd_kcontrol_new abeep_mute_ctl =
  714. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  715. static struct snd_kcontrol_new dbeep_mute_ctl =
  716. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  717. static struct snd_kcontrol_new beep_vol_ctl =
  718. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  719. /* check for mute support for the the amp */
  720. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  721. const struct snd_kcontrol_new *temp;
  722. if (spec->anabeep_nid == nid)
  723. temp = &abeep_mute_ctl;
  724. else
  725. temp = &dbeep_mute_ctl;
  726. knew = snd_hda_gen_add_kctl(&spec->gen,
  727. "Beep Playback Switch", temp);
  728. if (!knew)
  729. return -ENOMEM;
  730. knew->private_value =
  731. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  732. }
  733. /* check to see if there is volume support for the amp */
  734. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  735. knew = snd_hda_gen_add_kctl(&spec->gen,
  736. "Beep Playback Volume",
  737. &beep_vol_ctl);
  738. if (!knew)
  739. return -ENOMEM;
  740. knew->private_value =
  741. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  742. }
  743. return 0;
  744. }
  745. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  746. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  747. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  748. struct snd_ctl_elem_value *ucontrol)
  749. {
  750. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  751. ucontrol->value.integer.value[0] = codec->beep->enabled;
  752. return 0;
  753. }
  754. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  755. struct snd_ctl_elem_value *ucontrol)
  756. {
  757. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  758. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  759. }
  760. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  761. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  762. .name = "Beep Playback Switch",
  763. .info = stac_dig_beep_switch_info,
  764. .get = stac_dig_beep_switch_get,
  765. .put = stac_dig_beep_switch_put,
  766. };
  767. static int stac_beep_switch_ctl(struct hda_codec *codec)
  768. {
  769. struct sigmatel_spec *spec = codec->spec;
  770. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  771. return -ENOMEM;
  772. return 0;
  773. }
  774. #endif
  775. /*
  776. * SPDIF-out mux controls
  777. */
  778. static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
  779. struct snd_ctl_elem_info *uinfo)
  780. {
  781. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  782. struct sigmatel_spec *spec = codec->spec;
  783. return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
  784. }
  785. static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
  786. struct snd_ctl_elem_value *ucontrol)
  787. {
  788. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  789. struct sigmatel_spec *spec = codec->spec;
  790. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  791. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  792. return 0;
  793. }
  794. static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
  795. struct snd_ctl_elem_value *ucontrol)
  796. {
  797. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  798. struct sigmatel_spec *spec = codec->spec;
  799. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  800. return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
  801. spec->gen.autocfg.dig_out_pins[smux_idx],
  802. &spec->cur_smux[smux_idx]);
  803. }
  804. static struct snd_kcontrol_new stac_smux_mixer = {
  805. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  806. .name = "IEC958 Playback Source",
  807. /* count set later */
  808. .info = stac_smux_enum_info,
  809. .get = stac_smux_enum_get,
  810. .put = stac_smux_enum_put,
  811. };
  812. static const char * const stac_spdif_labels[] = {
  813. "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
  814. };
  815. static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
  816. {
  817. struct sigmatel_spec *spec = codec->spec;
  818. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  819. const char * const *labels = spec->spdif_labels;
  820. struct snd_kcontrol_new *kctl;
  821. int i, num_cons;
  822. if (cfg->dig_outs < 1)
  823. return 0;
  824. num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
  825. if (num_cons <= 1)
  826. return 0;
  827. if (!labels)
  828. labels = stac_spdif_labels;
  829. for (i = 0; i < num_cons; i++) {
  830. if (snd_BUG_ON(!labels[i]))
  831. return -EINVAL;
  832. snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
  833. }
  834. kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
  835. if (!kctl)
  836. return -ENOMEM;
  837. kctl->count = cfg->dig_outs;
  838. return 0;
  839. }
  840. /*
  841. */
  842. static const struct hda_verb stac9200_core_init[] = {
  843. /* set dac0mux for dac converter */
  844. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  845. {}
  846. };
  847. static const struct hda_verb stac9200_eapd_init[] = {
  848. /* set dac0mux for dac converter */
  849. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  850. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  851. {}
  852. };
  853. static const struct hda_verb dell_eq_core_init[] = {
  854. /* set master volume to max value without distortion
  855. * and direct control */
  856. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  857. {}
  858. };
  859. static const struct hda_verb stac92hd73xx_core_init[] = {
  860. /* set master volume and direct control */
  861. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  862. {}
  863. };
  864. static const struct hda_verb stac92hd83xxx_core_init[] = {
  865. /* power state controls amps */
  866. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  867. {}
  868. };
  869. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  870. { 0x22, 0x785, 0x43 },
  871. { 0x22, 0x782, 0xe0 },
  872. { 0x22, 0x795, 0x00 },
  873. {}
  874. };
  875. static const struct hda_verb stac92hd71bxx_core_init[] = {
  876. /* set master volume and direct control */
  877. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  878. {}
  879. };
  880. static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
  881. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  882. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  883. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  884. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  885. {}
  886. };
  887. static const struct hda_verb stac925x_core_init[] = {
  888. /* set dac0mux for dac converter */
  889. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  890. /* mute the master volume */
  891. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  892. {}
  893. };
  894. static const struct hda_verb stac922x_core_init[] = {
  895. /* set master volume and direct control */
  896. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  897. {}
  898. };
  899. static const struct hda_verb d965_core_init[] = {
  900. /* unmute node 0x1b */
  901. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  902. /* select node 0x03 as DAC */
  903. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  904. {}
  905. };
  906. static const struct hda_verb dell_3st_core_init[] = {
  907. /* don't set delta bit */
  908. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  909. /* unmute node 0x1b */
  910. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  911. /* select node 0x03 as DAC */
  912. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  913. {}
  914. };
  915. static const struct hda_verb stac927x_core_init[] = {
  916. /* set master volume and direct control */
  917. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  918. /* enable analog pc beep path */
  919. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  920. {}
  921. };
  922. static const struct hda_verb stac927x_volknob_core_init[] = {
  923. /* don't set delta bit */
  924. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  925. /* enable analog pc beep path */
  926. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  927. {}
  928. };
  929. static const struct hda_verb stac9205_core_init[] = {
  930. /* set master volume and direct control */
  931. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  932. /* enable analog pc beep path */
  933. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  934. {}
  935. };
  936. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  937. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  938. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  939. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  940. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  941. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  942. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  943. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  944. static const struct snd_kcontrol_new stac9205_loopback =
  945. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  946. static const struct snd_kcontrol_new stac927x_loopback =
  947. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  948. static const struct hda_pintbl ref9200_pin_configs[] = {
  949. { 0x08, 0x01c47010 },
  950. { 0x09, 0x01447010 },
  951. { 0x0d, 0x0221401f },
  952. { 0x0e, 0x01114010 },
  953. { 0x0f, 0x02a19020 },
  954. { 0x10, 0x01a19021 },
  955. { 0x11, 0x90100140 },
  956. { 0x12, 0x01813122 },
  957. {}
  958. };
  959. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  960. { 0x08, 0x400000fe },
  961. { 0x09, 0x404500f4 },
  962. { 0x0d, 0x400100f0 },
  963. { 0x0e, 0x90110010 },
  964. { 0x0f, 0x400100f1 },
  965. { 0x10, 0x02a1902e },
  966. { 0x11, 0x500000f2 },
  967. { 0x12, 0x500000f3 },
  968. {}
  969. };
  970. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  971. { 0x08, 0x400000fe },
  972. { 0x09, 0x404500f4 },
  973. { 0x0d, 0x400100f0 },
  974. { 0x0e, 0x90110010 },
  975. { 0x0f, 0x400100f1 },
  976. { 0x10, 0x02a1902e },
  977. { 0x11, 0x500000f2 },
  978. { 0x12, 0x500000f3 },
  979. {}
  980. };
  981. /*
  982. STAC 9200 pin configs for
  983. 102801A8
  984. 102801DE
  985. 102801E8
  986. */
  987. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  988. { 0x08, 0x400001f0 },
  989. { 0x09, 0x400001f1 },
  990. { 0x0d, 0x02214030 },
  991. { 0x0e, 0x01014010 },
  992. { 0x0f, 0x02a19020 },
  993. { 0x10, 0x01a19021 },
  994. { 0x11, 0x90100140 },
  995. { 0x12, 0x01813122 },
  996. {}
  997. };
  998. /*
  999. STAC 9200 pin configs for
  1000. 102801C0
  1001. 102801C1
  1002. */
  1003. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  1004. { 0x08, 0x400001f0 },
  1005. { 0x09, 0x400001f1 },
  1006. { 0x0d, 0x0221401f },
  1007. { 0x0e, 0x01014010 },
  1008. { 0x0f, 0x01813020 },
  1009. { 0x10, 0x02a19021 },
  1010. { 0x11, 0x90100140 },
  1011. { 0x12, 0x400001f2 },
  1012. {}
  1013. };
  1014. /*
  1015. STAC 9200 pin configs for
  1016. 102801C4 (Dell Dimension E310)
  1017. 102801C5
  1018. 102801C7
  1019. 102801D9
  1020. 102801DA
  1021. 102801E3
  1022. */
  1023. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  1024. { 0x08, 0x400001f0 },
  1025. { 0x09, 0x400001f1 },
  1026. { 0x0d, 0x0221401f },
  1027. { 0x0e, 0x01014010 },
  1028. { 0x0f, 0x01813020 },
  1029. { 0x10, 0x01a19021 },
  1030. { 0x11, 0x90100140 },
  1031. { 0x12, 0x400001f2 },
  1032. {}
  1033. };
  1034. /*
  1035. STAC 9200-32 pin configs for
  1036. 102801B5 (Dell Inspiron 630m)
  1037. 102801D8 (Dell Inspiron 640m)
  1038. */
  1039. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  1040. { 0x08, 0x40c003fa },
  1041. { 0x09, 0x03441340 },
  1042. { 0x0d, 0x0321121f },
  1043. { 0x0e, 0x90170310 },
  1044. { 0x0f, 0x408003fb },
  1045. { 0x10, 0x03a11020 },
  1046. { 0x11, 0x401003fc },
  1047. { 0x12, 0x403003fd },
  1048. {}
  1049. };
  1050. /*
  1051. STAC 9200-32 pin configs for
  1052. 102801C2 (Dell Latitude D620)
  1053. 102801C8
  1054. 102801CC (Dell Latitude D820)
  1055. 102801D4
  1056. 102801D6
  1057. */
  1058. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  1059. { 0x08, 0x40c003fa },
  1060. { 0x09, 0x0144131f },
  1061. { 0x0d, 0x0321121f },
  1062. { 0x0e, 0x90170310 },
  1063. { 0x0f, 0x90a70321 },
  1064. { 0x10, 0x03a11020 },
  1065. { 0x11, 0x401003fb },
  1066. { 0x12, 0x40f000fc },
  1067. {}
  1068. };
  1069. /*
  1070. STAC 9200-32 pin configs for
  1071. 102801CE (Dell XPS M1710)
  1072. 102801CF (Dell Precision M90)
  1073. */
  1074. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1075. { 0x08, 0x40c003fa },
  1076. { 0x09, 0x01441340 },
  1077. { 0x0d, 0x0421421f },
  1078. { 0x0e, 0x90170310 },
  1079. { 0x0f, 0x408003fb },
  1080. { 0x10, 0x04a1102e },
  1081. { 0x11, 0x90170311 },
  1082. { 0x12, 0x403003fc },
  1083. {}
  1084. };
  1085. /*
  1086. STAC 9200-32 pin configs for
  1087. 102801C9
  1088. 102801CA
  1089. 102801CB (Dell Latitude 120L)
  1090. 102801D3
  1091. */
  1092. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1093. { 0x08, 0x40c003fa },
  1094. { 0x09, 0x404003fb },
  1095. { 0x0d, 0x0321121f },
  1096. { 0x0e, 0x90170310 },
  1097. { 0x0f, 0x408003fc },
  1098. { 0x10, 0x03a11020 },
  1099. { 0x11, 0x401003fd },
  1100. { 0x12, 0x403003fe },
  1101. {}
  1102. };
  1103. /*
  1104. STAC 9200-32 pin configs for
  1105. 102801BD (Dell Inspiron E1505n)
  1106. 102801EE
  1107. 102801EF
  1108. */
  1109. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1110. { 0x08, 0x40c003fa },
  1111. { 0x09, 0x01441340 },
  1112. { 0x0d, 0x0421121f },
  1113. { 0x0e, 0x90170310 },
  1114. { 0x0f, 0x408003fb },
  1115. { 0x10, 0x04a11020 },
  1116. { 0x11, 0x401003fc },
  1117. { 0x12, 0x403003fd },
  1118. {}
  1119. };
  1120. /*
  1121. STAC 9200-32 pin configs for
  1122. 102801F5 (Dell Inspiron 1501)
  1123. 102801F6
  1124. */
  1125. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1126. { 0x08, 0x40c003fa },
  1127. { 0x09, 0x404003fb },
  1128. { 0x0d, 0x0421121f },
  1129. { 0x0e, 0x90170310 },
  1130. { 0x0f, 0x408003fc },
  1131. { 0x10, 0x04a11020 },
  1132. { 0x11, 0x401003fd },
  1133. { 0x12, 0x403003fe },
  1134. {}
  1135. };
  1136. /*
  1137. STAC 9200-32
  1138. 102801CD (Dell Inspiron E1705/9400)
  1139. */
  1140. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1141. { 0x08, 0x40c003fa },
  1142. { 0x09, 0x01441340 },
  1143. { 0x0d, 0x0421121f },
  1144. { 0x0e, 0x90170310 },
  1145. { 0x0f, 0x90170310 },
  1146. { 0x10, 0x04a11020 },
  1147. { 0x11, 0x90170310 },
  1148. { 0x12, 0x40f003fc },
  1149. {}
  1150. };
  1151. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1152. { 0x08, 0x40c000f0 },
  1153. { 0x09, 0x404000f1 },
  1154. { 0x0d, 0x0221121f },
  1155. { 0x0e, 0x02211210 },
  1156. { 0x0f, 0x90170111 },
  1157. { 0x10, 0x90a70120 },
  1158. { 0x11, 0x400000f2 },
  1159. { 0x12, 0x400000f3 },
  1160. {}
  1161. };
  1162. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1163. const struct hda_fixup *fix, int action)
  1164. {
  1165. struct sigmatel_spec *spec = codec->spec;
  1166. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1167. spec->gpio_mask = spec->gpio_dir = 0x09;
  1168. spec->gpio_data = 0x00;
  1169. /* CF-74 has no headphone detection, and the driver should *NOT*
  1170. * do detection and HP/speaker toggle because the hardware does it.
  1171. */
  1172. spec->gen.suppress_auto_mute = 1;
  1173. }
  1174. }
  1175. static const struct hda_fixup stac9200_fixups[] = {
  1176. [STAC_REF] = {
  1177. .type = HDA_FIXUP_PINS,
  1178. .v.pins = ref9200_pin_configs,
  1179. },
  1180. [STAC_9200_OQO] = {
  1181. .type = HDA_FIXUP_PINS,
  1182. .v.pins = oqo9200_pin_configs,
  1183. .chained = true,
  1184. .chain_id = STAC_9200_EAPD_INIT,
  1185. },
  1186. [STAC_9200_DELL_D21] = {
  1187. .type = HDA_FIXUP_PINS,
  1188. .v.pins = dell9200_d21_pin_configs,
  1189. },
  1190. [STAC_9200_DELL_D22] = {
  1191. .type = HDA_FIXUP_PINS,
  1192. .v.pins = dell9200_d22_pin_configs,
  1193. },
  1194. [STAC_9200_DELL_D23] = {
  1195. .type = HDA_FIXUP_PINS,
  1196. .v.pins = dell9200_d23_pin_configs,
  1197. },
  1198. [STAC_9200_DELL_M21] = {
  1199. .type = HDA_FIXUP_PINS,
  1200. .v.pins = dell9200_m21_pin_configs,
  1201. },
  1202. [STAC_9200_DELL_M22] = {
  1203. .type = HDA_FIXUP_PINS,
  1204. .v.pins = dell9200_m22_pin_configs,
  1205. },
  1206. [STAC_9200_DELL_M23] = {
  1207. .type = HDA_FIXUP_PINS,
  1208. .v.pins = dell9200_m23_pin_configs,
  1209. },
  1210. [STAC_9200_DELL_M24] = {
  1211. .type = HDA_FIXUP_PINS,
  1212. .v.pins = dell9200_m24_pin_configs,
  1213. },
  1214. [STAC_9200_DELL_M25] = {
  1215. .type = HDA_FIXUP_PINS,
  1216. .v.pins = dell9200_m25_pin_configs,
  1217. },
  1218. [STAC_9200_DELL_M26] = {
  1219. .type = HDA_FIXUP_PINS,
  1220. .v.pins = dell9200_m26_pin_configs,
  1221. },
  1222. [STAC_9200_DELL_M27] = {
  1223. .type = HDA_FIXUP_PINS,
  1224. .v.pins = dell9200_m27_pin_configs,
  1225. },
  1226. [STAC_9200_M4] = {
  1227. .type = HDA_FIXUP_PINS,
  1228. .v.pins = gateway9200_m4_pin_configs,
  1229. .chained = true,
  1230. .chain_id = STAC_9200_EAPD_INIT,
  1231. },
  1232. [STAC_9200_M4_2] = {
  1233. .type = HDA_FIXUP_PINS,
  1234. .v.pins = gateway9200_m4_2_pin_configs,
  1235. .chained = true,
  1236. .chain_id = STAC_9200_EAPD_INIT,
  1237. },
  1238. [STAC_9200_PANASONIC] = {
  1239. .type = HDA_FIXUP_FUNC,
  1240. .v.func = stac9200_fixup_panasonic,
  1241. },
  1242. [STAC_9200_EAPD_INIT] = {
  1243. .type = HDA_FIXUP_VERBS,
  1244. .v.verbs = (const struct hda_verb[]) {
  1245. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1246. {}
  1247. },
  1248. },
  1249. };
  1250. static const struct hda_model_fixup stac9200_models[] = {
  1251. { .id = STAC_REF, .name = "ref" },
  1252. { .id = STAC_9200_OQO, .name = "oqo" },
  1253. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1254. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1255. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1256. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1257. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1258. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1259. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1260. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1261. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1262. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1263. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1264. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1265. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1266. {}
  1267. };
  1268. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1269. /* SigmaTel reference board */
  1270. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1271. "DFI LanParty", STAC_REF),
  1272. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1273. "DFI LanParty", STAC_REF),
  1274. /* Dell laptops have BIOS problem */
  1275. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1276. "unknown Dell", STAC_9200_DELL_D21),
  1277. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1278. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1279. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1280. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1281. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1282. "unknown Dell", STAC_9200_DELL_D22),
  1283. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1284. "unknown Dell", STAC_9200_DELL_D22),
  1285. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1286. "Dell Latitude D620", STAC_9200_DELL_M22),
  1287. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1288. "unknown Dell", STAC_9200_DELL_D23),
  1289. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1290. "unknown Dell", STAC_9200_DELL_D23),
  1291. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1292. "unknown Dell", STAC_9200_DELL_M22),
  1293. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1294. "unknown Dell", STAC_9200_DELL_M24),
  1295. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1296. "unknown Dell", STAC_9200_DELL_M24),
  1297. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1298. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1299. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1300. "Dell Latitude D820", STAC_9200_DELL_M22),
  1301. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1302. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1303. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1304. "Dell XPS M1710", STAC_9200_DELL_M23),
  1305. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1306. "Dell Precision M90", STAC_9200_DELL_M23),
  1307. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1308. "unknown Dell", STAC_9200_DELL_M22),
  1309. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1310. "unknown Dell", STAC_9200_DELL_M22),
  1311. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1312. "unknown Dell", STAC_9200_DELL_M22),
  1313. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1314. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1315. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1316. "unknown Dell", STAC_9200_DELL_D23),
  1317. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1318. "unknown Dell", STAC_9200_DELL_D23),
  1319. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1320. "unknown Dell", STAC_9200_DELL_D21),
  1321. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1322. "unknown Dell", STAC_9200_DELL_D23),
  1323. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1324. "unknown Dell", STAC_9200_DELL_D21),
  1325. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1326. "unknown Dell", STAC_9200_DELL_M25),
  1327. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1328. "unknown Dell", STAC_9200_DELL_M25),
  1329. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1330. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1331. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1332. "unknown Dell", STAC_9200_DELL_M26),
  1333. /* Panasonic */
  1334. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1335. /* Gateway machines needs EAPD to be set on resume */
  1336. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1337. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1338. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1339. /* OQO Mobile */
  1340. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1341. {} /* terminator */
  1342. };
  1343. static const struct hda_pintbl ref925x_pin_configs[] = {
  1344. { 0x07, 0x40c003f0 },
  1345. { 0x08, 0x424503f2 },
  1346. { 0x0a, 0x01813022 },
  1347. { 0x0b, 0x02a19021 },
  1348. { 0x0c, 0x90a70320 },
  1349. { 0x0d, 0x02214210 },
  1350. { 0x10, 0x01019020 },
  1351. { 0x11, 0x9033032e },
  1352. {}
  1353. };
  1354. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1355. { 0x07, 0x40c003f4 },
  1356. { 0x08, 0x424503f2 },
  1357. { 0x0a, 0x400000f3 },
  1358. { 0x0b, 0x02a19020 },
  1359. { 0x0c, 0x40a000f0 },
  1360. { 0x0d, 0x90100210 },
  1361. { 0x10, 0x400003f1 },
  1362. { 0x11, 0x9033032e },
  1363. {}
  1364. };
  1365. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1366. { 0x07, 0x40c003f4 },
  1367. { 0x08, 0x424503f2 },
  1368. { 0x0a, 0x400000f3 },
  1369. { 0x0b, 0x02a19020 },
  1370. { 0x0c, 0x40a000f0 },
  1371. { 0x0d, 0x90100210 },
  1372. { 0x10, 0x400003f1 },
  1373. { 0x11, 0x9033032e },
  1374. {}
  1375. };
  1376. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1377. { 0x07, 0x40c003f4 },
  1378. { 0x08, 0x424503f2 },
  1379. { 0x0a, 0x400000f3 },
  1380. { 0x0b, 0x02a19020 },
  1381. { 0x0c, 0x40a000f0 },
  1382. { 0x0d, 0x90100210 },
  1383. { 0x10, 0x400003f1 },
  1384. { 0x11, 0x9033032e },
  1385. {}
  1386. };
  1387. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1388. { 0x07, 0x40c003f4 },
  1389. { 0x08, 0x424503f2 },
  1390. { 0x0a, 0x400000f3 },
  1391. { 0x0b, 0x02a19020 },
  1392. { 0x0c, 0x40a000f0 },
  1393. { 0x0d, 0x90100210 },
  1394. { 0x10, 0x400003f1 },
  1395. { 0x11, 0x9033032e },
  1396. {}
  1397. };
  1398. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1399. { 0x07, 0x40c003f4 },
  1400. { 0x08, 0x424503f2 },
  1401. { 0x0a, 0x400000f3 },
  1402. { 0x0b, 0x02a19020 },
  1403. { 0x0c, 0x40a000f0 },
  1404. { 0x0d, 0x90100210 },
  1405. { 0x10, 0x400003f1 },
  1406. { 0x11, 0x503303f3 },
  1407. {}
  1408. };
  1409. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1410. { 0x07, 0x40c003f4 },
  1411. { 0x08, 0x424503f2 },
  1412. { 0x0a, 0x400000f3 },
  1413. { 0x0b, 0x02a19020 },
  1414. { 0x0c, 0x40a000f0 },
  1415. { 0x0d, 0x90100210 },
  1416. { 0x10, 0x400003f1 },
  1417. { 0x11, 0x9033032e },
  1418. {}
  1419. };
  1420. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1421. { 0x07, 0x40c003f4 },
  1422. { 0x08, 0x424503f2 },
  1423. { 0x0a, 0x400000f3 },
  1424. { 0x0b, 0x02a19020 },
  1425. { 0x0c, 0x40a000f0 },
  1426. { 0x0d, 0x90100210 },
  1427. { 0x10, 0x400003f1 },
  1428. { 0x11, 0x90330320 },
  1429. {}
  1430. };
  1431. static const struct hda_fixup stac925x_fixups[] = {
  1432. [STAC_REF] = {
  1433. .type = HDA_FIXUP_PINS,
  1434. .v.pins = ref925x_pin_configs,
  1435. },
  1436. [STAC_M1] = {
  1437. .type = HDA_FIXUP_PINS,
  1438. .v.pins = stac925xM1_pin_configs,
  1439. },
  1440. [STAC_M1_2] = {
  1441. .type = HDA_FIXUP_PINS,
  1442. .v.pins = stac925xM1_2_pin_configs,
  1443. },
  1444. [STAC_M2] = {
  1445. .type = HDA_FIXUP_PINS,
  1446. .v.pins = stac925xM2_pin_configs,
  1447. },
  1448. [STAC_M2_2] = {
  1449. .type = HDA_FIXUP_PINS,
  1450. .v.pins = stac925xM2_2_pin_configs,
  1451. },
  1452. [STAC_M3] = {
  1453. .type = HDA_FIXUP_PINS,
  1454. .v.pins = stac925xM3_pin_configs,
  1455. },
  1456. [STAC_M5] = {
  1457. .type = HDA_FIXUP_PINS,
  1458. .v.pins = stac925xM5_pin_configs,
  1459. },
  1460. [STAC_M6] = {
  1461. .type = HDA_FIXUP_PINS,
  1462. .v.pins = stac925xM6_pin_configs,
  1463. },
  1464. };
  1465. static const struct hda_model_fixup stac925x_models[] = {
  1466. { .id = STAC_REF, .name = "ref" },
  1467. { .id = STAC_M1, .name = "m1" },
  1468. { .id = STAC_M1_2, .name = "m1-2" },
  1469. { .id = STAC_M2, .name = "m2" },
  1470. { .id = STAC_M2_2, .name = "m2-2" },
  1471. { .id = STAC_M3, .name = "m3" },
  1472. { .id = STAC_M5, .name = "m5" },
  1473. { .id = STAC_M6, .name = "m6" },
  1474. {}
  1475. };
  1476. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1477. /* SigmaTel reference board */
  1478. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1479. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1480. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1481. /* Default table for unknown ID */
  1482. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1483. /* gateway machines are checked via codec ssid */
  1484. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1485. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1486. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1487. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1488. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1489. /* Not sure about the brand name for those */
  1490. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1491. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1492. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1493. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1494. {} /* terminator */
  1495. };
  1496. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1497. { 0x0a, 0x02214030 },
  1498. { 0x0b, 0x02a19040 },
  1499. { 0x0c, 0x01a19020 },
  1500. { 0x0d, 0x02214030 },
  1501. { 0x0e, 0x0181302e },
  1502. { 0x0f, 0x01014010 },
  1503. { 0x10, 0x01014020 },
  1504. { 0x11, 0x01014030 },
  1505. { 0x12, 0x02319040 },
  1506. { 0x13, 0x90a000f0 },
  1507. { 0x14, 0x90a000f0 },
  1508. { 0x22, 0x01452050 },
  1509. { 0x23, 0x01452050 },
  1510. {}
  1511. };
  1512. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1513. { 0x0a, 0x0321101f },
  1514. { 0x0b, 0x4f00000f },
  1515. { 0x0c, 0x4f0000f0 },
  1516. { 0x0d, 0x90170110 },
  1517. { 0x0e, 0x03a11020 },
  1518. { 0x0f, 0x0321101f },
  1519. { 0x10, 0x4f0000f0 },
  1520. { 0x11, 0x4f0000f0 },
  1521. { 0x12, 0x4f0000f0 },
  1522. { 0x13, 0x90a60160 },
  1523. { 0x14, 0x4f0000f0 },
  1524. { 0x22, 0x4f0000f0 },
  1525. { 0x23, 0x4f0000f0 },
  1526. {}
  1527. };
  1528. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1529. { 0x0a, 0x0321101f },
  1530. { 0x0b, 0x0321101f },
  1531. { 0x0c, 0x03a11020 },
  1532. { 0x0d, 0x03014020 },
  1533. { 0x0e, 0x90170110 },
  1534. { 0x0f, 0x4f0000f0 },
  1535. { 0x10, 0x4f0000f0 },
  1536. { 0x11, 0x4f0000f0 },
  1537. { 0x12, 0x4f0000f0 },
  1538. { 0x13, 0x90a60160 },
  1539. { 0x14, 0x4f0000f0 },
  1540. { 0x22, 0x4f0000f0 },
  1541. { 0x23, 0x904601b0 },
  1542. {}
  1543. };
  1544. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1545. { 0x0a, 0x02214230 },
  1546. { 0x0b, 0x02A19240 },
  1547. { 0x0c, 0x01013214 },
  1548. { 0x0d, 0x01014210 },
  1549. { 0x0e, 0x01A19250 },
  1550. { 0x0f, 0x01011212 },
  1551. { 0x10, 0x01016211 },
  1552. {}
  1553. };
  1554. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1555. const struct hda_fixup *fix, int action)
  1556. {
  1557. struct sigmatel_spec *spec = codec->spec;
  1558. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1559. return;
  1560. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1561. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1562. }
  1563. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1564. {
  1565. struct sigmatel_spec *spec = codec->spec;
  1566. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1567. spec->eapd_switch = 0;
  1568. }
  1569. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1570. const struct hda_fixup *fix, int action)
  1571. {
  1572. struct sigmatel_spec *spec = codec->spec;
  1573. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1574. return;
  1575. stac92hd73xx_fixup_dell(codec);
  1576. snd_hda_add_verbs(codec, dell_eq_core_init);
  1577. spec->volknob_init = 1;
  1578. }
  1579. /* Analog Mics */
  1580. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1581. const struct hda_fixup *fix, int action)
  1582. {
  1583. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1584. return;
  1585. stac92hd73xx_fixup_dell(codec);
  1586. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1587. }
  1588. /* Digital Mics */
  1589. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1590. const struct hda_fixup *fix, int action)
  1591. {
  1592. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1593. return;
  1594. stac92hd73xx_fixup_dell(codec);
  1595. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1596. }
  1597. /* Both */
  1598. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1599. const struct hda_fixup *fix, int action)
  1600. {
  1601. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1602. return;
  1603. stac92hd73xx_fixup_dell(codec);
  1604. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1605. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1606. }
  1607. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1608. const struct hda_fixup *fix, int action)
  1609. {
  1610. struct sigmatel_spec *spec = codec->spec;
  1611. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1612. return;
  1613. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1614. spec->eapd_switch = 0;
  1615. }
  1616. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1617. const struct hda_fixup *fix, int action)
  1618. {
  1619. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1620. codec->no_jack_detect = 1;
  1621. }
  1622. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1623. [STAC_92HD73XX_REF] = {
  1624. .type = HDA_FIXUP_FUNC,
  1625. .v.func = stac92hd73xx_fixup_ref,
  1626. },
  1627. [STAC_DELL_M6_AMIC] = {
  1628. .type = HDA_FIXUP_FUNC,
  1629. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1630. },
  1631. [STAC_DELL_M6_DMIC] = {
  1632. .type = HDA_FIXUP_FUNC,
  1633. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1634. },
  1635. [STAC_DELL_M6_BOTH] = {
  1636. .type = HDA_FIXUP_FUNC,
  1637. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1638. },
  1639. [STAC_DELL_EQ] = {
  1640. .type = HDA_FIXUP_FUNC,
  1641. .v.func = stac92hd73xx_fixup_dell_eq,
  1642. },
  1643. [STAC_ALIENWARE_M17X] = {
  1644. .type = HDA_FIXUP_FUNC,
  1645. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1646. },
  1647. [STAC_92HD73XX_INTEL] = {
  1648. .type = HDA_FIXUP_PINS,
  1649. .v.pins = intel_dg45id_pin_configs,
  1650. },
  1651. [STAC_92HD73XX_NO_JD] = {
  1652. .type = HDA_FIXUP_FUNC,
  1653. .v.func = stac92hd73xx_fixup_no_jd,
  1654. }
  1655. };
  1656. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1657. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1658. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1659. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1660. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1661. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1662. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1663. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1664. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1665. {}
  1666. };
  1667. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1668. /* SigmaTel reference board */
  1669. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1670. "DFI LanParty", STAC_92HD73XX_REF),
  1671. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1672. "DFI LanParty", STAC_92HD73XX_REF),
  1673. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1674. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1675. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1676. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1677. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1678. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1679. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1680. "unknown Dell", STAC_DELL_M6_DMIC),
  1681. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1682. "unknown Dell", STAC_DELL_M6_BOTH),
  1683. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1684. "unknown Dell", STAC_DELL_M6_BOTH),
  1685. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1686. "unknown Dell", STAC_DELL_M6_AMIC),
  1687. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1688. "unknown Dell", STAC_DELL_M6_AMIC),
  1689. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1690. "unknown Dell", STAC_DELL_M6_DMIC),
  1691. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1692. "unknown Dell", STAC_DELL_M6_DMIC),
  1693. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1694. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1695. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1696. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1697. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1698. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1699. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1700. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1701. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1702. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1703. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1704. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1705. /* codec SSID matching */
  1706. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1707. "Alienware M17x", STAC_ALIENWARE_M17X),
  1708. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1709. "Alienware M17x", STAC_ALIENWARE_M17X),
  1710. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1711. "Alienware M17x R3", STAC_DELL_EQ),
  1712. {} /* terminator */
  1713. };
  1714. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1715. { 0x0a, 0x02214030 },
  1716. { 0x0b, 0x02211010 },
  1717. { 0x0c, 0x02a19020 },
  1718. { 0x0d, 0x02170130 },
  1719. { 0x0e, 0x01014050 },
  1720. { 0x0f, 0x01819040 },
  1721. { 0x10, 0x01014020 },
  1722. { 0x11, 0x90a3014e },
  1723. { 0x1f, 0x01451160 },
  1724. { 0x20, 0x98560170 },
  1725. {}
  1726. };
  1727. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1728. { 0x0a, 0x0221403f },
  1729. { 0x0b, 0x0221101f },
  1730. { 0x0c, 0x02a19020 },
  1731. { 0x0d, 0x90170110 },
  1732. { 0x0e, 0x40f000f0 },
  1733. { 0x0f, 0x40f000f0 },
  1734. { 0x10, 0x40f000f0 },
  1735. { 0x11, 0x90a60160 },
  1736. { 0x1f, 0x40f000f0 },
  1737. { 0x20, 0x40f000f0 },
  1738. {}
  1739. };
  1740. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1741. { 0x0a, 0x02a11020 },
  1742. { 0x0b, 0x0221101f },
  1743. { 0x0c, 0x400000f0 },
  1744. { 0x0d, 0x90170110 },
  1745. { 0x0e, 0x400000f1 },
  1746. { 0x0f, 0x400000f2 },
  1747. { 0x10, 0x400000f3 },
  1748. { 0x11, 0x90a60160 },
  1749. { 0x1f, 0x400000f4 },
  1750. { 0x20, 0x400000f5 },
  1751. {}
  1752. };
  1753. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1754. { 0x0a, 0x03a12050 },
  1755. { 0x0b, 0x0321201f },
  1756. { 0x0c, 0x40f000f0 },
  1757. { 0x0d, 0x90170110 },
  1758. { 0x0e, 0x40f000f0 },
  1759. { 0x0f, 0x40f000f0 },
  1760. { 0x10, 0x90170110 },
  1761. { 0x11, 0xd5a30140 },
  1762. { 0x1f, 0x40f000f0 },
  1763. { 0x20, 0x40f000f0 },
  1764. {}
  1765. };
  1766. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1767. { 0x0a, 0x01813050 },
  1768. { 0x0b, 0x0421201f },
  1769. { 0x0c, 0x04a1205e },
  1770. { 0x0d, 0x96130310 },
  1771. { 0x0e, 0x96130310 },
  1772. { 0x0f, 0x0101401f },
  1773. { 0x10, 0x1111611f },
  1774. { 0x11, 0xd5a30130 },
  1775. {}
  1776. };
  1777. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1778. { 0x0a, 0x40f000f0 },
  1779. { 0x0b, 0x0221101f },
  1780. { 0x0c, 0x02a11020 },
  1781. { 0x0d, 0x92170110 },
  1782. { 0x0e, 0x40f000f0 },
  1783. { 0x0f, 0x92170110 },
  1784. { 0x10, 0x40f000f0 },
  1785. { 0x11, 0xd5a30130 },
  1786. { 0x1f, 0x40f000f0 },
  1787. { 0x20, 0x40f000f0 },
  1788. {}
  1789. };
  1790. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1791. const struct hda_fixup *fix, int action)
  1792. {
  1793. struct sigmatel_spec *spec = codec->spec;
  1794. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1795. return;
  1796. if (hp_bnb2011_with_dock(codec)) {
  1797. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1798. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1799. }
  1800. if (find_mute_led_cfg(codec, spec->default_polarity))
  1801. snd_printd("mute LED gpio %d polarity %d\n",
  1802. spec->gpio_led,
  1803. spec->gpio_led_polarity);
  1804. }
  1805. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1806. const struct hda_fixup *fix, int action)
  1807. {
  1808. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1809. return;
  1810. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1811. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1812. }
  1813. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1814. const struct hda_fixup *fix, int action)
  1815. {
  1816. struct sigmatel_spec *spec = codec->spec;
  1817. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1818. spec->default_polarity = 0;
  1819. }
  1820. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1821. const struct hda_fixup *fix, int action)
  1822. {
  1823. struct sigmatel_spec *spec = codec->spec;
  1824. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1825. spec->default_polarity = 1;
  1826. }
  1827. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1828. const struct hda_fixup *fix, int action)
  1829. {
  1830. struct sigmatel_spec *spec = codec->spec;
  1831. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1832. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1833. }
  1834. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1835. const struct hda_fixup *fix, int action)
  1836. {
  1837. struct sigmatel_spec *spec = codec->spec;
  1838. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1839. spec->headset_jack = 1;
  1840. }
  1841. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  1842. [STAC_92HD83XXX_REF] = {
  1843. .type = HDA_FIXUP_PINS,
  1844. .v.pins = ref92hd83xxx_pin_configs,
  1845. },
  1846. [STAC_92HD83XXX_PWR_REF] = {
  1847. .type = HDA_FIXUP_PINS,
  1848. .v.pins = ref92hd83xxx_pin_configs,
  1849. },
  1850. [STAC_DELL_S14] = {
  1851. .type = HDA_FIXUP_PINS,
  1852. .v.pins = dell_s14_pin_configs,
  1853. },
  1854. [STAC_DELL_VOSTRO_3500] = {
  1855. .type = HDA_FIXUP_PINS,
  1856. .v.pins = dell_vostro_3500_pin_configs,
  1857. },
  1858. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  1859. .type = HDA_FIXUP_PINS,
  1860. .v.pins = hp_cNB11_intquad_pin_configs,
  1861. .chained = true,
  1862. .chain_id = STAC_92HD83XXX_HP,
  1863. },
  1864. [STAC_92HD83XXX_HP] = {
  1865. .type = HDA_FIXUP_FUNC,
  1866. .v.func = stac92hd83xxx_fixup_hp,
  1867. },
  1868. [STAC_HP_DV7_4000] = {
  1869. .type = HDA_FIXUP_PINS,
  1870. .v.pins = hp_dv7_4000_pin_configs,
  1871. .chained = true,
  1872. .chain_id = STAC_92HD83XXX_HP,
  1873. },
  1874. [STAC_HP_ZEPHYR] = {
  1875. .type = HDA_FIXUP_FUNC,
  1876. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  1877. .chained = true,
  1878. .chain_id = STAC_92HD83XXX_HP,
  1879. },
  1880. [STAC_92HD83XXX_HP_LED] = {
  1881. .type = HDA_FIXUP_FUNC,
  1882. .v.func = stac92hd83xxx_fixup_hp_led,
  1883. .chained = true,
  1884. .chain_id = STAC_92HD83XXX_HP,
  1885. },
  1886. [STAC_92HD83XXX_HP_INV_LED] = {
  1887. .type = HDA_FIXUP_FUNC,
  1888. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  1889. .chained = true,
  1890. .chain_id = STAC_92HD83XXX_HP,
  1891. },
  1892. [STAC_92HD83XXX_HP_MIC_LED] = {
  1893. .type = HDA_FIXUP_FUNC,
  1894. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  1895. .chained = true,
  1896. .chain_id = STAC_92HD83XXX_HP,
  1897. },
  1898. [STAC_92HD83XXX_HEADSET_JACK] = {
  1899. .type = HDA_FIXUP_FUNC,
  1900. .v.func = stac92hd83xxx_fixup_headset_jack,
  1901. },
  1902. [STAC_HP_ENVY_BASS] = {
  1903. .type = HDA_FIXUP_PINS,
  1904. .v.pins = (const struct hda_pintbl[]) {
  1905. { 0x0f, 0x90170111 },
  1906. {}
  1907. },
  1908. },
  1909. };
  1910. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  1911. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  1912. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  1913. { .id = STAC_DELL_S14, .name = "dell-s14" },
  1914. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  1915. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  1916. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  1917. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  1918. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  1919. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  1920. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  1921. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  1922. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  1923. {}
  1924. };
  1925. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  1926. /* SigmaTel reference board */
  1927. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1928. "DFI LanParty", STAC_92HD83XXX_REF),
  1929. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1930. "DFI LanParty", STAC_92HD83XXX_REF),
  1931. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  1932. "unknown Dell", STAC_DELL_S14),
  1933. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  1934. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  1935. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  1936. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  1937. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  1938. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  1939. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  1940. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  1941. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  1942. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  1943. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  1944. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  1945. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  1946. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  1947. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  1948. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  1949. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  1950. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  1951. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  1952. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  1953. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  1954. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1955. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  1956. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1957. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  1958. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1959. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  1960. "HP Pavilion dv7", STAC_HP_DV7_4000),
  1961. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  1962. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1963. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  1964. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1965. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  1966. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  1967. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  1968. "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
  1969. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  1970. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1971. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  1972. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1973. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  1974. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1975. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  1976. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1977. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  1978. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1979. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  1980. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1981. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  1982. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1983. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  1984. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1985. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  1986. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1987. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  1988. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1989. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  1990. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1991. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  1992. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1993. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  1994. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1995. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  1996. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1997. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  1998. "HP", STAC_HP_ZEPHYR),
  1999. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  2000. "HP Mini", STAC_92HD83XXX_HP_LED),
  2001. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  2002. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  2003. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  2004. "HP Mini", STAC_92HD83XXX_HP_LED),
  2005. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  2006. {} /* terminator */
  2007. };
  2008. /* HP dv7 bass switch - GPIO5 */
  2009. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  2010. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  2011. struct snd_ctl_elem_value *ucontrol)
  2012. {
  2013. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2014. struct sigmatel_spec *spec = codec->spec;
  2015. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  2016. return 0;
  2017. }
  2018. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  2019. struct snd_ctl_elem_value *ucontrol)
  2020. {
  2021. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2022. struct sigmatel_spec *spec = codec->spec;
  2023. unsigned int gpio_data;
  2024. gpio_data = (spec->gpio_data & ~0x20) |
  2025. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  2026. if (gpio_data == spec->gpio_data)
  2027. return 0;
  2028. spec->gpio_data = gpio_data;
  2029. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  2030. return 1;
  2031. }
  2032. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  2033. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2034. .info = stac_hp_bass_gpio_info,
  2035. .get = stac_hp_bass_gpio_get,
  2036. .put = stac_hp_bass_gpio_put,
  2037. };
  2038. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  2039. {
  2040. struct sigmatel_spec *spec = codec->spec;
  2041. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  2042. &stac_hp_bass_sw_ctrl))
  2043. return -ENOMEM;
  2044. spec->gpio_mask |= 0x20;
  2045. spec->gpio_dir |= 0x20;
  2046. spec->gpio_data |= 0x20;
  2047. return 0;
  2048. }
  2049. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  2050. { 0x0a, 0x02214030 },
  2051. { 0x0b, 0x02a19040 },
  2052. { 0x0c, 0x01a19020 },
  2053. { 0x0d, 0x01014010 },
  2054. { 0x0e, 0x0181302e },
  2055. { 0x0f, 0x01014010 },
  2056. { 0x14, 0x01019020 },
  2057. { 0x18, 0x90a000f0 },
  2058. { 0x19, 0x90a000f0 },
  2059. { 0x1e, 0x01452050 },
  2060. { 0x1f, 0x01452050 },
  2061. {}
  2062. };
  2063. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  2064. { 0x0a, 0x0421101f },
  2065. { 0x0b, 0x04a11221 },
  2066. { 0x0c, 0x40f000f0 },
  2067. { 0x0d, 0x90170110 },
  2068. { 0x0e, 0x23a1902e },
  2069. { 0x0f, 0x23014250 },
  2070. { 0x14, 0x40f000f0 },
  2071. { 0x18, 0x90a000f0 },
  2072. { 0x19, 0x40f000f0 },
  2073. { 0x1e, 0x4f0000f0 },
  2074. { 0x1f, 0x4f0000f0 },
  2075. {}
  2076. };
  2077. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2078. { 0x0a, 0x0421101f },
  2079. { 0x0b, 0x04a11221 },
  2080. { 0x0c, 0x90a70330 },
  2081. { 0x0d, 0x90170110 },
  2082. { 0x0e, 0x23a1902e },
  2083. { 0x0f, 0x23014250 },
  2084. { 0x14, 0x40f000f0 },
  2085. { 0x18, 0x40f000f0 },
  2086. { 0x19, 0x40f000f0 },
  2087. { 0x1e, 0x044413b0 },
  2088. { 0x1f, 0x044413b0 },
  2089. {}
  2090. };
  2091. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2092. { 0x0a, 0x0421101f },
  2093. { 0x0b, 0x04a11221 },
  2094. { 0x0c, 0x90a70330 },
  2095. { 0x0d, 0x90170110 },
  2096. { 0x0e, 0x40f000f0 },
  2097. { 0x0f, 0x40f000f0 },
  2098. { 0x14, 0x40f000f0 },
  2099. { 0x18, 0x90a000f0 },
  2100. { 0x19, 0x40f000f0 },
  2101. { 0x1e, 0x044413b0 },
  2102. { 0x1f, 0x044413b0 },
  2103. {}
  2104. };
  2105. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2106. const struct hda_fixup *fix, int action)
  2107. {
  2108. struct sigmatel_spec *spec = codec->spec;
  2109. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2110. return;
  2111. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2112. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2113. }
  2114. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2115. const struct hda_fixup *fix, int action)
  2116. {
  2117. struct sigmatel_spec *spec = codec->spec;
  2118. struct hda_jack_tbl *jack;
  2119. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2120. return;
  2121. /* Enable VREF power saving on GPIO1 detect */
  2122. snd_hda_codec_write_cache(codec, codec->afg, 0,
  2123. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2124. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  2125. STAC_VREF_EVENT,
  2126. stac_vref_event);
  2127. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  2128. if (jack)
  2129. jack->private_data = 0x02;
  2130. spec->gpio_mask |= 0x02;
  2131. /* enable internal microphone */
  2132. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2133. }
  2134. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2135. const struct hda_fixup *fix, int action)
  2136. {
  2137. struct sigmatel_spec *spec = codec->spec;
  2138. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2139. return;
  2140. spec->gpio_led = 0x01;
  2141. }
  2142. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2143. const struct hda_fixup *fix, int action)
  2144. {
  2145. unsigned int cap;
  2146. switch (action) {
  2147. case HDA_FIXUP_ACT_PRE_PROBE:
  2148. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2149. break;
  2150. case HDA_FIXUP_ACT_PROBE:
  2151. /* enable bass on HP dv7 */
  2152. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2153. cap &= AC_GPIO_IO_COUNT;
  2154. if (cap >= 6)
  2155. stac_add_hp_bass_switch(codec);
  2156. break;
  2157. }
  2158. }
  2159. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2160. const struct hda_fixup *fix, int action)
  2161. {
  2162. struct sigmatel_spec *spec = codec->spec;
  2163. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2164. return;
  2165. spec->gpio_led = 0x08;
  2166. }
  2167. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2168. const struct hda_fixup *fix, int action)
  2169. {
  2170. struct sigmatel_spec *spec = codec->spec;
  2171. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2172. return;
  2173. if (hp_blike_system(codec->subsystem_id)) {
  2174. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
  2175. if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2176. get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
  2177. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
  2178. /* It was changed in the BIOS to just satisfy MS DTM.
  2179. * Lets turn it back into slaved HP
  2180. */
  2181. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
  2182. | (AC_JACK_HP_OUT <<
  2183. AC_DEFCFG_DEVICE_SHIFT);
  2184. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
  2185. | AC_DEFCFG_SEQUENCE)))
  2186. | 0x1f;
  2187. snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
  2188. }
  2189. }
  2190. if (find_mute_led_cfg(codec, 1))
  2191. snd_printd("mute LED gpio %d polarity %d\n",
  2192. spec->gpio_led,
  2193. spec->gpio_led_polarity);
  2194. }
  2195. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2196. [STAC_92HD71BXX_REF] = {
  2197. .type = HDA_FIXUP_FUNC,
  2198. .v.func = stac92hd71bxx_fixup_ref,
  2199. },
  2200. [STAC_DELL_M4_1] = {
  2201. .type = HDA_FIXUP_PINS,
  2202. .v.pins = dell_m4_1_pin_configs,
  2203. },
  2204. [STAC_DELL_M4_2] = {
  2205. .type = HDA_FIXUP_PINS,
  2206. .v.pins = dell_m4_2_pin_configs,
  2207. },
  2208. [STAC_DELL_M4_3] = {
  2209. .type = HDA_FIXUP_PINS,
  2210. .v.pins = dell_m4_3_pin_configs,
  2211. },
  2212. [STAC_HP_M4] = {
  2213. .type = HDA_FIXUP_FUNC,
  2214. .v.func = stac92hd71bxx_fixup_hp_m4,
  2215. .chained = true,
  2216. .chain_id = STAC_92HD71BXX_HP,
  2217. },
  2218. [STAC_HP_DV4] = {
  2219. .type = HDA_FIXUP_FUNC,
  2220. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2221. .chained = true,
  2222. .chain_id = STAC_HP_DV5,
  2223. },
  2224. [STAC_HP_DV5] = {
  2225. .type = HDA_FIXUP_FUNC,
  2226. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2227. .chained = true,
  2228. .chain_id = STAC_92HD71BXX_HP,
  2229. },
  2230. [STAC_HP_HDX] = {
  2231. .type = HDA_FIXUP_FUNC,
  2232. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2233. .chained = true,
  2234. .chain_id = STAC_92HD71BXX_HP,
  2235. },
  2236. [STAC_92HD71BXX_HP] = {
  2237. .type = HDA_FIXUP_FUNC,
  2238. .v.func = stac92hd71bxx_fixup_hp,
  2239. },
  2240. };
  2241. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2242. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2243. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2244. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2245. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2246. { .id = STAC_HP_M4, .name = "hp-m4" },
  2247. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2248. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2249. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2250. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2251. {}
  2252. };
  2253. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2254. /* SigmaTel reference board */
  2255. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2256. "DFI LanParty", STAC_92HD71BXX_REF),
  2257. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2258. "DFI LanParty", STAC_92HD71BXX_REF),
  2259. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2260. "HP", STAC_HP_DV5),
  2261. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2262. "HP", STAC_HP_DV5),
  2263. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2264. "HP dv4-7", STAC_HP_DV4),
  2265. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2266. "HP dv4-7", STAC_HP_DV5),
  2267. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2268. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2269. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2270. "HP mini 1000", STAC_HP_M4),
  2271. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2272. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2273. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2274. "HP dv6", STAC_HP_DV5),
  2275. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2276. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2277. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2278. "HP DV6", STAC_HP_DV5),
  2279. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  2280. "HP", STAC_HP_DV5),
  2281. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  2282. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  2283. "unknown Dell", STAC_DELL_M4_1),
  2284. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  2285. "unknown Dell", STAC_DELL_M4_1),
  2286. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  2287. "unknown Dell", STAC_DELL_M4_1),
  2288. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  2289. "unknown Dell", STAC_DELL_M4_1),
  2290. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  2291. "unknown Dell", STAC_DELL_M4_1),
  2292. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  2293. "unknown Dell", STAC_DELL_M4_1),
  2294. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  2295. "unknown Dell", STAC_DELL_M4_1),
  2296. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  2297. "unknown Dell", STAC_DELL_M4_2),
  2298. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  2299. "unknown Dell", STAC_DELL_M4_2),
  2300. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  2301. "unknown Dell", STAC_DELL_M4_2),
  2302. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  2303. "unknown Dell", STAC_DELL_M4_2),
  2304. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  2305. "unknown Dell", STAC_DELL_M4_3),
  2306. {} /* terminator */
  2307. };
  2308. static const struct hda_pintbl ref922x_pin_configs[] = {
  2309. { 0x0a, 0x01014010 },
  2310. { 0x0b, 0x01016011 },
  2311. { 0x0c, 0x01012012 },
  2312. { 0x0d, 0x0221401f },
  2313. { 0x0e, 0x01813122 },
  2314. { 0x0f, 0x01011014 },
  2315. { 0x10, 0x01441030 },
  2316. { 0x11, 0x01c41030 },
  2317. { 0x15, 0x40000100 },
  2318. { 0x1b, 0x40000100 },
  2319. {}
  2320. };
  2321. /*
  2322. STAC 922X pin configs for
  2323. 102801A7
  2324. 102801AB
  2325. 102801A9
  2326. 102801D1
  2327. 102801D2
  2328. */
  2329. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  2330. { 0x0a, 0x02214030 },
  2331. { 0x0b, 0x01a19021 },
  2332. { 0x0c, 0x01111012 },
  2333. { 0x0d, 0x01114010 },
  2334. { 0x0e, 0x02a19020 },
  2335. { 0x0f, 0x01117011 },
  2336. { 0x10, 0x400001f0 },
  2337. { 0x11, 0x400001f1 },
  2338. { 0x15, 0x01813122 },
  2339. { 0x1b, 0x400001f2 },
  2340. {}
  2341. };
  2342. /*
  2343. STAC 922X pin configs for
  2344. 102801AC
  2345. 102801D0
  2346. */
  2347. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  2348. { 0x0a, 0x02214030 },
  2349. { 0x0b, 0x01a19021 },
  2350. { 0x0c, 0x01111012 },
  2351. { 0x0d, 0x01114010 },
  2352. { 0x0e, 0x02a19020 },
  2353. { 0x0f, 0x01117011 },
  2354. { 0x10, 0x01451140 },
  2355. { 0x11, 0x400001f0 },
  2356. { 0x15, 0x01813122 },
  2357. { 0x1b, 0x400001f1 },
  2358. {}
  2359. };
  2360. /*
  2361. STAC 922X pin configs for
  2362. 102801BF
  2363. */
  2364. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  2365. { 0x0a, 0x0321101f },
  2366. { 0x0b, 0x01112024 },
  2367. { 0x0c, 0x01111222 },
  2368. { 0x0d, 0x91174220 },
  2369. { 0x0e, 0x03a11050 },
  2370. { 0x0f, 0x01116221 },
  2371. { 0x10, 0x90a70330 },
  2372. { 0x11, 0x01452340 },
  2373. { 0x15, 0x40C003f1 },
  2374. { 0x1b, 0x405003f0 },
  2375. {}
  2376. };
  2377. /*
  2378. STAC 9221 A1 pin configs for
  2379. 102801D7 (Dell XPS M1210)
  2380. */
  2381. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  2382. { 0x0a, 0x02211211 },
  2383. { 0x0b, 0x408103ff },
  2384. { 0x0c, 0x02a1123e },
  2385. { 0x0d, 0x90100310 },
  2386. { 0x0e, 0x408003f1 },
  2387. { 0x0f, 0x0221121f },
  2388. { 0x10, 0x03451340 },
  2389. { 0x11, 0x40c003f2 },
  2390. { 0x15, 0x508003f3 },
  2391. { 0x1b, 0x405003f4 },
  2392. {}
  2393. };
  2394. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  2395. { 0x0a, 0x0221401f },
  2396. { 0x0b, 0x01a19022 },
  2397. { 0x0c, 0x01813021 },
  2398. { 0x0d, 0x01014010 },
  2399. { 0x0e, 0x40000100 },
  2400. { 0x0f, 0x40000100 },
  2401. { 0x10, 0x40000100 },
  2402. { 0x11, 0x40000100 },
  2403. { 0x15, 0x02a19120 },
  2404. { 0x1b, 0x40000100 },
  2405. {}
  2406. };
  2407. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  2408. { 0x0a, 0x0221401f },
  2409. { 0x0b, 0x01011012 },
  2410. { 0x0c, 0x01813024 },
  2411. { 0x0d, 0x01014010 },
  2412. { 0x0e, 0x01a19021 },
  2413. { 0x0f, 0x01016011 },
  2414. { 0x10, 0x01452130 },
  2415. { 0x11, 0x40000100 },
  2416. { 0x15, 0x02a19320 },
  2417. { 0x1b, 0x40000100 },
  2418. {}
  2419. };
  2420. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  2421. { 0x0a, 0x0121e21f },
  2422. { 0x0b, 0x400000ff },
  2423. { 0x0c, 0x9017e110 },
  2424. { 0x0d, 0x400000fd },
  2425. { 0x0e, 0x400000fe },
  2426. { 0x0f, 0x0181e020 },
  2427. { 0x10, 0x1145e030 },
  2428. { 0x11, 0x11c5e240 },
  2429. { 0x15, 0x400000fc },
  2430. { 0x1b, 0x400000fb },
  2431. {}
  2432. };
  2433. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  2434. { 0x0a, 0x0121e21f },
  2435. { 0x0b, 0x90a7012e },
  2436. { 0x0c, 0x9017e110 },
  2437. { 0x0d, 0x400000fd },
  2438. { 0x0e, 0x400000fe },
  2439. { 0x0f, 0x0181e020 },
  2440. { 0x10, 0x1145e230 },
  2441. { 0x11, 0x500000fa },
  2442. { 0x15, 0x400000fc },
  2443. { 0x1b, 0x400000fb },
  2444. {}
  2445. };
  2446. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  2447. { 0x0a, 0x0121e21f },
  2448. { 0x0b, 0x90a7012e },
  2449. { 0x0c, 0x9017e110 },
  2450. { 0x0d, 0x400000fd },
  2451. { 0x0e, 0x400000fe },
  2452. { 0x0f, 0x0181e020 },
  2453. { 0x10, 0x1145e230 },
  2454. { 0x11, 0x11c5e240 },
  2455. { 0x15, 0x400000fc },
  2456. { 0x1b, 0x400000fb },
  2457. {}
  2458. };
  2459. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  2460. { 0x0a, 0x0321e21f },
  2461. { 0x0b, 0x03a1e02e },
  2462. { 0x0c, 0x9017e110 },
  2463. { 0x0d, 0x9017e11f },
  2464. { 0x0e, 0x400000fe },
  2465. { 0x0f, 0x0381e020 },
  2466. { 0x10, 0x1345e230 },
  2467. { 0x11, 0x13c5e240 },
  2468. { 0x15, 0x400000fc },
  2469. { 0x1b, 0x400000fb },
  2470. {}
  2471. };
  2472. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  2473. { 0x0a, 0x0321e21f },
  2474. { 0x0b, 0x03a1e02e },
  2475. { 0x0c, 0x9017e110 },
  2476. { 0x0d, 0x9017e11f },
  2477. { 0x0e, 0x400000fe },
  2478. { 0x0f, 0x0381e020 },
  2479. { 0x10, 0x1345e230 },
  2480. { 0x11, 0x13c5e240 },
  2481. { 0x15, 0x400000fc },
  2482. { 0x1b, 0x400000fb },
  2483. {}
  2484. };
  2485. static const struct hda_pintbl ecs202_pin_configs[] = {
  2486. { 0x0a, 0x0221401f },
  2487. { 0x0b, 0x02a19020 },
  2488. { 0x0c, 0x01a19020 },
  2489. { 0x0d, 0x01114010 },
  2490. { 0x0e, 0x408000f0 },
  2491. { 0x0f, 0x01813022 },
  2492. { 0x10, 0x074510a0 },
  2493. { 0x11, 0x40c400f1 },
  2494. { 0x15, 0x9037012e },
  2495. { 0x1b, 0x40e000f2 },
  2496. {}
  2497. };
  2498. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  2499. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  2500. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  2501. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  2502. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  2503. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  2504. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  2505. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  2506. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  2507. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  2508. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  2509. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  2510. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  2511. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  2512. {}
  2513. };
  2514. static const struct hda_fixup stac922x_fixups[];
  2515. /* remap the fixup from codec SSID and apply it */
  2516. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  2517. const struct hda_fixup *fix,
  2518. int action)
  2519. {
  2520. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2521. return;
  2522. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  2523. stac922x_fixups);
  2524. if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
  2525. snd_hda_apply_fixup(codec, action);
  2526. }
  2527. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  2528. const struct hda_fixup *fix,
  2529. int action)
  2530. {
  2531. struct sigmatel_spec *spec = codec->spec;
  2532. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2533. spec->gpio_mask = spec->gpio_dir = 0x03;
  2534. spec->gpio_data = 0x03;
  2535. }
  2536. }
  2537. static const struct hda_fixup stac922x_fixups[] = {
  2538. [STAC_D945_REF] = {
  2539. .type = HDA_FIXUP_PINS,
  2540. .v.pins = ref922x_pin_configs,
  2541. },
  2542. [STAC_D945GTP3] = {
  2543. .type = HDA_FIXUP_PINS,
  2544. .v.pins = d945gtp3_pin_configs,
  2545. },
  2546. [STAC_D945GTP5] = {
  2547. .type = HDA_FIXUP_PINS,
  2548. .v.pins = d945gtp5_pin_configs,
  2549. },
  2550. [STAC_INTEL_MAC_AUTO] = {
  2551. .type = HDA_FIXUP_FUNC,
  2552. .v.func = stac922x_fixup_intel_mac_auto,
  2553. },
  2554. [STAC_INTEL_MAC_V1] = {
  2555. .type = HDA_FIXUP_PINS,
  2556. .v.pins = intel_mac_v1_pin_configs,
  2557. .chained = true,
  2558. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2559. },
  2560. [STAC_INTEL_MAC_V2] = {
  2561. .type = HDA_FIXUP_PINS,
  2562. .v.pins = intel_mac_v2_pin_configs,
  2563. .chained = true,
  2564. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2565. },
  2566. [STAC_INTEL_MAC_V3] = {
  2567. .type = HDA_FIXUP_PINS,
  2568. .v.pins = intel_mac_v3_pin_configs,
  2569. .chained = true,
  2570. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2571. },
  2572. [STAC_INTEL_MAC_V4] = {
  2573. .type = HDA_FIXUP_PINS,
  2574. .v.pins = intel_mac_v4_pin_configs,
  2575. .chained = true,
  2576. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2577. },
  2578. [STAC_INTEL_MAC_V5] = {
  2579. .type = HDA_FIXUP_PINS,
  2580. .v.pins = intel_mac_v5_pin_configs,
  2581. .chained = true,
  2582. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2583. },
  2584. [STAC_922X_INTEL_MAC_GPIO] = {
  2585. .type = HDA_FIXUP_FUNC,
  2586. .v.func = stac922x_fixup_intel_mac_gpio,
  2587. },
  2588. [STAC_ECS_202] = {
  2589. .type = HDA_FIXUP_PINS,
  2590. .v.pins = ecs202_pin_configs,
  2591. },
  2592. [STAC_922X_DELL_D81] = {
  2593. .type = HDA_FIXUP_PINS,
  2594. .v.pins = dell_922x_d81_pin_configs,
  2595. },
  2596. [STAC_922X_DELL_D82] = {
  2597. .type = HDA_FIXUP_PINS,
  2598. .v.pins = dell_922x_d82_pin_configs,
  2599. },
  2600. [STAC_922X_DELL_M81] = {
  2601. .type = HDA_FIXUP_PINS,
  2602. .v.pins = dell_922x_m81_pin_configs,
  2603. },
  2604. [STAC_922X_DELL_M82] = {
  2605. .type = HDA_FIXUP_PINS,
  2606. .v.pins = dell_922x_m82_pin_configs,
  2607. },
  2608. };
  2609. static const struct hda_model_fixup stac922x_models[] = {
  2610. { .id = STAC_D945_REF, .name = "ref" },
  2611. { .id = STAC_D945GTP5, .name = "5stack" },
  2612. { .id = STAC_D945GTP3, .name = "3stack" },
  2613. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  2614. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  2615. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  2616. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  2617. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  2618. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  2619. { .id = STAC_ECS_202, .name = "ecs202" },
  2620. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  2621. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  2622. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  2623. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  2624. /* for backward compatibility */
  2625. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  2626. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  2627. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  2628. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  2629. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  2630. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  2631. {}
  2632. };
  2633. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  2634. /* SigmaTel reference board */
  2635. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2636. "DFI LanParty", STAC_D945_REF),
  2637. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2638. "DFI LanParty", STAC_D945_REF),
  2639. /* Intel 945G based systems */
  2640. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  2641. "Intel D945G", STAC_D945GTP3),
  2642. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  2643. "Intel D945G", STAC_D945GTP3),
  2644. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  2645. "Intel D945G", STAC_D945GTP3),
  2646. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  2647. "Intel D945G", STAC_D945GTP3),
  2648. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  2649. "Intel D945G", STAC_D945GTP3),
  2650. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  2651. "Intel D945G", STAC_D945GTP3),
  2652. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  2653. "Intel D945G", STAC_D945GTP3),
  2654. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  2655. "Intel D945G", STAC_D945GTP3),
  2656. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  2657. "Intel D945G", STAC_D945GTP3),
  2658. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  2659. "Intel D945G", STAC_D945GTP3),
  2660. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  2661. "Intel D945G", STAC_D945GTP3),
  2662. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  2663. "Intel D945G", STAC_D945GTP3),
  2664. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  2665. "Intel D945G", STAC_D945GTP3),
  2666. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  2667. "Intel D945G", STAC_D945GTP3),
  2668. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  2669. "Intel D945G", STAC_D945GTP3),
  2670. /* Intel D945G 5-stack systems */
  2671. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  2672. "Intel D945G", STAC_D945GTP5),
  2673. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  2674. "Intel D945G", STAC_D945GTP5),
  2675. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  2676. "Intel D945G", STAC_D945GTP5),
  2677. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  2678. "Intel D945G", STAC_D945GTP5),
  2679. /* Intel 945P based systems */
  2680. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  2681. "Intel D945P", STAC_D945GTP3),
  2682. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  2683. "Intel D945P", STAC_D945GTP3),
  2684. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  2685. "Intel D945P", STAC_D945GTP3),
  2686. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  2687. "Intel D945P", STAC_D945GTP3),
  2688. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  2689. "Intel D945P", STAC_D945GTP3),
  2690. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  2691. "Intel D945P", STAC_D945GTP5),
  2692. /* other intel */
  2693. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  2694. "Intel D945", STAC_D945_REF),
  2695. /* other systems */
  2696. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  2697. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  2698. /* Dell systems */
  2699. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  2700. "unknown Dell", STAC_922X_DELL_D81),
  2701. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  2702. "unknown Dell", STAC_922X_DELL_D81),
  2703. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  2704. "unknown Dell", STAC_922X_DELL_D81),
  2705. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  2706. "unknown Dell", STAC_922X_DELL_D82),
  2707. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  2708. "unknown Dell", STAC_922X_DELL_M81),
  2709. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  2710. "unknown Dell", STAC_922X_DELL_D82),
  2711. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  2712. "unknown Dell", STAC_922X_DELL_D81),
  2713. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  2714. "unknown Dell", STAC_922X_DELL_D81),
  2715. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  2716. "Dell XPS M1210", STAC_922X_DELL_M82),
  2717. /* ECS/PC Chips boards */
  2718. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  2719. "ECS/PC chips", STAC_ECS_202),
  2720. {} /* terminator */
  2721. };
  2722. static const struct hda_pintbl ref927x_pin_configs[] = {
  2723. { 0x0a, 0x02214020 },
  2724. { 0x0b, 0x02a19080 },
  2725. { 0x0c, 0x0181304e },
  2726. { 0x0d, 0x01014010 },
  2727. { 0x0e, 0x01a19040 },
  2728. { 0x0f, 0x01011012 },
  2729. { 0x10, 0x01016011 },
  2730. { 0x11, 0x0101201f },
  2731. { 0x12, 0x183301f0 },
  2732. { 0x13, 0x18a001f0 },
  2733. { 0x14, 0x18a001f0 },
  2734. { 0x21, 0x01442070 },
  2735. { 0x22, 0x01c42190 },
  2736. { 0x23, 0x40000100 },
  2737. {}
  2738. };
  2739. static const struct hda_pintbl d965_3st_pin_configs[] = {
  2740. { 0x0a, 0x0221401f },
  2741. { 0x0b, 0x02a19120 },
  2742. { 0x0c, 0x40000100 },
  2743. { 0x0d, 0x01014011 },
  2744. { 0x0e, 0x01a19021 },
  2745. { 0x0f, 0x01813024 },
  2746. { 0x10, 0x40000100 },
  2747. { 0x11, 0x40000100 },
  2748. { 0x12, 0x40000100 },
  2749. { 0x13, 0x40000100 },
  2750. { 0x14, 0x40000100 },
  2751. { 0x21, 0x40000100 },
  2752. { 0x22, 0x40000100 },
  2753. { 0x23, 0x40000100 },
  2754. {}
  2755. };
  2756. static const struct hda_pintbl d965_5st_pin_configs[] = {
  2757. { 0x0a, 0x02214020 },
  2758. { 0x0b, 0x02a19080 },
  2759. { 0x0c, 0x0181304e },
  2760. { 0x0d, 0x01014010 },
  2761. { 0x0e, 0x01a19040 },
  2762. { 0x0f, 0x01011012 },
  2763. { 0x10, 0x01016011 },
  2764. { 0x11, 0x40000100 },
  2765. { 0x12, 0x40000100 },
  2766. { 0x13, 0x40000100 },
  2767. { 0x14, 0x40000100 },
  2768. { 0x21, 0x01442070 },
  2769. { 0x22, 0x40000100 },
  2770. { 0x23, 0x40000100 },
  2771. {}
  2772. };
  2773. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  2774. { 0x0a, 0x40000100 },
  2775. { 0x0b, 0x40000100 },
  2776. { 0x0c, 0x0181304e },
  2777. { 0x0d, 0x01014010 },
  2778. { 0x0e, 0x01a19040 },
  2779. { 0x0f, 0x01011012 },
  2780. { 0x10, 0x01016011 },
  2781. { 0x11, 0x40000100 },
  2782. { 0x12, 0x40000100 },
  2783. { 0x13, 0x40000100 },
  2784. { 0x14, 0x40000100 },
  2785. { 0x21, 0x01442070 },
  2786. { 0x22, 0x40000100 },
  2787. { 0x23, 0x40000100 },
  2788. {}
  2789. };
  2790. static const struct hda_pintbl dell_3st_pin_configs[] = {
  2791. { 0x0a, 0x02211230 },
  2792. { 0x0b, 0x02a11220 },
  2793. { 0x0c, 0x01a19040 },
  2794. { 0x0d, 0x01114210 },
  2795. { 0x0e, 0x01111212 },
  2796. { 0x0f, 0x01116211 },
  2797. { 0x10, 0x01813050 },
  2798. { 0x11, 0x01112214 },
  2799. { 0x12, 0x403003fa },
  2800. { 0x13, 0x90a60040 },
  2801. { 0x14, 0x90a60040 },
  2802. { 0x21, 0x404003fb },
  2803. { 0x22, 0x40c003fc },
  2804. { 0x23, 0x40000100 },
  2805. {}
  2806. };
  2807. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  2808. const struct hda_fixup *fix, int action)
  2809. {
  2810. /* no jack detecion for ref-no-jd model */
  2811. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  2812. codec->no_jack_detect = 1;
  2813. }
  2814. static void stac927x_fixup_ref(struct hda_codec *codec,
  2815. const struct hda_fixup *fix, int action)
  2816. {
  2817. struct sigmatel_spec *spec = codec->spec;
  2818. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2819. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  2820. spec->eapd_mask = spec->gpio_mask = 0;
  2821. spec->gpio_dir = spec->gpio_data = 0;
  2822. }
  2823. }
  2824. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  2825. const struct hda_fixup *fix, int action)
  2826. {
  2827. struct sigmatel_spec *spec = codec->spec;
  2828. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2829. return;
  2830. if (codec->subsystem_id != 0x1028022f) {
  2831. /* GPIO2 High = Enable EAPD */
  2832. spec->eapd_mask = spec->gpio_mask = 0x04;
  2833. spec->gpio_dir = spec->gpio_data = 0x04;
  2834. }
  2835. snd_hda_add_verbs(codec, dell_3st_core_init);
  2836. spec->volknob_init = 1;
  2837. }
  2838. static void stac927x_fixup_volknob(struct hda_codec *codec,
  2839. const struct hda_fixup *fix, int action)
  2840. {
  2841. struct sigmatel_spec *spec = codec->spec;
  2842. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2843. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  2844. spec->volknob_init = 1;
  2845. }
  2846. }
  2847. static const struct hda_fixup stac927x_fixups[] = {
  2848. [STAC_D965_REF_NO_JD] = {
  2849. .type = HDA_FIXUP_FUNC,
  2850. .v.func = stac927x_fixup_ref_no_jd,
  2851. .chained = true,
  2852. .chain_id = STAC_D965_REF,
  2853. },
  2854. [STAC_D965_REF] = {
  2855. .type = HDA_FIXUP_FUNC,
  2856. .v.func = stac927x_fixup_ref,
  2857. },
  2858. [STAC_D965_3ST] = {
  2859. .type = HDA_FIXUP_PINS,
  2860. .v.pins = d965_3st_pin_configs,
  2861. .chained = true,
  2862. .chain_id = STAC_D965_VERBS,
  2863. },
  2864. [STAC_D965_5ST] = {
  2865. .type = HDA_FIXUP_PINS,
  2866. .v.pins = d965_5st_pin_configs,
  2867. .chained = true,
  2868. .chain_id = STAC_D965_VERBS,
  2869. },
  2870. [STAC_D965_VERBS] = {
  2871. .type = HDA_FIXUP_VERBS,
  2872. .v.verbs = d965_core_init,
  2873. },
  2874. [STAC_D965_5ST_NO_FP] = {
  2875. .type = HDA_FIXUP_PINS,
  2876. .v.pins = d965_5st_no_fp_pin_configs,
  2877. },
  2878. [STAC_DELL_3ST] = {
  2879. .type = HDA_FIXUP_PINS,
  2880. .v.pins = dell_3st_pin_configs,
  2881. .chained = true,
  2882. .chain_id = STAC_927X_DELL_DMIC,
  2883. },
  2884. [STAC_DELL_BIOS] = {
  2885. .type = HDA_FIXUP_PINS,
  2886. .v.pins = (const struct hda_pintbl[]) {
  2887. /* configure the analog microphone on some laptops */
  2888. { 0x0c, 0x90a79130 },
  2889. /* correct the front output jack as a hp out */
  2890. { 0x0f, 0x0227011f },
  2891. /* correct the front input jack as a mic */
  2892. { 0x0e, 0x02a79130 },
  2893. {}
  2894. },
  2895. .chained = true,
  2896. .chain_id = STAC_927X_DELL_DMIC,
  2897. },
  2898. [STAC_DELL_BIOS_SPDIF] = {
  2899. .type = HDA_FIXUP_PINS,
  2900. .v.pins = (const struct hda_pintbl[]) {
  2901. /* correct the device field to SPDIF out */
  2902. { 0x21, 0x01442070 },
  2903. {}
  2904. },
  2905. .chained = true,
  2906. .chain_id = STAC_DELL_BIOS,
  2907. },
  2908. [STAC_927X_DELL_DMIC] = {
  2909. .type = HDA_FIXUP_FUNC,
  2910. .v.func = stac927x_fixup_dell_dmic,
  2911. },
  2912. [STAC_927X_VOLKNOB] = {
  2913. .type = HDA_FIXUP_FUNC,
  2914. .v.func = stac927x_fixup_volknob,
  2915. },
  2916. };
  2917. static const struct hda_model_fixup stac927x_models[] = {
  2918. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  2919. { .id = STAC_D965_REF, .name = "ref" },
  2920. { .id = STAC_D965_3ST, .name = "3stack" },
  2921. { .id = STAC_D965_5ST, .name = "5stack" },
  2922. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  2923. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  2924. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  2925. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  2926. {}
  2927. };
  2928. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  2929. /* SigmaTel reference board */
  2930. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2931. "DFI LanParty", STAC_D965_REF),
  2932. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2933. "DFI LanParty", STAC_D965_REF),
  2934. /* Intel 946 based systems */
  2935. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  2936. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  2937. /* 965 based 3 stack systems */
  2938. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  2939. "Intel D965", STAC_D965_3ST),
  2940. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  2941. "Intel D965", STAC_D965_3ST),
  2942. /* Dell 3 stack systems */
  2943. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  2944. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  2945. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  2946. /* Dell 3 stack systems with verb table in BIOS */
  2947. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  2948. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  2949. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  2950. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  2951. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  2952. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  2953. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  2954. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  2955. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  2956. /* 965 based 5 stack systems */
  2957. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  2958. "Intel D965", STAC_D965_5ST),
  2959. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  2960. "Intel D965", STAC_D965_5ST),
  2961. /* volume-knob fixes */
  2962. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  2963. {} /* terminator */
  2964. };
  2965. static const struct hda_pintbl ref9205_pin_configs[] = {
  2966. { 0x0a, 0x40000100 },
  2967. { 0x0b, 0x40000100 },
  2968. { 0x0c, 0x01016011 },
  2969. { 0x0d, 0x01014010 },
  2970. { 0x0e, 0x01813122 },
  2971. { 0x0f, 0x01a19021 },
  2972. { 0x14, 0x01019020 },
  2973. { 0x16, 0x40000100 },
  2974. { 0x17, 0x90a000f0 },
  2975. { 0x18, 0x90a000f0 },
  2976. { 0x21, 0x01441030 },
  2977. { 0x22, 0x01c41030 },
  2978. {}
  2979. };
  2980. /*
  2981. STAC 9205 pin configs for
  2982. 102801F1
  2983. 102801F2
  2984. 102801FC
  2985. 102801FD
  2986. 10280204
  2987. 1028021F
  2988. 10280228 (Dell Vostro 1500)
  2989. 10280229 (Dell Vostro 1700)
  2990. */
  2991. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  2992. { 0x0a, 0x0321101F },
  2993. { 0x0b, 0x03A11020 },
  2994. { 0x0c, 0x400003FA },
  2995. { 0x0d, 0x90170310 },
  2996. { 0x0e, 0x400003FB },
  2997. { 0x0f, 0x400003FC },
  2998. { 0x14, 0x400003FD },
  2999. { 0x16, 0x40F000F9 },
  3000. { 0x17, 0x90A60330 },
  3001. { 0x18, 0x400003FF },
  3002. { 0x21, 0x0144131F },
  3003. { 0x22, 0x40C003FE },
  3004. {}
  3005. };
  3006. /*
  3007. STAC 9205 pin configs for
  3008. 102801F9
  3009. 102801FA
  3010. 102801FE
  3011. 102801FF (Dell Precision M4300)
  3012. 10280206
  3013. 10280200
  3014. 10280201
  3015. */
  3016. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  3017. { 0x0a, 0x0321101f },
  3018. { 0x0b, 0x03a11020 },
  3019. { 0x0c, 0x90a70330 },
  3020. { 0x0d, 0x90170310 },
  3021. { 0x0e, 0x400000fe },
  3022. { 0x0f, 0x400000ff },
  3023. { 0x14, 0x400000fd },
  3024. { 0x16, 0x40f000f9 },
  3025. { 0x17, 0x400000fa },
  3026. { 0x18, 0x400000fc },
  3027. { 0x21, 0x0144131f },
  3028. { 0x22, 0x40c003f8 },
  3029. /* Enable SPDIF in/out */
  3030. { 0x1f, 0x01441030 },
  3031. { 0x20, 0x1c410030 },
  3032. {}
  3033. };
  3034. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  3035. { 0x0a, 0x0421101f },
  3036. { 0x0b, 0x04a11020 },
  3037. { 0x0c, 0x400003fa },
  3038. { 0x0d, 0x90170310 },
  3039. { 0x0e, 0x400003fb },
  3040. { 0x0f, 0x400003fc },
  3041. { 0x14, 0x400003fd },
  3042. { 0x16, 0x400003f9 },
  3043. { 0x17, 0x90a60330 },
  3044. { 0x18, 0x400003ff },
  3045. { 0x21, 0x01441340 },
  3046. { 0x22, 0x40c003fe },
  3047. {}
  3048. };
  3049. static void stac9205_fixup_ref(struct hda_codec *codec,
  3050. const struct hda_fixup *fix, int action)
  3051. {
  3052. struct sigmatel_spec *spec = codec->spec;
  3053. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3054. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  3055. /* SPDIF-In enabled */
  3056. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  3057. }
  3058. }
  3059. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  3060. const struct hda_fixup *fix, int action)
  3061. {
  3062. struct sigmatel_spec *spec = codec->spec;
  3063. struct hda_jack_tbl *jack;
  3064. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3065. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  3066. /* Enable unsol response for GPIO4/Dock HP connection */
  3067. snd_hda_codec_write_cache(codec, codec->afg, 0,
  3068. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  3069. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  3070. STAC_VREF_EVENT,
  3071. stac_vref_event);
  3072. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  3073. if (jack)
  3074. jack->private_data = 0x01;
  3075. spec->gpio_dir = 0x0b;
  3076. spec->eapd_mask = 0x01;
  3077. spec->gpio_mask = 0x1b;
  3078. spec->gpio_mute = 0x10;
  3079. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3080. * GPIO3 Low = DRM
  3081. */
  3082. spec->gpio_data = 0x01;
  3083. }
  3084. }
  3085. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3086. const struct hda_fixup *fix, int action)
  3087. {
  3088. struct sigmatel_spec *spec = codec->spec;
  3089. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3090. spec->eapd_switch = 0;
  3091. }
  3092. static const struct hda_fixup stac9205_fixups[] = {
  3093. [STAC_9205_REF] = {
  3094. .type = HDA_FIXUP_FUNC,
  3095. .v.func = stac9205_fixup_ref,
  3096. },
  3097. [STAC_9205_DELL_M42] = {
  3098. .type = HDA_FIXUP_PINS,
  3099. .v.pins = dell_9205_m42_pin_configs,
  3100. },
  3101. [STAC_9205_DELL_M43] = {
  3102. .type = HDA_FIXUP_FUNC,
  3103. .v.func = stac9205_fixup_dell_m43,
  3104. },
  3105. [STAC_9205_DELL_M44] = {
  3106. .type = HDA_FIXUP_PINS,
  3107. .v.pins = dell_9205_m44_pin_configs,
  3108. },
  3109. [STAC_9205_EAPD] = {
  3110. .type = HDA_FIXUP_FUNC,
  3111. .v.func = stac9205_fixup_eapd,
  3112. },
  3113. {}
  3114. };
  3115. static const struct hda_model_fixup stac9205_models[] = {
  3116. { .id = STAC_9205_REF, .name = "ref" },
  3117. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3118. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3119. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3120. { .id = STAC_9205_EAPD, .name = "eapd" },
  3121. {}
  3122. };
  3123. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3124. /* SigmaTel reference board */
  3125. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3126. "DFI LanParty", STAC_9205_REF),
  3127. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3128. "SigmaTel", STAC_9205_REF),
  3129. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3130. "DFI LanParty", STAC_9205_REF),
  3131. /* Dell */
  3132. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3133. "unknown Dell", STAC_9205_DELL_M42),
  3134. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3135. "unknown Dell", STAC_9205_DELL_M42),
  3136. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3137. "Dell Precision", STAC_9205_DELL_M43),
  3138. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3139. "Dell Precision", STAC_9205_DELL_M43),
  3140. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3141. "Dell Precision", STAC_9205_DELL_M43),
  3142. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3143. "unknown Dell", STAC_9205_DELL_M42),
  3144. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3145. "unknown Dell", STAC_9205_DELL_M42),
  3146. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3147. "Dell Precision", STAC_9205_DELL_M43),
  3148. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3149. "Dell Precision M4300", STAC_9205_DELL_M43),
  3150. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3151. "unknown Dell", STAC_9205_DELL_M42),
  3152. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3153. "Dell Precision", STAC_9205_DELL_M43),
  3154. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3155. "Dell Precision", STAC_9205_DELL_M43),
  3156. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3157. "Dell Precision", STAC_9205_DELL_M43),
  3158. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3159. "Dell Inspiron", STAC_9205_DELL_M44),
  3160. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3161. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3162. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3163. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3164. /* Gateway */
  3165. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3166. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3167. {} /* terminator */
  3168. };
  3169. static int stac_parse_auto_config(struct hda_codec *codec)
  3170. {
  3171. struct sigmatel_spec *spec = codec->spec;
  3172. int err;
  3173. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  3174. if (err < 0)
  3175. return err;
  3176. /* add hooks */
  3177. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3178. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3179. spec->gen.automute_hook = stac_update_outputs;
  3180. spec->gen.hp_automute_hook = stac_hp_automute;
  3181. spec->gen.line_automute_hook = stac_line_automute;
  3182. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3183. if (err < 0)
  3184. return err;
  3185. /* minimum value is actually mute */
  3186. spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
  3187. /* setup analog beep controls */
  3188. if (spec->anabeep_nid > 0) {
  3189. err = stac_auto_create_beep_ctls(codec,
  3190. spec->anabeep_nid);
  3191. if (err < 0)
  3192. return err;
  3193. }
  3194. /* setup digital beep controls and input device */
  3195. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3196. if (spec->digbeep_nid > 0) {
  3197. hda_nid_t nid = spec->digbeep_nid;
  3198. unsigned int caps;
  3199. err = stac_auto_create_beep_ctls(codec, nid);
  3200. if (err < 0)
  3201. return err;
  3202. err = snd_hda_attach_beep_device(codec, nid);
  3203. if (err < 0)
  3204. return err;
  3205. if (codec->beep) {
  3206. /* IDT/STAC codecs have linear beep tone parameter */
  3207. codec->beep->linear_tone = spec->linear_tone_beep;
  3208. /* if no beep switch is available, make its own one */
  3209. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3210. if (!(caps & AC_AMPCAP_MUTE)) {
  3211. err = stac_beep_switch_ctl(codec);
  3212. if (err < 0)
  3213. return err;
  3214. }
  3215. }
  3216. }
  3217. #endif
  3218. if (spec->gpio_led)
  3219. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3220. if (spec->aloopback_ctl &&
  3221. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3222. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3223. return -ENOMEM;
  3224. }
  3225. if (spec->have_spdif_mux) {
  3226. err = stac_create_spdif_mux_ctls(codec);
  3227. if (err < 0)
  3228. return err;
  3229. }
  3230. stac_init_power_map(codec);
  3231. return 0;
  3232. }
  3233. static int stac_init(struct hda_codec *codec)
  3234. {
  3235. struct sigmatel_spec *spec = codec->spec;
  3236. unsigned int gpio;
  3237. int i;
  3238. /* override some hints */
  3239. stac_store_hints(codec);
  3240. /* set up GPIO */
  3241. gpio = spec->gpio_data;
  3242. /* turn on EAPD statically when spec->eapd_switch isn't set.
  3243. * otherwise, unsol event will turn it on/off dynamically
  3244. */
  3245. if (!spec->eapd_switch)
  3246. gpio |= spec->eapd_mask;
  3247. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
  3248. snd_hda_gen_init(codec);
  3249. /* sync the power-map */
  3250. if (spec->num_pwrs)
  3251. snd_hda_codec_write(codec, codec->afg, 0,
  3252. AC_VERB_IDT_SET_POWER_MAP,
  3253. spec->power_map_bits);
  3254. /* power down inactive ADCs */
  3255. if (spec->powerdown_adcs) {
  3256. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  3257. if (spec->active_adcs & (1 << i))
  3258. continue;
  3259. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  3260. AC_VERB_SET_POWER_STATE,
  3261. AC_PWRST_D3);
  3262. }
  3263. }
  3264. return 0;
  3265. }
  3266. static void stac_shutup(struct hda_codec *codec)
  3267. {
  3268. struct sigmatel_spec *spec = codec->spec;
  3269. snd_hda_shutup_pins(codec);
  3270. if (spec->eapd_mask)
  3271. stac_gpio_set(codec, spec->gpio_mask,
  3272. spec->gpio_dir, spec->gpio_data &
  3273. ~spec->eapd_mask);
  3274. }
  3275. static void stac_free(struct hda_codec *codec)
  3276. {
  3277. struct sigmatel_spec *spec = codec->spec;
  3278. if (!spec)
  3279. return;
  3280. snd_hda_gen_spec_free(&spec->gen);
  3281. kfree(spec);
  3282. snd_hda_detach_beep_device(codec);
  3283. }
  3284. #ifdef CONFIG_PROC_FS
  3285. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  3286. struct hda_codec *codec, hda_nid_t nid)
  3287. {
  3288. if (nid == codec->afg)
  3289. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  3290. snd_hda_codec_read(codec, nid, 0,
  3291. AC_VERB_IDT_GET_POWER_MAP, 0));
  3292. }
  3293. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  3294. struct hda_codec *codec,
  3295. unsigned int verb)
  3296. {
  3297. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  3298. snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
  3299. }
  3300. /* stac92hd71bxx, stac92hd73xx */
  3301. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  3302. struct hda_codec *codec, hda_nid_t nid)
  3303. {
  3304. stac92hd_proc_hook(buffer, codec, nid);
  3305. if (nid == codec->afg)
  3306. analog_loop_proc_hook(buffer, codec, 0xfa0);
  3307. }
  3308. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  3309. struct hda_codec *codec, hda_nid_t nid)
  3310. {
  3311. if (nid == codec->afg)
  3312. analog_loop_proc_hook(buffer, codec, 0xfe0);
  3313. }
  3314. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  3315. struct hda_codec *codec, hda_nid_t nid)
  3316. {
  3317. if (nid == codec->afg)
  3318. analog_loop_proc_hook(buffer, codec, 0xfeb);
  3319. }
  3320. #else
  3321. #define stac92hd_proc_hook NULL
  3322. #define stac92hd7x_proc_hook NULL
  3323. #define stac9205_proc_hook NULL
  3324. #define stac927x_proc_hook NULL
  3325. #endif
  3326. #ifdef CONFIG_PM
  3327. static int stac_resume(struct hda_codec *codec)
  3328. {
  3329. codec->patch_ops.init(codec);
  3330. snd_hda_codec_resume_amp(codec);
  3331. snd_hda_codec_resume_cache(codec);
  3332. return 0;
  3333. }
  3334. static int stac_suspend(struct hda_codec *codec)
  3335. {
  3336. stac_shutup(codec);
  3337. return 0;
  3338. }
  3339. static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  3340. unsigned int power_state)
  3341. {
  3342. unsigned int afg_power_state = power_state;
  3343. struct sigmatel_spec *spec = codec->spec;
  3344. if (power_state == AC_PWRST_D3) {
  3345. if (spec->vref_mute_led_nid) {
  3346. /* with vref-out pin used for mute led control
  3347. * codec AFG is prevented from D3 state
  3348. */
  3349. afg_power_state = AC_PWRST_D1;
  3350. }
  3351. /* this delay seems necessary to avoid click noise at power-down */
  3352. msleep(100);
  3353. }
  3354. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
  3355. afg_power_state);
  3356. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  3357. }
  3358. #else
  3359. #define stac_suspend NULL
  3360. #define stac_resume NULL
  3361. #define stac_set_power_state NULL
  3362. #endif /* CONFIG_PM */
  3363. static const struct hda_codec_ops stac_patch_ops = {
  3364. .build_controls = snd_hda_gen_build_controls,
  3365. .build_pcms = snd_hda_gen_build_pcms,
  3366. .init = stac_init,
  3367. .free = stac_free,
  3368. .unsol_event = snd_hda_jack_unsol_event,
  3369. #ifdef CONFIG_PM
  3370. .suspend = stac_suspend,
  3371. .resume = stac_resume,
  3372. #endif
  3373. .reboot_notify = stac_shutup,
  3374. };
  3375. static int alloc_stac_spec(struct hda_codec *codec)
  3376. {
  3377. struct sigmatel_spec *spec;
  3378. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  3379. if (!spec)
  3380. return -ENOMEM;
  3381. snd_hda_gen_spec_init(&spec->gen);
  3382. codec->spec = spec;
  3383. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  3384. return 0;
  3385. }
  3386. static int patch_stac9200(struct hda_codec *codec)
  3387. {
  3388. struct sigmatel_spec *spec;
  3389. int err;
  3390. err = alloc_stac_spec(codec);
  3391. if (err < 0)
  3392. return err;
  3393. spec = codec->spec;
  3394. spec->linear_tone_beep = 1;
  3395. spec->gen.own_eapd_ctl = 1;
  3396. codec->patch_ops = stac_patch_ops;
  3397. snd_hda_add_verbs(codec, stac9200_eapd_init);
  3398. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  3399. stac9200_fixups);
  3400. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3401. err = stac_parse_auto_config(codec);
  3402. if (err < 0) {
  3403. stac_free(codec);
  3404. return err;
  3405. }
  3406. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3407. return 0;
  3408. }
  3409. static int patch_stac925x(struct hda_codec *codec)
  3410. {
  3411. struct sigmatel_spec *spec;
  3412. int err;
  3413. err = alloc_stac_spec(codec);
  3414. if (err < 0)
  3415. return err;
  3416. spec = codec->spec;
  3417. spec->linear_tone_beep = 1;
  3418. spec->gen.own_eapd_ctl = 1;
  3419. codec->patch_ops = stac_patch_ops;
  3420. snd_hda_add_verbs(codec, stac925x_core_init);
  3421. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  3422. stac925x_fixups);
  3423. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3424. err = stac_parse_auto_config(codec);
  3425. if (err < 0) {
  3426. stac_free(codec);
  3427. return err;
  3428. }
  3429. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3430. return 0;
  3431. }
  3432. static int patch_stac92hd73xx(struct hda_codec *codec)
  3433. {
  3434. struct sigmatel_spec *spec;
  3435. int err;
  3436. int num_dacs;
  3437. err = alloc_stac_spec(codec);
  3438. if (err < 0)
  3439. return err;
  3440. spec = codec->spec;
  3441. spec->linear_tone_beep = 0;
  3442. spec->gen.mixer_nid = 0x1d;
  3443. spec->have_spdif_mux = 1;
  3444. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  3445. if (num_dacs < 3 || num_dacs > 5) {
  3446. printk(KERN_WARNING "hda_codec: Could not determine "
  3447. "number of channels defaulting to DAC count\n");
  3448. num_dacs = 5;
  3449. }
  3450. switch (num_dacs) {
  3451. case 0x3: /* 6 Channel */
  3452. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  3453. break;
  3454. case 0x4: /* 8 Channel */
  3455. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  3456. break;
  3457. case 0x5: /* 10 Channel */
  3458. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  3459. break;
  3460. }
  3461. spec->aloopback_mask = 0x01;
  3462. spec->aloopback_shift = 8;
  3463. spec->digbeep_nid = 0x1c;
  3464. /* GPIO0 High = Enable EAPD */
  3465. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  3466. spec->gpio_data = 0x01;
  3467. spec->eapd_switch = 1;
  3468. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  3469. spec->pwr_nids = stac92hd73xx_pwr_nids;
  3470. spec->gen.own_eapd_ctl = 1;
  3471. spec->gen.power_down_unused = 1;
  3472. codec->patch_ops = stac_patch_ops;
  3473. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  3474. stac92hd73xx_fixups);
  3475. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3476. if (!spec->volknob_init)
  3477. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  3478. err = stac_parse_auto_config(codec);
  3479. if (err < 0) {
  3480. stac_free(codec);
  3481. return err;
  3482. }
  3483. codec->proc_widget_hook = stac92hd7x_proc_hook;
  3484. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3485. return 0;
  3486. }
  3487. static void stac_setup_gpio(struct hda_codec *codec)
  3488. {
  3489. struct sigmatel_spec *spec = codec->spec;
  3490. if (spec->gpio_led) {
  3491. if (!spec->vref_mute_led_nid) {
  3492. spec->gpio_mask |= spec->gpio_led;
  3493. spec->gpio_dir |= spec->gpio_led;
  3494. spec->gpio_data |= spec->gpio_led;
  3495. } else {
  3496. codec->patch_ops.set_power_state =
  3497. stac_set_power_state;
  3498. }
  3499. }
  3500. if (spec->mic_mute_led_gpio) {
  3501. spec->gpio_mask |= spec->mic_mute_led_gpio;
  3502. spec->gpio_dir |= spec->mic_mute_led_gpio;
  3503. spec->mic_mute_led_on = true;
  3504. spec->gpio_data |= spec->mic_mute_led_gpio;
  3505. spec->gen.cap_sync_hook = stac_capture_led_hook;
  3506. }
  3507. }
  3508. static int patch_stac92hd83xxx(struct hda_codec *codec)
  3509. {
  3510. struct sigmatel_spec *spec;
  3511. int err;
  3512. err = alloc_stac_spec(codec);
  3513. if (err < 0)
  3514. return err;
  3515. codec->epss = 0; /* longer delay needed for D3 */
  3516. spec = codec->spec;
  3517. spec->linear_tone_beep = 0;
  3518. spec->gen.own_eapd_ctl = 1;
  3519. spec->gen.power_down_unused = 1;
  3520. spec->gen.mixer_nid = 0x1b;
  3521. spec->digbeep_nid = 0x21;
  3522. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  3523. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  3524. spec->default_polarity = -1; /* no default cfg */
  3525. codec->patch_ops = stac_patch_ops;
  3526. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  3527. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  3528. stac92hd83xxx_fixups);
  3529. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3530. stac_setup_gpio(codec);
  3531. err = stac_parse_auto_config(codec);
  3532. if (err < 0) {
  3533. stac_free(codec);
  3534. return err;
  3535. }
  3536. codec->proc_widget_hook = stac92hd_proc_hook;
  3537. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3538. return 0;
  3539. }
  3540. static int patch_stac92hd71bxx(struct hda_codec *codec)
  3541. {
  3542. struct sigmatel_spec *spec;
  3543. const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
  3544. int err;
  3545. err = alloc_stac_spec(codec);
  3546. if (err < 0)
  3547. return err;
  3548. spec = codec->spec;
  3549. spec->linear_tone_beep = 0;
  3550. spec->gen.own_eapd_ctl = 1;
  3551. spec->gen.power_down_unused = 1;
  3552. spec->gen.mixer_nid = 0x17;
  3553. spec->have_spdif_mux = 1;
  3554. codec->patch_ops = stac_patch_ops;
  3555. /* GPIO0 = EAPD */
  3556. spec->gpio_mask = 0x01;
  3557. spec->gpio_dir = 0x01;
  3558. spec->gpio_data = 0x01;
  3559. switch (codec->vendor_id) {
  3560. case 0x111d76b6: /* 4 Port without Analog Mixer */
  3561. case 0x111d76b7:
  3562. unmute_init++;
  3563. break;
  3564. case 0x111d7608: /* 5 Port with Analog Mixer */
  3565. if ((codec->revision_id & 0xf) == 0 ||
  3566. (codec->revision_id & 0xf) == 1)
  3567. spec->stream_delay = 40; /* 40 milliseconds */
  3568. /* disable VSW */
  3569. unmute_init++;
  3570. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  3571. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  3572. break;
  3573. case 0x111d7603: /* 6 Port with Analog Mixer */
  3574. if ((codec->revision_id & 0xf) == 1)
  3575. spec->stream_delay = 40; /* 40 milliseconds */
  3576. break;
  3577. }
  3578. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  3579. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  3580. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
  3581. snd_hda_sequence_write_cache(codec, unmute_init);
  3582. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  3583. spec->aloopback_mask = 0x50;
  3584. spec->aloopback_shift = 0;
  3585. spec->powerdown_adcs = 1;
  3586. spec->digbeep_nid = 0x26;
  3587. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  3588. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  3589. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  3590. stac92hd71bxx_fixups);
  3591. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3592. stac_setup_gpio(codec);
  3593. err = stac_parse_auto_config(codec);
  3594. if (err < 0) {
  3595. stac_free(codec);
  3596. return err;
  3597. }
  3598. codec->proc_widget_hook = stac92hd7x_proc_hook;
  3599. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3600. return 0;
  3601. }
  3602. static int patch_stac922x(struct hda_codec *codec)
  3603. {
  3604. struct sigmatel_spec *spec;
  3605. int err;
  3606. err = alloc_stac_spec(codec);
  3607. if (err < 0)
  3608. return err;
  3609. spec = codec->spec;
  3610. spec->linear_tone_beep = 1;
  3611. spec->gen.own_eapd_ctl = 1;
  3612. codec->patch_ops = stac_patch_ops;
  3613. snd_hda_add_verbs(codec, stac922x_core_init);
  3614. /* Fix Mux capture level; max to 2 */
  3615. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  3616. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  3617. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  3618. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  3619. (0 << AC_AMPCAP_MUTE_SHIFT));
  3620. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  3621. stac922x_fixups);
  3622. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3623. err = stac_parse_auto_config(codec);
  3624. if (err < 0) {
  3625. stac_free(codec);
  3626. return err;
  3627. }
  3628. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3629. return 0;
  3630. }
  3631. static const char * const stac927x_spdif_labels[] = {
  3632. "Digital Playback", "ADAT", "Analog Mux 1",
  3633. "Analog Mux 2", "Analog Mux 3", NULL
  3634. };
  3635. static int patch_stac927x(struct hda_codec *codec)
  3636. {
  3637. struct sigmatel_spec *spec;
  3638. int err;
  3639. err = alloc_stac_spec(codec);
  3640. if (err < 0)
  3641. return err;
  3642. spec = codec->spec;
  3643. spec->linear_tone_beep = 1;
  3644. spec->gen.own_eapd_ctl = 1;
  3645. spec->have_spdif_mux = 1;
  3646. spec->spdif_labels = stac927x_spdif_labels;
  3647. spec->digbeep_nid = 0x23;
  3648. /* GPIO0 High = Enable EAPD */
  3649. spec->eapd_mask = spec->gpio_mask = 0x01;
  3650. spec->gpio_dir = spec->gpio_data = 0x01;
  3651. spec->aloopback_ctl = &stac927x_loopback;
  3652. spec->aloopback_mask = 0x40;
  3653. spec->aloopback_shift = 0;
  3654. spec->eapd_switch = 1;
  3655. codec->patch_ops = stac_patch_ops;
  3656. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  3657. stac927x_fixups);
  3658. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3659. if (!spec->volknob_init)
  3660. snd_hda_add_verbs(codec, stac927x_core_init);
  3661. err = stac_parse_auto_config(codec);
  3662. if (err < 0) {
  3663. stac_free(codec);
  3664. return err;
  3665. }
  3666. codec->proc_widget_hook = stac927x_proc_hook;
  3667. /*
  3668. * !!FIXME!!
  3669. * The STAC927x seem to require fairly long delays for certain
  3670. * command sequences. With too short delays (even if the answer
  3671. * is set to RIRB properly), it results in the silence output
  3672. * on some hardwares like Dell.
  3673. *
  3674. * The below flag enables the longer delay (see get_response
  3675. * in hda_intel.c).
  3676. */
  3677. codec->bus->needs_damn_long_delay = 1;
  3678. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3679. return 0;
  3680. }
  3681. static int patch_stac9205(struct hda_codec *codec)
  3682. {
  3683. struct sigmatel_spec *spec;
  3684. int err;
  3685. err = alloc_stac_spec(codec);
  3686. if (err < 0)
  3687. return err;
  3688. spec = codec->spec;
  3689. spec->linear_tone_beep = 1;
  3690. spec->gen.own_eapd_ctl = 1;
  3691. spec->have_spdif_mux = 1;
  3692. spec->digbeep_nid = 0x23;
  3693. snd_hda_add_verbs(codec, stac9205_core_init);
  3694. spec->aloopback_ctl = &stac9205_loopback;
  3695. spec->aloopback_mask = 0x40;
  3696. spec->aloopback_shift = 0;
  3697. /* GPIO0 High = EAPD */
  3698. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  3699. spec->gpio_data = 0x01;
  3700. /* Turn on/off EAPD per HP plugging */
  3701. spec->eapd_switch = 1;
  3702. codec->patch_ops = stac_patch_ops;
  3703. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  3704. stac9205_fixups);
  3705. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3706. err = stac_parse_auto_config(codec);
  3707. if (err < 0) {
  3708. stac_free(codec);
  3709. return err;
  3710. }
  3711. codec->proc_widget_hook = stac9205_proc_hook;
  3712. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3713. return 0;
  3714. }
  3715. /*
  3716. * STAC9872 hack
  3717. */
  3718. static const struct hda_verb stac9872_core_init[] = {
  3719. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  3720. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  3721. {}
  3722. };
  3723. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  3724. { 0x0a, 0x03211020 },
  3725. { 0x0b, 0x411111f0 },
  3726. { 0x0c, 0x411111f0 },
  3727. { 0x0d, 0x03a15030 },
  3728. { 0x0e, 0x411111f0 },
  3729. { 0x0f, 0x90170110 },
  3730. { 0x11, 0x411111f0 },
  3731. { 0x13, 0x411111f0 },
  3732. { 0x14, 0x90a7013e },
  3733. {}
  3734. };
  3735. static const struct hda_model_fixup stac9872_models[] = {
  3736. { .id = STAC_9872_VAIO, .name = "vaio" },
  3737. {}
  3738. };
  3739. static const struct hda_fixup stac9872_fixups[] = {
  3740. [STAC_9872_VAIO] = {
  3741. .type = HDA_FIXUP_PINS,
  3742. .v.pins = stac9872_vaio_pin_configs,
  3743. },
  3744. };
  3745. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  3746. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  3747. "Sony VAIO F/S", STAC_9872_VAIO),
  3748. {} /* terminator */
  3749. };
  3750. static int patch_stac9872(struct hda_codec *codec)
  3751. {
  3752. struct sigmatel_spec *spec;
  3753. int err;
  3754. err = alloc_stac_spec(codec);
  3755. if (err < 0)
  3756. return err;
  3757. spec = codec->spec;
  3758. spec->linear_tone_beep = 1;
  3759. spec->gen.own_eapd_ctl = 1;
  3760. codec->patch_ops = stac_patch_ops;
  3761. snd_hda_add_verbs(codec, stac9872_core_init);
  3762. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  3763. stac9872_fixups);
  3764. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3765. err = stac_parse_auto_config(codec);
  3766. if (err < 0) {
  3767. stac_free(codec);
  3768. return -EINVAL;
  3769. }
  3770. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3771. return 0;
  3772. }
  3773. /*
  3774. * patch entries
  3775. */
  3776. static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  3777. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  3778. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  3779. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  3780. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  3781. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  3782. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  3783. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  3784. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  3785. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  3786. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  3787. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  3788. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  3789. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  3790. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  3791. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  3792. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  3793. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  3794. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  3795. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  3796. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  3797. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  3798. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  3799. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  3800. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  3801. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  3802. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  3803. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  3804. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  3805. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  3806. { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
  3807. { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
  3808. /* The following does not take into account .id=0x83847661 when subsys =
  3809. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  3810. * currently not fully supported.
  3811. */
  3812. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  3813. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  3814. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  3815. { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
  3816. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  3817. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  3818. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  3819. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  3820. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  3821. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  3822. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  3823. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  3824. { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
  3825. { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
  3826. { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
  3827. { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
  3828. { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
  3829. { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
  3830. { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
  3831. { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
  3832. { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
  3833. { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
  3834. { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
  3835. { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
  3836. { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
  3837. { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
  3838. { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
  3839. { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3840. { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3841. { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3842. { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3843. { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3844. { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3845. { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3846. { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3847. { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
  3848. { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
  3849. { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
  3850. { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
  3851. { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
  3852. { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
  3853. { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
  3854. { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
  3855. { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
  3856. { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
  3857. { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
  3858. { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
  3859. { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
  3860. { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
  3861. { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
  3862. { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
  3863. { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
  3864. { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
  3865. { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
  3866. { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
  3867. { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
  3868. { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
  3869. { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
  3870. { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
  3871. { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
  3872. { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
  3873. { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
  3874. { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
  3875. { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
  3876. { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
  3877. { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
  3878. { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
  3879. {} /* terminator */
  3880. };
  3881. MODULE_ALIAS("snd-hda-codec-id:8384*");
  3882. MODULE_ALIAS("snd-hda-codec-id:111d*");
  3883. MODULE_LICENSE("GPL");
  3884. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  3885. static struct hda_codec_preset_list sigmatel_list = {
  3886. .preset = snd_hda_preset_sigmatel,
  3887. .owner = THIS_MODULE,
  3888. };
  3889. static int __init patch_sigmatel_init(void)
  3890. {
  3891. return snd_hda_add_codec_preset(&sigmatel_list);
  3892. }
  3893. static void __exit patch_sigmatel_exit(void)
  3894. {
  3895. snd_hda_delete_codec_preset(&sigmatel_list);
  3896. }
  3897. module_init(patch_sigmatel_init)
  3898. module_exit(patch_sigmatel_exit)