events.c 35 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  54. /* IRQ <-> VIRQ mapping. */
  55. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  56. /* IRQ <-> IPI mapping */
  57. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  58. /* Interrupt types. */
  59. enum xen_irq_type {
  60. IRQT_UNBOUND = 0,
  61. IRQT_PIRQ,
  62. IRQT_VIRQ,
  63. IRQT_IPI,
  64. IRQT_EVTCHN
  65. };
  66. /*
  67. * Packed IRQ information:
  68. * type - enum xen_irq_type
  69. * event channel - irq->event channel mapping
  70. * cpu - cpu this event channel is bound to
  71. * index - type-specific information:
  72. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  73. * guest, or GSI (real passthrough IRQ) of the device.
  74. * VIRQ - virq number
  75. * IPI - IPI vector
  76. * EVTCHN -
  77. */
  78. struct irq_info
  79. {
  80. enum xen_irq_type type; /* type */
  81. unsigned short evtchn; /* event channel */
  82. unsigned short cpu; /* cpu bound */
  83. union {
  84. unsigned short virq;
  85. enum ipi_vector ipi;
  86. struct {
  87. unsigned short pirq;
  88. unsigned short gsi;
  89. unsigned char vector;
  90. unsigned char flags;
  91. } pirq;
  92. } u;
  93. };
  94. #define PIRQ_NEEDS_EOI (1 << 0)
  95. #define PIRQ_SHAREABLE (1 << 1)
  96. static struct irq_info *irq_info;
  97. static int *pirq_to_irq;
  98. static int *evtchn_to_irq;
  99. struct cpu_evtchn_s {
  100. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  101. };
  102. static __initdata struct cpu_evtchn_s init_evtchn_mask = {
  103. .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
  104. };
  105. static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
  106. static inline unsigned long *cpu_evtchn_mask(int cpu)
  107. {
  108. return cpu_evtchn_mask_p[cpu].bits;
  109. }
  110. /* Xen will never allocate port zero for any purpose. */
  111. #define VALID_EVTCHN(chn) ((chn) != 0)
  112. static struct irq_chip xen_dynamic_chip;
  113. static struct irq_chip xen_percpu_chip;
  114. static struct irq_chip xen_pirq_chip;
  115. /* Constructor for packed IRQ information. */
  116. static struct irq_info mk_unbound_info(void)
  117. {
  118. return (struct irq_info) { .type = IRQT_UNBOUND };
  119. }
  120. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  121. {
  122. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  123. .cpu = 0 };
  124. }
  125. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  126. {
  127. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  128. .cpu = 0, .u.ipi = ipi };
  129. }
  130. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  131. {
  132. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  133. .cpu = 0, .u.virq = virq };
  134. }
  135. static struct irq_info mk_pirq_info(unsigned short evtchn, unsigned short pirq,
  136. unsigned short gsi, unsigned short vector)
  137. {
  138. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  139. .cpu = 0,
  140. .u.pirq = { .pirq = pirq, .gsi = gsi, .vector = vector } };
  141. }
  142. /*
  143. * Accessors for packed IRQ information.
  144. */
  145. static struct irq_info *info_for_irq(unsigned irq)
  146. {
  147. return &irq_info[irq];
  148. }
  149. static unsigned int evtchn_from_irq(unsigned irq)
  150. {
  151. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  152. return 0;
  153. return info_for_irq(irq)->evtchn;
  154. }
  155. unsigned irq_from_evtchn(unsigned int evtchn)
  156. {
  157. return evtchn_to_irq[evtchn];
  158. }
  159. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  160. static enum ipi_vector ipi_from_irq(unsigned irq)
  161. {
  162. struct irq_info *info = info_for_irq(irq);
  163. BUG_ON(info == NULL);
  164. BUG_ON(info->type != IRQT_IPI);
  165. return info->u.ipi;
  166. }
  167. static unsigned virq_from_irq(unsigned irq)
  168. {
  169. struct irq_info *info = info_for_irq(irq);
  170. BUG_ON(info == NULL);
  171. BUG_ON(info->type != IRQT_VIRQ);
  172. return info->u.virq;
  173. }
  174. static unsigned pirq_from_irq(unsigned irq)
  175. {
  176. struct irq_info *info = info_for_irq(irq);
  177. BUG_ON(info == NULL);
  178. BUG_ON(info->type != IRQT_PIRQ);
  179. return info->u.pirq.pirq;
  180. }
  181. static unsigned gsi_from_irq(unsigned irq)
  182. {
  183. struct irq_info *info = info_for_irq(irq);
  184. BUG_ON(info == NULL);
  185. BUG_ON(info->type != IRQT_PIRQ);
  186. return info->u.pirq.gsi;
  187. }
  188. static enum xen_irq_type type_from_irq(unsigned irq)
  189. {
  190. return info_for_irq(irq)->type;
  191. }
  192. static unsigned cpu_from_irq(unsigned irq)
  193. {
  194. return info_for_irq(irq)->cpu;
  195. }
  196. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  197. {
  198. int irq = evtchn_to_irq[evtchn];
  199. unsigned ret = 0;
  200. if (irq != -1)
  201. ret = cpu_from_irq(irq);
  202. return ret;
  203. }
  204. static bool pirq_needs_eoi(unsigned irq)
  205. {
  206. struct irq_info *info = info_for_irq(irq);
  207. BUG_ON(info->type != IRQT_PIRQ);
  208. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  209. }
  210. static inline unsigned long active_evtchns(unsigned int cpu,
  211. struct shared_info *sh,
  212. unsigned int idx)
  213. {
  214. return (sh->evtchn_pending[idx] &
  215. cpu_evtchn_mask(cpu)[idx] &
  216. ~sh->evtchn_mask[idx]);
  217. }
  218. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  219. {
  220. int irq = evtchn_to_irq[chn];
  221. BUG_ON(irq == -1);
  222. #ifdef CONFIG_SMP
  223. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  224. #endif
  225. clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  226. set_bit(chn, cpu_evtchn_mask(cpu));
  227. irq_info[irq].cpu = cpu;
  228. }
  229. static void init_evtchn_cpu_bindings(void)
  230. {
  231. int i;
  232. #ifdef CONFIG_SMP
  233. struct irq_desc *desc;
  234. /* By default all event channels notify CPU#0. */
  235. for_each_irq_desc(i, desc) {
  236. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  237. }
  238. #endif
  239. for_each_possible_cpu(i)
  240. memset(cpu_evtchn_mask(i),
  241. (i == 0) ? ~0 : 0, sizeof(struct cpu_evtchn_s));
  242. }
  243. static inline void clear_evtchn(int port)
  244. {
  245. struct shared_info *s = HYPERVISOR_shared_info;
  246. sync_clear_bit(port, &s->evtchn_pending[0]);
  247. }
  248. static inline void set_evtchn(int port)
  249. {
  250. struct shared_info *s = HYPERVISOR_shared_info;
  251. sync_set_bit(port, &s->evtchn_pending[0]);
  252. }
  253. static inline int test_evtchn(int port)
  254. {
  255. struct shared_info *s = HYPERVISOR_shared_info;
  256. return sync_test_bit(port, &s->evtchn_pending[0]);
  257. }
  258. /**
  259. * notify_remote_via_irq - send event to remote end of event channel via irq
  260. * @irq: irq of event channel to send event to
  261. *
  262. * Unlike notify_remote_via_evtchn(), this is safe to use across
  263. * save/restore. Notifications on a broken connection are silently
  264. * dropped.
  265. */
  266. void notify_remote_via_irq(int irq)
  267. {
  268. int evtchn = evtchn_from_irq(irq);
  269. if (VALID_EVTCHN(evtchn))
  270. notify_remote_via_evtchn(evtchn);
  271. }
  272. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  273. static void mask_evtchn(int port)
  274. {
  275. struct shared_info *s = HYPERVISOR_shared_info;
  276. sync_set_bit(port, &s->evtchn_mask[0]);
  277. }
  278. static void unmask_evtchn(int port)
  279. {
  280. struct shared_info *s = HYPERVISOR_shared_info;
  281. unsigned int cpu = get_cpu();
  282. BUG_ON(!irqs_disabled());
  283. /* Slow path (hypercall) if this is a non-local port. */
  284. if (unlikely(cpu != cpu_from_evtchn(port))) {
  285. struct evtchn_unmask unmask = { .port = port };
  286. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  287. } else {
  288. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  289. sync_clear_bit(port, &s->evtchn_mask[0]);
  290. /*
  291. * The following is basically the equivalent of
  292. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  293. * the interrupt edge' if the channel is masked.
  294. */
  295. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  296. !sync_test_and_set_bit(port / BITS_PER_LONG,
  297. &vcpu_info->evtchn_pending_sel))
  298. vcpu_info->evtchn_upcall_pending = 1;
  299. }
  300. put_cpu();
  301. }
  302. static int xen_allocate_irq_dynamic(void)
  303. {
  304. int first = 0;
  305. int irq;
  306. #ifdef CONFIG_X86_IO_APIC
  307. /*
  308. * For an HVM guest or domain 0 which see "real" (emulated or
  309. * actual repectively) GSIs we allocate dynamic IRQs
  310. * e.g. those corresponding to event channels or MSIs
  311. * etc. from the range above those "real" GSIs to avoid
  312. * collisions.
  313. */
  314. if (xen_initial_domain() || xen_hvm_domain())
  315. first = get_nr_irqs_gsi();
  316. #endif
  317. retry:
  318. irq = irq_alloc_desc_from(first, -1);
  319. if (irq == -ENOMEM && first > NR_IRQS_LEGACY) {
  320. printk(KERN_ERR "Out of dynamic IRQ space and eating into GSI space. You should increase nr_irqs\n");
  321. first = max(NR_IRQS_LEGACY, first - NR_IRQS_LEGACY);
  322. goto retry;
  323. }
  324. if (irq < 0)
  325. panic("No available IRQ to bind to: increase nr_irqs!\n");
  326. return irq;
  327. }
  328. static int xen_allocate_irq_gsi(unsigned gsi)
  329. {
  330. int irq;
  331. /*
  332. * A PV guest has no concept of a GSI (since it has no ACPI
  333. * nor access to/knowledge of the physical APICs). Therefore
  334. * all IRQs are dynamically allocated from the entire IRQ
  335. * space.
  336. */
  337. if (xen_pv_domain() && !xen_initial_domain())
  338. return xen_allocate_irq_dynamic();
  339. /* Legacy IRQ descriptors are already allocated by the arch. */
  340. if (gsi < NR_IRQS_LEGACY)
  341. return gsi;
  342. irq = irq_alloc_desc_at(gsi, -1);
  343. if (irq < 0)
  344. panic("Unable to allocate to IRQ%d (%d)\n", gsi, irq);
  345. return irq;
  346. }
  347. static void xen_free_irq(unsigned irq)
  348. {
  349. /* Legacy IRQ descriptors are managed by the arch. */
  350. if (irq < NR_IRQS_LEGACY)
  351. return;
  352. irq_free_desc(irq);
  353. }
  354. static void pirq_unmask_notify(int irq)
  355. {
  356. struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
  357. if (unlikely(pirq_needs_eoi(irq))) {
  358. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  359. WARN_ON(rc);
  360. }
  361. }
  362. static void pirq_query_unmask(int irq)
  363. {
  364. struct physdev_irq_status_query irq_status;
  365. struct irq_info *info = info_for_irq(irq);
  366. BUG_ON(info->type != IRQT_PIRQ);
  367. irq_status.irq = pirq_from_irq(irq);
  368. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  369. irq_status.flags = 0;
  370. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  371. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  372. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  373. }
  374. static bool probing_irq(int irq)
  375. {
  376. struct irq_desc *desc = irq_to_desc(irq);
  377. return desc && desc->action == NULL;
  378. }
  379. static unsigned int __startup_pirq(unsigned int irq)
  380. {
  381. struct evtchn_bind_pirq bind_pirq;
  382. struct irq_info *info = info_for_irq(irq);
  383. int evtchn = evtchn_from_irq(irq);
  384. int rc;
  385. BUG_ON(info->type != IRQT_PIRQ);
  386. if (VALID_EVTCHN(evtchn))
  387. goto out;
  388. bind_pirq.pirq = pirq_from_irq(irq);
  389. /* NB. We are happy to share unless we are probing. */
  390. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  391. BIND_PIRQ__WILL_SHARE : 0;
  392. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  393. if (rc != 0) {
  394. if (!probing_irq(irq))
  395. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  396. irq);
  397. return 0;
  398. }
  399. evtchn = bind_pirq.port;
  400. pirq_query_unmask(irq);
  401. evtchn_to_irq[evtchn] = irq;
  402. bind_evtchn_to_cpu(evtchn, 0);
  403. info->evtchn = evtchn;
  404. out:
  405. unmask_evtchn(evtchn);
  406. pirq_unmask_notify(irq);
  407. return 0;
  408. }
  409. static unsigned int startup_pirq(struct irq_data *data)
  410. {
  411. return __startup_pirq(data->irq);
  412. }
  413. static void shutdown_pirq(struct irq_data *data)
  414. {
  415. struct evtchn_close close;
  416. unsigned int irq = data->irq;
  417. struct irq_info *info = info_for_irq(irq);
  418. int evtchn = evtchn_from_irq(irq);
  419. BUG_ON(info->type != IRQT_PIRQ);
  420. if (!VALID_EVTCHN(evtchn))
  421. return;
  422. mask_evtchn(evtchn);
  423. close.port = evtchn;
  424. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  425. BUG();
  426. bind_evtchn_to_cpu(evtchn, 0);
  427. evtchn_to_irq[evtchn] = -1;
  428. info->evtchn = 0;
  429. }
  430. static void enable_pirq(struct irq_data *data)
  431. {
  432. startup_pirq(data);
  433. }
  434. static void disable_pirq(struct irq_data *data)
  435. {
  436. }
  437. static void ack_pirq(struct irq_data *data)
  438. {
  439. int evtchn = evtchn_from_irq(data->irq);
  440. move_native_irq(data->irq);
  441. if (VALID_EVTCHN(evtchn)) {
  442. mask_evtchn(evtchn);
  443. clear_evtchn(evtchn);
  444. }
  445. }
  446. static int find_irq_by_gsi(unsigned gsi)
  447. {
  448. int irq;
  449. for (irq = 0; irq < nr_irqs; irq++) {
  450. struct irq_info *info = info_for_irq(irq);
  451. if (info == NULL || info->type != IRQT_PIRQ)
  452. continue;
  453. if (gsi_from_irq(irq) == gsi)
  454. return irq;
  455. }
  456. return -1;
  457. }
  458. int xen_allocate_pirq_gsi(unsigned gsi)
  459. {
  460. return gsi;
  461. }
  462. /*
  463. * Do not make any assumptions regarding the relationship between the
  464. * IRQ number returned here and the Xen pirq argument.
  465. *
  466. * Note: We don't assign an event channel until the irq actually started
  467. * up. Return an existing irq if we've already got one for the gsi.
  468. */
  469. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  470. unsigned pirq, int shareable, char *name)
  471. {
  472. int irq = -1;
  473. struct physdev_irq irq_op;
  474. spin_lock(&irq_mapping_update_lock);
  475. if ((pirq > nr_irqs) || (gsi > nr_irqs)) {
  476. printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
  477. pirq > nr_irqs ? "pirq" :"",
  478. gsi > nr_irqs ? "gsi" : "");
  479. goto out;
  480. }
  481. irq = find_irq_by_gsi(gsi);
  482. if (irq != -1) {
  483. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  484. irq, gsi);
  485. goto out; /* XXX need refcount? */
  486. }
  487. irq = xen_allocate_irq_gsi(gsi);
  488. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  489. handle_level_irq, name);
  490. irq_op.irq = irq;
  491. irq_op.vector = 0;
  492. /* Only the privileged domain can do this. For non-priv, the pcifront
  493. * driver provides a PCI bus that does the call to do exactly
  494. * this in the priv domain. */
  495. if (xen_initial_domain() &&
  496. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  497. xen_free_irq(irq);
  498. irq = -ENOSPC;
  499. goto out;
  500. }
  501. irq_info[irq] = mk_pirq_info(0, pirq, gsi, irq_op.vector);
  502. irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
  503. pirq_to_irq[pirq] = irq;
  504. out:
  505. spin_unlock(&irq_mapping_update_lock);
  506. return irq;
  507. }
  508. #ifdef CONFIG_PCI_MSI
  509. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  510. {
  511. int rc;
  512. struct physdev_get_free_pirq op_get_free_pirq;
  513. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  514. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  515. WARN_ONCE(rc == -ENOSYS,
  516. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  517. return rc ? -1 : op_get_free_pirq.pirq;
  518. }
  519. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  520. int pirq, int vector, const char *name)
  521. {
  522. int irq, ret;
  523. spin_lock(&irq_mapping_update_lock);
  524. irq = xen_allocate_irq_dynamic();
  525. if (irq == -1)
  526. goto out;
  527. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  528. handle_level_irq, name);
  529. irq_info[irq] = mk_pirq_info(0, pirq, 0, vector);
  530. pirq_to_irq[pirq] = irq;
  531. ret = set_irq_msi(irq, msidesc);
  532. if (ret < 0)
  533. goto error_irq;
  534. out:
  535. spin_unlock(&irq_mapping_update_lock);
  536. return irq;
  537. error_irq:
  538. spin_unlock(&irq_mapping_update_lock);
  539. xen_free_irq(irq);
  540. return -1;
  541. }
  542. #endif
  543. int xen_destroy_irq(int irq)
  544. {
  545. struct irq_desc *desc;
  546. struct physdev_unmap_pirq unmap_irq;
  547. struct irq_info *info = info_for_irq(irq);
  548. int rc = -ENOENT;
  549. spin_lock(&irq_mapping_update_lock);
  550. desc = irq_to_desc(irq);
  551. if (!desc)
  552. goto out;
  553. if (xen_initial_domain()) {
  554. unmap_irq.pirq = info->u.pirq.pirq;
  555. unmap_irq.domid = DOMID_SELF;
  556. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  557. if (rc) {
  558. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  559. goto out;
  560. }
  561. }
  562. pirq_to_irq[info->u.pirq.pirq] = -1;
  563. irq_info[irq] = mk_unbound_info();
  564. xen_free_irq(irq);
  565. out:
  566. spin_unlock(&irq_mapping_update_lock);
  567. return rc;
  568. }
  569. int xen_irq_from_pirq(unsigned pirq)
  570. {
  571. return pirq_to_irq[pirq];
  572. }
  573. int bind_evtchn_to_irq(unsigned int evtchn)
  574. {
  575. int irq;
  576. spin_lock(&irq_mapping_update_lock);
  577. irq = evtchn_to_irq[evtchn];
  578. if (irq == -1) {
  579. irq = xen_allocate_irq_dynamic();
  580. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  581. handle_fasteoi_irq, "event");
  582. evtchn_to_irq[evtchn] = irq;
  583. irq_info[irq] = mk_evtchn_info(evtchn);
  584. }
  585. spin_unlock(&irq_mapping_update_lock);
  586. return irq;
  587. }
  588. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  589. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  590. {
  591. struct evtchn_bind_ipi bind_ipi;
  592. int evtchn, irq;
  593. spin_lock(&irq_mapping_update_lock);
  594. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  595. if (irq == -1) {
  596. irq = xen_allocate_irq_dynamic();
  597. if (irq < 0)
  598. goto out;
  599. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  600. handle_percpu_irq, "ipi");
  601. bind_ipi.vcpu = cpu;
  602. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  603. &bind_ipi) != 0)
  604. BUG();
  605. evtchn = bind_ipi.port;
  606. evtchn_to_irq[evtchn] = irq;
  607. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  608. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  609. bind_evtchn_to_cpu(evtchn, cpu);
  610. }
  611. out:
  612. spin_unlock(&irq_mapping_update_lock);
  613. return irq;
  614. }
  615. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  616. {
  617. struct evtchn_bind_virq bind_virq;
  618. int evtchn, irq;
  619. spin_lock(&irq_mapping_update_lock);
  620. irq = per_cpu(virq_to_irq, cpu)[virq];
  621. if (irq == -1) {
  622. irq = xen_allocate_irq_dynamic();
  623. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  624. handle_percpu_irq, "virq");
  625. bind_virq.virq = virq;
  626. bind_virq.vcpu = cpu;
  627. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  628. &bind_virq) != 0)
  629. BUG();
  630. evtchn = bind_virq.port;
  631. evtchn_to_irq[evtchn] = irq;
  632. irq_info[irq] = mk_virq_info(evtchn, virq);
  633. per_cpu(virq_to_irq, cpu)[virq] = irq;
  634. bind_evtchn_to_cpu(evtchn, cpu);
  635. }
  636. spin_unlock(&irq_mapping_update_lock);
  637. return irq;
  638. }
  639. static void unbind_from_irq(unsigned int irq)
  640. {
  641. struct evtchn_close close;
  642. int evtchn = evtchn_from_irq(irq);
  643. spin_lock(&irq_mapping_update_lock);
  644. if (VALID_EVTCHN(evtchn)) {
  645. close.port = evtchn;
  646. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  647. BUG();
  648. switch (type_from_irq(irq)) {
  649. case IRQT_VIRQ:
  650. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  651. [virq_from_irq(irq)] = -1;
  652. break;
  653. case IRQT_IPI:
  654. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  655. [ipi_from_irq(irq)] = -1;
  656. break;
  657. default:
  658. break;
  659. }
  660. /* Closed ports are implicitly re-bound to VCPU0. */
  661. bind_evtchn_to_cpu(evtchn, 0);
  662. evtchn_to_irq[evtchn] = -1;
  663. }
  664. if (irq_info[irq].type != IRQT_UNBOUND) {
  665. irq_info[irq] = mk_unbound_info();
  666. xen_free_irq(irq);
  667. }
  668. spin_unlock(&irq_mapping_update_lock);
  669. }
  670. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  671. irq_handler_t handler,
  672. unsigned long irqflags,
  673. const char *devname, void *dev_id)
  674. {
  675. unsigned int irq;
  676. int retval;
  677. irq = bind_evtchn_to_irq(evtchn);
  678. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  679. if (retval != 0) {
  680. unbind_from_irq(irq);
  681. return retval;
  682. }
  683. return irq;
  684. }
  685. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  686. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  687. irq_handler_t handler,
  688. unsigned long irqflags, const char *devname, void *dev_id)
  689. {
  690. unsigned int irq;
  691. int retval;
  692. irq = bind_virq_to_irq(virq, cpu);
  693. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  694. if (retval != 0) {
  695. unbind_from_irq(irq);
  696. return retval;
  697. }
  698. return irq;
  699. }
  700. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  701. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  702. unsigned int cpu,
  703. irq_handler_t handler,
  704. unsigned long irqflags,
  705. const char *devname,
  706. void *dev_id)
  707. {
  708. int irq, retval;
  709. irq = bind_ipi_to_irq(ipi, cpu);
  710. if (irq < 0)
  711. return irq;
  712. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME;
  713. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  714. if (retval != 0) {
  715. unbind_from_irq(irq);
  716. return retval;
  717. }
  718. return irq;
  719. }
  720. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  721. {
  722. free_irq(irq, dev_id);
  723. unbind_from_irq(irq);
  724. }
  725. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  726. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  727. {
  728. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  729. BUG_ON(irq < 0);
  730. notify_remote_via_irq(irq);
  731. }
  732. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  733. {
  734. struct shared_info *sh = HYPERVISOR_shared_info;
  735. int cpu = smp_processor_id();
  736. unsigned long *cpu_evtchn = cpu_evtchn_mask(cpu);
  737. int i;
  738. unsigned long flags;
  739. static DEFINE_SPINLOCK(debug_lock);
  740. struct vcpu_info *v;
  741. spin_lock_irqsave(&debug_lock, flags);
  742. printk("\nvcpu %d\n ", cpu);
  743. for_each_online_cpu(i) {
  744. int pending;
  745. v = per_cpu(xen_vcpu, i);
  746. pending = (get_irq_regs() && i == cpu)
  747. ? xen_irqs_disabled(get_irq_regs())
  748. : v->evtchn_upcall_mask;
  749. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  750. pending, v->evtchn_upcall_pending,
  751. (int)(sizeof(v->evtchn_pending_sel)*2),
  752. v->evtchn_pending_sel);
  753. }
  754. v = per_cpu(xen_vcpu, cpu);
  755. printk("\npending:\n ");
  756. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  757. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  758. sh->evtchn_pending[i],
  759. i % 8 == 0 ? "\n " : " ");
  760. printk("\nglobal mask:\n ");
  761. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  762. printk("%0*lx%s",
  763. (int)(sizeof(sh->evtchn_mask[0])*2),
  764. sh->evtchn_mask[i],
  765. i % 8 == 0 ? "\n " : " ");
  766. printk("\nglobally unmasked:\n ");
  767. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  768. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  769. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  770. i % 8 == 0 ? "\n " : " ");
  771. printk("\nlocal cpu%d mask:\n ", cpu);
  772. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  773. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  774. cpu_evtchn[i],
  775. i % 8 == 0 ? "\n " : " ");
  776. printk("\nlocally unmasked:\n ");
  777. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  778. unsigned long pending = sh->evtchn_pending[i]
  779. & ~sh->evtchn_mask[i]
  780. & cpu_evtchn[i];
  781. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  782. pending, i % 8 == 0 ? "\n " : " ");
  783. }
  784. printk("\npending list:\n");
  785. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  786. if (sync_test_bit(i, sh->evtchn_pending)) {
  787. int word_idx = i / BITS_PER_LONG;
  788. printk(" %d: event %d -> irq %d%s%s%s\n",
  789. cpu_from_evtchn(i), i,
  790. evtchn_to_irq[i],
  791. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  792. ? "" : " l2-clear",
  793. !sync_test_bit(i, sh->evtchn_mask)
  794. ? "" : " globally-masked",
  795. sync_test_bit(i, cpu_evtchn)
  796. ? "" : " locally-masked");
  797. }
  798. }
  799. spin_unlock_irqrestore(&debug_lock, flags);
  800. return IRQ_HANDLED;
  801. }
  802. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  803. /*
  804. * Search the CPUs pending events bitmasks. For each one found, map
  805. * the event number to an irq, and feed it into do_IRQ() for
  806. * handling.
  807. *
  808. * Xen uses a two-level bitmap to speed searching. The first level is
  809. * a bitset of words which contain pending event bits. The second
  810. * level is a bitset of pending events themselves.
  811. */
  812. static void __xen_evtchn_do_upcall(void)
  813. {
  814. int cpu = get_cpu();
  815. struct shared_info *s = HYPERVISOR_shared_info;
  816. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  817. unsigned count;
  818. do {
  819. unsigned long pending_words;
  820. vcpu_info->evtchn_upcall_pending = 0;
  821. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  822. goto out;
  823. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  824. /* Clear master flag /before/ clearing selector flag. */
  825. wmb();
  826. #endif
  827. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  828. while (pending_words != 0) {
  829. unsigned long pending_bits;
  830. int word_idx = __ffs(pending_words);
  831. pending_words &= ~(1UL << word_idx);
  832. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  833. int bit_idx = __ffs(pending_bits);
  834. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  835. int irq = evtchn_to_irq[port];
  836. struct irq_desc *desc;
  837. mask_evtchn(port);
  838. clear_evtchn(port);
  839. if (irq != -1) {
  840. desc = irq_to_desc(irq);
  841. if (desc)
  842. generic_handle_irq_desc(irq, desc);
  843. }
  844. }
  845. }
  846. BUG_ON(!irqs_disabled());
  847. count = __this_cpu_read(xed_nesting_count);
  848. __this_cpu_write(xed_nesting_count, 0);
  849. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  850. out:
  851. put_cpu();
  852. }
  853. void xen_evtchn_do_upcall(struct pt_regs *regs)
  854. {
  855. struct pt_regs *old_regs = set_irq_regs(regs);
  856. exit_idle();
  857. irq_enter();
  858. __xen_evtchn_do_upcall();
  859. irq_exit();
  860. set_irq_regs(old_regs);
  861. }
  862. void xen_hvm_evtchn_do_upcall(void)
  863. {
  864. __xen_evtchn_do_upcall();
  865. }
  866. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  867. /* Rebind a new event channel to an existing irq. */
  868. void rebind_evtchn_irq(int evtchn, int irq)
  869. {
  870. struct irq_info *info = info_for_irq(irq);
  871. /* Make sure the irq is masked, since the new event channel
  872. will also be masked. */
  873. disable_irq(irq);
  874. spin_lock(&irq_mapping_update_lock);
  875. /* After resume the irq<->evtchn mappings are all cleared out */
  876. BUG_ON(evtchn_to_irq[evtchn] != -1);
  877. /* Expect irq to have been bound before,
  878. so there should be a proper type */
  879. BUG_ON(info->type == IRQT_UNBOUND);
  880. evtchn_to_irq[evtchn] = irq;
  881. irq_info[irq] = mk_evtchn_info(evtchn);
  882. spin_unlock(&irq_mapping_update_lock);
  883. /* new event channels are always bound to cpu 0 */
  884. irq_set_affinity(irq, cpumask_of(0));
  885. /* Unmask the event channel. */
  886. enable_irq(irq);
  887. }
  888. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  889. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  890. {
  891. struct evtchn_bind_vcpu bind_vcpu;
  892. int evtchn = evtchn_from_irq(irq);
  893. if (!VALID_EVTCHN(evtchn))
  894. return -1;
  895. /*
  896. * Events delivered via platform PCI interrupts are always
  897. * routed to vcpu 0 and hence cannot be rebound.
  898. */
  899. if (xen_hvm_domain() && !xen_have_vector_callback)
  900. return -1;
  901. /* Send future instances of this interrupt to other vcpu. */
  902. bind_vcpu.port = evtchn;
  903. bind_vcpu.vcpu = tcpu;
  904. /*
  905. * If this fails, it usually just indicates that we're dealing with a
  906. * virq or IPI channel, which don't actually need to be rebound. Ignore
  907. * it, but don't do the xenlinux-level rebind in that case.
  908. */
  909. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  910. bind_evtchn_to_cpu(evtchn, tcpu);
  911. return 0;
  912. }
  913. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  914. bool force)
  915. {
  916. unsigned tcpu = cpumask_first(dest);
  917. return rebind_irq_to_cpu(data->irq, tcpu);
  918. }
  919. int resend_irq_on_evtchn(unsigned int irq)
  920. {
  921. int masked, evtchn = evtchn_from_irq(irq);
  922. struct shared_info *s = HYPERVISOR_shared_info;
  923. if (!VALID_EVTCHN(evtchn))
  924. return 1;
  925. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  926. sync_set_bit(evtchn, s->evtchn_pending);
  927. if (!masked)
  928. unmask_evtchn(evtchn);
  929. return 1;
  930. }
  931. static void enable_dynirq(struct irq_data *data)
  932. {
  933. int evtchn = evtchn_from_irq(data->irq);
  934. if (VALID_EVTCHN(evtchn))
  935. unmask_evtchn(evtchn);
  936. }
  937. static void disable_dynirq(struct irq_data *data)
  938. {
  939. int evtchn = evtchn_from_irq(data->irq);
  940. if (VALID_EVTCHN(evtchn))
  941. mask_evtchn(evtchn);
  942. }
  943. static void ack_dynirq(struct irq_data *data)
  944. {
  945. int evtchn = evtchn_from_irq(data->irq);
  946. move_masked_irq(data->irq);
  947. if (VALID_EVTCHN(evtchn))
  948. unmask_evtchn(evtchn);
  949. }
  950. static int retrigger_dynirq(struct irq_data *data)
  951. {
  952. int evtchn = evtchn_from_irq(data->irq);
  953. struct shared_info *sh = HYPERVISOR_shared_info;
  954. int ret = 0;
  955. if (VALID_EVTCHN(evtchn)) {
  956. int masked;
  957. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  958. sync_set_bit(evtchn, sh->evtchn_pending);
  959. if (!masked)
  960. unmask_evtchn(evtchn);
  961. ret = 1;
  962. }
  963. return ret;
  964. }
  965. static void restore_pirqs(void)
  966. {
  967. int pirq, rc, irq, gsi;
  968. struct physdev_map_pirq map_irq;
  969. for (pirq = 0; pirq < nr_irqs; pirq++) {
  970. irq = pirq_to_irq[pirq];
  971. if (irq == -1)
  972. continue;
  973. /* save/restore of PT devices doesn't work, so at this point the
  974. * only devices present are GSI based emulated devices */
  975. gsi = gsi_from_irq(irq);
  976. if (!gsi)
  977. continue;
  978. map_irq.domid = DOMID_SELF;
  979. map_irq.type = MAP_PIRQ_TYPE_GSI;
  980. map_irq.index = gsi;
  981. map_irq.pirq = pirq;
  982. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  983. if (rc) {
  984. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  985. gsi, irq, pirq, rc);
  986. irq_info[irq] = mk_unbound_info();
  987. pirq_to_irq[pirq] = -1;
  988. continue;
  989. }
  990. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  991. __startup_pirq(irq);
  992. }
  993. }
  994. static void restore_cpu_virqs(unsigned int cpu)
  995. {
  996. struct evtchn_bind_virq bind_virq;
  997. int virq, irq, evtchn;
  998. for (virq = 0; virq < NR_VIRQS; virq++) {
  999. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1000. continue;
  1001. BUG_ON(virq_from_irq(irq) != virq);
  1002. /* Get a new binding from Xen. */
  1003. bind_virq.virq = virq;
  1004. bind_virq.vcpu = cpu;
  1005. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1006. &bind_virq) != 0)
  1007. BUG();
  1008. evtchn = bind_virq.port;
  1009. /* Record the new mapping. */
  1010. evtchn_to_irq[evtchn] = irq;
  1011. irq_info[irq] = mk_virq_info(evtchn, virq);
  1012. bind_evtchn_to_cpu(evtchn, cpu);
  1013. }
  1014. }
  1015. static void restore_cpu_ipis(unsigned int cpu)
  1016. {
  1017. struct evtchn_bind_ipi bind_ipi;
  1018. int ipi, irq, evtchn;
  1019. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1020. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1021. continue;
  1022. BUG_ON(ipi_from_irq(irq) != ipi);
  1023. /* Get a new binding from Xen. */
  1024. bind_ipi.vcpu = cpu;
  1025. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1026. &bind_ipi) != 0)
  1027. BUG();
  1028. evtchn = bind_ipi.port;
  1029. /* Record the new mapping. */
  1030. evtchn_to_irq[evtchn] = irq;
  1031. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  1032. bind_evtchn_to_cpu(evtchn, cpu);
  1033. }
  1034. }
  1035. /* Clear an irq's pending state, in preparation for polling on it */
  1036. void xen_clear_irq_pending(int irq)
  1037. {
  1038. int evtchn = evtchn_from_irq(irq);
  1039. if (VALID_EVTCHN(evtchn))
  1040. clear_evtchn(evtchn);
  1041. }
  1042. EXPORT_SYMBOL(xen_clear_irq_pending);
  1043. void xen_set_irq_pending(int irq)
  1044. {
  1045. int evtchn = evtchn_from_irq(irq);
  1046. if (VALID_EVTCHN(evtchn))
  1047. set_evtchn(evtchn);
  1048. }
  1049. bool xen_test_irq_pending(int irq)
  1050. {
  1051. int evtchn = evtchn_from_irq(irq);
  1052. bool ret = false;
  1053. if (VALID_EVTCHN(evtchn))
  1054. ret = test_evtchn(evtchn);
  1055. return ret;
  1056. }
  1057. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1058. * the irq will be disabled so it won't deliver an interrupt. */
  1059. void xen_poll_irq_timeout(int irq, u64 timeout)
  1060. {
  1061. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1062. if (VALID_EVTCHN(evtchn)) {
  1063. struct sched_poll poll;
  1064. poll.nr_ports = 1;
  1065. poll.timeout = timeout;
  1066. set_xen_guest_handle(poll.ports, &evtchn);
  1067. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1068. BUG();
  1069. }
  1070. }
  1071. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1072. /* Poll waiting for an irq to become pending. In the usual case, the
  1073. * irq will be disabled so it won't deliver an interrupt. */
  1074. void xen_poll_irq(int irq)
  1075. {
  1076. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1077. }
  1078. void xen_irq_resume(void)
  1079. {
  1080. unsigned int cpu, irq, evtchn;
  1081. init_evtchn_cpu_bindings();
  1082. /* New event-channel space is not 'live' yet. */
  1083. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1084. mask_evtchn(evtchn);
  1085. /* No IRQ <-> event-channel mappings. */
  1086. for (irq = 0; irq < nr_irqs; irq++)
  1087. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  1088. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1089. evtchn_to_irq[evtchn] = -1;
  1090. for_each_possible_cpu(cpu) {
  1091. restore_cpu_virqs(cpu);
  1092. restore_cpu_ipis(cpu);
  1093. }
  1094. restore_pirqs();
  1095. }
  1096. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1097. .name = "xen-dyn",
  1098. .irq_disable = disable_dynirq,
  1099. .irq_mask = disable_dynirq,
  1100. .irq_unmask = enable_dynirq,
  1101. .irq_eoi = ack_dynirq,
  1102. .irq_set_affinity = set_affinity_irq,
  1103. .irq_retrigger = retrigger_dynirq,
  1104. };
  1105. static struct irq_chip xen_pirq_chip __read_mostly = {
  1106. .name = "xen-pirq",
  1107. .irq_startup = startup_pirq,
  1108. .irq_shutdown = shutdown_pirq,
  1109. .irq_enable = enable_pirq,
  1110. .irq_unmask = enable_pirq,
  1111. .irq_disable = disable_pirq,
  1112. .irq_mask = disable_pirq,
  1113. .irq_ack = ack_pirq,
  1114. .irq_set_affinity = set_affinity_irq,
  1115. .irq_retrigger = retrigger_dynirq,
  1116. };
  1117. static struct irq_chip xen_percpu_chip __read_mostly = {
  1118. .name = "xen-percpu",
  1119. .irq_disable = disable_dynirq,
  1120. .irq_mask = disable_dynirq,
  1121. .irq_unmask = enable_dynirq,
  1122. .irq_ack = ack_dynirq,
  1123. };
  1124. int xen_set_callback_via(uint64_t via)
  1125. {
  1126. struct xen_hvm_param a;
  1127. a.domid = DOMID_SELF;
  1128. a.index = HVM_PARAM_CALLBACK_IRQ;
  1129. a.value = via;
  1130. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1131. }
  1132. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1133. #ifdef CONFIG_XEN_PVHVM
  1134. /* Vector callbacks are better than PCI interrupts to receive event
  1135. * channel notifications because we can receive vector callbacks on any
  1136. * vcpu and we don't need PCI support or APIC interactions. */
  1137. void xen_callback_vector(void)
  1138. {
  1139. int rc;
  1140. uint64_t callback_via;
  1141. if (xen_have_vector_callback) {
  1142. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1143. rc = xen_set_callback_via(callback_via);
  1144. if (rc) {
  1145. printk(KERN_ERR "Request for Xen HVM callback vector"
  1146. " failed.\n");
  1147. xen_have_vector_callback = 0;
  1148. return;
  1149. }
  1150. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1151. "enabled\n");
  1152. /* in the restore case the vector has already been allocated */
  1153. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1154. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1155. }
  1156. }
  1157. #else
  1158. void xen_callback_vector(void) {}
  1159. #endif
  1160. void __init xen_init_IRQ(void)
  1161. {
  1162. int i;
  1163. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  1164. GFP_KERNEL);
  1165. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1166. /* We are using nr_irqs as the maximum number of pirq available but
  1167. * that number is actually chosen by Xen and we don't know exactly
  1168. * what it is. Be careful choosing high pirq numbers. */
  1169. pirq_to_irq = kcalloc(nr_irqs, sizeof(*pirq_to_irq), GFP_KERNEL);
  1170. for (i = 0; i < nr_irqs; i++)
  1171. pirq_to_irq[i] = -1;
  1172. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1173. GFP_KERNEL);
  1174. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1175. evtchn_to_irq[i] = -1;
  1176. init_evtchn_cpu_bindings();
  1177. /* No event channels are 'live' right now. */
  1178. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1179. mask_evtchn(i);
  1180. if (xen_hvm_domain()) {
  1181. xen_callback_vector();
  1182. native_init_IRQ();
  1183. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1184. * __acpi_register_gsi can point at the right function */
  1185. pci_xen_hvm_init();
  1186. } else {
  1187. irq_ctx_init(smp_processor_id());
  1188. if (xen_initial_domain())
  1189. xen_setup_pirqs();
  1190. }
  1191. }