board-da850-evm.c 20 KB

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  1. /*
  2. * TI DA850/OMAP-L138 EVM board
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Derived from: arch/arm/mach-davinci/board-da830-evm.c
  7. * Original Copyrights follow:
  8. *
  9. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c/at24.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/mfd/tps6507x.h>
  21. #include <linux/gpio.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/nand.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/mtd/physmap.h>
  27. #include <linux/regulator/machine.h>
  28. #include <linux/regulator/tps6507x.h>
  29. #include <linux/mfd/tps6507x.h>
  30. #include <linux/input/tps6507x-ts.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <mach/cp_intc.h>
  34. #include <mach/da8xx.h>
  35. #include <mach/nand.h>
  36. #include <mach/mux.h>
  37. #define DA850_EVM_PHY_MASK 0x1
  38. #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  39. #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
  40. #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
  41. #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
  42. #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
  43. #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
  44. static struct mtd_partition da850_evm_norflash_partition[] = {
  45. {
  46. .name = "bootloaders + env",
  47. .offset = 0,
  48. .size = SZ_512K,
  49. .mask_flags = MTD_WRITEABLE,
  50. },
  51. {
  52. .name = "kernel",
  53. .offset = MTDPART_OFS_APPEND,
  54. .size = SZ_2M,
  55. .mask_flags = 0,
  56. },
  57. {
  58. .name = "filesystem",
  59. .offset = MTDPART_OFS_APPEND,
  60. .size = MTDPART_SIZ_FULL,
  61. .mask_flags = 0,
  62. },
  63. };
  64. static struct physmap_flash_data da850_evm_norflash_data = {
  65. .width = 2,
  66. .parts = da850_evm_norflash_partition,
  67. .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
  68. };
  69. static struct resource da850_evm_norflash_resource[] = {
  70. {
  71. .start = DA8XX_AEMIF_CS2_BASE,
  72. .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
  73. .flags = IORESOURCE_MEM,
  74. },
  75. };
  76. static struct platform_device da850_evm_norflash_device = {
  77. .name = "physmap-flash",
  78. .id = 0,
  79. .dev = {
  80. .platform_data = &da850_evm_norflash_data,
  81. },
  82. .num_resources = 1,
  83. .resource = da850_evm_norflash_resource,
  84. };
  85. static struct davinci_pm_config da850_pm_pdata = {
  86. .sleepcount = 128,
  87. };
  88. static struct platform_device da850_pm_device = {
  89. .name = "pm-davinci",
  90. .dev = {
  91. .platform_data = &da850_pm_pdata,
  92. },
  93. .id = -1,
  94. };
  95. /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  96. * (128K blocks). It may be used instead of the (default) SPI flash
  97. * to boot, using TI's tools to install the secondary boot loader
  98. * (UBL) and U-Boot.
  99. */
  100. static struct mtd_partition da850_evm_nandflash_partition[] = {
  101. {
  102. .name = "u-boot env",
  103. .offset = 0,
  104. .size = SZ_128K,
  105. .mask_flags = MTD_WRITEABLE,
  106. },
  107. {
  108. .name = "UBL",
  109. .offset = MTDPART_OFS_APPEND,
  110. .size = SZ_128K,
  111. .mask_flags = MTD_WRITEABLE,
  112. },
  113. {
  114. .name = "u-boot",
  115. .offset = MTDPART_OFS_APPEND,
  116. .size = 4 * SZ_128K,
  117. .mask_flags = MTD_WRITEABLE,
  118. },
  119. {
  120. .name = "kernel",
  121. .offset = 0x200000,
  122. .size = SZ_2M,
  123. .mask_flags = 0,
  124. },
  125. {
  126. .name = "filesystem",
  127. .offset = MTDPART_OFS_APPEND,
  128. .size = MTDPART_SIZ_FULL,
  129. .mask_flags = 0,
  130. },
  131. };
  132. static struct davinci_nand_pdata da850_evm_nandflash_data = {
  133. .parts = da850_evm_nandflash_partition,
  134. .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
  135. .ecc_mode = NAND_ECC_HW,
  136. .ecc_bits = 4,
  137. .options = NAND_USE_FLASH_BBT,
  138. };
  139. static struct resource da850_evm_nandflash_resource[] = {
  140. {
  141. .start = DA8XX_AEMIF_CS3_BASE,
  142. .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
  143. .flags = IORESOURCE_MEM,
  144. },
  145. {
  146. .start = DA8XX_AEMIF_CTL_BASE,
  147. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  148. .flags = IORESOURCE_MEM,
  149. },
  150. };
  151. static struct platform_device da850_evm_nandflash_device = {
  152. .name = "davinci_nand",
  153. .id = 1,
  154. .dev = {
  155. .platform_data = &da850_evm_nandflash_data,
  156. },
  157. .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
  158. .resource = da850_evm_nandflash_resource,
  159. };
  160. static struct platform_device *da850_evm_devices[] __initdata = {
  161. &da850_evm_nandflash_device,
  162. &da850_evm_norflash_device,
  163. };
  164. #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
  165. #define DA8XX_AEMIF_ASIZE_16BIT 0x1
  166. static void __init da850_evm_init_nor(void)
  167. {
  168. void __iomem *aemif_addr;
  169. aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
  170. /* Configure data bus width of CS2 to 16 bit */
  171. writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
  172. DA8XX_AEMIF_ASIZE_16BIT,
  173. aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
  174. iounmap(aemif_addr);
  175. }
  176. static const short da850_evm_nand_pins[] = {
  177. DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
  178. DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
  179. DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
  180. DA850_NEMA_WE, DA850_NEMA_OE,
  181. -1
  182. };
  183. static const short da850_evm_nor_pins[] = {
  184. DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
  185. DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
  186. DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
  187. DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
  188. DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
  189. DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
  190. DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
  191. DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
  192. DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
  193. DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
  194. DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
  195. DA850_EMA_A_22, DA850_EMA_A_23,
  196. -1
  197. };
  198. static u32 ui_card_detected;
  199. #if defined(CONFIG_MMC_DAVINCI) || \
  200. defined(CONFIG_MMC_DAVINCI_MODULE)
  201. #define HAS_MMC 1
  202. #else
  203. #define HAS_MMC 0
  204. #endif
  205. static inline void da850_evm_setup_nor_nand(void)
  206. {
  207. int ret = 0;
  208. if (ui_card_detected & !HAS_MMC) {
  209. ret = davinci_cfg_reg_list(da850_evm_nand_pins);
  210. if (ret)
  211. pr_warning("da850_evm_init: nand mux setup failed: "
  212. "%d\n", ret);
  213. ret = davinci_cfg_reg_list(da850_evm_nor_pins);
  214. if (ret)
  215. pr_warning("da850_evm_init: nor mux setup failed: %d\n",
  216. ret);
  217. da850_evm_init_nor();
  218. platform_add_devices(da850_evm_devices,
  219. ARRAY_SIZE(da850_evm_devices));
  220. }
  221. }
  222. #ifdef CONFIG_DA850_UI_RMII
  223. static inline void da850_evm_setup_emac_rmii(int rmii_sel)
  224. {
  225. struct davinci_soc_info *soc_info = &davinci_soc_info;
  226. soc_info->emac_pdata->rmii_en = 1;
  227. gpio_set_value(rmii_sel, 0);
  228. }
  229. #else
  230. static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
  231. #endif
  232. static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
  233. unsigned ngpio, void *c)
  234. {
  235. int sel_a, sel_b, sel_c, ret;
  236. sel_a = gpio + 7;
  237. sel_b = gpio + 6;
  238. sel_c = gpio + 5;
  239. ret = gpio_request(sel_a, "sel_a");
  240. if (ret) {
  241. pr_warning("Cannot open UI expander pin %d\n", sel_a);
  242. goto exp_setup_sela_fail;
  243. }
  244. ret = gpio_request(sel_b, "sel_b");
  245. if (ret) {
  246. pr_warning("Cannot open UI expander pin %d\n", sel_b);
  247. goto exp_setup_selb_fail;
  248. }
  249. ret = gpio_request(sel_c, "sel_c");
  250. if (ret) {
  251. pr_warning("Cannot open UI expander pin %d\n", sel_c);
  252. goto exp_setup_selc_fail;
  253. }
  254. /* deselect all functionalities */
  255. gpio_direction_output(sel_a, 1);
  256. gpio_direction_output(sel_b, 1);
  257. gpio_direction_output(sel_c, 1);
  258. ui_card_detected = 1;
  259. pr_info("DA850/OMAP-L138 EVM UI card detected\n");
  260. da850_evm_setup_nor_nand();
  261. da850_evm_setup_emac_rmii(sel_a);
  262. return 0;
  263. exp_setup_selc_fail:
  264. gpio_free(sel_b);
  265. exp_setup_selb_fail:
  266. gpio_free(sel_a);
  267. exp_setup_sela_fail:
  268. return ret;
  269. }
  270. static int da850_evm_ui_expander_teardown(struct i2c_client *client,
  271. unsigned gpio, unsigned ngpio, void *c)
  272. {
  273. /* deselect all functionalities */
  274. gpio_set_value(gpio + 5, 1);
  275. gpio_set_value(gpio + 6, 1);
  276. gpio_set_value(gpio + 7, 1);
  277. gpio_free(gpio + 5);
  278. gpio_free(gpio + 6);
  279. gpio_free(gpio + 7);
  280. return 0;
  281. }
  282. static struct pca953x_platform_data da850_evm_ui_expander_info = {
  283. .gpio_base = DAVINCI_N_GPIO,
  284. .setup = da850_evm_ui_expander_setup,
  285. .teardown = da850_evm_ui_expander_teardown,
  286. };
  287. static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
  288. {
  289. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  290. },
  291. {
  292. I2C_BOARD_INFO("tca6416", 0x20),
  293. .platform_data = &da850_evm_ui_expander_info,
  294. },
  295. };
  296. static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
  297. .bus_freq = 100, /* kHz */
  298. .bus_delay = 0, /* usec */
  299. };
  300. static struct davinci_uart_config da850_evm_uart_config __initdata = {
  301. .enabled_uarts = 0x7,
  302. };
  303. /* davinci da850 evm audio machine driver */
  304. static u8 da850_iis_serializer_direction[] = {
  305. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  306. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  307. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
  308. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  309. };
  310. static struct snd_platform_data da850_evm_snd_data = {
  311. .tx_dma_offset = 0x2000,
  312. .rx_dma_offset = 0x2000,
  313. .op_mode = DAVINCI_MCASP_IIS_MODE,
  314. .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
  315. .tdm_slots = 2,
  316. .serial_dir = da850_iis_serializer_direction,
  317. .asp_chan_q = EVENTQ_1,
  318. .version = MCASP_VERSION_2,
  319. .txnumevt = 1,
  320. .rxnumevt = 1,
  321. };
  322. static int da850_evm_mmc_get_ro(int index)
  323. {
  324. return gpio_get_value(DA850_MMCSD_WP_PIN);
  325. }
  326. static int da850_evm_mmc_get_cd(int index)
  327. {
  328. return !gpio_get_value(DA850_MMCSD_CD_PIN);
  329. }
  330. static struct davinci_mmc_config da850_mmc_config = {
  331. .get_ro = da850_evm_mmc_get_ro,
  332. .get_cd = da850_evm_mmc_get_cd,
  333. .wires = 4,
  334. .max_freq = 50000000,
  335. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  336. .version = MMC_CTLR_VERSION_2,
  337. };
  338. static void da850_panel_power_ctrl(int val)
  339. {
  340. /* lcd backlight */
  341. gpio_set_value(DA850_LCD_BL_PIN, val);
  342. /* lcd power */
  343. gpio_set_value(DA850_LCD_PWR_PIN, val);
  344. }
  345. static int da850_lcd_hw_init(void)
  346. {
  347. int status;
  348. status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
  349. if (status < 0)
  350. return status;
  351. status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
  352. if (status < 0) {
  353. gpio_free(DA850_LCD_BL_PIN);
  354. return status;
  355. }
  356. gpio_direction_output(DA850_LCD_BL_PIN, 0);
  357. gpio_direction_output(DA850_LCD_PWR_PIN, 0);
  358. /* Switch off panel power and backlight */
  359. da850_panel_power_ctrl(0);
  360. /* Switch on panel power and backlight */
  361. da850_panel_power_ctrl(1);
  362. return 0;
  363. }
  364. /* TPS65070 voltage regulator support */
  365. /* 3.3V */
  366. static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
  367. {
  368. .supply = "usb0_vdda33",
  369. },
  370. {
  371. .supply = "usb1_vdda33",
  372. },
  373. };
  374. /* 3.3V or 1.8V */
  375. static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
  376. {
  377. .supply = "dvdd3318_a",
  378. },
  379. {
  380. .supply = "dvdd3318_b",
  381. },
  382. {
  383. .supply = "dvdd3318_c",
  384. },
  385. };
  386. /* 1.2V */
  387. static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
  388. {
  389. .supply = "cvdd",
  390. },
  391. };
  392. /* 1.8V LDO */
  393. static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
  394. {
  395. .supply = "sata_vddr",
  396. },
  397. {
  398. .supply = "usb0_vdda18",
  399. },
  400. {
  401. .supply = "usb1_vdda18",
  402. },
  403. {
  404. .supply = "ddr_dvdd18",
  405. },
  406. };
  407. /* 1.2V LDO */
  408. static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
  409. {
  410. .supply = "sata_vdd",
  411. },
  412. {
  413. .supply = "pll0_vdda",
  414. },
  415. {
  416. .supply = "pll1_vdda",
  417. },
  418. {
  419. .supply = "usbs_cvdd",
  420. },
  421. {
  422. .supply = "vddarnwa1",
  423. },
  424. };
  425. /* We take advantage of the fact that both defdcdc{2,3} are tied high */
  426. static struct tps6507x_reg_platform_data tps6507x_platform_data = {
  427. .defdcdc_default = true,
  428. };
  429. static struct regulator_init_data tps65070_regulator_data[] = {
  430. /* dcdc1 */
  431. {
  432. .constraints = {
  433. .min_uV = 3150000,
  434. .max_uV = 3450000,
  435. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  436. REGULATOR_CHANGE_STATUS),
  437. .boot_on = 1,
  438. },
  439. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
  440. .consumer_supplies = tps65070_dcdc1_consumers,
  441. },
  442. /* dcdc2 */
  443. {
  444. .constraints = {
  445. .min_uV = 1710000,
  446. .max_uV = 3450000,
  447. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  448. REGULATOR_CHANGE_STATUS),
  449. .boot_on = 1,
  450. },
  451. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
  452. .consumer_supplies = tps65070_dcdc2_consumers,
  453. .driver_data = &tps6507x_platform_data,
  454. },
  455. /* dcdc3 */
  456. {
  457. .constraints = {
  458. .min_uV = 950000,
  459. .max_uV = 1320000,
  460. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  461. REGULATOR_CHANGE_STATUS),
  462. .boot_on = 1,
  463. },
  464. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
  465. .consumer_supplies = tps65070_dcdc3_consumers,
  466. .driver_data = &tps6507x_platform_data,
  467. },
  468. /* ldo1 */
  469. {
  470. .constraints = {
  471. .min_uV = 1710000,
  472. .max_uV = 1890000,
  473. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  474. REGULATOR_CHANGE_STATUS),
  475. .boot_on = 1,
  476. },
  477. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
  478. .consumer_supplies = tps65070_ldo1_consumers,
  479. },
  480. /* ldo2 */
  481. {
  482. .constraints = {
  483. .min_uV = 1140000,
  484. .max_uV = 1320000,
  485. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  486. REGULATOR_CHANGE_STATUS),
  487. .boot_on = 1,
  488. },
  489. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
  490. .consumer_supplies = tps65070_ldo2_consumers,
  491. },
  492. };
  493. static struct touchscreen_init_data tps6507x_touchscreen_data = {
  494. .poll_period = 30, /* ms between touch samples */
  495. .min_pressure = 0x30, /* minimum pressure to trigger touch */
  496. .vref = 0, /* turn off vref when not using A/D */
  497. .vendor = 0, /* /sys/class/input/input?/id/vendor */
  498. .product = 65070, /* /sys/class/input/input?/id/product */
  499. .version = 0x100, /* /sys/class/input/input?/id/version */
  500. };
  501. static struct tps6507x_board tps_board = {
  502. .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
  503. .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
  504. };
  505. static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
  506. {
  507. I2C_BOARD_INFO("tps6507x", 0x48),
  508. .platform_data = &tps_board,
  509. },
  510. };
  511. static int __init pmic_tps65070_init(void)
  512. {
  513. return i2c_register_board_info(1, da850evm_tps65070_info,
  514. ARRAY_SIZE(da850evm_tps65070_info));
  515. }
  516. static const short da850_evm_lcdc_pins[] = {
  517. DA850_GPIO2_8, DA850_GPIO2_15,
  518. -1
  519. };
  520. static int __init da850_evm_config_emac(void)
  521. {
  522. void __iomem *cfg_chip3_base;
  523. int ret;
  524. u32 val;
  525. struct davinci_soc_info *soc_info = &davinci_soc_info;
  526. u8 rmii_en = soc_info->emac_pdata->rmii_en;
  527. if (!machine_is_davinci_da850_evm())
  528. return 0;
  529. cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
  530. val = __raw_readl(cfg_chip3_base);
  531. if (rmii_en) {
  532. val |= BIT(8);
  533. ret = davinci_cfg_reg_list(da850_rmii_pins);
  534. pr_info("EMAC: RMII PHY configured, MII PHY will not be"
  535. " functional\n");
  536. } else {
  537. val &= ~BIT(8);
  538. ret = davinci_cfg_reg_list(da850_cpgmac_pins);
  539. pr_info("EMAC: MII PHY configured, RMII PHY will not be"
  540. " functional\n");
  541. }
  542. if (ret)
  543. pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
  544. ret);
  545. /* configure the CFGCHIP3 register for RMII or MII */
  546. __raw_writel(val, cfg_chip3_base);
  547. ret = davinci_cfg_reg(DA850_GPIO2_6);
  548. if (ret)
  549. pr_warning("da850_evm_init:GPIO(2,6) mux setup "
  550. "failed\n");
  551. ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
  552. if (ret) {
  553. pr_warning("Cannot open GPIO %d\n",
  554. DA850_MII_MDIO_CLKEN_PIN);
  555. return ret;
  556. }
  557. /* Enable/Disable MII MDIO clock */
  558. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
  559. soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
  560. soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
  561. ret = da8xx_register_emac();
  562. if (ret)
  563. pr_warning("da850_evm_init: emac registration failed: %d\n",
  564. ret);
  565. return 0;
  566. }
  567. device_initcall(da850_evm_config_emac);
  568. /*
  569. * The following EDMA channels/slots are not being used by drivers (for
  570. * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
  571. * they are being reserved for codecs on the DSP side.
  572. */
  573. static const s16 da850_dma0_rsv_chans[][2] = {
  574. /* (offset, number) */
  575. { 8, 6},
  576. {24, 4},
  577. {30, 2},
  578. {-1, -1}
  579. };
  580. static const s16 da850_dma0_rsv_slots[][2] = {
  581. /* (offset, number) */
  582. { 8, 6},
  583. {24, 4},
  584. {30, 50},
  585. {-1, -1}
  586. };
  587. static const s16 da850_dma1_rsv_chans[][2] = {
  588. /* (offset, number) */
  589. { 0, 28},
  590. {30, 2},
  591. {-1, -1}
  592. };
  593. static const s16 da850_dma1_rsv_slots[][2] = {
  594. /* (offset, number) */
  595. { 0, 28},
  596. {30, 90},
  597. {-1, -1}
  598. };
  599. static struct edma_rsv_info da850_edma_cc0_rsv = {
  600. .rsv_chans = da850_dma0_rsv_chans,
  601. .rsv_slots = da850_dma0_rsv_slots,
  602. };
  603. static struct edma_rsv_info da850_edma_cc1_rsv = {
  604. .rsv_chans = da850_dma1_rsv_chans,
  605. .rsv_slots = da850_dma1_rsv_slots,
  606. };
  607. static struct edma_rsv_info *da850_edma_rsv[2] = {
  608. &da850_edma_cc0_rsv,
  609. &da850_edma_cc1_rsv,
  610. };
  611. static __init void da850_evm_init(void)
  612. {
  613. int ret;
  614. ret = pmic_tps65070_init();
  615. if (ret)
  616. pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
  617. ret);
  618. ret = da850_register_edma(da850_edma_rsv);
  619. if (ret)
  620. pr_warning("da850_evm_init: edma registration failed: %d\n",
  621. ret);
  622. ret = davinci_cfg_reg_list(da850_i2c0_pins);
  623. if (ret)
  624. pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
  625. ret);
  626. ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
  627. if (ret)
  628. pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
  629. ret);
  630. ret = da8xx_register_watchdog();
  631. if (ret)
  632. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  633. ret);
  634. if (HAS_MMC) {
  635. ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
  636. if (ret)
  637. pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
  638. " %d\n", ret);
  639. ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
  640. if (ret)
  641. pr_warning("da850_evm_init: can not open GPIO %d\n",
  642. DA850_MMCSD_CD_PIN);
  643. gpio_direction_input(DA850_MMCSD_CD_PIN);
  644. ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
  645. if (ret)
  646. pr_warning("da850_evm_init: can not open GPIO %d\n",
  647. DA850_MMCSD_WP_PIN);
  648. gpio_direction_input(DA850_MMCSD_WP_PIN);
  649. ret = da8xx_register_mmcsd0(&da850_mmc_config);
  650. if (ret)
  651. pr_warning("da850_evm_init: mmcsd0 registration failed:"
  652. " %d\n", ret);
  653. }
  654. davinci_serial_init(&da850_evm_uart_config);
  655. i2c_register_board_info(1, da850_evm_i2c_devices,
  656. ARRAY_SIZE(da850_evm_i2c_devices));
  657. /*
  658. * shut down uart 0 and 1; they are not used on the board and
  659. * accessing them causes endless "too much work in irq53" messages
  660. * with arago fs
  661. */
  662. __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
  663. __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
  664. ret = davinci_cfg_reg_list(da850_mcasp_pins);
  665. if (ret)
  666. pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
  667. ret);
  668. da8xx_register_mcasp(0, &da850_evm_snd_data);
  669. ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
  670. if (ret)
  671. pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
  672. ret);
  673. /* Handle board specific muxing for LCD here */
  674. ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
  675. if (ret)
  676. pr_warning("da850_evm_init: evm specific lcd mux setup "
  677. "failed: %d\n", ret);
  678. ret = da850_lcd_hw_init();
  679. if (ret)
  680. pr_warning("da850_evm_init: lcd initialization failed: %d\n",
  681. ret);
  682. sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
  683. ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
  684. if (ret)
  685. pr_warning("da850_evm_init: lcdc registration failed: %d\n",
  686. ret);
  687. ret = da8xx_register_rtc();
  688. if (ret)
  689. pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
  690. ret = da850_register_cpufreq("pll0_sysclk3");
  691. if (ret)
  692. pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
  693. ret);
  694. ret = da8xx_register_cpuidle();
  695. if (ret)
  696. pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
  697. ret);
  698. ret = da850_register_pm(&da850_pm_device);
  699. if (ret)
  700. pr_warning("da850_evm_init: suspend registration failed: %d\n",
  701. ret);
  702. }
  703. #ifdef CONFIG_SERIAL_8250_CONSOLE
  704. static int __init da850_evm_console_init(void)
  705. {
  706. return add_preferred_console("ttyS", 2, "115200");
  707. }
  708. console_initcall(da850_evm_console_init);
  709. #endif
  710. static void __init da850_evm_map_io(void)
  711. {
  712. da850_init();
  713. }
  714. MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
  715. .phys_io = IO_PHYS,
  716. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  717. .boot_params = (DA8XX_DDR_BASE + 0x100),
  718. .map_io = da850_evm_map_io,
  719. .init_irq = cp_intc_init,
  720. .timer = &davinci_timer,
  721. .init_machine = da850_evm_init,
  722. MACHINE_END