setup.c 20 KB

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  1. /*
  2. * linux/arch/mips/txx9/generic/setup.c
  3. *
  4. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  5. * and RBTX49xx patch from CELF patch archive.
  6. *
  7. * 2003-2005 (c) MontaVista Software, Inc.
  8. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file "COPYING" in the main directory of this archive
  12. * for more details.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/string.h>
  19. #include <linux/module.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/gpio.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/leds.h>
  27. #include <asm/bootinfo.h>
  28. #include <asm/time.h>
  29. #include <asm/reboot.h>
  30. #include <asm/r4kcache.h>
  31. #include <asm/sections.h>
  32. #include <asm/txx9/generic.h>
  33. #include <asm/txx9/pci.h>
  34. #include <asm/txx9tmr.h>
  35. #include <asm/txx9/ndfmc.h>
  36. #include <asm/txx9/dmac.h>
  37. #ifdef CONFIG_CPU_TX49XX
  38. #include <asm/txx9/tx4938.h>
  39. #endif
  40. /* EBUSC settings of TX4927, etc. */
  41. struct resource txx9_ce_res[8];
  42. static char txx9_ce_res_name[8][4]; /* "CEn" */
  43. /* pcode, internal register */
  44. unsigned int txx9_pcode;
  45. char txx9_pcode_str[8];
  46. static struct resource txx9_reg_res = {
  47. .name = txx9_pcode_str,
  48. .flags = IORESOURCE_MEM,
  49. };
  50. void __init
  51. txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
  52. {
  53. int i;
  54. for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
  55. sprintf(txx9_ce_res_name[i], "CE%d", i);
  56. txx9_ce_res[i].flags = IORESOURCE_MEM;
  57. txx9_ce_res[i].name = txx9_ce_res_name[i];
  58. }
  59. txx9_pcode = pcode;
  60. sprintf(txx9_pcode_str, "TX%x", pcode);
  61. if (base) {
  62. txx9_reg_res.start = base & 0xfffffffffULL;
  63. txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
  64. request_resource(&iomem_resource, &txx9_reg_res);
  65. }
  66. }
  67. /* clocks */
  68. unsigned int txx9_master_clock;
  69. unsigned int txx9_cpu_clock;
  70. unsigned int txx9_gbus_clock;
  71. #ifdef CONFIG_CPU_TX39XX
  72. /* don't enable by default - see errata */
  73. int txx9_ccfg_toeon __initdata;
  74. #else
  75. int txx9_ccfg_toeon __initdata = 1;
  76. #endif
  77. /* Minimum CLK support */
  78. struct clk *clk_get(struct device *dev, const char *id)
  79. {
  80. if (!strcmp(id, "spi-baseclk"))
  81. return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
  82. if (!strcmp(id, "imbus_clk"))
  83. return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
  84. return ERR_PTR(-ENOENT);
  85. }
  86. EXPORT_SYMBOL(clk_get);
  87. int clk_enable(struct clk *clk)
  88. {
  89. return 0;
  90. }
  91. EXPORT_SYMBOL(clk_enable);
  92. void clk_disable(struct clk *clk)
  93. {
  94. }
  95. EXPORT_SYMBOL(clk_disable);
  96. unsigned long clk_get_rate(struct clk *clk)
  97. {
  98. return (unsigned long)clk;
  99. }
  100. EXPORT_SYMBOL(clk_get_rate);
  101. void clk_put(struct clk *clk)
  102. {
  103. }
  104. EXPORT_SYMBOL(clk_put);
  105. /* GPIO support */
  106. #ifdef CONFIG_GENERIC_GPIO
  107. int gpio_to_irq(unsigned gpio)
  108. {
  109. return -EINVAL;
  110. }
  111. EXPORT_SYMBOL(gpio_to_irq);
  112. int irq_to_gpio(unsigned irq)
  113. {
  114. return -EINVAL;
  115. }
  116. EXPORT_SYMBOL(irq_to_gpio);
  117. #endif
  118. #define BOARD_VEC(board) extern struct txx9_board_vec board;
  119. #include <asm/txx9/boards.h>
  120. #undef BOARD_VEC
  121. struct txx9_board_vec *txx9_board_vec __initdata;
  122. static char txx9_system_type[32];
  123. static struct txx9_board_vec *board_vecs[] __initdata = {
  124. #define BOARD_VEC(board) &board,
  125. #include <asm/txx9/boards.h>
  126. #undef BOARD_VEC
  127. };
  128. static struct txx9_board_vec *__init find_board_byname(const char *name)
  129. {
  130. int i;
  131. /* search board_vecs table */
  132. for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
  133. if (strstr(board_vecs[i]->system, name))
  134. return board_vecs[i];
  135. }
  136. return NULL;
  137. }
  138. static void __init prom_init_cmdline(void)
  139. {
  140. int argc;
  141. int *argv32;
  142. int i; /* Always ignore the "-c" at argv[0] */
  143. char builtin[CL_SIZE];
  144. if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
  145. /*
  146. * argc is not a valid number, or argv32 is not a valid
  147. * pointer
  148. */
  149. argc = 0;
  150. argv32 = NULL;
  151. } else {
  152. argc = (int)fw_arg0;
  153. argv32 = (int *)fw_arg1;
  154. }
  155. /* ignore all built-in args if any f/w args given */
  156. /*
  157. * But if built-in strings was started with '+', append them
  158. * to command line args. If built-in was started with '-',
  159. * ignore all f/w args.
  160. */
  161. builtin[0] = '\0';
  162. if (arcs_cmdline[0] == '+')
  163. strcpy(builtin, arcs_cmdline + 1);
  164. else if (arcs_cmdline[0] == '-') {
  165. strcpy(builtin, arcs_cmdline + 1);
  166. argc = 0;
  167. } else if (argc <= 1)
  168. strcpy(builtin, arcs_cmdline);
  169. arcs_cmdline[0] = '\0';
  170. for (i = 1; i < argc; i++) {
  171. char *str = (char *)(long)argv32[i];
  172. if (i != 1)
  173. strcat(arcs_cmdline, " ");
  174. if (strchr(str, ' ')) {
  175. strcat(arcs_cmdline, "\"");
  176. strcat(arcs_cmdline, str);
  177. strcat(arcs_cmdline, "\"");
  178. } else
  179. strcat(arcs_cmdline, str);
  180. }
  181. /* append saved builtin args */
  182. if (builtin[0]) {
  183. if (arcs_cmdline[0])
  184. strcat(arcs_cmdline, " ");
  185. strcat(arcs_cmdline, builtin);
  186. }
  187. }
  188. static int txx9_ic_disable __initdata;
  189. static int txx9_dc_disable __initdata;
  190. #if defined(CONFIG_CPU_TX49XX)
  191. /* flush all cache on very early stage (before 4k_cache_init) */
  192. static void __init early_flush_dcache(void)
  193. {
  194. unsigned int conf = read_c0_config();
  195. unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
  196. unsigned int linesz = 32;
  197. unsigned long addr, end;
  198. end = INDEX_BASE + dc_size / 4;
  199. /* 4way, waybit=0 */
  200. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  201. cache_op(Index_Writeback_Inv_D, addr | 0);
  202. cache_op(Index_Writeback_Inv_D, addr | 1);
  203. cache_op(Index_Writeback_Inv_D, addr | 2);
  204. cache_op(Index_Writeback_Inv_D, addr | 3);
  205. }
  206. }
  207. static void __init txx9_cache_fixup(void)
  208. {
  209. unsigned int conf;
  210. conf = read_c0_config();
  211. /* flush and disable */
  212. if (txx9_ic_disable) {
  213. conf |= TX49_CONF_IC;
  214. write_c0_config(conf);
  215. }
  216. if (txx9_dc_disable) {
  217. early_flush_dcache();
  218. conf |= TX49_CONF_DC;
  219. write_c0_config(conf);
  220. }
  221. /* enable cache */
  222. conf = read_c0_config();
  223. if (!txx9_ic_disable)
  224. conf &= ~TX49_CONF_IC;
  225. if (!txx9_dc_disable)
  226. conf &= ~TX49_CONF_DC;
  227. write_c0_config(conf);
  228. if (conf & TX49_CONF_IC)
  229. pr_info("TX49XX I-Cache disabled.\n");
  230. if (conf & TX49_CONF_DC)
  231. pr_info("TX49XX D-Cache disabled.\n");
  232. }
  233. #elif defined(CONFIG_CPU_TX39XX)
  234. /* flush all cache on very early stage (before tx39_cache_init) */
  235. static void __init early_flush_dcache(void)
  236. {
  237. unsigned int conf = read_c0_config();
  238. unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
  239. TX39_CONF_DCS_SHIFT));
  240. unsigned int linesz = 16;
  241. unsigned long addr, end;
  242. end = INDEX_BASE + dc_size / 2;
  243. /* 2way, waybit=0 */
  244. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  245. cache_op(Index_Writeback_Inv_D, addr | 0);
  246. cache_op(Index_Writeback_Inv_D, addr | 1);
  247. }
  248. }
  249. static void __init txx9_cache_fixup(void)
  250. {
  251. unsigned int conf;
  252. conf = read_c0_config();
  253. /* flush and disable */
  254. if (txx9_ic_disable) {
  255. conf &= ~TX39_CONF_ICE;
  256. write_c0_config(conf);
  257. }
  258. if (txx9_dc_disable) {
  259. early_flush_dcache();
  260. conf &= ~TX39_CONF_DCE;
  261. write_c0_config(conf);
  262. }
  263. /* enable cache */
  264. conf = read_c0_config();
  265. if (!txx9_ic_disable)
  266. conf |= TX39_CONF_ICE;
  267. if (!txx9_dc_disable)
  268. conf |= TX39_CONF_DCE;
  269. write_c0_config(conf);
  270. if (!(conf & TX39_CONF_ICE))
  271. pr_info("TX39XX I-Cache disabled.\n");
  272. if (!(conf & TX39_CONF_DCE))
  273. pr_info("TX39XX D-Cache disabled.\n");
  274. }
  275. #else
  276. static inline void txx9_cache_fixup(void)
  277. {
  278. }
  279. #endif
  280. static void __init preprocess_cmdline(void)
  281. {
  282. char cmdline[CL_SIZE];
  283. char *s;
  284. strcpy(cmdline, arcs_cmdline);
  285. s = cmdline;
  286. arcs_cmdline[0] = '\0';
  287. while (s && *s) {
  288. char *str = strsep(&s, " ");
  289. if (strncmp(str, "board=", 6) == 0) {
  290. txx9_board_vec = find_board_byname(str + 6);
  291. continue;
  292. } else if (strncmp(str, "masterclk=", 10) == 0) {
  293. unsigned long val;
  294. if (strict_strtoul(str + 10, 10, &val) == 0)
  295. txx9_master_clock = val;
  296. continue;
  297. } else if (strcmp(str, "icdisable") == 0) {
  298. txx9_ic_disable = 1;
  299. continue;
  300. } else if (strcmp(str, "dcdisable") == 0) {
  301. txx9_dc_disable = 1;
  302. continue;
  303. } else if (strcmp(str, "toeoff") == 0) {
  304. txx9_ccfg_toeon = 0;
  305. continue;
  306. } else if (strcmp(str, "toeon") == 0) {
  307. txx9_ccfg_toeon = 1;
  308. continue;
  309. }
  310. if (arcs_cmdline[0])
  311. strcat(arcs_cmdline, " ");
  312. strcat(arcs_cmdline, str);
  313. }
  314. txx9_cache_fixup();
  315. }
  316. static void __init select_board(void)
  317. {
  318. const char *envstr;
  319. /* first, determine by "board=" argument in preprocess_cmdline() */
  320. if (txx9_board_vec)
  321. return;
  322. /* next, determine by "board" envvar */
  323. envstr = prom_getenv("board");
  324. if (envstr) {
  325. txx9_board_vec = find_board_byname(envstr);
  326. if (txx9_board_vec)
  327. return;
  328. }
  329. /* select "default" board */
  330. #ifdef CONFIG_CPU_TX39XX
  331. txx9_board_vec = &jmr3927_vec;
  332. #endif
  333. #ifdef CONFIG_CPU_TX49XX
  334. switch (TX4938_REV_PCODE()) {
  335. #ifdef CONFIG_TOSHIBA_RBTX4927
  336. case 0x4927:
  337. txx9_board_vec = &rbtx4927_vec;
  338. break;
  339. case 0x4937:
  340. txx9_board_vec = &rbtx4937_vec;
  341. break;
  342. #endif
  343. #ifdef CONFIG_TOSHIBA_RBTX4938
  344. case 0x4938:
  345. txx9_board_vec = &rbtx4938_vec;
  346. break;
  347. #endif
  348. #ifdef CONFIG_TOSHIBA_RBTX4939
  349. case 0x4939:
  350. txx9_board_vec = &rbtx4939_vec;
  351. break;
  352. #endif
  353. }
  354. #endif
  355. }
  356. void __init prom_init(void)
  357. {
  358. prom_init_cmdline();
  359. preprocess_cmdline();
  360. select_board();
  361. strcpy(txx9_system_type, txx9_board_vec->system);
  362. txx9_board_vec->prom_init();
  363. }
  364. void __init prom_free_prom_memory(void)
  365. {
  366. unsigned long saddr = PAGE_SIZE;
  367. unsigned long eaddr = __pa_symbol(&_text);
  368. if (saddr < eaddr)
  369. free_init_pages("prom memory", saddr, eaddr);
  370. }
  371. const char *get_system_type(void)
  372. {
  373. return txx9_system_type;
  374. }
  375. char * __init prom_getcmdline(void)
  376. {
  377. return &(arcs_cmdline[0]);
  378. }
  379. const char *__init prom_getenv(const char *name)
  380. {
  381. const s32 *str;
  382. if (fw_arg2 < CKSEG0)
  383. return NULL;
  384. str = (const s32 *)fw_arg2;
  385. /* YAMON style ("name", "value" pairs) */
  386. while (str[0] && str[1]) {
  387. if (!strcmp((const char *)(unsigned long)str[0], name))
  388. return (const char *)(unsigned long)str[1];
  389. str += 2;
  390. }
  391. return NULL;
  392. }
  393. static void __noreturn txx9_machine_halt(void)
  394. {
  395. local_irq_disable();
  396. clear_c0_status(ST0_IM);
  397. while (1) {
  398. if (cpu_wait) {
  399. (*cpu_wait)();
  400. if (cpu_has_counter) {
  401. /*
  402. * Clear counter interrupt while it
  403. * breaks WAIT instruction even if
  404. * masked.
  405. */
  406. write_c0_compare(0);
  407. }
  408. }
  409. }
  410. }
  411. /* Watchdog support */
  412. void __init txx9_wdt_init(unsigned long base)
  413. {
  414. struct resource res = {
  415. .start = base,
  416. .end = base + 0x100 - 1,
  417. .flags = IORESOURCE_MEM,
  418. };
  419. platform_device_register_simple("txx9wdt", -1, &res, 1);
  420. }
  421. void txx9_wdt_now(unsigned long base)
  422. {
  423. struct txx9_tmr_reg __iomem *tmrptr =
  424. ioremap(base, sizeof(struct txx9_tmr_reg));
  425. /* disable watch dog timer */
  426. __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
  427. __raw_writel(0, &tmrptr->tcr);
  428. /* kick watchdog */
  429. __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
  430. __raw_writel(1, &tmrptr->cpra); /* immediate */
  431. __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
  432. &tmrptr->tcr);
  433. }
  434. /* SPI support */
  435. void __init txx9_spi_init(int busid, unsigned long base, int irq)
  436. {
  437. struct resource res[] = {
  438. {
  439. .start = base,
  440. .end = base + 0x20 - 1,
  441. .flags = IORESOURCE_MEM,
  442. }, {
  443. .start = irq,
  444. .flags = IORESOURCE_IRQ,
  445. },
  446. };
  447. platform_device_register_simple("spi_txx9", busid,
  448. res, ARRAY_SIZE(res));
  449. }
  450. void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
  451. {
  452. struct platform_device *pdev =
  453. platform_device_alloc("tc35815-mac", id);
  454. if (!pdev ||
  455. platform_device_add_data(pdev, ethaddr, 6) ||
  456. platform_device_add(pdev))
  457. platform_device_put(pdev);
  458. }
  459. void __init txx9_sio_init(unsigned long baseaddr, int irq,
  460. unsigned int line, unsigned int sclk, int nocts)
  461. {
  462. #ifdef CONFIG_SERIAL_TXX9
  463. struct uart_port req;
  464. memset(&req, 0, sizeof(req));
  465. req.line = line;
  466. req.iotype = UPIO_MEM;
  467. req.membase = ioremap(baseaddr, 0x24);
  468. req.mapbase = baseaddr;
  469. req.irq = irq;
  470. if (!nocts)
  471. req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
  472. if (sclk) {
  473. req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
  474. req.uartclk = sclk;
  475. } else
  476. req.uartclk = TXX9_IMCLK;
  477. early_serial_txx9_setup(&req);
  478. #endif /* CONFIG_SERIAL_TXX9 */
  479. }
  480. #ifdef CONFIG_EARLY_PRINTK
  481. static void __init null_prom_putchar(char c)
  482. {
  483. }
  484. void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
  485. void __init prom_putchar(char c)
  486. {
  487. txx9_prom_putchar(c);
  488. }
  489. static void __iomem *early_txx9_sio_port;
  490. static void __init early_txx9_sio_putchar(char c)
  491. {
  492. #define TXX9_SICISR 0x0c
  493. #define TXX9_SITFIFO 0x1c
  494. #define TXX9_SICISR_TXALS 0x00000002
  495. while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
  496. TXX9_SICISR_TXALS))
  497. ;
  498. __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
  499. }
  500. void __init txx9_sio_putchar_init(unsigned long baseaddr)
  501. {
  502. early_txx9_sio_port = ioremap(baseaddr, 0x24);
  503. txx9_prom_putchar = early_txx9_sio_putchar;
  504. }
  505. #endif /* CONFIG_EARLY_PRINTK */
  506. /* wrappers */
  507. void __init plat_mem_setup(void)
  508. {
  509. ioport_resource.start = 0;
  510. ioport_resource.end = ~0UL; /* no limit */
  511. iomem_resource.start = 0;
  512. iomem_resource.end = ~0UL; /* no limit */
  513. /* fallback restart/halt routines */
  514. _machine_restart = (void (*)(char *))txx9_machine_halt;
  515. _machine_halt = txx9_machine_halt;
  516. pm_power_off = txx9_machine_halt;
  517. #ifdef CONFIG_PCI
  518. pcibios_plat_setup = txx9_pcibios_setup;
  519. #endif
  520. txx9_board_vec->mem_setup();
  521. }
  522. void __init arch_init_irq(void)
  523. {
  524. txx9_board_vec->irq_setup();
  525. }
  526. void __init plat_time_init(void)
  527. {
  528. #ifdef CONFIG_CPU_TX49XX
  529. mips_hpt_frequency = txx9_cpu_clock / 2;
  530. #endif
  531. txx9_board_vec->time_init();
  532. }
  533. static int __init _txx9_arch_init(void)
  534. {
  535. if (txx9_board_vec->arch_init)
  536. txx9_board_vec->arch_init();
  537. return 0;
  538. }
  539. arch_initcall(_txx9_arch_init);
  540. static int __init _txx9_device_init(void)
  541. {
  542. if (txx9_board_vec->device_init)
  543. txx9_board_vec->device_init();
  544. return 0;
  545. }
  546. device_initcall(_txx9_device_init);
  547. int (*txx9_irq_dispatch)(int pending);
  548. asmlinkage void plat_irq_dispatch(void)
  549. {
  550. int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  551. int irq = txx9_irq_dispatch(pending);
  552. if (likely(irq >= 0))
  553. do_IRQ(irq);
  554. else
  555. spurious_interrupt();
  556. }
  557. /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
  558. #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
  559. static unsigned long __swizzle_addr_none(unsigned long port)
  560. {
  561. return port;
  562. }
  563. unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
  564. EXPORT_SYMBOL(__swizzle_addr_b);
  565. #endif
  566. #ifdef NEEDS_TXX9_IOSWABW
  567. static u16 ioswabw_default(volatile u16 *a, u16 x)
  568. {
  569. return le16_to_cpu(x);
  570. }
  571. static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
  572. {
  573. return x;
  574. }
  575. u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
  576. EXPORT_SYMBOL(ioswabw);
  577. u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
  578. EXPORT_SYMBOL(__mem_ioswabw);
  579. #endif
  580. void __init txx9_physmap_flash_init(int no, unsigned long addr,
  581. unsigned long size,
  582. const struct physmap_flash_data *pdata)
  583. {
  584. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  585. struct resource res = {
  586. .start = addr,
  587. .end = addr + size - 1,
  588. .flags = IORESOURCE_MEM,
  589. };
  590. struct platform_device *pdev;
  591. #ifdef CONFIG_MTD_PARTITIONS
  592. static struct mtd_partition parts[2];
  593. struct physmap_flash_data pdata_part;
  594. /* If this area contained boot area, make separate partition */
  595. if (pdata->nr_parts == 0 && !pdata->parts &&
  596. addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
  597. !parts[0].name) {
  598. parts[0].name = "boot";
  599. parts[0].offset = 0x1fc00000 - addr;
  600. parts[0].size = addr + size - 0x1fc00000;
  601. parts[1].name = "user";
  602. parts[1].offset = 0;
  603. parts[1].size = 0x1fc00000 - addr;
  604. pdata_part = *pdata;
  605. pdata_part.nr_parts = ARRAY_SIZE(parts);
  606. pdata_part.parts = parts;
  607. pdata = &pdata_part;
  608. }
  609. #endif
  610. pdev = platform_device_alloc("physmap-flash", no);
  611. if (!pdev ||
  612. platform_device_add_resources(pdev, &res, 1) ||
  613. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  614. platform_device_add(pdev))
  615. platform_device_put(pdev);
  616. #endif
  617. }
  618. void __init txx9_ndfmc_init(unsigned long baseaddr,
  619. const struct txx9ndfmc_platform_data *pdata)
  620. {
  621. #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \
  622. defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE)
  623. struct resource res = {
  624. .start = baseaddr,
  625. .end = baseaddr + 0x1000 - 1,
  626. .flags = IORESOURCE_MEM,
  627. };
  628. struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
  629. if (!pdev ||
  630. platform_device_add_resources(pdev, &res, 1) ||
  631. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  632. platform_device_add(pdev))
  633. platform_device_put(pdev);
  634. #endif
  635. }
  636. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  637. static DEFINE_SPINLOCK(txx9_iocled_lock);
  638. #define TXX9_IOCLED_MAXLEDS 8
  639. struct txx9_iocled_data {
  640. struct gpio_chip chip;
  641. u8 cur_val;
  642. void __iomem *mmioaddr;
  643. struct gpio_led_platform_data pdata;
  644. struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
  645. char names[TXX9_IOCLED_MAXLEDS][32];
  646. };
  647. static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
  648. {
  649. struct txx9_iocled_data *data =
  650. container_of(chip, struct txx9_iocled_data, chip);
  651. return data->cur_val & (1 << offset);
  652. }
  653. static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
  654. int value)
  655. {
  656. struct txx9_iocled_data *data =
  657. container_of(chip, struct txx9_iocled_data, chip);
  658. unsigned long flags;
  659. spin_lock_irqsave(&txx9_iocled_lock, flags);
  660. if (value)
  661. data->cur_val |= 1 << offset;
  662. else
  663. data->cur_val &= ~(1 << offset);
  664. writeb(data->cur_val, data->mmioaddr);
  665. mmiowb();
  666. spin_unlock_irqrestore(&txx9_iocled_lock, flags);
  667. }
  668. static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
  669. {
  670. return 0;
  671. }
  672. static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
  673. int value)
  674. {
  675. txx9_iocled_set(chip, offset, value);
  676. return 0;
  677. }
  678. void __init txx9_iocled_init(unsigned long baseaddr,
  679. int basenum, unsigned int num, int lowactive,
  680. const char *color, char **deftriggers)
  681. {
  682. struct txx9_iocled_data *iocled;
  683. struct platform_device *pdev;
  684. int i;
  685. static char *default_triggers[] __initdata = {
  686. "heartbeat",
  687. "ide-disk",
  688. "nand-disk",
  689. NULL,
  690. };
  691. if (!deftriggers)
  692. deftriggers = default_triggers;
  693. iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
  694. if (!iocled)
  695. return;
  696. iocled->mmioaddr = ioremap(baseaddr, 1);
  697. if (!iocled->mmioaddr)
  698. return;
  699. iocled->chip.get = txx9_iocled_get;
  700. iocled->chip.set = txx9_iocled_set;
  701. iocled->chip.direction_input = txx9_iocled_dir_in;
  702. iocled->chip.direction_output = txx9_iocled_dir_out;
  703. iocled->chip.label = "iocled";
  704. iocled->chip.base = basenum;
  705. iocled->chip.ngpio = num;
  706. if (gpiochip_add(&iocled->chip))
  707. return;
  708. if (basenum < 0)
  709. basenum = iocled->chip.base;
  710. pdev = platform_device_alloc("leds-gpio", basenum);
  711. if (!pdev)
  712. return;
  713. iocled->pdata.num_leds = num;
  714. iocled->pdata.leds = iocled->leds;
  715. for (i = 0; i < num; i++) {
  716. struct gpio_led *led = &iocled->leds[i];
  717. snprintf(iocled->names[i], sizeof(iocled->names[i]),
  718. "iocled:%s:%u", color, i);
  719. led->name = iocled->names[i];
  720. led->gpio = basenum + i;
  721. led->active_low = lowactive;
  722. if (deftriggers && *deftriggers)
  723. led->default_trigger = *deftriggers++;
  724. }
  725. pdev->dev.platform_data = &iocled->pdata;
  726. if (platform_device_add(pdev))
  727. platform_device_put(pdev);
  728. }
  729. #else /* CONFIG_LEDS_GPIO */
  730. void __init txx9_iocled_init(unsigned long baseaddr,
  731. int basenum, unsigned int num, int lowactive,
  732. const char *color, char **deftriggers)
  733. {
  734. }
  735. #endif /* CONFIG_LEDS_GPIO */
  736. void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
  737. const struct txx9dmac_platform_data *pdata)
  738. {
  739. #if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE)
  740. struct resource res[] = {
  741. {
  742. .start = baseaddr,
  743. .end = baseaddr + 0x800 - 1,
  744. .flags = IORESOURCE_MEM,
  745. #ifndef CONFIG_MACH_TX49XX
  746. }, {
  747. .start = irq,
  748. .flags = IORESOURCE_IRQ,
  749. #endif
  750. }
  751. };
  752. #ifdef CONFIG_MACH_TX49XX
  753. struct resource chan_res[] = {
  754. {
  755. .flags = IORESOURCE_IRQ,
  756. }
  757. };
  758. #endif
  759. struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
  760. struct txx9dmac_chan_platform_data cpdata;
  761. int i;
  762. if (!pdev ||
  763. platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
  764. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  765. platform_device_add(pdev)) {
  766. platform_device_put(pdev);
  767. return;
  768. }
  769. memset(&cpdata, 0, sizeof(cpdata));
  770. cpdata.dmac_dev = pdev;
  771. for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
  772. #ifdef CONFIG_MACH_TX49XX
  773. chan_res[0].start = irq + i;
  774. #endif
  775. pdev = platform_device_alloc("txx9dmac-chan",
  776. id * TXX9_DMA_MAX_NR_CHANNELS + i);
  777. if (!pdev ||
  778. #ifdef CONFIG_MACH_TX49XX
  779. platform_device_add_resources(pdev, chan_res,
  780. ARRAY_SIZE(chan_res)) ||
  781. #endif
  782. platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
  783. platform_device_add(pdev))
  784. platform_device_put(pdev);
  785. }
  786. #endif
  787. }