mpparse.c 25 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <linux/smp.h>
  19. #include <linux/pci.h>
  20. #include <asm/mtrr.h>
  21. #include <asm/mpspec.h>
  22. #include <asm/pgalloc.h>
  23. #include <asm/io_apic.h>
  24. #include <asm/proto.h>
  25. #include <asm/bios_ebda.h>
  26. #include <asm/e820.h>
  27. #include <asm/trampoline.h>
  28. #include <asm/setup.h>
  29. #include <asm/smp.h>
  30. #include <asm/apic.h>
  31. /*
  32. * Checksum an MP configuration block.
  33. */
  34. static int __init mpf_checksum(unsigned char *mp, int len)
  35. {
  36. int sum = 0;
  37. while (len--)
  38. sum += *mp++;
  39. return sum & 0xFF;
  40. }
  41. static void __init MP_processor_info(struct mpc_cpu *m)
  42. {
  43. int apicid;
  44. char *bootup_cpu = "";
  45. if (!(m->cpuflag & CPU_ENABLED)) {
  46. disabled_cpus++;
  47. return;
  48. }
  49. if (x86_quirks->mpc_apic_id)
  50. apicid = x86_quirks->mpc_apic_id(m);
  51. else
  52. apicid = m->apicid;
  53. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  54. bootup_cpu = " (Bootup-CPU)";
  55. boot_cpu_physical_apicid = m->apicid;
  56. }
  57. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  58. generic_processor_info(apicid, m->apicver);
  59. }
  60. #ifdef CONFIG_X86_IO_APIC
  61. static void __init MP_bus_info(struct mpc_bus *m)
  62. {
  63. char str[7];
  64. memcpy(str, m->bustype, 6);
  65. str[6] = 0;
  66. if (x86_quirks->mpc_oem_bus_info)
  67. x86_quirks->mpc_oem_bus_info(m, str);
  68. else
  69. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  70. #if MAX_MP_BUSSES < 256
  71. if (m->busid >= MAX_MP_BUSSES) {
  72. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  73. " is too large, max. supported is %d\n",
  74. m->busid, str, MAX_MP_BUSSES - 1);
  75. return;
  76. }
  77. #endif
  78. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  79. set_bit(m->busid, mp_bus_not_pci);
  80. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  81. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  82. #endif
  83. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  84. if (x86_quirks->mpc_oem_pci_bus)
  85. x86_quirks->mpc_oem_pci_bus(m);
  86. clear_bit(m->busid, mp_bus_not_pci);
  87. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  88. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  89. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  90. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  91. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  92. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  93. #endif
  94. } else
  95. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  96. }
  97. static int bad_ioapic(unsigned long address)
  98. {
  99. if (nr_ioapics >= MAX_IO_APICS) {
  100. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  101. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  102. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  103. }
  104. if (!address) {
  105. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  106. " found in table, skipping!\n");
  107. return 1;
  108. }
  109. return 0;
  110. }
  111. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  112. {
  113. if (!(m->flags & MPC_APIC_USABLE))
  114. return;
  115. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  116. m->apicid, m->apicver, m->apicaddr);
  117. if (bad_ioapic(m->apicaddr))
  118. return;
  119. mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
  120. mp_ioapics[nr_ioapics].apicid = m->apicid;
  121. mp_ioapics[nr_ioapics].type = m->type;
  122. mp_ioapics[nr_ioapics].apicver = m->apicver;
  123. mp_ioapics[nr_ioapics].flags = m->flags;
  124. nr_ioapics++;
  125. }
  126. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  127. {
  128. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  129. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  130. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  131. m->srcbusirq, m->dstapic, m->dstirq);
  132. }
  133. static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
  134. {
  135. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  136. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  137. mp_irq->irqtype, mp_irq->irqflag & 3,
  138. (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
  139. mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
  140. }
  141. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  142. struct mpc_intsrc *mp_irq)
  143. {
  144. mp_irq->dstapic = m->dstapic;
  145. mp_irq->type = m->type;
  146. mp_irq->irqtype = m->irqtype;
  147. mp_irq->irqflag = m->irqflag;
  148. mp_irq->srcbus = m->srcbus;
  149. mp_irq->srcbusirq = m->srcbusirq;
  150. mp_irq->dstirq = m->dstirq;
  151. }
  152. static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
  153. struct mpc_intsrc *m)
  154. {
  155. m->dstapic = mp_irq->dstapic;
  156. m->type = mp_irq->type;
  157. m->irqtype = mp_irq->irqtype;
  158. m->irqflag = mp_irq->irqflag;
  159. m->srcbus = mp_irq->srcbus;
  160. m->srcbusirq = mp_irq->srcbusirq;
  161. m->dstirq = mp_irq->dstirq;
  162. }
  163. static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
  164. struct mpc_intsrc *m)
  165. {
  166. if (mp_irq->dstapic != m->dstapic)
  167. return 1;
  168. if (mp_irq->type != m->type)
  169. return 2;
  170. if (mp_irq->irqtype != m->irqtype)
  171. return 3;
  172. if (mp_irq->irqflag != m->irqflag)
  173. return 4;
  174. if (mp_irq->srcbus != m->srcbus)
  175. return 5;
  176. if (mp_irq->srcbusirq != m->srcbusirq)
  177. return 6;
  178. if (mp_irq->dstirq != m->dstirq)
  179. return 7;
  180. return 0;
  181. }
  182. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  183. {
  184. int i;
  185. print_MP_intsrc_info(m);
  186. for (i = 0; i < mp_irq_entries; i++) {
  187. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  188. return;
  189. }
  190. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  191. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  192. panic("Max # of irq sources exceeded!!\n");
  193. }
  194. #else /* CONFIG_X86_IO_APIC */
  195. static inline void __init MP_bus_info(struct mpc_bus *m) {}
  196. static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
  197. static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
  198. #endif /* CONFIG_X86_IO_APIC */
  199. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  200. {
  201. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  202. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  203. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  204. m->srcbusirq, m->destapic, m->destapiclint);
  205. }
  206. /*
  207. * Read/parse the MPC
  208. */
  209. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  210. {
  211. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  212. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  213. mpc->signature[0], mpc->signature[1],
  214. mpc->signature[2], mpc->signature[3]);
  215. return 0;
  216. }
  217. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  218. printk(KERN_ERR "MPTABLE: checksum error!\n");
  219. return 0;
  220. }
  221. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  222. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  223. mpc->spec);
  224. return 0;
  225. }
  226. if (!mpc->lapic) {
  227. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  228. return 0;
  229. }
  230. memcpy(oem, mpc->oem, 8);
  231. oem[8] = 0;
  232. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  233. memcpy(str, mpc->productid, 12);
  234. str[12] = 0;
  235. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  236. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  237. return 1;
  238. }
  239. static void skip_entry(unsigned char **ptr, int *count, int size)
  240. {
  241. *ptr += size;
  242. *count += size;
  243. }
  244. static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
  245. {
  246. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
  247. "type %x\n", *mpt);
  248. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  249. 1, mpc, mpc->length, 1);
  250. }
  251. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  252. {
  253. char str[16];
  254. char oem[10];
  255. int count = sizeof(*mpc);
  256. unsigned char *mpt = ((unsigned char *)mpc) + count;
  257. if (!smp_check_mpc(mpc, oem, str))
  258. return 0;
  259. #ifdef CONFIG_X86_32
  260. generic_mps_oem_check(mpc, oem, str);
  261. #endif
  262. /* save the local APIC address, it might be non-default */
  263. if (!acpi_lapic)
  264. mp_lapic_addr = mpc->lapic;
  265. if (early)
  266. return 1;
  267. if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
  268. struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
  269. x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
  270. }
  271. /*
  272. * Now process the configuration blocks.
  273. */
  274. x86_init.mpparse.mpc_record(0);
  275. while (count < mpc->length) {
  276. switch (*mpt) {
  277. case MP_PROCESSOR:
  278. /* ACPI may have already provided this data */
  279. if (!acpi_lapic)
  280. MP_processor_info((struct mpc_cpu *)mpt);
  281. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  282. break;
  283. case MP_BUS:
  284. MP_bus_info((struct mpc_bus *)mpt);
  285. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  286. break;
  287. case MP_IOAPIC:
  288. MP_ioapic_info((struct mpc_ioapic *)mpt);
  289. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  290. break;
  291. case MP_INTSRC:
  292. MP_intsrc_info((struct mpc_intsrc *)mpt);
  293. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  294. break;
  295. case MP_LINTSRC:
  296. MP_lintsrc_info((struct mpc_lintsrc *)mpt);
  297. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  298. break;
  299. default:
  300. /* wrong mptable */
  301. smp_dump_mptable(mpc, mpt);
  302. count = mpc->length;
  303. break;
  304. }
  305. x86_init.mpparse.mpc_record(1);
  306. }
  307. #ifdef CONFIG_X86_BIGSMP
  308. generic_bigsmp_probe();
  309. #endif
  310. if (apic->setup_apic_routing)
  311. apic->setup_apic_routing();
  312. if (!num_processors)
  313. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  314. return num_processors;
  315. }
  316. #ifdef CONFIG_X86_IO_APIC
  317. static int __init ELCR_trigger(unsigned int irq)
  318. {
  319. unsigned int port;
  320. port = 0x4d0 + (irq >> 3);
  321. return (inb(port) >> (irq & 7)) & 1;
  322. }
  323. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  324. {
  325. struct mpc_intsrc intsrc;
  326. int i;
  327. int ELCR_fallback = 0;
  328. intsrc.type = MP_INTSRC;
  329. intsrc.irqflag = 0; /* conforming */
  330. intsrc.srcbus = 0;
  331. intsrc.dstapic = mp_ioapics[0].apicid;
  332. intsrc.irqtype = mp_INT;
  333. /*
  334. * If true, we have an ISA/PCI system with no IRQ entries
  335. * in the MP table. To prevent the PCI interrupts from being set up
  336. * incorrectly, we try to use the ELCR. The sanity check to see if
  337. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  338. * never be level sensitive, so we simply see if the ELCR agrees.
  339. * If it does, we assume it's valid.
  340. */
  341. if (mpc_default_type == 5) {
  342. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  343. "falling back to ELCR\n");
  344. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  345. ELCR_trigger(13))
  346. printk(KERN_ERR "ELCR contains invalid data... "
  347. "not using ELCR\n");
  348. else {
  349. printk(KERN_INFO
  350. "Using ELCR to identify PCI interrupts\n");
  351. ELCR_fallback = 1;
  352. }
  353. }
  354. for (i = 0; i < 16; i++) {
  355. switch (mpc_default_type) {
  356. case 2:
  357. if (i == 0 || i == 13)
  358. continue; /* IRQ0 & IRQ13 not connected */
  359. /* fall through */
  360. default:
  361. if (i == 2)
  362. continue; /* IRQ2 is never connected */
  363. }
  364. if (ELCR_fallback) {
  365. /*
  366. * If the ELCR indicates a level-sensitive interrupt, we
  367. * copy that information over to the MP table in the
  368. * irqflag field (level sensitive, active high polarity).
  369. */
  370. if (ELCR_trigger(i))
  371. intsrc.irqflag = 13;
  372. else
  373. intsrc.irqflag = 0;
  374. }
  375. intsrc.srcbusirq = i;
  376. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  377. MP_intsrc_info(&intsrc);
  378. }
  379. intsrc.irqtype = mp_ExtINT;
  380. intsrc.srcbusirq = 0;
  381. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  382. MP_intsrc_info(&intsrc);
  383. }
  384. static void __init construct_ioapic_table(int mpc_default_type)
  385. {
  386. struct mpc_ioapic ioapic;
  387. struct mpc_bus bus;
  388. bus.type = MP_BUS;
  389. bus.busid = 0;
  390. switch (mpc_default_type) {
  391. default:
  392. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  393. mpc_default_type);
  394. /* fall through */
  395. case 1:
  396. case 5:
  397. memcpy(bus.bustype, "ISA ", 6);
  398. break;
  399. case 2:
  400. case 6:
  401. case 3:
  402. memcpy(bus.bustype, "EISA ", 6);
  403. break;
  404. case 4:
  405. case 7:
  406. memcpy(bus.bustype, "MCA ", 6);
  407. }
  408. MP_bus_info(&bus);
  409. if (mpc_default_type > 4) {
  410. bus.busid = 1;
  411. memcpy(bus.bustype, "PCI ", 6);
  412. MP_bus_info(&bus);
  413. }
  414. ioapic.type = MP_IOAPIC;
  415. ioapic.apicid = 2;
  416. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  417. ioapic.flags = MPC_APIC_USABLE;
  418. ioapic.apicaddr = 0xFEC00000;
  419. MP_ioapic_info(&ioapic);
  420. /*
  421. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  422. */
  423. construct_default_ioirq_mptable(mpc_default_type);
  424. }
  425. #else
  426. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  427. #endif
  428. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  429. {
  430. struct mpc_cpu processor;
  431. struct mpc_lintsrc lintsrc;
  432. int linttypes[2] = { mp_ExtINT, mp_NMI };
  433. int i;
  434. /*
  435. * local APIC has default address
  436. */
  437. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  438. /*
  439. * 2 CPUs, numbered 0 & 1.
  440. */
  441. processor.type = MP_PROCESSOR;
  442. /* Either an integrated APIC or a discrete 82489DX. */
  443. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  444. processor.cpuflag = CPU_ENABLED;
  445. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  446. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  447. processor.featureflag = boot_cpu_data.x86_capability[0];
  448. processor.reserved[0] = 0;
  449. processor.reserved[1] = 0;
  450. for (i = 0; i < 2; i++) {
  451. processor.apicid = i;
  452. MP_processor_info(&processor);
  453. }
  454. construct_ioapic_table(mpc_default_type);
  455. lintsrc.type = MP_LINTSRC;
  456. lintsrc.irqflag = 0; /* conforming */
  457. lintsrc.srcbusid = 0;
  458. lintsrc.srcbusirq = 0;
  459. lintsrc.destapic = MP_APIC_ALL;
  460. for (i = 0; i < 2; i++) {
  461. lintsrc.irqtype = linttypes[i];
  462. lintsrc.destapiclint = i;
  463. MP_lintsrc_info(&lintsrc);
  464. }
  465. }
  466. static struct mpf_intel *mpf_found;
  467. static unsigned long __init get_mpc_size(unsigned long physptr)
  468. {
  469. struct mpc_table *mpc;
  470. unsigned long size;
  471. mpc = early_ioremap(physptr, PAGE_SIZE);
  472. size = mpc->length;
  473. early_iounmap(mpc, PAGE_SIZE);
  474. apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
  475. return size;
  476. }
  477. static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
  478. {
  479. struct mpc_table *mpc;
  480. unsigned long size;
  481. size = get_mpc_size(mpf->physptr);
  482. mpc = early_ioremap(mpf->physptr, size);
  483. /*
  484. * Read the physical hardware table. Anything here will
  485. * override the defaults.
  486. */
  487. if (!smp_read_mpc(mpc, early)) {
  488. #ifdef CONFIG_X86_LOCAL_APIC
  489. smp_found_config = 0;
  490. #endif
  491. printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
  492. "... disabling SMP support. (tell your hw vendor)\n");
  493. early_iounmap(mpc, size);
  494. return -1;
  495. }
  496. early_iounmap(mpc, size);
  497. if (early)
  498. return -1;
  499. #ifdef CONFIG_X86_IO_APIC
  500. /*
  501. * If there are no explicit MP IRQ entries, then we are
  502. * broken. We set up most of the low 16 IO-APIC pins to
  503. * ISA defaults and hope it will work.
  504. */
  505. if (!mp_irq_entries) {
  506. struct mpc_bus bus;
  507. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  508. "using default mptable. (tell your hw vendor)\n");
  509. bus.type = MP_BUS;
  510. bus.busid = 0;
  511. memcpy(bus.bustype, "ISA ", 6);
  512. MP_bus_info(&bus);
  513. construct_default_ioirq_mptable(0);
  514. }
  515. #endif
  516. return 0;
  517. }
  518. /*
  519. * Scan the memory blocks for an SMP configuration block.
  520. */
  521. static void __init __get_smp_config(unsigned int early)
  522. {
  523. struct mpf_intel *mpf = mpf_found;
  524. if (!mpf)
  525. return;
  526. if (acpi_lapic && early)
  527. return;
  528. /*
  529. * MPS doesn't support hyperthreading, aka only have
  530. * thread 0 apic id in MPS table
  531. */
  532. if (acpi_lapic && acpi_ioapic)
  533. return;
  534. if (x86_quirks->mach_get_smp_config) {
  535. if (x86_quirks->mach_get_smp_config(early))
  536. return;
  537. }
  538. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  539. mpf->specification);
  540. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  541. if (mpf->feature2 & (1 << 7)) {
  542. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  543. pic_mode = 1;
  544. } else {
  545. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  546. pic_mode = 0;
  547. }
  548. #endif
  549. /*
  550. * Now see if we need to read further.
  551. */
  552. if (mpf->feature1 != 0) {
  553. if (early) {
  554. /*
  555. * local APIC has default address
  556. */
  557. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  558. return;
  559. }
  560. printk(KERN_INFO "Default MP configuration #%d\n",
  561. mpf->feature1);
  562. construct_default_ISA_mptable(mpf->feature1);
  563. } else if (mpf->physptr) {
  564. if (check_physptr(mpf, early))
  565. return;
  566. } else
  567. BUG();
  568. if (!early)
  569. printk(KERN_INFO "Processors: %d\n", num_processors);
  570. /*
  571. * Only use the first configuration found.
  572. */
  573. }
  574. void __init early_get_smp_config(void)
  575. {
  576. __get_smp_config(1);
  577. }
  578. void __init get_smp_config(void)
  579. {
  580. __get_smp_config(0);
  581. }
  582. static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
  583. {
  584. unsigned long size = get_mpc_size(mpf->physptr);
  585. #ifdef CONFIG_X86_32
  586. /*
  587. * We cannot access to MPC table to compute table size yet,
  588. * as only few megabytes from the bottom is mapped now.
  589. * PC-9800's MPC table places on the very last of physical
  590. * memory; so that simply reserving PAGE_SIZE from mpf->physptr
  591. * yields BUG() in reserve_bootmem.
  592. * also need to make sure physptr is below than max_low_pfn
  593. * we don't need reserve the area above max_low_pfn
  594. */
  595. unsigned long end = max_low_pfn * PAGE_SIZE;
  596. if (mpf->physptr < end) {
  597. if (mpf->physptr + size > end)
  598. size = end - mpf->physptr;
  599. reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
  600. }
  601. #else
  602. reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
  603. #endif
  604. }
  605. static int __init smp_scan_config(unsigned long base, unsigned long length,
  606. unsigned reserve)
  607. {
  608. unsigned int *bp = phys_to_virt(base);
  609. struct mpf_intel *mpf;
  610. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  611. bp, length);
  612. BUILD_BUG_ON(sizeof(*mpf) != 16);
  613. while (length > 0) {
  614. mpf = (struct mpf_intel *)bp;
  615. if ((*bp == SMP_MAGIC_IDENT) &&
  616. (mpf->length == 1) &&
  617. !mpf_checksum((unsigned char *)bp, 16) &&
  618. ((mpf->specification == 1)
  619. || (mpf->specification == 4))) {
  620. #ifdef CONFIG_X86_LOCAL_APIC
  621. smp_found_config = 1;
  622. #endif
  623. mpf_found = mpf;
  624. printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
  625. mpf, (u64)virt_to_phys(mpf));
  626. if (!reserve)
  627. return 1;
  628. reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf),
  629. BOOTMEM_DEFAULT);
  630. if (mpf->physptr)
  631. smp_reserve_bootmem(mpf);
  632. return 1;
  633. }
  634. bp += 4;
  635. length -= 16;
  636. }
  637. return 0;
  638. }
  639. static void __init __find_smp_config(unsigned int reserve)
  640. {
  641. unsigned int address;
  642. if (x86_quirks->mach_find_smp_config) {
  643. if (x86_quirks->mach_find_smp_config(reserve))
  644. return;
  645. }
  646. /*
  647. * FIXME: Linux assumes you have 640K of base ram..
  648. * this continues the error...
  649. *
  650. * 1) Scan the bottom 1K for a signature
  651. * 2) Scan the top 1K of base RAM
  652. * 3) Scan the 64K of bios
  653. */
  654. if (smp_scan_config(0x0, 0x400, reserve) ||
  655. smp_scan_config(639 * 0x400, 0x400, reserve) ||
  656. smp_scan_config(0xF0000, 0x10000, reserve))
  657. return;
  658. /*
  659. * If it is an SMP machine we should know now, unless the
  660. * configuration is in an EISA/MCA bus machine with an
  661. * extended bios data area.
  662. *
  663. * there is a real-mode segmented pointer pointing to the
  664. * 4K EBDA area at 0x40E, calculate and scan it here.
  665. *
  666. * NOTE! There are Linux loaders that will corrupt the EBDA
  667. * area, and as such this kind of SMP config may be less
  668. * trustworthy, simply because the SMP table may have been
  669. * stomped on during early boot. These loaders are buggy and
  670. * should be fixed.
  671. *
  672. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  673. */
  674. address = get_bios_ebda();
  675. if (address)
  676. smp_scan_config(address, 0x400, reserve);
  677. }
  678. void __init early_find_smp_config(void)
  679. {
  680. __find_smp_config(0);
  681. }
  682. void __init find_smp_config(void)
  683. {
  684. __find_smp_config(1);
  685. }
  686. #ifdef CONFIG_X86_IO_APIC
  687. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  688. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  689. {
  690. int i;
  691. if (m->irqtype != mp_INT)
  692. return 0;
  693. if (m->irqflag != 0x0f)
  694. return 0;
  695. /* not legacy */
  696. for (i = 0; i < mp_irq_entries; i++) {
  697. if (mp_irqs[i].irqtype != mp_INT)
  698. continue;
  699. if (mp_irqs[i].irqflag != 0x0f)
  700. continue;
  701. if (mp_irqs[i].srcbus != m->srcbus)
  702. continue;
  703. if (mp_irqs[i].srcbusirq != m->srcbusirq)
  704. continue;
  705. if (irq_used[i]) {
  706. /* already claimed */
  707. return -2;
  708. }
  709. irq_used[i] = 1;
  710. return i;
  711. }
  712. /* not found */
  713. return -1;
  714. }
  715. #define SPARE_SLOT_NUM 20
  716. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  717. static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
  718. {
  719. int i;
  720. apic_printk(APIC_VERBOSE, "OLD ");
  721. print_MP_intsrc_info(m);
  722. i = get_MP_intsrc_index(m);
  723. if (i > 0) {
  724. assign_to_mpc_intsrc(&mp_irqs[i], m);
  725. apic_printk(APIC_VERBOSE, "NEW ");
  726. print_mp_irq_info(&mp_irqs[i]);
  727. return;
  728. }
  729. if (!i) {
  730. /* legacy, do nothing */
  731. return;
  732. }
  733. if (*nr_m_spare < SPARE_SLOT_NUM) {
  734. /*
  735. * not found (-1), or duplicated (-2) are invalid entries,
  736. * we need to use the slot later
  737. */
  738. m_spare[*nr_m_spare] = m;
  739. *nr_m_spare += 1;
  740. }
  741. }
  742. #else /* CONFIG_X86_IO_APIC */
  743. static
  744. inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
  745. #endif /* CONFIG_X86_IO_APIC */
  746. static int
  747. check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
  748. {
  749. int ret = 0;
  750. if (!mpc_new_phys || count <= mpc_new_length) {
  751. WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
  752. return -1;
  753. }
  754. return ret;
  755. }
  756. static int __init replace_intsrc_all(struct mpc_table *mpc,
  757. unsigned long mpc_new_phys,
  758. unsigned long mpc_new_length)
  759. {
  760. #ifdef CONFIG_X86_IO_APIC
  761. int i;
  762. #endif
  763. int count = sizeof(*mpc);
  764. int nr_m_spare = 0;
  765. unsigned char *mpt = ((unsigned char *)mpc) + count;
  766. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  767. while (count < mpc->length) {
  768. switch (*mpt) {
  769. case MP_PROCESSOR:
  770. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  771. break;
  772. case MP_BUS:
  773. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  774. break;
  775. case MP_IOAPIC:
  776. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  777. break;
  778. case MP_INTSRC:
  779. check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
  780. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  781. break;
  782. case MP_LINTSRC:
  783. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  784. break;
  785. default:
  786. /* wrong mptable */
  787. smp_dump_mptable(mpc, mpt);
  788. goto out;
  789. }
  790. }
  791. #ifdef CONFIG_X86_IO_APIC
  792. for (i = 0; i < mp_irq_entries; i++) {
  793. if (irq_used[i])
  794. continue;
  795. if (mp_irqs[i].irqtype != mp_INT)
  796. continue;
  797. if (mp_irqs[i].irqflag != 0x0f)
  798. continue;
  799. if (nr_m_spare > 0) {
  800. apic_printk(APIC_VERBOSE, "*NEW* found\n");
  801. nr_m_spare--;
  802. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  803. m_spare[nr_m_spare] = NULL;
  804. } else {
  805. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  806. count += sizeof(struct mpc_intsrc);
  807. if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
  808. goto out;
  809. assign_to_mpc_intsrc(&mp_irqs[i], m);
  810. mpc->length = count;
  811. mpt += sizeof(struct mpc_intsrc);
  812. }
  813. print_mp_irq_info(&mp_irqs[i]);
  814. }
  815. #endif
  816. out:
  817. /* update checksum */
  818. mpc->checksum = 0;
  819. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  820. return 0;
  821. }
  822. int enable_update_mptable;
  823. static int __init update_mptable_setup(char *str)
  824. {
  825. enable_update_mptable = 1;
  826. #ifdef CONFIG_PCI
  827. pci_routeirq = 1;
  828. #endif
  829. return 0;
  830. }
  831. early_param("update_mptable", update_mptable_setup);
  832. static unsigned long __initdata mpc_new_phys;
  833. static unsigned long mpc_new_length __initdata = 4096;
  834. /* alloc_mptable or alloc_mptable=4k */
  835. static int __initdata alloc_mptable;
  836. static int __init parse_alloc_mptable_opt(char *p)
  837. {
  838. enable_update_mptable = 1;
  839. #ifdef CONFIG_PCI
  840. pci_routeirq = 1;
  841. #endif
  842. alloc_mptable = 1;
  843. if (!p)
  844. return 0;
  845. mpc_new_length = memparse(p, &p);
  846. return 0;
  847. }
  848. early_param("alloc_mptable", parse_alloc_mptable_opt);
  849. void __init early_reserve_e820_mpc_new(void)
  850. {
  851. if (enable_update_mptable && alloc_mptable) {
  852. u64 startt = 0;
  853. #ifdef CONFIG_X86_TRAMPOLINE
  854. startt = TRAMPOLINE_BASE;
  855. #endif
  856. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  857. }
  858. }
  859. static int __init update_mp_table(void)
  860. {
  861. char str[16];
  862. char oem[10];
  863. struct mpf_intel *mpf;
  864. struct mpc_table *mpc, *mpc_new;
  865. if (!enable_update_mptable)
  866. return 0;
  867. mpf = mpf_found;
  868. if (!mpf)
  869. return 0;
  870. /*
  871. * Now see if we need to go further.
  872. */
  873. if (mpf->feature1 != 0)
  874. return 0;
  875. if (!mpf->physptr)
  876. return 0;
  877. mpc = phys_to_virt(mpf->physptr);
  878. if (!smp_check_mpc(mpc, oem, str))
  879. return 0;
  880. printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
  881. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  882. if (mpc_new_phys && mpc->length > mpc_new_length) {
  883. mpc_new_phys = 0;
  884. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  885. mpc_new_length);
  886. }
  887. if (!mpc_new_phys) {
  888. unsigned char old, new;
  889. /* check if we can change the postion */
  890. mpc->checksum = 0;
  891. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  892. mpc->checksum = 0xff;
  893. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  894. if (old == new) {
  895. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  896. return 0;
  897. }
  898. printk(KERN_INFO "use in-positon replacing\n");
  899. } else {
  900. mpf->physptr = mpc_new_phys;
  901. mpc_new = phys_to_virt(mpc_new_phys);
  902. memcpy(mpc_new, mpc, mpc->length);
  903. mpc = mpc_new;
  904. /* check if we can modify that */
  905. if (mpc_new_phys - mpf->physptr) {
  906. struct mpf_intel *mpf_new;
  907. /* steal 16 bytes from [0, 1k) */
  908. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  909. mpf_new = phys_to_virt(0x400 - 16);
  910. memcpy(mpf_new, mpf, 16);
  911. mpf = mpf_new;
  912. mpf->physptr = mpc_new_phys;
  913. }
  914. mpf->checksum = 0;
  915. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  916. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  917. }
  918. /*
  919. * only replace the one with mp_INT and
  920. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  921. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  922. * may need pci=routeirq for all coverage
  923. */
  924. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  925. return 0;
  926. }
  927. late_initcall(update_mp_table);