mac.c 12 KB

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  1. /*
  2. * Atheros AR9170 driver
  3. *
  4. * MAC programming
  5. *
  6. * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; see the file COPYING. If not, see
  20. * http://www.gnu.org/licenses/.
  21. *
  22. * This file incorporates work covered by the following copyright and
  23. * permission notice:
  24. * Copyright (c) 2007-2008 Atheros Communications, Inc.
  25. *
  26. * Permission to use, copy, modify, and/or distribute this software for any
  27. * purpose with or without fee is hereby granted, provided that the above
  28. * copyright notice and this permission notice appear in all copies.
  29. *
  30. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  31. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  32. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  33. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  34. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  35. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  36. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  37. */
  38. #include "ar9170.h"
  39. #include "cmd.h"
  40. int ar9170_set_qos(struct ar9170 *ar)
  41. {
  42. ar9170_regwrite_begin(ar);
  43. ar9170_regwrite(AR9170_MAC_REG_AC0_CW, ar->edcf[0].cw_min |
  44. (ar->edcf[0].cw_max << 16));
  45. ar9170_regwrite(AR9170_MAC_REG_AC1_CW, ar->edcf[1].cw_min |
  46. (ar->edcf[1].cw_max << 16));
  47. ar9170_regwrite(AR9170_MAC_REG_AC2_CW, ar->edcf[2].cw_min |
  48. (ar->edcf[2].cw_max << 16));
  49. ar9170_regwrite(AR9170_MAC_REG_AC3_CW, ar->edcf[3].cw_min |
  50. (ar->edcf[3].cw_max << 16));
  51. ar9170_regwrite(AR9170_MAC_REG_AC4_CW, ar->edcf[4].cw_min |
  52. (ar->edcf[4].cw_max << 16));
  53. ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_AIFS,
  54. ((ar->edcf[0].aifs * 9 + 10)) |
  55. ((ar->edcf[1].aifs * 9 + 10) << 12) |
  56. ((ar->edcf[2].aifs * 9 + 10) << 24));
  57. ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_AIFS,
  58. ((ar->edcf[2].aifs * 9 + 10) >> 8) |
  59. ((ar->edcf[3].aifs * 9 + 10) << 4) |
  60. ((ar->edcf[4].aifs * 9 + 10) << 16));
  61. ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP,
  62. ar->edcf[0].txop | ar->edcf[1].txop << 16);
  63. ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP,
  64. ar->edcf[1].txop | ar->edcf[3].txop << 16);
  65. ar9170_regwrite_finish();
  66. return ar9170_regwrite_result();
  67. }
  68. static int ar9170_set_ampdu_density(struct ar9170 *ar, u8 mpdudensity)
  69. {
  70. u32 val;
  71. /* don't allow AMPDU density > 8us */
  72. if (mpdudensity > 6)
  73. return -EINVAL;
  74. /* Watch out! Otus uses slightly different density values. */
  75. val = 0x140a00 | (mpdudensity ? (mpdudensity + 1) : 0);
  76. ar9170_regwrite_begin(ar);
  77. ar9170_regwrite(AR9170_MAC_REG_AMPDU_SET, val);
  78. ar9170_regwrite_finish();
  79. return ar9170_regwrite_result();
  80. }
  81. int ar9170_init_mac(struct ar9170 *ar)
  82. {
  83. ar9170_regwrite_begin(ar);
  84. ar9170_regwrite(AR9170_MAC_REG_ACK_EXTENSION, 0x40);
  85. ar9170_regwrite(AR9170_MAC_REG_RETRY_MAX, 0);
  86. /* enable MMIC */
  87. ar9170_regwrite(AR9170_MAC_REG_SNIFFER,
  88. AR9170_MAC_REG_SNIFFER_DEFAULTS);
  89. ar9170_regwrite(AR9170_MAC_REG_RX_THRESHOLD, 0xc1f80);
  90. ar9170_regwrite(AR9170_MAC_REG_RX_PE_DELAY, 0x70);
  91. ar9170_regwrite(AR9170_MAC_REG_EIFS_AND_SIFS, 0xa144000);
  92. ar9170_regwrite(AR9170_MAC_REG_SLOT_TIME, 9 << 10);
  93. /* CF-END mode */
  94. ar9170_regwrite(0x1c3b2c, 0x19000000);
  95. /* NAV protects ACK only (in TXOP) */
  96. ar9170_regwrite(0x1c3b38, 0x201);
  97. /* Set Beacon PHY CTRL's TPC to 0x7, TA1=1 */
  98. /* OTUS set AM to 0x1 */
  99. ar9170_regwrite(AR9170_MAC_REG_BCN_HT1, 0x8000170);
  100. ar9170_regwrite(AR9170_MAC_REG_BACKOFF_PROTECT, 0x105);
  101. /* AGG test code*/
  102. /* Aggregation MAX number and timeout */
  103. ar9170_regwrite(0x1c3b9c, 0x10000a);
  104. ar9170_regwrite(AR9170_MAC_REG_FRAMETYPE_FILTER,
  105. AR9170_MAC_REG_FTF_DEFAULTS);
  106. /* Enable deaggregator, response in sniffer mode */
  107. ar9170_regwrite(0x1c3c40, 0x1 | 1<<30);
  108. /* rate sets */
  109. ar9170_regwrite(AR9170_MAC_REG_BASIC_RATE, 0x150f);
  110. ar9170_regwrite(AR9170_MAC_REG_MANDATORY_RATE, 0x150f);
  111. ar9170_regwrite(AR9170_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
  112. /* MIMO response control */
  113. ar9170_regwrite(0x1c3694, 0x4003C1E);/* bit 26~28 otus-AM */
  114. /* switch MAC to OTUS interface */
  115. ar9170_regwrite(0x1c3600, 0x3);
  116. ar9170_regwrite(AR9170_MAC_REG_AMPDU_RX_THRESH, 0xffff);
  117. /* set PHY register read timeout (??) */
  118. ar9170_regwrite(AR9170_MAC_REG_MISC_680, 0xf00008);
  119. /* Disable Rx TimeOut, workaround for BB. */
  120. ar9170_regwrite(AR9170_MAC_REG_RX_TIMEOUT, 0x0);
  121. /* Set CPU clock frequency to 88/80MHz */
  122. ar9170_regwrite(AR9170_PWR_REG_CLOCK_SEL,
  123. AR9170_PWR_CLK_AHB_80_88MHZ |
  124. AR9170_PWR_CLK_DAC_160_INV_DLY);
  125. /* Set WLAN DMA interrupt mode: generate int per packet */
  126. ar9170_regwrite(AR9170_MAC_REG_TXRX_MPI, 0x110011);
  127. ar9170_regwrite(AR9170_MAC_REG_FCS_SELECT,
  128. AR9170_MAC_FCS_FIFO_PROT);
  129. /* Disables the CF_END frame, undocumented register */
  130. ar9170_regwrite(AR9170_MAC_REG_TXOP_NOT_ENOUGH_IND,
  131. 0x141E0F48);
  132. ar9170_regwrite_finish();
  133. return ar9170_regwrite_result();
  134. }
  135. static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac)
  136. {
  137. static const u8 zero[ETH_ALEN] = { 0 };
  138. if (!mac)
  139. mac = zero;
  140. ar9170_regwrite_begin(ar);
  141. ar9170_regwrite(reg,
  142. (mac[3] << 24) | (mac[2] << 16) |
  143. (mac[1] << 8) | mac[0]);
  144. ar9170_regwrite(reg + 4, (mac[5] << 8) | mac[4]);
  145. ar9170_regwrite_finish();
  146. return ar9170_regwrite_result();
  147. }
  148. int ar9170_update_multicast(struct ar9170 *ar)
  149. {
  150. int err;
  151. ar9170_regwrite_begin(ar);
  152. ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_H,
  153. ar->want_mc_hash >> 32);
  154. ar9170_regwrite(AR9170_MAC_REG_GROUP_HASH_TBL_L,
  155. ar->want_mc_hash);
  156. ar9170_regwrite_finish();
  157. err = ar9170_regwrite_result();
  158. if (err)
  159. return err;
  160. ar->cur_mc_hash = ar->want_mc_hash;
  161. return 0;
  162. }
  163. int ar9170_update_frame_filter(struct ar9170 *ar)
  164. {
  165. int err;
  166. err = ar9170_write_reg(ar, AR9170_MAC_REG_FRAMETYPE_FILTER,
  167. ar->want_filter);
  168. if (err)
  169. return err;
  170. ar->cur_filter = ar->want_filter;
  171. return 0;
  172. }
  173. static int ar9170_set_promiscouous(struct ar9170 *ar)
  174. {
  175. u32 encr_mode, sniffer;
  176. int err;
  177. err = ar9170_read_reg(ar, AR9170_MAC_REG_SNIFFER, &sniffer);
  178. if (err)
  179. return err;
  180. err = ar9170_read_reg(ar, AR9170_MAC_REG_ENCRYPTION, &encr_mode);
  181. if (err)
  182. return err;
  183. if (ar->sniffer_enabled) {
  184. sniffer |= AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
  185. /*
  186. * Rx decryption works in place.
  187. *
  188. * If we don't disable it, the hardware will render all
  189. * encrypted frames which are encrypted with an unknown
  190. * key useless.
  191. */
  192. encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
  193. ar->sniffer_enabled = true;
  194. } else {
  195. sniffer &= ~AR9170_MAC_REG_SNIFFER_ENABLE_PROMISC;
  196. if (ar->rx_software_decryption)
  197. encr_mode |= AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
  198. else
  199. encr_mode &= ~AR9170_MAC_REG_ENCRYPTION_RX_SOFTWARE;
  200. }
  201. ar9170_regwrite_begin(ar);
  202. ar9170_regwrite(AR9170_MAC_REG_ENCRYPTION, encr_mode);
  203. ar9170_regwrite(AR9170_MAC_REG_SNIFFER, sniffer);
  204. ar9170_regwrite_finish();
  205. return ar9170_regwrite_result();
  206. }
  207. int ar9170_set_operating_mode(struct ar9170 *ar)
  208. {
  209. u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS;
  210. u8 *mac_addr, *bssid;
  211. int err;
  212. if (ar->vif) {
  213. mac_addr = ar->mac_addr;
  214. bssid = ar->bssid;
  215. switch (ar->vif->type) {
  216. case NL80211_IFTYPE_MESH_POINT:
  217. case NL80211_IFTYPE_ADHOC:
  218. pm_mode |= AR9170_MAC_REG_POWERMGT_IBSS;
  219. break;
  220. case NL80211_IFTYPE_AP:
  221. pm_mode |= AR9170_MAC_REG_POWERMGT_AP;
  222. break;
  223. case NL80211_IFTYPE_WDS:
  224. pm_mode |= AR9170_MAC_REG_POWERMGT_AP_WDS;
  225. break;
  226. case NL80211_IFTYPE_MONITOR:
  227. ar->sniffer_enabled = true;
  228. ar->rx_software_decryption = true;
  229. break;
  230. default:
  231. pm_mode |= AR9170_MAC_REG_POWERMGT_STA;
  232. break;
  233. }
  234. } else {
  235. mac_addr = NULL;
  236. bssid = NULL;
  237. }
  238. err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_MAC_ADDR_L, mac_addr);
  239. if (err)
  240. return err;
  241. err = ar9170_set_mac_reg(ar, AR9170_MAC_REG_BSSID_L, bssid);
  242. if (err)
  243. return err;
  244. err = ar9170_set_promiscouous(ar);
  245. if (err)
  246. return err;
  247. /* set AMPDU density to 8us. */
  248. err = ar9170_set_ampdu_density(ar, 6);
  249. if (err)
  250. return err;
  251. ar9170_regwrite_begin(ar);
  252. ar9170_regwrite(AR9170_MAC_REG_POWERMANAGEMENT, pm_mode);
  253. ar9170_regwrite_finish();
  254. return ar9170_regwrite_result();
  255. }
  256. int ar9170_set_hwretry_limit(struct ar9170 *ar, unsigned int max_retry)
  257. {
  258. u32 tmp = min_t(u32, 0x33333, max_retry * 0x11111);
  259. return ar9170_write_reg(ar, AR9170_MAC_REG_RETRY_MAX, tmp);
  260. }
  261. int ar9170_set_beacon_timers(struct ar9170 *ar)
  262. {
  263. u32 v = 0;
  264. u32 pretbtt = 0;
  265. if (ar->vif) {
  266. v |= ar->vif->bss_conf.beacon_int;
  267. switch (ar->vif->type) {
  268. case NL80211_IFTYPE_MESH_POINT:
  269. case NL80211_IFTYPE_ADHOC:
  270. v |= BIT(25);
  271. break;
  272. case NL80211_IFTYPE_AP:
  273. v |= BIT(24);
  274. pretbtt = (ar->vif->bss_conf.beacon_int - 6) << 16;
  275. break;
  276. default:
  277. break;
  278. }
  279. v |= ar->vif->bss_conf.dtim_period << 16;
  280. }
  281. ar9170_regwrite_begin(ar);
  282. ar9170_regwrite(AR9170_MAC_REG_PRETBTT, pretbtt);
  283. ar9170_regwrite(AR9170_MAC_REG_BCN_PERIOD, v);
  284. ar9170_regwrite_finish();
  285. return ar9170_regwrite_result();
  286. }
  287. int ar9170_update_beacon(struct ar9170 *ar)
  288. {
  289. struct sk_buff *skb;
  290. __le32 *data, *old = NULL;
  291. u32 word;
  292. int i;
  293. skb = ieee80211_beacon_get(ar->hw, ar->vif);
  294. if (!skb)
  295. return -ENOMEM;
  296. data = (__le32 *)skb->data;
  297. if (ar->beacon)
  298. old = (__le32 *)ar->beacon->data;
  299. ar9170_regwrite_begin(ar);
  300. for (i = 0; i < DIV_ROUND_UP(skb->len, 4); i++) {
  301. /*
  302. * XXX: This accesses beyond skb data for up
  303. * to the last 3 bytes!!
  304. */
  305. if (old && (data[i] == old[i]))
  306. continue;
  307. word = le32_to_cpu(data[i]);
  308. ar9170_regwrite(AR9170_BEACON_BUFFER_ADDRESS + 4 * i, word);
  309. }
  310. /* XXX: use skb->cb info */
  311. if (ar->hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  312. ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
  313. ((skb->len + 4) << (3 + 16)) + 0x0400);
  314. else
  315. ar9170_regwrite(AR9170_MAC_REG_BCN_PLCP,
  316. ((skb->len + 4) << 16) + 0x001b);
  317. ar9170_regwrite(AR9170_MAC_REG_BCN_LENGTH, skb->len + 4);
  318. ar9170_regwrite(AR9170_MAC_REG_BCN_ADDR, AR9170_BEACON_BUFFER_ADDRESS);
  319. ar9170_regwrite(AR9170_MAC_REG_BCN_CTRL, 1);
  320. ar9170_regwrite_finish();
  321. dev_kfree_skb(ar->beacon);
  322. ar->beacon = skb;
  323. return ar9170_regwrite_result();
  324. }
  325. void ar9170_new_beacon(struct work_struct *work)
  326. {
  327. struct ar9170 *ar = container_of(work, struct ar9170,
  328. beacon_work);
  329. struct sk_buff *skb;
  330. if (unlikely(!IS_STARTED(ar)))
  331. return ;
  332. mutex_lock(&ar->mutex);
  333. if (!ar->vif)
  334. goto out;
  335. ar9170_update_beacon(ar);
  336. rcu_read_lock();
  337. while ((skb = ieee80211_get_buffered_bc(ar->hw, ar->vif)))
  338. ar9170_op_tx(ar->hw, skb);
  339. rcu_read_unlock();
  340. out:
  341. mutex_unlock(&ar->mutex);
  342. }
  343. int ar9170_upload_key(struct ar9170 *ar, u8 id, const u8 *mac, u8 ktype,
  344. u8 keyidx, u8 *keydata, int keylen)
  345. {
  346. __le32 vals[7];
  347. static const u8 bcast[ETH_ALEN] =
  348. { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
  349. u8 dummy;
  350. mac = mac ? : bcast;
  351. vals[0] = cpu_to_le32((keyidx << 16) + id);
  352. vals[1] = cpu_to_le32(mac[1] << 24 | mac[0] << 16 | ktype);
  353. vals[2] = cpu_to_le32(mac[5] << 24 | mac[4] << 16 |
  354. mac[3] << 8 | mac[2]);
  355. memset(&vals[3], 0, 16);
  356. if (keydata)
  357. memcpy(&vals[3], keydata, keylen);
  358. return ar->exec_cmd(ar, AR9170_CMD_EKEY,
  359. sizeof(vals), (u8 *)vals,
  360. 1, &dummy);
  361. }
  362. int ar9170_disable_key(struct ar9170 *ar, u8 id)
  363. {
  364. __le32 val = cpu_to_le32(id);
  365. u8 dummy;
  366. return ar->exec_cmd(ar, AR9170_CMD_EKEY,
  367. sizeof(val), (u8 *)&val,
  368. 1, &dummy);
  369. }