io_init.c 10 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
  7. */
  8. #include <asm/sn/types.h>
  9. #include <asm/sn/addrs.h>
  10. #include <asm/sn/io.h>
  11. #include <asm/sn/module.h>
  12. #include <asm/sn/intr.h>
  13. #include <asm/sn/pcibus_provider_defs.h>
  14. #include <asm/sn/pcidev.h>
  15. #include <asm/sn/sn_sal.h>
  16. #include "xtalk/hubdev.h"
  17. /*
  18. * The code in this file will only be executed when running with
  19. * a PROM that does _not_ have base ACPI IO support.
  20. * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
  21. */
  22. static int max_segment_number; /* Default highest segment number */
  23. static int max_pcibus_number = 255; /* Default highest pci bus number */
  24. /*
  25. * Retrieve the hub device info structure for the given nasid.
  26. */
  27. static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
  28. {
  29. struct ia64_sal_retval ret_stuff;
  30. ret_stuff.status = 0;
  31. ret_stuff.v0 = 0;
  32. SAL_CALL_NOLOCK(ret_stuff,
  33. (u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
  34. (u64) handle, (u64) address, 0, 0, 0, 0, 0);
  35. return ret_stuff.v0;
  36. }
  37. /*
  38. * Retrieve the pci bus information given the bus number.
  39. */
  40. static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
  41. {
  42. struct ia64_sal_retval ret_stuff;
  43. ret_stuff.status = 0;
  44. ret_stuff.v0 = 0;
  45. SAL_CALL_NOLOCK(ret_stuff,
  46. (u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
  47. (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
  48. return ret_stuff.v0;
  49. }
  50. /*
  51. * Retrieve the pci device information given the bus and device|function number.
  52. */
  53. static inline u64
  54. sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
  55. u64 sn_irq_info)
  56. {
  57. struct ia64_sal_retval ret_stuff;
  58. ret_stuff.status = 0;
  59. ret_stuff.v0 = 0;
  60. SAL_CALL_NOLOCK(ret_stuff,
  61. (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
  62. (u64) segment, (u64) bus_number, (u64) devfn,
  63. (u64) pci_dev,
  64. sn_irq_info, 0, 0);
  65. return ret_stuff.v0;
  66. }
  67. /*
  68. * sn_fixup_ionodes() - This routine initializes the HUB data structure for
  69. * each node in the system. This function is only
  70. * executed when running with a non-ACPI capable PROM.
  71. */
  72. static void __init sn_fixup_ionodes(void)
  73. {
  74. struct hubdev_info *hubdev;
  75. u64 status;
  76. u64 nasid;
  77. int i;
  78. extern void sn_common_hubdev_init(struct hubdev_info *);
  79. /*
  80. * Get SGI Specific HUB chipset information.
  81. * Inform Prom that this kernel can support domain bus numbering.
  82. */
  83. for (i = 0; i < num_cnodes; i++) {
  84. hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
  85. nasid = cnodeid_to_nasid(i);
  86. hubdev->max_segment_number = 0xffffffff;
  87. hubdev->max_pcibus_number = 0xff;
  88. status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
  89. if (status)
  90. continue;
  91. /* Save the largest Domain and pcibus numbers found. */
  92. if (hubdev->max_segment_number) {
  93. /*
  94. * Dealing with a Prom that supports segments.
  95. */
  96. max_segment_number = hubdev->max_segment_number;
  97. max_pcibus_number = hubdev->max_pcibus_number;
  98. }
  99. sn_common_hubdev_init(hubdev);
  100. }
  101. }
  102. /*
  103. * sn_pci_legacy_window_fixup - Create PCI controller windows for
  104. * legacy IO and MEM space. This needs to
  105. * be done here, as the PROM does not have
  106. * ACPI support defining the root buses
  107. * and their resources (_CRS),
  108. */
  109. static void
  110. sn_legacy_pci_window_fixup(struct pci_controller *controller,
  111. u64 legacy_io, u64 legacy_mem)
  112. {
  113. controller->window = kcalloc(2, sizeof(struct pci_window),
  114. GFP_KERNEL);
  115. if (controller->window == NULL)
  116. BUG();
  117. controller->window[0].offset = legacy_io;
  118. controller->window[0].resource.name = "legacy_io";
  119. controller->window[0].resource.flags = IORESOURCE_IO;
  120. controller->window[0].resource.start = legacy_io;
  121. controller->window[0].resource.end =
  122. controller->window[0].resource.start + 0xffff;
  123. controller->window[0].resource.parent = &ioport_resource;
  124. controller->window[1].offset = legacy_mem;
  125. controller->window[1].resource.name = "legacy_mem";
  126. controller->window[1].resource.flags = IORESOURCE_MEM;
  127. controller->window[1].resource.start = legacy_mem;
  128. controller->window[1].resource.end =
  129. controller->window[1].resource.start + (1024 * 1024) - 1;
  130. controller->window[1].resource.parent = &iomem_resource;
  131. controller->windows = 2;
  132. }
  133. /*
  134. * sn_pci_window_fixup() - Create a pci_window for each device resource.
  135. * It will setup pci_windows for use by
  136. * pcibios_bus_to_resource(), pcibios_resource_to_bus(),
  137. * etc.
  138. */
  139. static void
  140. sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
  141. s64 * pci_addrs)
  142. {
  143. struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
  144. unsigned int i;
  145. unsigned int idx;
  146. unsigned int new_count;
  147. struct pci_window *new_window;
  148. if (count == 0)
  149. return;
  150. idx = controller->windows;
  151. new_count = controller->windows + count;
  152. new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
  153. if (new_window == NULL)
  154. BUG();
  155. if (controller->window) {
  156. memcpy(new_window, controller->window,
  157. sizeof(struct pci_window) * controller->windows);
  158. kfree(controller->window);
  159. }
  160. /* Setup a pci_window for each device resource. */
  161. for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
  162. if (pci_addrs[i] == -1)
  163. continue;
  164. new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
  165. new_window[idx].resource = dev->resource[i];
  166. idx++;
  167. }
  168. controller->windows = new_count;
  169. controller->window = new_window;
  170. }
  171. /*
  172. * sn_io_slot_fixup() - We are not running with an ACPI capable PROM,
  173. * and need to convert the pci_dev->resource
  174. * 'start' and 'end' addresses to mapped addresses,
  175. * and setup the pci_controller->window array entries.
  176. */
  177. void
  178. sn_io_slot_fixup(struct pci_dev *dev)
  179. {
  180. unsigned int count = 0;
  181. int idx;
  182. s64 pci_addrs[PCI_ROM_RESOURCE + 1];
  183. unsigned long addr, end, size, start;
  184. struct pcidev_info *pcidev_info;
  185. struct sn_irq_info *sn_irq_info;
  186. int status;
  187. pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
  188. if (!pcidev_info)
  189. panic("%s: Unable to alloc memory for pcidev_info", __func__);
  190. sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
  191. if (!sn_irq_info)
  192. panic("%s: Unable to alloc memory for sn_irq_info", __func__);
  193. /* Call to retrieve pci device information needed by kernel. */
  194. status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
  195. (u64) dev->bus->number,
  196. dev->devfn,
  197. (u64) __pa(pcidev_info),
  198. (u64) __pa(sn_irq_info));
  199. if (status)
  200. BUG(); /* Cannot get platform pci device information */
  201. /* Copy over PIO Mapped Addresses */
  202. for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
  203. if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
  204. pci_addrs[idx] = -1;
  205. continue;
  206. }
  207. start = dev->resource[idx].start;
  208. end = dev->resource[idx].end;
  209. size = end - start;
  210. if (size == 0) {
  211. pci_addrs[idx] = -1;
  212. continue;
  213. }
  214. pci_addrs[idx] = start;
  215. count++;
  216. addr = pcidev_info->pdi_pio_mapped_addr[idx];
  217. addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
  218. dev->resource[idx].start = addr;
  219. dev->resource[idx].end = addr + size;
  220. /*
  221. * if it's already in the device structure, remove it before
  222. * inserting
  223. */
  224. if (dev->resource[idx].parent && dev->resource[idx].parent->child)
  225. release_resource(&dev->resource[idx]);
  226. if (dev->resource[idx].flags & IORESOURCE_IO)
  227. insert_resource(&ioport_resource, &dev->resource[idx]);
  228. else
  229. insert_resource(&iomem_resource, &dev->resource[idx]);
  230. /*
  231. * If ROM, set the actual ROM image size, and mark as
  232. * shadowed in PROM.
  233. */
  234. if (idx == PCI_ROM_RESOURCE) {
  235. size_t image_size;
  236. void __iomem *rom;
  237. rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
  238. size + 1);
  239. image_size = pci_get_rom_size(dev, rom, size + 1);
  240. dev->resource[PCI_ROM_RESOURCE].end =
  241. dev->resource[PCI_ROM_RESOURCE].start +
  242. image_size - 1;
  243. dev->resource[PCI_ROM_RESOURCE].flags |=
  244. IORESOURCE_ROM_BIOS_COPY;
  245. }
  246. }
  247. /* Create a pci_window in the pci_controller struct for
  248. * each device resource.
  249. */
  250. if (count > 0)
  251. sn_pci_window_fixup(dev, count, pci_addrs);
  252. sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
  253. }
  254. EXPORT_SYMBOL(sn_io_slot_fixup);
  255. /*
  256. * sn_pci_controller_fixup() - This routine sets up a bus's resources
  257. * consistent with the Linux PCI abstraction layer.
  258. */
  259. static void __init
  260. sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
  261. {
  262. s64 status = 0;
  263. struct pci_controller *controller;
  264. struct pcibus_bussoft *prom_bussoft_ptr;
  265. status = sal_get_pcibus_info((u64) segment, (u64) busnum,
  266. (u64) ia64_tpa(&prom_bussoft_ptr));
  267. if (status > 0)
  268. return; /*bus # does not exist */
  269. prom_bussoft_ptr = __va(prom_bussoft_ptr);
  270. controller = kzalloc(sizeof(*controller), GFP_KERNEL);
  271. if (!controller)
  272. BUG();
  273. controller->segment = segment;
  274. /*
  275. * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
  276. * (platform_data will be overwritten later in sn_common_bus_fixup())
  277. */
  278. controller->platform_data = prom_bussoft_ptr;
  279. bus = pci_scan_bus(busnum, &pci_root_ops, controller);
  280. if (bus == NULL)
  281. goto error_return; /* error, or bus already scanned */
  282. bus->sysdata = controller;
  283. return;
  284. error_return:
  285. kfree(controller);
  286. return;
  287. }
  288. /*
  289. * sn_bus_fixup
  290. */
  291. void
  292. sn_bus_fixup(struct pci_bus *bus)
  293. {
  294. struct pci_dev *pci_dev = NULL;
  295. struct pcibus_bussoft *prom_bussoft_ptr;
  296. if (!bus->parent) { /* If root bus */
  297. prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
  298. if (prom_bussoft_ptr == NULL) {
  299. printk(KERN_ERR
  300. "sn_bus_fixup: 0x%04x:0x%02x Unable to "
  301. "obtain prom_bussoft_ptr\n",
  302. pci_domain_nr(bus), bus->number);
  303. return;
  304. }
  305. sn_common_bus_fixup(bus, prom_bussoft_ptr);
  306. sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
  307. prom_bussoft_ptr->bs_legacy_io,
  308. prom_bussoft_ptr->bs_legacy_mem);
  309. }
  310. list_for_each_entry(pci_dev, &bus->devices, bus_list) {
  311. sn_io_slot_fixup(pci_dev);
  312. }
  313. }
  314. /*
  315. * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
  316. * so we need to do things the hard way, including initiating the
  317. * bus scanning ourselves.
  318. */
  319. void __init sn_io_init(void)
  320. {
  321. int i, j;
  322. sn_fixup_ionodes();
  323. /* busses are not known yet ... */
  324. for (i = 0; i <= max_segment_number; i++)
  325. for (j = 0; j <= max_pcibus_number; j++)
  326. sn_pci_controller_fixup(i, j, NULL);
  327. }