sn9c102_ov7660.c 20 KB

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  1. /***************************************************************************
  2. * Plug-in for OV7660 image sensor connected to the SN9C1xx PC Camera *
  3. * Controllers *
  4. * *
  5. * Copyright (C) 2007 by Luca Risolia <luca.risolia@studio.unibo.it> *
  6. * *
  7. * This program is free software; you can redistribute it and/or modify *
  8. * it under the terms of the GNU General Public License as published by *
  9. * the Free Software Foundation; either version 2 of the License, or *
  10. * (at your option) any later version. *
  11. * *
  12. * This program is distributed in the hope that it will be useful, *
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  15. * GNU General Public License for more details. *
  16. * *
  17. * You should have received a copy of the GNU General Public License *
  18. * along with this program; if not, write to the Free Software *
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
  20. ***************************************************************************/
  21. #include "sn9c102_sensor.h"
  22. static int ov7660_init(struct sn9c102_device* cam)
  23. {
  24. int err = 0;
  25. err += sn9c102_write_reg(cam, 0x40, 0x02);
  26. err += sn9c102_write_reg(cam, 0x00, 0x03);
  27. err += sn9c102_write_reg(cam, 0x1a, 0x04);
  28. err += sn9c102_write_reg(cam, 0x03, 0x10);
  29. err += sn9c102_write_reg(cam, 0x08, 0x14);
  30. err += sn9c102_write_reg(cam, 0x20, 0x17);
  31. err += sn9c102_write_reg(cam, 0x8b, 0x18);
  32. err += sn9c102_write_reg(cam, 0x00, 0x19);
  33. err += sn9c102_write_reg(cam, 0x1d, 0x1a);
  34. err += sn9c102_write_reg(cam, 0x10, 0x1b);
  35. err += sn9c102_write_reg(cam, 0x02, 0x1c);
  36. err += sn9c102_write_reg(cam, 0x03, 0x1d);
  37. err += sn9c102_write_reg(cam, 0x0f, 0x1e);
  38. err += sn9c102_write_reg(cam, 0x0c, 0x1f);
  39. err += sn9c102_write_reg(cam, 0x00, 0x20);
  40. err += sn9c102_write_reg(cam, 0x29, 0x21);
  41. err += sn9c102_write_reg(cam, 0x40, 0x22);
  42. err += sn9c102_write_reg(cam, 0x54, 0x23);
  43. err += sn9c102_write_reg(cam, 0x66, 0x24);
  44. err += sn9c102_write_reg(cam, 0x76, 0x25);
  45. err += sn9c102_write_reg(cam, 0x85, 0x26);
  46. err += sn9c102_write_reg(cam, 0x94, 0x27);
  47. err += sn9c102_write_reg(cam, 0xa1, 0x28);
  48. err += sn9c102_write_reg(cam, 0xae, 0x29);
  49. err += sn9c102_write_reg(cam, 0xbb, 0x2a);
  50. err += sn9c102_write_reg(cam, 0xc7, 0x2b);
  51. err += sn9c102_write_reg(cam, 0xd3, 0x2c);
  52. err += sn9c102_write_reg(cam, 0xde, 0x2d);
  53. err += sn9c102_write_reg(cam, 0xea, 0x2e);
  54. err += sn9c102_write_reg(cam, 0xf4, 0x2f);
  55. err += sn9c102_write_reg(cam, 0xff, 0x30);
  56. err += sn9c102_write_reg(cam, 0x00, 0x3F);
  57. err += sn9c102_write_reg(cam, 0xC7, 0x40);
  58. err += sn9c102_write_reg(cam, 0x01, 0x41);
  59. err += sn9c102_write_reg(cam, 0x44, 0x42);
  60. err += sn9c102_write_reg(cam, 0x00, 0x43);
  61. err += sn9c102_write_reg(cam, 0x44, 0x44);
  62. err += sn9c102_write_reg(cam, 0x00, 0x45);
  63. err += sn9c102_write_reg(cam, 0x44, 0x46);
  64. err += sn9c102_write_reg(cam, 0x00, 0x47);
  65. err += sn9c102_write_reg(cam, 0xC7, 0x48);
  66. err += sn9c102_write_reg(cam, 0x01, 0x49);
  67. err += sn9c102_write_reg(cam, 0xC7, 0x4A);
  68. err += sn9c102_write_reg(cam, 0x01, 0x4B);
  69. err += sn9c102_write_reg(cam, 0xC7, 0x4C);
  70. err += sn9c102_write_reg(cam, 0x01, 0x4D);
  71. err += sn9c102_write_reg(cam, 0x44, 0x4E);
  72. err += sn9c102_write_reg(cam, 0x00, 0x4F);
  73. err += sn9c102_write_reg(cam, 0x44, 0x50);
  74. err += sn9c102_write_reg(cam, 0x00, 0x51);
  75. err += sn9c102_write_reg(cam, 0x44, 0x52);
  76. err += sn9c102_write_reg(cam, 0x00, 0x53);
  77. err += sn9c102_write_reg(cam, 0xC7, 0x54);
  78. err += sn9c102_write_reg(cam, 0x01, 0x55);
  79. err += sn9c102_write_reg(cam, 0xC7, 0x56);
  80. err += sn9c102_write_reg(cam, 0x01, 0x57);
  81. err += sn9c102_write_reg(cam, 0xC7, 0x58);
  82. err += sn9c102_write_reg(cam, 0x01, 0x59);
  83. err += sn9c102_write_reg(cam, 0x44, 0x5A);
  84. err += sn9c102_write_reg(cam, 0x00, 0x5B);
  85. err += sn9c102_write_reg(cam, 0x44, 0x5C);
  86. err += sn9c102_write_reg(cam, 0x00, 0x5D);
  87. err += sn9c102_write_reg(cam, 0x44, 0x5E);
  88. err += sn9c102_write_reg(cam, 0x00, 0x5F);
  89. err += sn9c102_write_reg(cam, 0xC7, 0x60);
  90. err += sn9c102_write_reg(cam, 0x01, 0x61);
  91. err += sn9c102_write_reg(cam, 0xC7, 0x62);
  92. err += sn9c102_write_reg(cam, 0x01, 0x63);
  93. err += sn9c102_write_reg(cam, 0xC7, 0x64);
  94. err += sn9c102_write_reg(cam, 0x01, 0x65);
  95. err += sn9c102_write_reg(cam, 0x44, 0x66);
  96. err += sn9c102_write_reg(cam, 0x00, 0x67);
  97. err += sn9c102_write_reg(cam, 0x44, 0x68);
  98. err += sn9c102_write_reg(cam, 0x00, 0x69);
  99. err += sn9c102_write_reg(cam, 0x44, 0x6A);
  100. err += sn9c102_write_reg(cam, 0x00, 0x6B);
  101. err += sn9c102_write_reg(cam, 0xC7, 0x6C);
  102. err += sn9c102_write_reg(cam, 0x01, 0x6D);
  103. err += sn9c102_write_reg(cam, 0xC7, 0x6E);
  104. err += sn9c102_write_reg(cam, 0x01, 0x6F);
  105. err += sn9c102_write_reg(cam, 0xC7, 0x70);
  106. err += sn9c102_write_reg(cam, 0x01, 0x71);
  107. err += sn9c102_write_reg(cam, 0x44, 0x72);
  108. err += sn9c102_write_reg(cam, 0x00, 0x73);
  109. err += sn9c102_write_reg(cam, 0x44, 0x74);
  110. err += sn9c102_write_reg(cam, 0x00, 0x75);
  111. err += sn9c102_write_reg(cam, 0x44, 0x76);
  112. err += sn9c102_write_reg(cam, 0x00, 0x77);
  113. err += sn9c102_write_reg(cam, 0xC7, 0x78);
  114. err += sn9c102_write_reg(cam, 0x01, 0x79);
  115. err += sn9c102_write_reg(cam, 0xC7, 0x7A);
  116. err += sn9c102_write_reg(cam, 0x01, 0x7B);
  117. err += sn9c102_write_reg(cam, 0xC7, 0x7C);
  118. err += sn9c102_write_reg(cam, 0x01, 0x7D);
  119. err += sn9c102_write_reg(cam, 0x44, 0x7E);
  120. err += sn9c102_write_reg(cam, 0x00, 0x7F);
  121. err += sn9c102_write_reg(cam, 0x14, 0x84);
  122. err += sn9c102_write_reg(cam, 0x00, 0x85);
  123. err += sn9c102_write_reg(cam, 0x27, 0x86);
  124. err += sn9c102_write_reg(cam, 0x00, 0x87);
  125. err += sn9c102_write_reg(cam, 0x07, 0x88);
  126. err += sn9c102_write_reg(cam, 0x00, 0x89);
  127. err += sn9c102_write_reg(cam, 0xEC, 0x8A);
  128. err += sn9c102_write_reg(cam, 0x0f, 0x8B);
  129. err += sn9c102_write_reg(cam, 0xD8, 0x8C);
  130. err += sn9c102_write_reg(cam, 0x0f, 0x8D);
  131. err += sn9c102_write_reg(cam, 0x3D, 0x8E);
  132. err += sn9c102_write_reg(cam, 0x00, 0x8F);
  133. err += sn9c102_write_reg(cam, 0x3D, 0x90);
  134. err += sn9c102_write_reg(cam, 0x00, 0x91);
  135. err += sn9c102_write_reg(cam, 0xCD, 0x92);
  136. err += sn9c102_write_reg(cam, 0x0f, 0x93);
  137. err += sn9c102_write_reg(cam, 0xf7, 0x94);
  138. err += sn9c102_write_reg(cam, 0x0f, 0x95);
  139. err += sn9c102_write_reg(cam, 0x0C, 0x96);
  140. err += sn9c102_write_reg(cam, 0x00, 0x97);
  141. err += sn9c102_write_reg(cam, 0x00, 0x98);
  142. err += sn9c102_write_reg(cam, 0x66, 0x99);
  143. err += sn9c102_write_reg(cam, 0x05, 0x9A);
  144. err += sn9c102_write_reg(cam, 0x00, 0x9B);
  145. err += sn9c102_write_reg(cam, 0x04, 0x9C);
  146. err += sn9c102_write_reg(cam, 0x00, 0x9D);
  147. err += sn9c102_write_reg(cam, 0x08, 0x9E);
  148. err += sn9c102_write_reg(cam, 0x00, 0x9F);
  149. err += sn9c102_write_reg(cam, 0x2D, 0xC0);
  150. err += sn9c102_write_reg(cam, 0x2D, 0xC1);
  151. err += sn9c102_write_reg(cam, 0x3A, 0xC2);
  152. err += sn9c102_write_reg(cam, 0x05, 0xC3);
  153. err += sn9c102_write_reg(cam, 0x04, 0xC4);
  154. err += sn9c102_write_reg(cam, 0x3F, 0xC5);
  155. err += sn9c102_write_reg(cam, 0x00, 0xC6);
  156. err += sn9c102_write_reg(cam, 0x00, 0xC7);
  157. err += sn9c102_write_reg(cam, 0x50, 0xC8);
  158. err += sn9c102_write_reg(cam, 0x3C, 0xC9);
  159. err += sn9c102_write_reg(cam, 0x28, 0xCA);
  160. err += sn9c102_write_reg(cam, 0xD8, 0xCB);
  161. err += sn9c102_write_reg(cam, 0x14, 0xCC);
  162. err += sn9c102_write_reg(cam, 0xEC, 0xCD);
  163. err += sn9c102_write_reg(cam, 0x32, 0xCE);
  164. err += sn9c102_write_reg(cam, 0xDD, 0xCF);
  165. err += sn9c102_write_reg(cam, 0x32, 0xD0);
  166. err += sn9c102_write_reg(cam, 0xDD, 0xD1);
  167. err += sn9c102_write_reg(cam, 0x6A, 0xD2);
  168. err += sn9c102_write_reg(cam, 0x50, 0xD3);
  169. err += sn9c102_write_reg(cam, 0x00, 0xD4);
  170. err += sn9c102_write_reg(cam, 0x00, 0xD5);
  171. err += sn9c102_write_reg(cam, 0x00, 0xD6);
  172. err += sn9c102_i2c_write(cam, 0x12, 0x80);
  173. err += sn9c102_i2c_write(cam, 0x11, 0x09);
  174. err += sn9c102_i2c_write(cam, 0x00, 0x0A);
  175. err += sn9c102_i2c_write(cam, 0x01, 0x78);
  176. err += sn9c102_i2c_write(cam, 0x02, 0x90);
  177. err += sn9c102_i2c_write(cam, 0x03, 0x00);
  178. err += sn9c102_i2c_write(cam, 0x04, 0x00);
  179. err += sn9c102_i2c_write(cam, 0x05, 0x08);
  180. err += sn9c102_i2c_write(cam, 0x06, 0x0B);
  181. err += sn9c102_i2c_write(cam, 0x07, 0x00);
  182. err += sn9c102_i2c_write(cam, 0x08, 0x1C);
  183. err += sn9c102_i2c_write(cam, 0x09, 0x01);
  184. err += sn9c102_i2c_write(cam, 0x0A, 0x76);
  185. err += sn9c102_i2c_write(cam, 0x0B, 0x60);
  186. err += sn9c102_i2c_write(cam, 0x0C, 0x00);
  187. err += sn9c102_i2c_write(cam, 0x0D, 0x08);
  188. err += sn9c102_i2c_write(cam, 0x0E, 0x04);
  189. err += sn9c102_i2c_write(cam, 0x0F, 0x6F);
  190. err += sn9c102_i2c_write(cam, 0x10, 0x20);
  191. err += sn9c102_i2c_write(cam, 0x11, 0x03);
  192. err += sn9c102_i2c_write(cam, 0x12, 0x05);
  193. err += sn9c102_i2c_write(cam, 0x13, 0xF8);
  194. err += sn9c102_i2c_write(cam, 0x14, 0x2C);
  195. err += sn9c102_i2c_write(cam, 0x15, 0x00);
  196. err += sn9c102_i2c_write(cam, 0x16, 0x02);
  197. err += sn9c102_i2c_write(cam, 0x17, 0x10);
  198. err += sn9c102_i2c_write(cam, 0x18, 0x60);
  199. err += sn9c102_i2c_write(cam, 0x19, 0x02);
  200. err += sn9c102_i2c_write(cam, 0x1A, 0x7B);
  201. err += sn9c102_i2c_write(cam, 0x1B, 0x02);
  202. err += sn9c102_i2c_write(cam, 0x1C, 0x7F);
  203. err += sn9c102_i2c_write(cam, 0x1D, 0xA2);
  204. err += sn9c102_i2c_write(cam, 0x1E, 0x01);
  205. err += sn9c102_i2c_write(cam, 0x1F, 0x0E);
  206. err += sn9c102_i2c_write(cam, 0x20, 0x05);
  207. err += sn9c102_i2c_write(cam, 0x21, 0x05);
  208. err += sn9c102_i2c_write(cam, 0x22, 0x05);
  209. err += sn9c102_i2c_write(cam, 0x23, 0x05);
  210. err += sn9c102_i2c_write(cam, 0x24, 0x68);
  211. err += sn9c102_i2c_write(cam, 0x25, 0x58);
  212. err += sn9c102_i2c_write(cam, 0x26, 0xD4);
  213. err += sn9c102_i2c_write(cam, 0x27, 0x80);
  214. err += sn9c102_i2c_write(cam, 0x28, 0x80);
  215. err += sn9c102_i2c_write(cam, 0x29, 0x30);
  216. err += sn9c102_i2c_write(cam, 0x2A, 0x00);
  217. err += sn9c102_i2c_write(cam, 0x2B, 0x00);
  218. err += sn9c102_i2c_write(cam, 0x2C, 0x80);
  219. err += sn9c102_i2c_write(cam, 0x2D, 0x00);
  220. err += sn9c102_i2c_write(cam, 0x2E, 0x00);
  221. err += sn9c102_i2c_write(cam, 0x2F, 0x0E);
  222. err += sn9c102_i2c_write(cam, 0x30, 0x08);
  223. err += sn9c102_i2c_write(cam, 0x31, 0x30);
  224. err += sn9c102_i2c_write(cam, 0x32, 0xB4);
  225. err += sn9c102_i2c_write(cam, 0x33, 0x00);
  226. err += sn9c102_i2c_write(cam, 0x34, 0x07);
  227. err += sn9c102_i2c_write(cam, 0x35, 0x84);
  228. err += sn9c102_i2c_write(cam, 0x36, 0x00);
  229. err += sn9c102_i2c_write(cam, 0x37, 0x0C);
  230. err += sn9c102_i2c_write(cam, 0x38, 0x02);
  231. err += sn9c102_i2c_write(cam, 0x39, 0x43);
  232. err += sn9c102_i2c_write(cam, 0x3A, 0x00);
  233. err += sn9c102_i2c_write(cam, 0x3B, 0x02);
  234. err += sn9c102_i2c_write(cam, 0x3C, 0x6C);
  235. err += sn9c102_i2c_write(cam, 0x3D, 0x99);
  236. err += sn9c102_i2c_write(cam, 0x3E, 0x0E);
  237. err += sn9c102_i2c_write(cam, 0x3F, 0x41);
  238. err += sn9c102_i2c_write(cam, 0x40, 0xC1);
  239. err += sn9c102_i2c_write(cam, 0x41, 0x22);
  240. err += sn9c102_i2c_write(cam, 0x42, 0x08);
  241. err += sn9c102_i2c_write(cam, 0x43, 0xF0);
  242. err += sn9c102_i2c_write(cam, 0x44, 0x10);
  243. err += sn9c102_i2c_write(cam, 0x45, 0x78);
  244. err += sn9c102_i2c_write(cam, 0x46, 0xA8);
  245. err += sn9c102_i2c_write(cam, 0x47, 0x60);
  246. err += sn9c102_i2c_write(cam, 0x48, 0x80);
  247. err += sn9c102_i2c_write(cam, 0x49, 0x00);
  248. err += sn9c102_i2c_write(cam, 0x4A, 0x00);
  249. err += sn9c102_i2c_write(cam, 0x4B, 0x00);
  250. err += sn9c102_i2c_write(cam, 0x4C, 0x00);
  251. err += sn9c102_i2c_write(cam, 0x4D, 0x00);
  252. err += sn9c102_i2c_write(cam, 0x4E, 0x00);
  253. err += sn9c102_i2c_write(cam, 0x4F, 0x46);
  254. err += sn9c102_i2c_write(cam, 0x50, 0x36);
  255. err += sn9c102_i2c_write(cam, 0x51, 0x0F);
  256. err += sn9c102_i2c_write(cam, 0x52, 0x17);
  257. err += sn9c102_i2c_write(cam, 0x53, 0x7F);
  258. err += sn9c102_i2c_write(cam, 0x54, 0x96);
  259. err += sn9c102_i2c_write(cam, 0x55, 0x40);
  260. err += sn9c102_i2c_write(cam, 0x56, 0x40);
  261. err += sn9c102_i2c_write(cam, 0x57, 0x40);
  262. err += sn9c102_i2c_write(cam, 0x58, 0x0F);
  263. err += sn9c102_i2c_write(cam, 0x59, 0xBA);
  264. err += sn9c102_i2c_write(cam, 0x5A, 0x9A);
  265. err += sn9c102_i2c_write(cam, 0x5B, 0x22);
  266. err += sn9c102_i2c_write(cam, 0x5C, 0xB9);
  267. err += sn9c102_i2c_write(cam, 0x5D, 0x9B);
  268. err += sn9c102_i2c_write(cam, 0x5E, 0x10);
  269. err += sn9c102_i2c_write(cam, 0x5F, 0xF0);
  270. err += sn9c102_i2c_write(cam, 0x60, 0x05);
  271. err += sn9c102_i2c_write(cam, 0x61, 0x60);
  272. err += sn9c102_i2c_write(cam, 0x62, 0x00);
  273. err += sn9c102_i2c_write(cam, 0x63, 0x00);
  274. err += sn9c102_i2c_write(cam, 0x64, 0x50);
  275. err += sn9c102_i2c_write(cam, 0x65, 0x30);
  276. err += sn9c102_i2c_write(cam, 0x66, 0x00);
  277. err += sn9c102_i2c_write(cam, 0x67, 0x80);
  278. err += sn9c102_i2c_write(cam, 0x68, 0x7A);
  279. err += sn9c102_i2c_write(cam, 0x69, 0x90);
  280. err += sn9c102_i2c_write(cam, 0x6A, 0x80);
  281. err += sn9c102_i2c_write(cam, 0x6B, 0x0A);
  282. err += sn9c102_i2c_write(cam, 0x6C, 0x30);
  283. err += sn9c102_i2c_write(cam, 0x6D, 0x48);
  284. err += sn9c102_i2c_write(cam, 0x6E, 0x80);
  285. err += sn9c102_i2c_write(cam, 0x6F, 0x74);
  286. err += sn9c102_i2c_write(cam, 0x70, 0x64);
  287. err += sn9c102_i2c_write(cam, 0x71, 0x60);
  288. err += sn9c102_i2c_write(cam, 0x72, 0x5C);
  289. err += sn9c102_i2c_write(cam, 0x73, 0x58);
  290. err += sn9c102_i2c_write(cam, 0x74, 0x54);
  291. err += sn9c102_i2c_write(cam, 0x75, 0x4C);
  292. err += sn9c102_i2c_write(cam, 0x76, 0x40);
  293. err += sn9c102_i2c_write(cam, 0x77, 0x38);
  294. err += sn9c102_i2c_write(cam, 0x78, 0x34);
  295. err += sn9c102_i2c_write(cam, 0x79, 0x30);
  296. err += sn9c102_i2c_write(cam, 0x7A, 0x2F);
  297. err += sn9c102_i2c_write(cam, 0x7B, 0x2B);
  298. err += sn9c102_i2c_write(cam, 0x7C, 0x03);
  299. err += sn9c102_i2c_write(cam, 0x7D, 0x07);
  300. err += sn9c102_i2c_write(cam, 0x7E, 0x17);
  301. err += sn9c102_i2c_write(cam, 0x7F, 0x34);
  302. err += sn9c102_i2c_write(cam, 0x80, 0x41);
  303. err += sn9c102_i2c_write(cam, 0x81, 0x4D);
  304. err += sn9c102_i2c_write(cam, 0x82, 0x58);
  305. err += sn9c102_i2c_write(cam, 0x83, 0x63);
  306. err += sn9c102_i2c_write(cam, 0x84, 0x6E);
  307. err += sn9c102_i2c_write(cam, 0x85, 0x77);
  308. err += sn9c102_i2c_write(cam, 0x86, 0x87);
  309. err += sn9c102_i2c_write(cam, 0x87, 0x95);
  310. err += sn9c102_i2c_write(cam, 0x88, 0xAF);
  311. err += sn9c102_i2c_write(cam, 0x89, 0xC7);
  312. err += sn9c102_i2c_write(cam, 0x8A, 0xDF);
  313. err += sn9c102_i2c_write(cam, 0x8B, 0x99);
  314. err += sn9c102_i2c_write(cam, 0x8C, 0x99);
  315. err += sn9c102_i2c_write(cam, 0x8D, 0xCF);
  316. err += sn9c102_i2c_write(cam, 0x8E, 0x20);
  317. err += sn9c102_i2c_write(cam, 0x8F, 0x26);
  318. err += sn9c102_i2c_write(cam, 0x90, 0x10);
  319. err += sn9c102_i2c_write(cam, 0x91, 0x0C);
  320. err += sn9c102_i2c_write(cam, 0x92, 0x25);
  321. err += sn9c102_i2c_write(cam, 0x93, 0x00);
  322. err += sn9c102_i2c_write(cam, 0x94, 0x50);
  323. err += sn9c102_i2c_write(cam, 0x95, 0x50);
  324. err += sn9c102_i2c_write(cam, 0x96, 0x00);
  325. err += sn9c102_i2c_write(cam, 0x97, 0x01);
  326. err += sn9c102_i2c_write(cam, 0x98, 0x10);
  327. err += sn9c102_i2c_write(cam, 0x99, 0x40);
  328. err += sn9c102_i2c_write(cam, 0x9A, 0x40);
  329. err += sn9c102_i2c_write(cam, 0x9B, 0x20);
  330. err += sn9c102_i2c_write(cam, 0x9C, 0x00);
  331. err += sn9c102_i2c_write(cam, 0x9D, 0x99);
  332. err += sn9c102_i2c_write(cam, 0x9E, 0x7F);
  333. err += sn9c102_i2c_write(cam, 0x9F, 0x00);
  334. err += sn9c102_i2c_write(cam, 0xA0, 0x00);
  335. err += sn9c102_i2c_write(cam, 0xA1, 0x00);
  336. return err;
  337. }
  338. static int ov7660_get_ctrl(struct sn9c102_device* cam,
  339. struct v4l2_control* ctrl)
  340. {
  341. int err = 0;
  342. switch (ctrl->id) {
  343. case V4L2_CID_EXPOSURE:
  344. if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
  345. return -EIO;
  346. break;
  347. case V4L2_CID_DO_WHITE_BALANCE:
  348. ctrl->value = sn9c102_pread_reg(cam, 0x02);
  349. ctrl->value = (ctrl->value & 0x04) ? 1 : 0;
  350. break;
  351. case V4L2_CID_RED_BALANCE:
  352. ctrl->value = sn9c102_pread_reg(cam, 0x05);
  353. ctrl->value &= 0x7f;
  354. break;
  355. case V4L2_CID_BLUE_BALANCE:
  356. ctrl->value = sn9c102_pread_reg(cam, 0x06);
  357. ctrl->value &= 0x7f;
  358. break;
  359. case SN9C102_V4L2_CID_GREEN_BALANCE:
  360. ctrl->value = sn9c102_pread_reg(cam, 0x07);
  361. ctrl->value &= 0x7f;
  362. break;
  363. case V4L2_CID_GAIN:
  364. if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
  365. return -EIO;
  366. ctrl->value &= 0x7f;
  367. break;
  368. case V4L2_CID_AUTOGAIN:
  369. if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
  370. return -EIO;
  371. ctrl->value &= 0x01;
  372. break;
  373. default:
  374. return -EINVAL;
  375. }
  376. return err ? -EIO : 0;
  377. }
  378. static int ov7660_set_ctrl(struct sn9c102_device* cam,
  379. const struct v4l2_control* ctrl)
  380. {
  381. int err = 0;
  382. switch (ctrl->id) {
  383. case V4L2_CID_EXPOSURE:
  384. err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
  385. break;
  386. case V4L2_CID_DO_WHITE_BALANCE:
  387. err += sn9c102_write_reg(cam, 0x43 | (ctrl->value << 2), 0x02);
  388. break;
  389. case V4L2_CID_RED_BALANCE:
  390. err += sn9c102_write_reg(cam, ctrl->value, 0x05);
  391. break;
  392. case V4L2_CID_BLUE_BALANCE:
  393. err += sn9c102_write_reg(cam, ctrl->value, 0x06);
  394. break;
  395. case SN9C102_V4L2_CID_GREEN_BALANCE:
  396. err += sn9c102_write_reg(cam, ctrl->value, 0x07);
  397. break;
  398. case V4L2_CID_GAIN:
  399. err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
  400. break;
  401. case V4L2_CID_AUTOGAIN:
  402. err += sn9c102_i2c_write(cam, 0x13, 0xf0 | ctrl->value |
  403. (ctrl->value << 1));
  404. break;
  405. default:
  406. return -EINVAL;
  407. }
  408. return err ? -EIO : 0;
  409. }
  410. static int ov7660_set_crop(struct sn9c102_device* cam,
  411. const struct v4l2_rect* rect)
  412. {
  413. struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
  414. int err = 0;
  415. u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1,
  416. v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
  417. err += sn9c102_write_reg(cam, h_start, 0x12);
  418. err += sn9c102_write_reg(cam, v_start, 0x13);
  419. return err;
  420. }
  421. static int ov7660_set_pix_format(struct sn9c102_device* cam,
  422. const struct v4l2_pix_format* pix)
  423. {
  424. int r0, err = 0;
  425. r0 = sn9c102_pread_reg(cam, 0x01);
  426. if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
  427. err += sn9c102_write_reg(cam, r0 | 0x40, 0x01);
  428. err += sn9c102_write_reg(cam, 0xa2, 0x17);
  429. err += sn9c102_i2c_write(cam, 0x11, 0x00);
  430. } else {
  431. err += sn9c102_write_reg(cam, r0 | 0x40, 0x01);
  432. err += sn9c102_write_reg(cam, 0xa2, 0x17);
  433. err += sn9c102_i2c_write(cam, 0x11, 0x0d);
  434. }
  435. return err;
  436. }
  437. static struct sn9c102_sensor ov7660 = {
  438. .name = "OV7660",
  439. .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
  440. .supported_bridge = BRIDGE_SN9C105 | BRIDGE_SN9C120,
  441. .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
  442. .frequency = SN9C102_I2C_100KHZ,
  443. .interface = SN9C102_I2C_2WIRES,
  444. .i2c_slave_id = 0x21,
  445. .init = &ov7660_init,
  446. .qctrl = {
  447. {
  448. .id = V4L2_CID_GAIN,
  449. .type = V4L2_CTRL_TYPE_INTEGER,
  450. .name = "global gain",
  451. .minimum = 0x00,
  452. .maximum = 0x7f,
  453. .step = 0x01,
  454. .default_value = 0x0a,
  455. .flags = 0,
  456. },
  457. {
  458. .id = V4L2_CID_EXPOSURE,
  459. .type = V4L2_CTRL_TYPE_INTEGER,
  460. .name = "exposure",
  461. .minimum = 0x00,
  462. .maximum = 0xff,
  463. .step = 0x01,
  464. .default_value = 0x50,
  465. .flags = 0,
  466. },
  467. {
  468. .id = V4L2_CID_DO_WHITE_BALANCE,
  469. .type = V4L2_CTRL_TYPE_BOOLEAN,
  470. .name = "night mode",
  471. .minimum = 0x00,
  472. .maximum = 0x01,
  473. .step = 0x01,
  474. .default_value = 0x00,
  475. .flags = 0,
  476. },
  477. {
  478. .id = V4L2_CID_RED_BALANCE,
  479. .type = V4L2_CTRL_TYPE_INTEGER,
  480. .name = "red balance",
  481. .minimum = 0x00,
  482. .maximum = 0x7f,
  483. .step = 0x01,
  484. .default_value = 0x1f,
  485. .flags = 0,
  486. },
  487. {
  488. .id = V4L2_CID_BLUE_BALANCE,
  489. .type = V4L2_CTRL_TYPE_INTEGER,
  490. .name = "blue balance",
  491. .minimum = 0x00,
  492. .maximum = 0x7f,
  493. .step = 0x01,
  494. .default_value = 0x1e,
  495. .flags = 0,
  496. },
  497. {
  498. .id = V4L2_CID_AUTOGAIN,
  499. .type = V4L2_CTRL_TYPE_BOOLEAN,
  500. .name = "auto adjust",
  501. .minimum = 0x00,
  502. .maximum = 0x01,
  503. .step = 0x01,
  504. .default_value = 0x00,
  505. .flags = 0,
  506. },
  507. {
  508. .id = SN9C102_V4L2_CID_GREEN_BALANCE,
  509. .type = V4L2_CTRL_TYPE_INTEGER,
  510. .name = "green balance",
  511. .minimum = 0x00,
  512. .maximum = 0x7f,
  513. .step = 0x01,
  514. .default_value = 0x20,
  515. .flags = 0,
  516. },
  517. },
  518. .get_ctrl = &ov7660_get_ctrl,
  519. .set_ctrl = &ov7660_set_ctrl,
  520. .cropcap = {
  521. .bounds = {
  522. .left = 0,
  523. .top = 0,
  524. .width = 640,
  525. .height = 480,
  526. },
  527. .defrect = {
  528. .left = 0,
  529. .top = 0,
  530. .width = 640,
  531. .height = 480,
  532. },
  533. },
  534. .set_crop = &ov7660_set_crop,
  535. .pix_format = {
  536. .width = 640,
  537. .height = 480,
  538. .pixelformat = V4L2_PIX_FMT_JPEG,
  539. .priv = 8,
  540. },
  541. .set_pix_format = &ov7660_set_pix_format
  542. };
  543. int sn9c102_probe_ov7660(struct sn9c102_device* cam)
  544. {
  545. int pid, ver, err = 0;
  546. err += sn9c102_write_reg(cam, 0x01, 0xf1);
  547. err += sn9c102_write_reg(cam, 0x00, 0xf1);
  548. err += sn9c102_write_reg(cam, 0x01, 0x01);
  549. err += sn9c102_write_reg(cam, 0x00, 0x01);
  550. err += sn9c102_write_reg(cam, 0x28, 0x17);
  551. pid = sn9c102_i2c_try_read(cam, &ov7660, 0x0a);
  552. ver = sn9c102_i2c_try_read(cam, &ov7660, 0x0b);
  553. if (err || pid < 0 || ver < 0)
  554. return -EIO;
  555. if (pid != 0x76 || ver != 0x60)
  556. return -ENODEV;
  557. sn9c102_attach_sensor(cam, &ov7660);
  558. return 0;
  559. }