sn9c102_ov7630.c 13 KB

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  1. /***************************************************************************
  2. * Plug-in for OV7630 image sensor connected to the SN9C1xx PC Camera *
  3. * Controllers *
  4. * *
  5. * Copyright (C) 2006-2007 by Luca Risolia <luca.risolia@studio.unibo.it> *
  6. * *
  7. * This program is free software; you can redistribute it and/or modify *
  8. * it under the terms of the GNU General Public License as published by *
  9. * the Free Software Foundation; either version 2 of the License, or *
  10. * (at your option) any later version. *
  11. * *
  12. * This program is distributed in the hope that it will be useful, *
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  15. * GNU General Public License for more details. *
  16. * *
  17. * You should have received a copy of the GNU General Public License *
  18. * along with this program; if not, write to the Free Software *
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
  20. ***************************************************************************/
  21. #include "sn9c102_sensor.h"
  22. static int ov7630_init(struct sn9c102_device* cam)
  23. {
  24. int err = 0;
  25. switch (sn9c102_get_bridge(cam)) {
  26. case BRIDGE_SN9C101:
  27. case BRIDGE_SN9C102:
  28. err += sn9c102_write_reg(cam, 0x00, 0x14);
  29. err += sn9c102_write_reg(cam, 0x60, 0x17);
  30. err += sn9c102_write_reg(cam, 0x0f, 0x18);
  31. err += sn9c102_write_reg(cam, 0x50, 0x19);
  32. err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  33. err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  34. err += sn9c102_i2c_write(cam, 0x11, 0x00);
  35. err += sn9c102_i2c_write(cam, 0x15, 0x35);
  36. err += sn9c102_i2c_write(cam, 0x16, 0x03);
  37. err += sn9c102_i2c_write(cam, 0x17, 0x1c);
  38. err += sn9c102_i2c_write(cam, 0x18, 0xbd);
  39. err += sn9c102_i2c_write(cam, 0x19, 0x06);
  40. err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
  41. err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  42. err += sn9c102_i2c_write(cam, 0x20, 0x44);
  43. err += sn9c102_i2c_write(cam, 0x23, 0xee);
  44. err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  45. err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  46. err += sn9c102_i2c_write(cam, 0x28, 0x20);
  47. err += sn9c102_i2c_write(cam, 0x29, 0x30);
  48. err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  49. err += sn9c102_i2c_write(cam, 0x30, 0x24);
  50. err += sn9c102_i2c_write(cam, 0x32, 0x86);
  51. err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  52. err += sn9c102_i2c_write(cam, 0x61, 0x42);
  53. err += sn9c102_i2c_write(cam, 0x65, 0x00);
  54. err += sn9c102_i2c_write(cam, 0x69, 0x38);
  55. err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  56. err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  57. err += sn9c102_i2c_write(cam, 0x71, 0x00);
  58. err += sn9c102_i2c_write(cam, 0x74, 0x21);
  59. err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  60. break;
  61. case BRIDGE_SN9C103:
  62. err += sn9c102_write_reg(cam, 0x00, 0x02);
  63. err += sn9c102_write_reg(cam, 0x00, 0x03);
  64. err += sn9c102_write_reg(cam, 0x1a, 0x04);
  65. err += sn9c102_write_reg(cam, 0x20, 0x05);
  66. err += sn9c102_write_reg(cam, 0x20, 0x06);
  67. err += sn9c102_write_reg(cam, 0x20, 0x07);
  68. err += sn9c102_write_reg(cam, 0x03, 0x10);
  69. err += sn9c102_write_reg(cam, 0x0a, 0x14);
  70. err += sn9c102_write_reg(cam, 0x60, 0x17);
  71. err += sn9c102_write_reg(cam, 0x0f, 0x18);
  72. err += sn9c102_write_reg(cam, 0x50, 0x19);
  73. err += sn9c102_write_reg(cam, 0x1d, 0x1a);
  74. err += sn9c102_write_reg(cam, 0x10, 0x1b);
  75. err += sn9c102_write_reg(cam, 0x02, 0x1c);
  76. err += sn9c102_write_reg(cam, 0x03, 0x1d);
  77. err += sn9c102_write_reg(cam, 0x0f, 0x1e);
  78. err += sn9c102_write_reg(cam, 0x0c, 0x1f);
  79. err += sn9c102_write_reg(cam, 0x00, 0x20);
  80. err += sn9c102_write_reg(cam, 0x10, 0x21);
  81. err += sn9c102_write_reg(cam, 0x20, 0x22);
  82. err += sn9c102_write_reg(cam, 0x30, 0x23);
  83. err += sn9c102_write_reg(cam, 0x40, 0x24);
  84. err += sn9c102_write_reg(cam, 0x50, 0x25);
  85. err += sn9c102_write_reg(cam, 0x60, 0x26);
  86. err += sn9c102_write_reg(cam, 0x70, 0x27);
  87. err += sn9c102_write_reg(cam, 0x80, 0x28);
  88. err += sn9c102_write_reg(cam, 0x90, 0x29);
  89. err += sn9c102_write_reg(cam, 0xa0, 0x2a);
  90. err += sn9c102_write_reg(cam, 0xb0, 0x2b);
  91. err += sn9c102_write_reg(cam, 0xc0, 0x2c);
  92. err += sn9c102_write_reg(cam, 0xd0, 0x2d);
  93. err += sn9c102_write_reg(cam, 0xe0, 0x2e);
  94. err += sn9c102_write_reg(cam, 0xf0, 0x2f);
  95. err += sn9c102_write_reg(cam, 0xff, 0x30);
  96. err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  97. err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  98. err += sn9c102_i2c_write(cam, 0x15, 0x34);
  99. err += sn9c102_i2c_write(cam, 0x11, 0x01);
  100. err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  101. err += sn9c102_i2c_write(cam, 0x20, 0x44);
  102. err += sn9c102_i2c_write(cam, 0x23, 0xee);
  103. err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  104. err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  105. err += sn9c102_i2c_write(cam, 0x28, 0x20);
  106. err += sn9c102_i2c_write(cam, 0x29, 0x30);
  107. err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  108. err += sn9c102_i2c_write(cam, 0x30, 0x24);
  109. err += sn9c102_i2c_write(cam, 0x32, 0x86);
  110. err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  111. err += sn9c102_i2c_write(cam, 0x61, 0x42);
  112. err += sn9c102_i2c_write(cam, 0x65, 0x00);
  113. err += sn9c102_i2c_write(cam, 0x69, 0x38);
  114. err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  115. err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  116. err += sn9c102_i2c_write(cam, 0x71, 0x00);
  117. err += sn9c102_i2c_write(cam, 0x74, 0x21);
  118. err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  119. break;
  120. default:
  121. break;
  122. }
  123. return err;
  124. }
  125. static int ov7630_get_ctrl(struct sn9c102_device* cam,
  126. struct v4l2_control* ctrl)
  127. {
  128. int err = 0;
  129. switch (ctrl->id) {
  130. case V4L2_CID_EXPOSURE:
  131. if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
  132. return -EIO;
  133. break;
  134. case V4L2_CID_RED_BALANCE:
  135. ctrl->value = sn9c102_pread_reg(cam, 0x07);
  136. break;
  137. case V4L2_CID_BLUE_BALANCE:
  138. ctrl->value = sn9c102_pread_reg(cam, 0x06);
  139. break;
  140. case SN9C102_V4L2_CID_GREEN_BALANCE:
  141. ctrl->value = sn9c102_pread_reg(cam, 0x05);
  142. break;
  143. case V4L2_CID_GAIN:
  144. if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
  145. return -EIO;
  146. ctrl->value &= 0x3f;
  147. break;
  148. case V4L2_CID_DO_WHITE_BALANCE:
  149. if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
  150. return -EIO;
  151. ctrl->value &= 0x3f;
  152. break;
  153. case V4L2_CID_WHITENESS:
  154. if ((ctrl->value = sn9c102_i2c_read(cam, 0x0d)) < 0)
  155. return -EIO;
  156. ctrl->value &= 0x3f;
  157. break;
  158. case V4L2_CID_AUTOGAIN:
  159. if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
  160. return -EIO;
  161. ctrl->value &= 0x01;
  162. break;
  163. case V4L2_CID_VFLIP:
  164. if ((ctrl->value = sn9c102_i2c_read(cam, 0x75)) < 0)
  165. return -EIO;
  166. ctrl->value = (ctrl->value & 0x80) ? 1 : 0;
  167. break;
  168. case SN9C102_V4L2_CID_GAMMA:
  169. if ((ctrl->value = sn9c102_i2c_read(cam, 0x14)) < 0)
  170. return -EIO;
  171. ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
  172. break;
  173. case SN9C102_V4L2_CID_BAND_FILTER:
  174. if ((ctrl->value = sn9c102_i2c_read(cam, 0x2d)) < 0)
  175. return -EIO;
  176. ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
  177. break;
  178. default:
  179. return -EINVAL;
  180. }
  181. return err ? -EIO : 0;
  182. }
  183. static int ov7630_set_ctrl(struct sn9c102_device* cam,
  184. const struct v4l2_control* ctrl)
  185. {
  186. int err = 0;
  187. switch (ctrl->id) {
  188. case V4L2_CID_EXPOSURE:
  189. err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
  190. break;
  191. case V4L2_CID_RED_BALANCE:
  192. err += sn9c102_write_reg(cam, ctrl->value, 0x07);
  193. break;
  194. case V4L2_CID_BLUE_BALANCE:
  195. err += sn9c102_write_reg(cam, ctrl->value, 0x06);
  196. break;
  197. case SN9C102_V4L2_CID_GREEN_BALANCE:
  198. err += sn9c102_write_reg(cam, ctrl->value, 0x05);
  199. break;
  200. case V4L2_CID_GAIN:
  201. err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
  202. break;
  203. case V4L2_CID_DO_WHITE_BALANCE:
  204. err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
  205. break;
  206. case V4L2_CID_WHITENESS:
  207. err += sn9c102_i2c_write(cam, 0x0d, ctrl->value);
  208. break;
  209. case V4L2_CID_AUTOGAIN:
  210. err += sn9c102_i2c_write(cam, 0x13, ctrl->value |
  211. (ctrl->value << 1));
  212. break;
  213. case V4L2_CID_VFLIP:
  214. err += sn9c102_i2c_write(cam, 0x75, 0x0e | (ctrl->value << 7));
  215. break;
  216. case SN9C102_V4L2_CID_GAMMA:
  217. err += sn9c102_i2c_write(cam, 0x14, ctrl->value << 2);
  218. break;
  219. case SN9C102_V4L2_CID_BAND_FILTER:
  220. err += sn9c102_i2c_write(cam, 0x2d, ctrl->value << 2);
  221. break;
  222. default:
  223. return -EINVAL;
  224. }
  225. return err ? -EIO : 0;
  226. }
  227. static int ov7630_set_crop(struct sn9c102_device* cam,
  228. const struct v4l2_rect* rect)
  229. {
  230. struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
  231. int err = 0;
  232. u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1,
  233. v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
  234. err += sn9c102_write_reg(cam, h_start, 0x12);
  235. err += sn9c102_write_reg(cam, v_start, 0x13);
  236. return err;
  237. }
  238. static int ov7630_set_pix_format(struct sn9c102_device* cam,
  239. const struct v4l2_pix_format* pix)
  240. {
  241. int err = 0;
  242. if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X)
  243. err += sn9c102_write_reg(cam, 0x20, 0x19);
  244. else
  245. err += sn9c102_write_reg(cam, 0x50, 0x19);
  246. return err;
  247. }
  248. static struct sn9c102_sensor ov7630 = {
  249. .name = "OV7630",
  250. .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
  251. .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103,
  252. .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
  253. .frequency = SN9C102_I2C_100KHZ,
  254. .interface = SN9C102_I2C_2WIRES,
  255. .i2c_slave_id = 0x21,
  256. .init = &ov7630_init,
  257. .qctrl = {
  258. {
  259. .id = V4L2_CID_GAIN,
  260. .type = V4L2_CTRL_TYPE_INTEGER,
  261. .name = "global gain",
  262. .minimum = 0x00,
  263. .maximum = 0x3f,
  264. .step = 0x01,
  265. .default_value = 0x14,
  266. .flags = 0,
  267. },
  268. {
  269. .id = V4L2_CID_EXPOSURE,
  270. .type = V4L2_CTRL_TYPE_INTEGER,
  271. .name = "exposure",
  272. .minimum = 0x00,
  273. .maximum = 0xff,
  274. .step = 0x01,
  275. .default_value = 0x60,
  276. .flags = 0,
  277. },
  278. {
  279. .id = V4L2_CID_WHITENESS,
  280. .type = V4L2_CTRL_TYPE_INTEGER,
  281. .name = "white balance background: red",
  282. .minimum = 0x00,
  283. .maximum = 0x3f,
  284. .step = 0x01,
  285. .default_value = 0x20,
  286. .flags = 0,
  287. },
  288. {
  289. .id = V4L2_CID_DO_WHITE_BALANCE,
  290. .type = V4L2_CTRL_TYPE_INTEGER,
  291. .name = "white balance background: blue",
  292. .minimum = 0x00,
  293. .maximum = 0x3f,
  294. .step = 0x01,
  295. .default_value = 0x20,
  296. .flags = 0,
  297. },
  298. {
  299. .id = V4L2_CID_RED_BALANCE,
  300. .type = V4L2_CTRL_TYPE_INTEGER,
  301. .name = "red balance",
  302. .minimum = 0x00,
  303. .maximum = 0x7f,
  304. .step = 0x01,
  305. .default_value = 0x20,
  306. .flags = 0,
  307. },
  308. {
  309. .id = V4L2_CID_BLUE_BALANCE,
  310. .type = V4L2_CTRL_TYPE_INTEGER,
  311. .name = "blue balance",
  312. .minimum = 0x00,
  313. .maximum = 0x7f,
  314. .step = 0x01,
  315. .default_value = 0x20,
  316. .flags = 0,
  317. },
  318. {
  319. .id = V4L2_CID_AUTOGAIN,
  320. .type = V4L2_CTRL_TYPE_BOOLEAN,
  321. .name = "auto adjust",
  322. .minimum = 0x00,
  323. .maximum = 0x01,
  324. .step = 0x01,
  325. .default_value = 0x00,
  326. .flags = 0,
  327. },
  328. {
  329. .id = V4L2_CID_VFLIP,
  330. .type = V4L2_CTRL_TYPE_BOOLEAN,
  331. .name = "vertical flip",
  332. .minimum = 0x00,
  333. .maximum = 0x01,
  334. .step = 0x01,
  335. .default_value = 0x01,
  336. .flags = 0,
  337. },
  338. {
  339. .id = SN9C102_V4L2_CID_GREEN_BALANCE,
  340. .type = V4L2_CTRL_TYPE_INTEGER,
  341. .name = "green balance",
  342. .minimum = 0x00,
  343. .maximum = 0x7f,
  344. .step = 0x01,
  345. .default_value = 0x20,
  346. .flags = 0,
  347. },
  348. {
  349. .id = SN9C102_V4L2_CID_BAND_FILTER,
  350. .type = V4L2_CTRL_TYPE_BOOLEAN,
  351. .name = "band filter",
  352. .minimum = 0x00,
  353. .maximum = 0x01,
  354. .step = 0x01,
  355. .default_value = 0x00,
  356. .flags = 0,
  357. },
  358. {
  359. .id = SN9C102_V4L2_CID_GAMMA,
  360. .type = V4L2_CTRL_TYPE_BOOLEAN,
  361. .name = "rgb gamma",
  362. .minimum = 0x00,
  363. .maximum = 0x01,
  364. .step = 0x01,
  365. .default_value = 0x00,
  366. .flags = 0,
  367. },
  368. },
  369. .get_ctrl = &ov7630_get_ctrl,
  370. .set_ctrl = &ov7630_set_ctrl,
  371. .cropcap = {
  372. .bounds = {
  373. .left = 0,
  374. .top = 0,
  375. .width = 640,
  376. .height = 480,
  377. },
  378. .defrect = {
  379. .left = 0,
  380. .top = 0,
  381. .width = 640,
  382. .height = 480,
  383. },
  384. },
  385. .set_crop = &ov7630_set_crop,
  386. .pix_format = {
  387. .width = 640,
  388. .height = 480,
  389. .pixelformat = V4L2_PIX_FMT_SN9C10X,
  390. .priv = 8,
  391. },
  392. .set_pix_format = &ov7630_set_pix_format
  393. };
  394. int sn9c102_probe_ov7630(struct sn9c102_device* cam)
  395. {
  396. int pid, ver, err = 0;
  397. switch (sn9c102_get_bridge(cam)) {
  398. case BRIDGE_SN9C101:
  399. case BRIDGE_SN9C102:
  400. err += sn9c102_write_reg(cam, 0x01, 0x01);
  401. err += sn9c102_write_reg(cam, 0x00, 0x01);
  402. err += sn9c102_write_reg(cam, 0x28, 0x17);
  403. break;
  404. case BRIDGE_SN9C103: /* do _not_ change anything! */
  405. err += sn9c102_write_reg(cam, 0x09, 0x01);
  406. err += sn9c102_write_reg(cam, 0x42, 0x01);
  407. err += sn9c102_write_reg(cam, 0x28, 0x17);
  408. err += sn9c102_write_reg(cam, 0x44, 0x02);
  409. pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
  410. if (err || pid < 0) { /* try a different initialization */
  411. err = sn9c102_write_reg(cam, 0x01, 0x01);
  412. err += sn9c102_write_reg(cam, 0x00, 0x01);
  413. }
  414. break;
  415. default:
  416. break;
  417. }
  418. pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
  419. ver = sn9c102_i2c_try_read(cam, &ov7630, 0x0b);
  420. if (err || pid < 0 || ver < 0)
  421. return -EIO;
  422. if (pid != 0x76 || ver != 0x31)
  423. return -ENODEV;
  424. sn9c102_attach_sensor(cam, &ov7630);
  425. return 0;
  426. }