cx18-av-core.c 29 KB

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  1. /*
  2. * cx18 ADEC audio functions
  3. *
  4. * Derived from cx25840-core.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21. * 02110-1301, USA.
  22. */
  23. #include "cx18-driver.h"
  24. #include "cx18-io.h"
  25. int cx18_av_write(struct cx18 *cx, u16 addr, u8 value)
  26. {
  27. u32 reg = 0xc40000 + (addr & ~3);
  28. u32 mask = 0xff;
  29. int shift = (addr & 3) * 8;
  30. u32 x = cx18_read_reg(cx, reg);
  31. x = (x & ~(mask << shift)) | ((u32)value << shift);
  32. cx18_write_reg(cx, x, reg);
  33. return 0;
  34. }
  35. int cx18_av_write_expect(struct cx18 *cx, u16 addr, u8 value, u8 eval, u8 mask)
  36. {
  37. u32 reg = 0xc40000 + (addr & ~3);
  38. int shift = (addr & 3) * 8;
  39. u32 x = cx18_read_reg(cx, reg);
  40. x = (x & ~((u32)0xff << shift)) | ((u32)value << shift);
  41. cx18_write_reg_expect(cx, x, reg,
  42. ((u32)eval << shift), ((u32)mask << shift));
  43. return 0;
  44. }
  45. int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value)
  46. {
  47. cx18_write_reg(cx, value, 0xc40000 + addr);
  48. return 0;
  49. }
  50. int
  51. cx18_av_write4_expect(struct cx18 *cx, u16 addr, u32 value, u32 eval, u32 mask)
  52. {
  53. cx18_write_reg_expect(cx, value, 0xc40000 + addr, eval, mask);
  54. return 0;
  55. }
  56. int cx18_av_write4_noretry(struct cx18 *cx, u16 addr, u32 value)
  57. {
  58. cx18_write_reg_noretry(cx, value, 0xc40000 + addr);
  59. return 0;
  60. }
  61. u8 cx18_av_read(struct cx18 *cx, u16 addr)
  62. {
  63. u32 x = cx18_read_reg(cx, 0xc40000 + (addr & ~3));
  64. int shift = (addr & 3) * 8;
  65. return (x >> shift) & 0xff;
  66. }
  67. u32 cx18_av_read4(struct cx18 *cx, u16 addr)
  68. {
  69. return cx18_read_reg(cx, 0xc40000 + addr);
  70. }
  71. u32 cx18_av_read4_noretry(struct cx18 *cx, u16 addr)
  72. {
  73. return cx18_read_reg_noretry(cx, 0xc40000 + addr);
  74. }
  75. int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,
  76. u8 or_value)
  77. {
  78. return cx18_av_write(cx, addr,
  79. (cx18_av_read(cx, addr) & and_mask) |
  80. or_value);
  81. }
  82. int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,
  83. u32 or_value)
  84. {
  85. return cx18_av_write4(cx, addr,
  86. (cx18_av_read4(cx, addr) & and_mask) |
  87. or_value);
  88. }
  89. /* ----------------------------------------------------------------------- */
  90. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  91. enum cx18_av_audio_input aud_input);
  92. static void log_audio_status(struct cx18 *cx);
  93. static void log_video_status(struct cx18 *cx);
  94. /* ----------------------------------------------------------------------- */
  95. static void cx18_av_initialize(struct cx18 *cx)
  96. {
  97. struct cx18_av_state *state = &cx->av_state;
  98. u32 v;
  99. cx18_av_loadfw(cx);
  100. /* Stop 8051 code execution */
  101. cx18_av_write4_expect(cx, CXADEC_DL_CTL, 0x03000000,
  102. 0x03000000, 0x13000000);
  103. /* initallize the PLL by toggling sleep bit */
  104. v = cx18_av_read4(cx, CXADEC_HOST_REG1);
  105. /* enable sleep mode - register appears to be read only... */
  106. cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v | 1, v, 0xfffe);
  107. /* disable sleep mode */
  108. cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v & 0xfffe,
  109. v & 0xfffe, 0xffff);
  110. /* initialize DLLs */
  111. v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF;
  112. /* disable FLD */
  113. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v);
  114. /* enable FLD */
  115. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100);
  116. v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF;
  117. /* disable FLD */
  118. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v);
  119. /* enable FLD */
  120. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100);
  121. /* set analog bias currents. Set Vreg to 1.20V. */
  122. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802);
  123. v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1;
  124. /* enable TUNE_FIL_RST */
  125. cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3, v, v, 0x03009F0F);
  126. /* disable TUNE_FIL_RST */
  127. cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3,
  128. v & 0xFFFFFFFE, v & 0xFFFFFFFE, 0x03009F0F);
  129. /* enable 656 output */
  130. cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00);
  131. /* video output drive strength */
  132. cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2);
  133. /* reset video */
  134. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000);
  135. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0);
  136. /* set video to auto-detect */
  137. /* Clear bits 11-12 to enable slow locking mode. Set autodetect mode */
  138. /* set the comb notch = 1 */
  139. cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800);
  140. /* Enable wtw_en in CRUSH_CTRL (Set bit 22) */
  141. /* Enable maj_sel in CRUSH_CTRL (Set bit 20) */
  142. cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000);
  143. /* Set VGA_TRACK_RANGE to 0x20 */
  144. cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000);
  145. /* Enable VBI capture */
  146. cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253F);
  147. /* cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253E); */
  148. /* Set the video input.
  149. The setting in MODE_CTRL gets lost when we do the above setup */
  150. /* EncSetSignalStd(dwDevNum, pEnc->dwSigStd); */
  151. /* EncSetVideoInput(dwDevNum, pEnc->VidIndSelection); */
  152. v = cx18_av_read4(cx, CXADEC_AFE_CTRL);
  153. v &= 0xFFFBFFFF; /* turn OFF bit 18 for droop_comp_ch1 */
  154. v &= 0xFFFF7FFF; /* turn OFF bit 9 for clamp_sel_ch1 */
  155. v &= 0xFFFFFFFE; /* turn OFF bit 0 for 12db_ch1 */
  156. /* v |= 0x00000001;*/ /* turn ON bit 0 for 12db_ch1 */
  157. cx18_av_write4(cx, CXADEC_AFE_CTRL, v);
  158. /* if(dwEnable && dw3DCombAvailable) { */
  159. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x7728021F); */
  160. /* } else { */
  161. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */
  162. /* } */
  163. cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F);
  164. state->default_volume = 228 - cx18_av_read(cx, 0x8d4);
  165. state->default_volume = ((state->default_volume / 2) + 23) << 9;
  166. }
  167. /* ----------------------------------------------------------------------- */
  168. void cx18_av_std_setup(struct cx18 *cx)
  169. {
  170. struct cx18_av_state *state = &cx->av_state;
  171. v4l2_std_id std = state->std;
  172. int hblank, hactive, burst, vblank, vactive, sc;
  173. int vblank656, src_decimation;
  174. int luma_lpf, uv_lpf, comb;
  175. u32 pll_int, pll_frac, pll_post;
  176. /* datasheet startup, step 8d */
  177. if (std & ~V4L2_STD_NTSC)
  178. cx18_av_write(cx, 0x49f, 0x11);
  179. else
  180. cx18_av_write(cx, 0x49f, 0x14);
  181. if (std & V4L2_STD_625_50) {
  182. hblank = 132;
  183. hactive = 720;
  184. burst = 93;
  185. vblank = 36;
  186. vactive = 580;
  187. vblank656 = 40;
  188. src_decimation = 0x21f;
  189. luma_lpf = 2;
  190. if (std & V4L2_STD_PAL) {
  191. uv_lpf = 1;
  192. comb = 0x20;
  193. sc = 688739;
  194. } else if (std == V4L2_STD_PAL_Nc) {
  195. uv_lpf = 1;
  196. comb = 0x20;
  197. sc = 556453;
  198. } else { /* SECAM */
  199. uv_lpf = 0;
  200. comb = 0;
  201. sc = 672351;
  202. }
  203. } else {
  204. hactive = 720;
  205. hblank = 122;
  206. vactive = 487;
  207. luma_lpf = 1;
  208. uv_lpf = 1;
  209. vblank = 26;
  210. vblank656 = 26;
  211. src_decimation = 0x21f;
  212. if (std == V4L2_STD_PAL_60) {
  213. burst = 0x5b;
  214. luma_lpf = 2;
  215. comb = 0x20;
  216. sc = 688739;
  217. } else if (std == V4L2_STD_PAL_M) {
  218. burst = 0x61;
  219. comb = 0x20;
  220. sc = 555452;
  221. } else {
  222. burst = 0x5b;
  223. comb = 0x66;
  224. sc = 556063;
  225. }
  226. }
  227. /* DEBUG: Displays configured PLL frequency */
  228. pll_int = cx18_av_read(cx, 0x108);
  229. pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;
  230. pll_post = cx18_av_read(cx, 0x109);
  231. CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n",
  232. pll_int, pll_frac, pll_post);
  233. if (pll_post) {
  234. int fin, fsc, pll;
  235. pll = (28636364L * ((((u64)pll_int) << 25) + pll_frac)) >> 25;
  236. pll /= pll_post;
  237. CX18_DEBUG_INFO("PLL = %d.%06d MHz\n",
  238. pll / 1000000, pll % 1000000);
  239. CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n",
  240. pll / 8000000, (pll / 8) % 1000000);
  241. fin = ((u64)src_decimation * pll) >> 12;
  242. CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n",
  243. fin / 1000000, fin % 1000000);
  244. fsc = (((u64)sc) * pll) >> 24L;
  245. CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n",
  246. fsc / 1000000, fsc % 1000000);
  247. CX18_DEBUG_INFO("hblank %i, hactive %i, "
  248. "vblank %i , vactive %i, vblank656 %i, src_dec %i,"
  249. "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x,"
  250. " sc 0x%06x\n",
  251. hblank, hactive, vblank, vactive, vblank656,
  252. src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
  253. }
  254. /* Sets horizontal blanking delay and active lines */
  255. cx18_av_write(cx, 0x470, hblank);
  256. cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) |
  257. (hactive << 4)));
  258. cx18_av_write(cx, 0x472, hactive >> 4);
  259. /* Sets burst gate delay */
  260. cx18_av_write(cx, 0x473, burst);
  261. /* Sets vertical blanking delay and active duration */
  262. cx18_av_write(cx, 0x474, vblank);
  263. cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) |
  264. (vactive << 4)));
  265. cx18_av_write(cx, 0x476, vactive >> 4);
  266. cx18_av_write(cx, 0x477, vblank656);
  267. /* Sets src decimation rate */
  268. cx18_av_write(cx, 0x478, 0xff & src_decimation);
  269. cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8));
  270. /* Sets Luma and UV Low pass filters */
  271. cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
  272. /* Enables comb filters */
  273. cx18_av_write(cx, 0x47b, comb);
  274. /* Sets SC Step*/
  275. cx18_av_write(cx, 0x47c, sc);
  276. cx18_av_write(cx, 0x47d, 0xff & sc >> 8);
  277. cx18_av_write(cx, 0x47e, 0xff & sc >> 16);
  278. /* Sets VBI parameters */
  279. if (std & V4L2_STD_625_50) {
  280. cx18_av_write(cx, 0x47f, 0x01);
  281. state->vbi_line_offset = 5;
  282. } else {
  283. cx18_av_write(cx, 0x47f, 0x00);
  284. state->vbi_line_offset = 8;
  285. }
  286. }
  287. /* ----------------------------------------------------------------------- */
  288. static void input_change(struct cx18 *cx)
  289. {
  290. struct cx18_av_state *state = &cx->av_state;
  291. v4l2_std_id std = state->std;
  292. u8 v;
  293. /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */
  294. cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
  295. cx18_av_and_or(cx, 0x401, ~0x60, 0);
  296. cx18_av_and_or(cx, 0x401, ~0x60, 0x60);
  297. if (std & V4L2_STD_525_60) {
  298. if (std == V4L2_STD_NTSC_M_JP) {
  299. /* Japan uses EIAJ audio standard */
  300. cx18_av_write_expect(cx, 0x808, 0xf7, 0xf7, 0xff);
  301. cx18_av_write_expect(cx, 0x80b, 0x02, 0x02, 0x3f);
  302. } else if (std == V4L2_STD_NTSC_M_KR) {
  303. /* South Korea uses A2 audio standard */
  304. cx18_av_write_expect(cx, 0x808, 0xf8, 0xf8, 0xff);
  305. cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);
  306. } else {
  307. /* Others use the BTSC audio standard */
  308. cx18_av_write_expect(cx, 0x808, 0xf6, 0xf6, 0xff);
  309. cx18_av_write_expect(cx, 0x80b, 0x01, 0x01, 0x3f);
  310. }
  311. } else if (std & V4L2_STD_PAL) {
  312. /* Follow tuner change procedure for PAL */
  313. cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff);
  314. cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);
  315. } else if (std & V4L2_STD_SECAM) {
  316. /* Select autodetect for SECAM */
  317. cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff);
  318. cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);
  319. }
  320. v = cx18_av_read(cx, 0x803);
  321. if (v & 0x10) {
  322. /* restart audio decoder microcontroller */
  323. v &= ~0x10;
  324. cx18_av_write_expect(cx, 0x803, v, v, 0x1f);
  325. v |= 0x10;
  326. cx18_av_write_expect(cx, 0x803, v, v, 0x1f);
  327. }
  328. }
  329. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  330. enum cx18_av_audio_input aud_input)
  331. {
  332. struct cx18_av_state *state = &cx->av_state;
  333. u8 is_composite = (vid_input >= CX18_AV_COMPOSITE1 &&
  334. vid_input <= CX18_AV_COMPOSITE8);
  335. u8 reg;
  336. u8 v;
  337. CX18_DEBUG_INFO("decoder set video input %d, audio input %d\n",
  338. vid_input, aud_input);
  339. if (is_composite) {
  340. reg = 0xf0 + (vid_input - CX18_AV_COMPOSITE1);
  341. } else {
  342. int luma = vid_input & 0xf0;
  343. int chroma = vid_input & 0xf00;
  344. if ((vid_input & ~0xff0) ||
  345. luma < CX18_AV_SVIDEO_LUMA1 ||
  346. luma > CX18_AV_SVIDEO_LUMA8 ||
  347. chroma < CX18_AV_SVIDEO_CHROMA4 ||
  348. chroma > CX18_AV_SVIDEO_CHROMA8) {
  349. CX18_ERR("0x%04x is not a valid video input!\n",
  350. vid_input);
  351. return -EINVAL;
  352. }
  353. reg = 0xf0 + ((luma - CX18_AV_SVIDEO_LUMA1) >> 4);
  354. if (chroma >= CX18_AV_SVIDEO_CHROMA7) {
  355. reg &= 0x3f;
  356. reg |= (chroma - CX18_AV_SVIDEO_CHROMA7) >> 2;
  357. } else {
  358. reg &= 0xcf;
  359. reg |= (chroma - CX18_AV_SVIDEO_CHROMA4) >> 4;
  360. }
  361. }
  362. switch (aud_input) {
  363. case CX18_AV_AUDIO_SERIAL1:
  364. case CX18_AV_AUDIO_SERIAL2:
  365. /* do nothing, use serial audio input */
  366. break;
  367. case CX18_AV_AUDIO4: reg &= ~0x30; break;
  368. case CX18_AV_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
  369. case CX18_AV_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
  370. case CX18_AV_AUDIO7: reg &= ~0xc0; break;
  371. case CX18_AV_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
  372. default:
  373. CX18_ERR("0x%04x is not a valid audio input!\n", aud_input);
  374. return -EINVAL;
  375. }
  376. cx18_av_write_expect(cx, 0x103, reg, reg, 0xf7);
  377. /* Set INPUT_MODE to Composite (0) or S-Video (1) */
  378. cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02);
  379. /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
  380. v = cx18_av_read(cx, 0x102);
  381. if (reg & 0x80)
  382. v &= ~0x2;
  383. else
  384. v |= 0x2;
  385. /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */
  386. if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
  387. v |= 0x4;
  388. else
  389. v &= ~0x4;
  390. cx18_av_write_expect(cx, 0x102, v, v, 0x17);
  391. /*cx18_av_and_or4(cx, 0x104, ~0x001b4180, 0x00004180);*/
  392. state->vid_input = vid_input;
  393. state->aud_input = aud_input;
  394. cx18_av_audio_set_path(cx);
  395. input_change(cx);
  396. return 0;
  397. }
  398. /* ----------------------------------------------------------------------- */
  399. static int set_v4lstd(struct cx18 *cx)
  400. {
  401. struct cx18_av_state *state = &cx->av_state;
  402. u8 fmt = 0; /* zero is autodetect */
  403. u8 pal_m = 0;
  404. /* First tests should be against specific std */
  405. if (state->std == V4L2_STD_NTSC_M_JP) {
  406. fmt = 0x2;
  407. } else if (state->std == V4L2_STD_NTSC_443) {
  408. fmt = 0x3;
  409. } else if (state->std == V4L2_STD_PAL_M) {
  410. pal_m = 1;
  411. fmt = 0x5;
  412. } else if (state->std == V4L2_STD_PAL_N) {
  413. fmt = 0x6;
  414. } else if (state->std == V4L2_STD_PAL_Nc) {
  415. fmt = 0x7;
  416. } else if (state->std == V4L2_STD_PAL_60) {
  417. fmt = 0x8;
  418. } else {
  419. /* Then, test against generic ones */
  420. if (state->std & V4L2_STD_NTSC)
  421. fmt = 0x1;
  422. else if (state->std & V4L2_STD_PAL)
  423. fmt = 0x4;
  424. else if (state->std & V4L2_STD_SECAM)
  425. fmt = 0xc;
  426. }
  427. CX18_DEBUG_INFO("changing video std to fmt %i\n", fmt);
  428. /* Follow step 9 of section 3.16 in the cx18_av datasheet.
  429. Without this PAL may display a vertical ghosting effect.
  430. This happens for example with the Yuan MPC622. */
  431. if (fmt >= 4 && fmt < 8) {
  432. /* Set format to NTSC-M */
  433. cx18_av_and_or(cx, 0x400, ~0xf, 1);
  434. /* Turn off LCOMB */
  435. cx18_av_and_or(cx, 0x47b, ~6, 0);
  436. }
  437. cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);
  438. cx18_av_and_or(cx, 0x403, ~0x3, pal_m);
  439. cx18_av_std_setup(cx);
  440. input_change(cx);
  441. return 0;
  442. }
  443. /* ----------------------------------------------------------------------- */
  444. static int set_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  445. {
  446. switch (ctrl->id) {
  447. case V4L2_CID_BRIGHTNESS:
  448. if (ctrl->value < 0 || ctrl->value > 255) {
  449. CX18_ERR("invalid brightness setting %d\n",
  450. ctrl->value);
  451. return -ERANGE;
  452. }
  453. cx18_av_write(cx, 0x414, ctrl->value - 128);
  454. break;
  455. case V4L2_CID_CONTRAST:
  456. if (ctrl->value < 0 || ctrl->value > 127) {
  457. CX18_ERR("invalid contrast setting %d\n",
  458. ctrl->value);
  459. return -ERANGE;
  460. }
  461. cx18_av_write(cx, 0x415, ctrl->value << 1);
  462. break;
  463. case V4L2_CID_SATURATION:
  464. if (ctrl->value < 0 || ctrl->value > 127) {
  465. CX18_ERR("invalid saturation setting %d\n",
  466. ctrl->value);
  467. return -ERANGE;
  468. }
  469. cx18_av_write(cx, 0x420, ctrl->value << 1);
  470. cx18_av_write(cx, 0x421, ctrl->value << 1);
  471. break;
  472. case V4L2_CID_HUE:
  473. if (ctrl->value < -127 || ctrl->value > 127) {
  474. CX18_ERR("invalid hue setting %d\n", ctrl->value);
  475. return -ERANGE;
  476. }
  477. cx18_av_write(cx, 0x422, ctrl->value);
  478. break;
  479. case V4L2_CID_AUDIO_VOLUME:
  480. case V4L2_CID_AUDIO_BASS:
  481. case V4L2_CID_AUDIO_TREBLE:
  482. case V4L2_CID_AUDIO_BALANCE:
  483. case V4L2_CID_AUDIO_MUTE:
  484. return cx18_av_audio(cx, VIDIOC_S_CTRL, ctrl);
  485. default:
  486. return -EINVAL;
  487. }
  488. return 0;
  489. }
  490. static int get_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  491. {
  492. switch (ctrl->id) {
  493. case V4L2_CID_BRIGHTNESS:
  494. ctrl->value = (s8)cx18_av_read(cx, 0x414) + 128;
  495. break;
  496. case V4L2_CID_CONTRAST:
  497. ctrl->value = cx18_av_read(cx, 0x415) >> 1;
  498. break;
  499. case V4L2_CID_SATURATION:
  500. ctrl->value = cx18_av_read(cx, 0x420) >> 1;
  501. break;
  502. case V4L2_CID_HUE:
  503. ctrl->value = (s8)cx18_av_read(cx, 0x422);
  504. break;
  505. case V4L2_CID_AUDIO_VOLUME:
  506. case V4L2_CID_AUDIO_BASS:
  507. case V4L2_CID_AUDIO_TREBLE:
  508. case V4L2_CID_AUDIO_BALANCE:
  509. case V4L2_CID_AUDIO_MUTE:
  510. return cx18_av_audio(cx, VIDIOC_G_CTRL, ctrl);
  511. default:
  512. return -EINVAL;
  513. }
  514. return 0;
  515. }
  516. /* ----------------------------------------------------------------------- */
  517. static int get_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  518. {
  519. switch (fmt->type) {
  520. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  521. return cx18_av_vbi(cx, VIDIOC_G_FMT, fmt);
  522. default:
  523. return -EINVAL;
  524. }
  525. return 0;
  526. }
  527. static int set_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  528. {
  529. struct cx18_av_state *state = &cx->av_state;
  530. struct v4l2_pix_format *pix;
  531. int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
  532. int is_50Hz = !(state->std & V4L2_STD_525_60);
  533. switch (fmt->type) {
  534. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  535. pix = &(fmt->fmt.pix);
  536. Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4;
  537. Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4;
  538. Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4;
  539. Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4;
  540. Vlines = pix->height + (is_50Hz ? 4 : 7);
  541. if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
  542. (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
  543. CX18_ERR("%dx%d is not a valid size!\n",
  544. pix->width, pix->height);
  545. return -ERANGE;
  546. }
  547. HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
  548. VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
  549. VSC &= 0x1fff;
  550. if (pix->width >= 385)
  551. filter = 0;
  552. else if (pix->width > 192)
  553. filter = 1;
  554. else if (pix->width > 96)
  555. filter = 2;
  556. else
  557. filter = 3;
  558. CX18_DEBUG_INFO("decoder set size %dx%d -> scale %ux%u\n",
  559. pix->width, pix->height, HSC, VSC);
  560. /* HSCALE=HSC */
  561. cx18_av_write(cx, 0x418, HSC & 0xff);
  562. cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff);
  563. cx18_av_write(cx, 0x41a, HSC >> 16);
  564. /* VSCALE=VSC */
  565. cx18_av_write(cx, 0x41c, VSC & 0xff);
  566. cx18_av_write(cx, 0x41d, VSC >> 8);
  567. /* VS_INTRLACE=1 VFILT=filter */
  568. cx18_av_write(cx, 0x41e, 0x8 | filter);
  569. break;
  570. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  571. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  572. case V4L2_BUF_TYPE_VBI_CAPTURE:
  573. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  574. default:
  575. return -EINVAL;
  576. }
  577. return 0;
  578. }
  579. /* ----------------------------------------------------------------------- */
  580. int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg)
  581. {
  582. struct cx18_av_state *state = &cx->av_state;
  583. struct v4l2_tuner *vt = arg;
  584. struct v4l2_routing *route = arg;
  585. /* ignore these commands */
  586. switch (cmd) {
  587. case TUNER_SET_TYPE_ADDR:
  588. return 0;
  589. }
  590. if (!state->is_initialized) {
  591. CX18_DEBUG_INFO("cmd %08x triggered fw load\n", cmd);
  592. /* initialize on first use */
  593. state->is_initialized = 1;
  594. cx18_av_initialize(cx);
  595. }
  596. switch (cmd) {
  597. case VIDIOC_INT_DECODE_VBI_LINE:
  598. return cx18_av_vbi(cx, cmd, arg);
  599. case VIDIOC_INT_AUDIO_CLOCK_FREQ:
  600. return cx18_av_audio(cx, cmd, arg);
  601. case VIDIOC_STREAMON:
  602. CX18_DEBUG_INFO("enable output\n");
  603. cx18_av_write(cx, 0x115, 0x8c);
  604. cx18_av_write(cx, 0x116, 0x07);
  605. break;
  606. case VIDIOC_STREAMOFF:
  607. CX18_DEBUG_INFO("disable output\n");
  608. cx18_av_write(cx, 0x115, 0x00);
  609. cx18_av_write(cx, 0x116, 0x00);
  610. break;
  611. case VIDIOC_LOG_STATUS:
  612. log_video_status(cx);
  613. log_audio_status(cx);
  614. break;
  615. case VIDIOC_G_CTRL:
  616. return get_v4lctrl(cx, (struct v4l2_control *)arg);
  617. case VIDIOC_S_CTRL:
  618. return set_v4lctrl(cx, (struct v4l2_control *)arg);
  619. case VIDIOC_QUERYCTRL:
  620. {
  621. struct v4l2_queryctrl *qc = arg;
  622. switch (qc->id) {
  623. case V4L2_CID_BRIGHTNESS:
  624. case V4L2_CID_CONTRAST:
  625. case V4L2_CID_SATURATION:
  626. case V4L2_CID_HUE:
  627. return v4l2_ctrl_query_fill_std(qc);
  628. default:
  629. break;
  630. }
  631. switch (qc->id) {
  632. case V4L2_CID_AUDIO_VOLUME:
  633. return v4l2_ctrl_query_fill(qc, 0, 65535,
  634. 65535 / 100, state->default_volume);
  635. case V4L2_CID_AUDIO_MUTE:
  636. case V4L2_CID_AUDIO_BALANCE:
  637. case V4L2_CID_AUDIO_BASS:
  638. case V4L2_CID_AUDIO_TREBLE:
  639. return v4l2_ctrl_query_fill_std(qc);
  640. default:
  641. return -EINVAL;
  642. }
  643. return -EINVAL;
  644. }
  645. case VIDIOC_G_STD:
  646. *(v4l2_std_id *)arg = state->std;
  647. break;
  648. case VIDIOC_S_STD:
  649. if (state->radio == 0 && state->std == *(v4l2_std_id *)arg)
  650. return 0;
  651. state->radio = 0;
  652. state->std = *(v4l2_std_id *)arg;
  653. return set_v4lstd(cx);
  654. case AUDC_SET_RADIO:
  655. state->radio = 1;
  656. break;
  657. case VIDIOC_INT_G_VIDEO_ROUTING:
  658. route->input = state->vid_input;
  659. route->output = 0;
  660. break;
  661. case VIDIOC_INT_S_VIDEO_ROUTING:
  662. return set_input(cx, route->input, state->aud_input);
  663. case VIDIOC_INT_G_AUDIO_ROUTING:
  664. route->input = state->aud_input;
  665. route->output = 0;
  666. break;
  667. case VIDIOC_INT_S_AUDIO_ROUTING:
  668. return set_input(cx, state->vid_input, route->input);
  669. case VIDIOC_S_FREQUENCY:
  670. input_change(cx);
  671. break;
  672. case VIDIOC_G_TUNER:
  673. {
  674. u8 vpres = cx18_av_read(cx, 0x40e) & 0x20;
  675. u8 mode;
  676. int val = 0;
  677. if (state->radio)
  678. break;
  679. vt->signal = vpres ? 0xffff : 0x0;
  680. vt->capability |=
  681. V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
  682. V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
  683. mode = cx18_av_read(cx, 0x804);
  684. /* get rxsubchans and audmode */
  685. if ((mode & 0xf) == 1)
  686. val |= V4L2_TUNER_SUB_STEREO;
  687. else
  688. val |= V4L2_TUNER_SUB_MONO;
  689. if (mode == 2 || mode == 4)
  690. val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
  691. if (mode & 0x10)
  692. val |= V4L2_TUNER_SUB_SAP;
  693. vt->rxsubchans = val;
  694. vt->audmode = state->audmode;
  695. break;
  696. }
  697. case VIDIOC_S_TUNER:
  698. {
  699. u8 v;
  700. if (state->radio)
  701. break;
  702. v = cx18_av_read(cx, 0x809);
  703. v &= ~0xf;
  704. switch (vt->audmode) {
  705. case V4L2_TUNER_MODE_MONO:
  706. /* mono -> mono
  707. stereo -> mono
  708. bilingual -> lang1 */
  709. break;
  710. case V4L2_TUNER_MODE_STEREO:
  711. case V4L2_TUNER_MODE_LANG1:
  712. /* mono -> mono
  713. stereo -> stereo
  714. bilingual -> lang1 */
  715. v |= 0x4;
  716. break;
  717. case V4L2_TUNER_MODE_LANG1_LANG2:
  718. /* mono -> mono
  719. stereo -> stereo
  720. bilingual -> lang1/lang2 */
  721. v |= 0x7;
  722. break;
  723. case V4L2_TUNER_MODE_LANG2:
  724. /* mono -> mono
  725. stereo -> stereo
  726. bilingual -> lang2 */
  727. v |= 0x1;
  728. break;
  729. default:
  730. return -EINVAL;
  731. }
  732. cx18_av_write_expect(cx, 0x809, v, v, 0xff);
  733. state->audmode = vt->audmode;
  734. break;
  735. }
  736. case VIDIOC_G_FMT:
  737. return get_v4lfmt(cx, (struct v4l2_format *)arg);
  738. case VIDIOC_S_FMT:
  739. return set_v4lfmt(cx, (struct v4l2_format *)arg);
  740. case VIDIOC_INT_RESET:
  741. cx18_av_initialize(cx);
  742. break;
  743. default:
  744. return -EINVAL;
  745. }
  746. return 0;
  747. }
  748. /* ----------------------------------------------------------------------- */
  749. /* ----------------------------------------------------------------------- */
  750. static void log_video_status(struct cx18 *cx)
  751. {
  752. static const char *const fmt_strs[] = {
  753. "0x0",
  754. "NTSC-M", "NTSC-J", "NTSC-4.43",
  755. "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
  756. "0x9", "0xA", "0xB",
  757. "SECAM",
  758. "0xD", "0xE", "0xF"
  759. };
  760. struct cx18_av_state *state = &cx->av_state;
  761. u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf;
  762. u8 gen_stat1 = cx18_av_read(cx, 0x40d);
  763. u8 gen_stat2 = cx18_av_read(cx, 0x40e);
  764. int vid_input = state->vid_input;
  765. CX18_INFO("Video signal: %spresent\n",
  766. (gen_stat2 & 0x20) ? "" : "not ");
  767. CX18_INFO("Detected format: %s\n",
  768. fmt_strs[gen_stat1 & 0xf]);
  769. CX18_INFO("Specified standard: %s\n",
  770. vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
  771. if (vid_input >= CX18_AV_COMPOSITE1 &&
  772. vid_input <= CX18_AV_COMPOSITE8) {
  773. CX18_INFO("Specified video input: Composite %d\n",
  774. vid_input - CX18_AV_COMPOSITE1 + 1);
  775. } else {
  776. CX18_INFO("Specified video input: S-Video (Luma In%d, Chroma In%d)\n",
  777. (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
  778. }
  779. CX18_INFO("Specified audioclock freq: %d Hz\n", state->audclk_freq);
  780. }
  781. /* ----------------------------------------------------------------------- */
  782. static void log_audio_status(struct cx18 *cx)
  783. {
  784. struct cx18_av_state *state = &cx->av_state;
  785. u8 download_ctl = cx18_av_read(cx, 0x803);
  786. u8 mod_det_stat0 = cx18_av_read(cx, 0x804);
  787. u8 mod_det_stat1 = cx18_av_read(cx, 0x805);
  788. u8 audio_config = cx18_av_read(cx, 0x808);
  789. u8 pref_mode = cx18_av_read(cx, 0x809);
  790. u8 afc0 = cx18_av_read(cx, 0x80b);
  791. u8 mute_ctl = cx18_av_read(cx, 0x8d3);
  792. int aud_input = state->aud_input;
  793. char *p;
  794. switch (mod_det_stat0) {
  795. case 0x00: p = "mono"; break;
  796. case 0x01: p = "stereo"; break;
  797. case 0x02: p = "dual"; break;
  798. case 0x04: p = "tri"; break;
  799. case 0x10: p = "mono with SAP"; break;
  800. case 0x11: p = "stereo with SAP"; break;
  801. case 0x12: p = "dual with SAP"; break;
  802. case 0x14: p = "tri with SAP"; break;
  803. case 0xfe: p = "forced mode"; break;
  804. default: p = "not defined"; break;
  805. }
  806. CX18_INFO("Detected audio mode: %s\n", p);
  807. switch (mod_det_stat1) {
  808. case 0x00: p = "not defined"; break;
  809. case 0x01: p = "EIAJ"; break;
  810. case 0x02: p = "A2-M"; break;
  811. case 0x03: p = "A2-BG"; break;
  812. case 0x04: p = "A2-DK1"; break;
  813. case 0x05: p = "A2-DK2"; break;
  814. case 0x06: p = "A2-DK3"; break;
  815. case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
  816. case 0x08: p = "AM-L"; break;
  817. case 0x09: p = "NICAM-BG"; break;
  818. case 0x0a: p = "NICAM-DK"; break;
  819. case 0x0b: p = "NICAM-I"; break;
  820. case 0x0c: p = "NICAM-L"; break;
  821. case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
  822. case 0x0e: p = "IF FM Radio"; break;
  823. case 0x0f: p = "BTSC"; break;
  824. case 0x10: p = "detected chrominance"; break;
  825. case 0xfd: p = "unknown audio standard"; break;
  826. case 0xfe: p = "forced audio standard"; break;
  827. case 0xff: p = "no detected audio standard"; break;
  828. default: p = "not defined"; break;
  829. }
  830. CX18_INFO("Detected audio standard: %s\n", p);
  831. CX18_INFO("Audio muted: %s\n",
  832. (mute_ctl & 0x2) ? "yes" : "no");
  833. CX18_INFO("Audio microcontroller: %s\n",
  834. (download_ctl & 0x10) ? "running" : "stopped");
  835. switch (audio_config >> 4) {
  836. case 0x00: p = "undefined"; break;
  837. case 0x01: p = "BTSC"; break;
  838. case 0x02: p = "EIAJ"; break;
  839. case 0x03: p = "A2-M"; break;
  840. case 0x04: p = "A2-BG"; break;
  841. case 0x05: p = "A2-DK1"; break;
  842. case 0x06: p = "A2-DK2"; break;
  843. case 0x07: p = "A2-DK3"; break;
  844. case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
  845. case 0x09: p = "AM-L"; break;
  846. case 0x0a: p = "NICAM-BG"; break;
  847. case 0x0b: p = "NICAM-DK"; break;
  848. case 0x0c: p = "NICAM-I"; break;
  849. case 0x0d: p = "NICAM-L"; break;
  850. case 0x0e: p = "FM radio"; break;
  851. case 0x0f: p = "automatic detection"; break;
  852. default: p = "undefined"; break;
  853. }
  854. CX18_INFO("Configured audio standard: %s\n", p);
  855. if ((audio_config >> 4) < 0xF) {
  856. switch (audio_config & 0xF) {
  857. case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
  858. case 0x01: p = "MONO2 (LANGUAGE B)"; break;
  859. case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
  860. case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
  861. case 0x04: p = "STEREO"; break;
  862. case 0x05: p = "DUAL1 (AC)"; break;
  863. case 0x06: p = "DUAL2 (BC)"; break;
  864. case 0x07: p = "DUAL3 (AB)"; break;
  865. default: p = "undefined";
  866. }
  867. CX18_INFO("Configured audio mode: %s\n", p);
  868. } else {
  869. switch (audio_config & 0xF) {
  870. case 0x00: p = "BG"; break;
  871. case 0x01: p = "DK1"; break;
  872. case 0x02: p = "DK2"; break;
  873. case 0x03: p = "DK3"; break;
  874. case 0x04: p = "I"; break;
  875. case 0x05: p = "L"; break;
  876. case 0x06: p = "BTSC"; break;
  877. case 0x07: p = "EIAJ"; break;
  878. case 0x08: p = "A2-M"; break;
  879. case 0x09: p = "FM Radio (4.5 MHz)"; break;
  880. case 0x0a: p = "FM Radio (5.5 MHz)"; break;
  881. case 0x0b: p = "S-Video"; break;
  882. case 0x0f: p = "automatic standard and mode detection"; break;
  883. default: p = "undefined"; break;
  884. }
  885. CX18_INFO("Configured audio system: %s\n", p);
  886. }
  887. if (aud_input)
  888. CX18_INFO("Specified audio input: Tuner (In%d)\n",
  889. aud_input);
  890. else
  891. CX18_INFO("Specified audio input: External\n");
  892. switch (pref_mode & 0xf) {
  893. case 0: p = "mono/language A"; break;
  894. case 1: p = "language B"; break;
  895. case 2: p = "language C"; break;
  896. case 3: p = "analog fallback"; break;
  897. case 4: p = "stereo"; break;
  898. case 5: p = "language AC"; break;
  899. case 6: p = "language BC"; break;
  900. case 7: p = "language AB"; break;
  901. default: p = "undefined"; break;
  902. }
  903. CX18_INFO("Preferred audio mode: %s\n", p);
  904. if ((audio_config & 0xf) == 0xf) {
  905. switch ((afc0 >> 3) & 0x1) {
  906. case 0: p = "system DK"; break;
  907. case 1: p = "system L"; break;
  908. }
  909. CX18_INFO("Selected 65 MHz format: %s\n", p);
  910. switch (afc0 & 0x7) {
  911. case 0: p = "Chroma"; break;
  912. case 1: p = "BTSC"; break;
  913. case 2: p = "EIAJ"; break;
  914. case 3: p = "A2-M"; break;
  915. case 4: p = "autodetect"; break;
  916. default: p = "undefined"; break;
  917. }
  918. CX18_INFO("Selected 45 MHz format: %s\n", p);
  919. }
  920. }