am335x-evm.dts 14 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. / {
  11. model = "TI AM335x EVM";
  12. compatible = "ti,am335x-evm", "ti,am33xx";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vdd1_reg>;
  16. };
  17. };
  18. memory {
  19. device_type = "memory";
  20. reg = <0x80000000 0x10000000>; /* 256 MB */
  21. };
  22. vbat: fixedregulator@0 {
  23. compatible = "regulator-fixed";
  24. regulator-name = "vbat";
  25. regulator-min-microvolt = <5000000>;
  26. regulator-max-microvolt = <5000000>;
  27. regulator-boot-on;
  28. };
  29. lis3_reg: fixedregulator@1 {
  30. compatible = "regulator-fixed";
  31. regulator-name = "lis3_reg";
  32. regulator-boot-on;
  33. };
  34. matrix_keypad: matrix_keypad@0 {
  35. compatible = "gpio-matrix-keypad";
  36. debounce-delay-ms = <5>;
  37. col-scan-delay-us = <2>;
  38. row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
  39. &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
  40. &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
  41. col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
  42. &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
  43. linux,keymap = <0x0000008b /* MENU */
  44. 0x0100009e /* BACK */
  45. 0x02000069 /* LEFT */
  46. 0x0001006a /* RIGHT */
  47. 0x0101001c /* ENTER */
  48. 0x0201006c>; /* DOWN */
  49. };
  50. gpio_keys: volume_keys@0 {
  51. compatible = "gpio-keys";
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. autorepeat;
  55. switch@9 {
  56. label = "volume-up";
  57. linux,code = <115>;
  58. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  59. gpio-key,wakeup;
  60. };
  61. switch@10 {
  62. label = "volume-down";
  63. linux,code = <114>;
  64. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  65. gpio-key,wakeup;
  66. };
  67. };
  68. backlight {
  69. compatible = "pwm-backlight";
  70. pwms = <&ecap0 0 50000 0>;
  71. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  72. default-brightness-level = <8>;
  73. };
  74. panel {
  75. compatible = "ti,tilcdc,panel";
  76. status = "okay";
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&lcd_pins_s0>;
  79. panel-info {
  80. ac-bias = <255>;
  81. ac-bias-intrpt = <0>;
  82. dma-burst-sz = <16>;
  83. bpp = <32>;
  84. fdd = <0x80>;
  85. sync-edge = <0>;
  86. sync-ctrl = <1>;
  87. raster-order = <0>;
  88. fifo-th = <0>;
  89. };
  90. display-timings {
  91. 800x480p62 {
  92. clock-frequency = <30000000>;
  93. hactive = <800>;
  94. vactive = <480>;
  95. hfront-porch = <39>;
  96. hback-porch = <39>;
  97. hsync-len = <47>;
  98. vback-porch = <29>;
  99. vfront-porch = <13>;
  100. vsync-len = <2>;
  101. hsync-active = <1>;
  102. vsync-active = <1>;
  103. };
  104. };
  105. };
  106. };
  107. &am33xx_pinmux {
  108. pinctrl-names = "default";
  109. pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  110. matrix_keypad_s0: matrix_keypad_s0 {
  111. pinctrl-single,pins = <
  112. 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  113. 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  114. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
  115. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
  116. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
  117. >;
  118. };
  119. volume_keys_s0: volume_keys_s0 {
  120. pinctrl-single,pins = <
  121. 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
  122. 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
  123. >;
  124. };
  125. i2c0_pins: pinmux_i2c0_pins {
  126. pinctrl-single,pins = <
  127. 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  128. 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  129. >;
  130. };
  131. i2c1_pins: pinmux_i2c1_pins {
  132. pinctrl-single,pins = <
  133. 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
  134. 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  135. >;
  136. };
  137. uart0_pins: pinmux_uart0_pins {
  138. pinctrl-single,pins = <
  139. 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  140. 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  141. >;
  142. };
  143. clkout2_pin: pinmux_clkout2_pin {
  144. pinctrl-single,pins = <
  145. 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  146. >;
  147. };
  148. nandflash_pins_s0: nandflash_pins_s0 {
  149. pinctrl-single,pins = <
  150. 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
  151. 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
  152. 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
  153. 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
  154. 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
  155. 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
  156. 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
  157. 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
  158. 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
  159. 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
  160. 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
  161. 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
  162. 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
  163. 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
  164. 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
  165. >;
  166. };
  167. ecap0_pins: backlight_pins {
  168. pinctrl-single,pins = <
  169. 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
  170. >;
  171. };
  172. cpsw_default: cpsw_default {
  173. pinctrl-single,pins = <
  174. /* Slave 1 */
  175. 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  176. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  177. 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
  178. 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
  179. 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  180. 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  181. 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
  182. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
  183. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
  184. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
  185. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  186. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  187. >;
  188. };
  189. cpsw_sleep: cpsw_sleep {
  190. pinctrl-single,pins = <
  191. /* Slave 1 reset value */
  192. 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  193. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  194. 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  195. 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  196. 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  197. 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  198. 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  199. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  200. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  201. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  202. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  203. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  204. >;
  205. };
  206. davinci_mdio_default: davinci_mdio_default {
  207. pinctrl-single,pins = <
  208. /* MDIO */
  209. 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  210. 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  211. >;
  212. };
  213. davinci_mdio_sleep: davinci_mdio_sleep {
  214. pinctrl-single,pins = <
  215. /* MDIO reset value */
  216. 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  217. 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  218. >;
  219. };
  220. lcd_pins_s0: lcd_pins_s0 {
  221. pinctrl-single,pins = <
  222. 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
  223. 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
  224. 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
  225. 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
  226. 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
  227. 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
  228. 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
  229. 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
  230. 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
  231. 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
  232. 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
  233. 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
  234. 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
  235. 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
  236. 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
  237. 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
  238. 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
  239. 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
  240. 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
  241. 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
  242. 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
  243. 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
  244. 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
  245. 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
  246. 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
  247. 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
  248. 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
  249. 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
  250. >;
  251. };
  252. };
  253. &uart0 {
  254. pinctrl-names = "default";
  255. pinctrl-0 = <&uart0_pins>;
  256. status = "okay";
  257. };
  258. &i2c0 {
  259. pinctrl-names = "default";
  260. pinctrl-0 = <&i2c0_pins>;
  261. status = "okay";
  262. clock-frequency = <400000>;
  263. tps: tps@2d {
  264. reg = <0x2d>;
  265. };
  266. };
  267. &usb {
  268. status = "okay";
  269. control@44e10000 {
  270. status = "okay";
  271. };
  272. usb-phy@47401300 {
  273. status = "okay";
  274. };
  275. usb-phy@47401b00 {
  276. status = "okay";
  277. };
  278. usb@47401000 {
  279. status = "okay";
  280. };
  281. usb@47401800 {
  282. status = "okay";
  283. dr_mode = "host";
  284. };
  285. dma-controller@07402000 {
  286. status = "okay";
  287. };
  288. };
  289. &i2c1 {
  290. pinctrl-names = "default";
  291. pinctrl-0 = <&i2c1_pins>;
  292. status = "okay";
  293. clock-frequency = <100000>;
  294. lis331dlh: lis331dlh@18 {
  295. compatible = "st,lis331dlh", "st,lis3lv02d";
  296. reg = <0x18>;
  297. Vdd-supply = <&lis3_reg>;
  298. Vdd_IO-supply = <&lis3_reg>;
  299. st,click-single-x;
  300. st,click-single-y;
  301. st,click-single-z;
  302. st,click-thresh-x = <10>;
  303. st,click-thresh-y = <10>;
  304. st,click-thresh-z = <10>;
  305. st,irq1-click;
  306. st,irq2-click;
  307. st,wakeup-x-lo;
  308. st,wakeup-x-hi;
  309. st,wakeup-y-lo;
  310. st,wakeup-y-hi;
  311. st,wakeup-z-lo;
  312. st,wakeup-z-hi;
  313. st,min-limit-x = <120>;
  314. st,min-limit-y = <120>;
  315. st,min-limit-z = <140>;
  316. st,max-limit-x = <550>;
  317. st,max-limit-y = <550>;
  318. st,max-limit-z = <750>;
  319. };
  320. tsl2550: tsl2550@39 {
  321. compatible = "taos,tsl2550";
  322. reg = <0x39>;
  323. };
  324. tmp275: tmp275@48 {
  325. compatible = "ti,tmp275";
  326. reg = <0x48>;
  327. };
  328. };
  329. &lcdc {
  330. status = "okay";
  331. };
  332. &elm {
  333. status = "okay";
  334. };
  335. &epwmss0 {
  336. status = "okay";
  337. ecap0: ecap@48300100 {
  338. status = "okay";
  339. pinctrl-names = "default";
  340. pinctrl-0 = <&ecap0_pins>;
  341. };
  342. };
  343. &gpmc {
  344. status = "okay";
  345. pinctrl-names = "default";
  346. pinctrl-0 = <&nandflash_pins_s0>;
  347. ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
  348. nand@0,0 {
  349. reg = <0 0 0>; /* CS0, offset 0 */
  350. nand-bus-width = <8>;
  351. ti,nand-ecc-opt = "bch8";
  352. gpmc,device-nand = "true";
  353. gpmc,device-width = <1>;
  354. gpmc,sync-clk-ps = <0>;
  355. gpmc,cs-on-ns = <0>;
  356. gpmc,cs-rd-off-ns = <44>;
  357. gpmc,cs-wr-off-ns = <44>;
  358. gpmc,adv-on-ns = <6>;
  359. gpmc,adv-rd-off-ns = <34>;
  360. gpmc,adv-wr-off-ns = <44>;
  361. gpmc,we-on-ns = <0>;
  362. gpmc,we-off-ns = <40>;
  363. gpmc,oe-on-ns = <0>;
  364. gpmc,oe-off-ns = <54>;
  365. gpmc,access-ns = <64>;
  366. gpmc,rd-cycle-ns = <82>;
  367. gpmc,wr-cycle-ns = <82>;
  368. gpmc,wait-on-read = "true";
  369. gpmc,wait-on-write = "true";
  370. gpmc,bus-turnaround-ns = <0>;
  371. gpmc,cycle2cycle-delay-ns = <0>;
  372. gpmc,clk-activation-ns = <0>;
  373. gpmc,wait-monitoring-ns = <0>;
  374. gpmc,wr-access-ns = <40>;
  375. gpmc,wr-data-mux-bus-ns = <0>;
  376. #address-cells = <1>;
  377. #size-cells = <1>;
  378. elm_id = <&elm>;
  379. /* MTD partition table */
  380. partition@0 {
  381. label = "SPL1";
  382. reg = <0x00000000 0x000020000>;
  383. };
  384. partition@1 {
  385. label = "SPL2";
  386. reg = <0x00020000 0x00020000>;
  387. };
  388. partition@2 {
  389. label = "SPL3";
  390. reg = <0x00040000 0x00020000>;
  391. };
  392. partition@3 {
  393. label = "SPL4";
  394. reg = <0x00060000 0x00020000>;
  395. };
  396. partition@4 {
  397. label = "U-boot";
  398. reg = <0x00080000 0x001e0000>;
  399. };
  400. partition@5 {
  401. label = "environment";
  402. reg = <0x00260000 0x00020000>;
  403. };
  404. partition@6 {
  405. label = "Kernel";
  406. reg = <0x00280000 0x00500000>;
  407. };
  408. partition@7 {
  409. label = "File-System";
  410. reg = <0x00780000 0x0F880000>;
  411. };
  412. };
  413. };
  414. #include "tps65910.dtsi"
  415. &tps {
  416. vcc1-supply = <&vbat>;
  417. vcc2-supply = <&vbat>;
  418. vcc3-supply = <&vbat>;
  419. vcc4-supply = <&vbat>;
  420. vcc5-supply = <&vbat>;
  421. vcc6-supply = <&vbat>;
  422. vcc7-supply = <&vbat>;
  423. vccio-supply = <&vbat>;
  424. regulators {
  425. vrtc_reg: regulator@0 {
  426. regulator-always-on;
  427. };
  428. vio_reg: regulator@1 {
  429. regulator-always-on;
  430. };
  431. vdd1_reg: regulator@2 {
  432. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  433. regulator-name = "vdd_mpu";
  434. regulator-min-microvolt = <912500>;
  435. regulator-max-microvolt = <1312500>;
  436. regulator-boot-on;
  437. regulator-always-on;
  438. };
  439. vdd2_reg: regulator@3 {
  440. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  441. regulator-name = "vdd_core";
  442. regulator-min-microvolt = <912500>;
  443. regulator-max-microvolt = <1150000>;
  444. regulator-boot-on;
  445. regulator-always-on;
  446. };
  447. vdd3_reg: regulator@4 {
  448. regulator-always-on;
  449. };
  450. vdig1_reg: regulator@5 {
  451. regulator-always-on;
  452. };
  453. vdig2_reg: regulator@6 {
  454. regulator-always-on;
  455. };
  456. vpll_reg: regulator@7 {
  457. regulator-always-on;
  458. };
  459. vdac_reg: regulator@8 {
  460. regulator-always-on;
  461. };
  462. vaux1_reg: regulator@9 {
  463. regulator-always-on;
  464. };
  465. vaux2_reg: regulator@10 {
  466. regulator-always-on;
  467. };
  468. vaux33_reg: regulator@11 {
  469. regulator-always-on;
  470. };
  471. vmmc_reg: regulator@12 {
  472. regulator-min-microvolt = <1800000>;
  473. regulator-max-microvolt = <3300000>;
  474. regulator-always-on;
  475. };
  476. };
  477. };
  478. &mac {
  479. pinctrl-names = "default", "sleep";
  480. pinctrl-0 = <&cpsw_default>;
  481. pinctrl-1 = <&cpsw_sleep>;
  482. };
  483. &davinci_mdio {
  484. pinctrl-names = "default", "sleep";
  485. pinctrl-0 = <&davinci_mdio_default>;
  486. pinctrl-1 = <&davinci_mdio_sleep>;
  487. };
  488. &cpsw_emac0 {
  489. phy_id = <&davinci_mdio>, <0>;
  490. phy-mode = "rgmii-txid";
  491. };
  492. &cpsw_emac1 {
  493. phy_id = <&davinci_mdio>, <1>;
  494. phy-mode = "rgmii-txid";
  495. };
  496. &tscadc {
  497. status = "okay";
  498. tsc {
  499. ti,wires = <4>;
  500. ti,x-plate-resistance = <200>;
  501. ti,coordiante-readouts = <5>;
  502. ti,wire-config = <0x00 0x11 0x22 0x33>;
  503. };
  504. adc {
  505. ti,adc-channels = <4 5 6 7>;
  506. };
  507. };
  508. &mmc1 {
  509. status = "okay";
  510. vmmc-supply = <&vmmc_reg>;
  511. bus-width = <4>;
  512. };
  513. &sham {
  514. status = "okay";
  515. };
  516. &aes {
  517. status = "okay";
  518. };