clock-r8a7779.c 3.2 KB

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  1. /*
  2. * r8a7779 clock framework support
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/kernel.h>
  22. #include <linux/io.h>
  23. #include <linux/sh_clk.h>
  24. #include <linux/clkdev.h>
  25. #include <mach/common.h>
  26. #define FRQMR 0xffc80014
  27. #define MSTPCR0 0xffc80030
  28. #define MSTPCR1 0xffc80034
  29. #define MSTPCR3 0xffc8003c
  30. #define MSTPSR1 0xffc80044
  31. #define MSTPSR4 0xffc80048
  32. #define MSTPSR6 0xffc8004c
  33. #define MSTPCR4 0xffc80050
  34. #define MSTPCR5 0xffc80054
  35. #define MSTPCR6 0xffc80058
  36. #define MSTPCR7 0xffc80040
  37. /* ioremap() through clock mapping mandatory to avoid
  38. * collision with ARM coherent DMA virtual memory range.
  39. */
  40. static struct clk_mapping cpg_mapping = {
  41. .phys = 0xffc80000,
  42. .len = 0x80,
  43. };
  44. static struct clk clkp = {
  45. .rate = 62500000, /* FIXME: shortcut */
  46. .flags = CLK_ENABLE_ON_INIT,
  47. .mapping = &cpg_mapping,
  48. };
  49. static struct clk *main_clks[] = {
  50. &clkp,
  51. };
  52. enum { MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
  53. MSTP016, MSTP015, MSTP014,
  54. MSTP_NR };
  55. #define MSTP(_parent, _reg, _bit, _flags) \
  56. SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
  57. static struct clk mstp_clks[MSTP_NR] = {
  58. [MSTP026] = MSTP(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
  59. [MSTP025] = MSTP(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
  60. [MSTP024] = MSTP(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
  61. [MSTP023] = MSTP(&clkp, MSTPCR0, 23, 0), /* SCIF3 */
  62. [MSTP022] = MSTP(&clkp, MSTPCR0, 22, 0), /* SCIF4 */
  63. [MSTP021] = MSTP(&clkp, MSTPCR0, 21, 0), /* SCIF5 */
  64. [MSTP016] = MSTP(&clkp, MSTPCR0, 16, 0), /* TMU0 */
  65. [MSTP015] = MSTP(&clkp, MSTPCR0, 15, 0), /* TMU1 */
  66. [MSTP014] = MSTP(&clkp, MSTPCR0, 14, 0), /* TMU2 */
  67. };
  68. static struct clk_lookup lookups[] = {
  69. /* MSTP32 clocks */
  70. CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
  71. CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
  72. CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
  73. CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
  74. CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
  75. CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
  76. CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
  77. CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
  78. };
  79. void __init r8a7779_clock_init(void)
  80. {
  81. int k, ret = 0;
  82. for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
  83. ret = clk_register(main_clks[k]);
  84. if (!ret)
  85. ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
  86. clkdev_add_table(lookups, ARRAY_SIZE(lookups));
  87. if (!ret)
  88. clk_init();
  89. else
  90. panic("failed to setup r8a7779 clocks\n");
  91. }