pn544_hci.c 24 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015
  1. /*
  2. * HCI based Driver for NXP PN544 NFC Chip
  3. *
  4. * Copyright (C) 2012 Intel Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the
  17. * Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. */
  20. #include <linux/crc-ccitt.h>
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/gpio.h>
  27. #include <linux/i2c.h>
  28. #include <linux/nfc.h>
  29. #include <net/nfc/hci.h>
  30. #include <net/nfc/shdlc.h>
  31. #include <linux/nfc/pn544.h>
  32. #define DRIVER_DESC "HCI NFC driver for PN544"
  33. #define PN544_HCI_DRIVER_NAME "pn544_hci"
  34. /* Timing restrictions (ms) */
  35. #define PN544_HCI_RESETVEN_TIME 30
  36. static struct i2c_device_id pn544_hci_id_table[] = {
  37. {"pn544", 0},
  38. {}
  39. };
  40. MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
  41. #define HCI_MODE 0
  42. #define FW_MODE 1
  43. /* framing in HCI mode */
  44. #define PN544_HCI_LLC_LEN 1
  45. #define PN544_HCI_LLC_CRC 2
  46. #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
  47. #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
  48. #define PN544_HCI_LLC_MAX_PAYLOAD 29
  49. #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
  50. PN544_HCI_LLC_MAX_PAYLOAD)
  51. enum pn544_state {
  52. PN544_ST_COLD,
  53. PN544_ST_FW_READY,
  54. PN544_ST_READY,
  55. };
  56. #define FULL_VERSION_LEN 11
  57. /* Proprietary commands */
  58. #define PN544_WRITE 0x3f
  59. /* Proprietary gates, events, commands and registers */
  60. /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
  61. #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
  62. #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
  63. #define PN544_MIFARE_CMD 0x21
  64. /* Commands that apply to all RF readers */
  65. #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
  66. #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
  67. /* NFC_HCI_ID_MGMT_GATE additional registers */
  68. #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
  69. #define PN544_RF_READER_ISO15693_GATE 0x12
  70. #define PN544_RF_READER_F_GATE 0x14
  71. #define PN544_FELICA_ID 0x04
  72. #define PN544_FELICA_RAW 0x20
  73. #define PN544_RF_READER_JEWEL_GATE 0x15
  74. #define PN544_JEWEL_RAW_CMD 0x23
  75. #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
  76. #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
  77. #define PN544_SYS_MGMT_GATE 0x90
  78. #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
  79. #define PN544_POLLING_LOOP_MGMT_GATE 0x94
  80. #define PN544_PL_RDPHASES 0x06
  81. #define PN544_PL_EMULATION 0x07
  82. #define PN544_PL_NFCT_DEACTIVATED 0x09
  83. #define PN544_SWP_MGMT_GATE 0xA0
  84. #define PN544_NFC_WI_MGMT_GATE 0xA1
  85. static struct nfc_hci_gate pn544_gates[] = {
  86. {NFC_HCI_ADMIN_GATE, NFC_HCI_INVALID_PIPE},
  87. {NFC_HCI_LOOPBACK_GATE, NFC_HCI_INVALID_PIPE},
  88. {NFC_HCI_ID_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  89. {NFC_HCI_LINK_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  90. {NFC_HCI_RF_READER_B_GATE, NFC_HCI_INVALID_PIPE},
  91. {NFC_HCI_RF_READER_A_GATE, NFC_HCI_INVALID_PIPE},
  92. {PN544_SYS_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  93. {PN544_SWP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  94. {PN544_POLLING_LOOP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  95. {PN544_NFC_WI_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  96. {PN544_RF_READER_F_GATE, NFC_HCI_INVALID_PIPE},
  97. {PN544_RF_READER_JEWEL_GATE, NFC_HCI_INVALID_PIPE},
  98. {PN544_RF_READER_ISO15693_GATE, NFC_HCI_INVALID_PIPE},
  99. {PN544_RF_READER_NFCIP1_INITIATOR_GATE, NFC_HCI_INVALID_PIPE},
  100. {PN544_RF_READER_NFCIP1_TARGET_GATE, NFC_HCI_INVALID_PIPE}
  101. };
  102. /* Largest headroom needed for outgoing custom commands */
  103. #define PN544_CMDS_HEADROOM 2
  104. #define PN544_FRAME_HEADROOM 1
  105. #define PN544_FRAME_TAILROOM 2
  106. struct pn544_hci_info {
  107. struct i2c_client *i2c_dev;
  108. struct nfc_shdlc *shdlc;
  109. enum pn544_state state;
  110. struct mutex info_lock;
  111. unsigned int gpio_en;
  112. unsigned int gpio_irq;
  113. unsigned int gpio_fw;
  114. unsigned int en_polarity;
  115. int hard_fault; /*
  116. * < 0 if hardware error occured (e.g. i2c err)
  117. * and prevents normal operation.
  118. */
  119. int async_cb_type;
  120. data_exchange_cb_t async_cb;
  121. void *async_cb_context;
  122. };
  123. static void pn544_hci_platform_init(struct pn544_hci_info *info)
  124. {
  125. int polarity, retry, ret;
  126. char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
  127. int count = sizeof(rset_cmd);
  128. pr_info(DRIVER_DESC ": %s\n", __func__);
  129. dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
  130. /* Disable fw download */
  131. gpio_set_value(info->gpio_fw, 0);
  132. for (polarity = 0; polarity < 2; polarity++) {
  133. info->en_polarity = polarity;
  134. retry = 3;
  135. while (retry--) {
  136. /* power off */
  137. gpio_set_value(info->gpio_en, !info->en_polarity);
  138. usleep_range(10000, 15000);
  139. /* power on */
  140. gpio_set_value(info->gpio_en, info->en_polarity);
  141. usleep_range(10000, 15000);
  142. /* send reset */
  143. dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
  144. ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
  145. if (ret == count) {
  146. dev_info(&info->i2c_dev->dev,
  147. "nfc_en polarity : active %s\n",
  148. (polarity == 0 ? "low" : "high"));
  149. goto out;
  150. }
  151. }
  152. }
  153. dev_err(&info->i2c_dev->dev,
  154. "Could not detect nfc_en polarity, fallback to active high\n");
  155. out:
  156. gpio_set_value(info->gpio_en, !info->en_polarity);
  157. }
  158. static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
  159. {
  160. pr_info(DRIVER_DESC ": %s\n", __func__);
  161. gpio_set_value(info->gpio_fw, 0);
  162. gpio_set_value(info->gpio_en, info->en_polarity);
  163. usleep_range(10000, 15000);
  164. return 0;
  165. }
  166. static void pn544_hci_disable(struct pn544_hci_info *info)
  167. {
  168. pr_info(DRIVER_DESC ": %s\n", __func__);
  169. gpio_set_value(info->gpio_fw, 0);
  170. gpio_set_value(info->gpio_en, !info->en_polarity);
  171. usleep_range(10000, 15000);
  172. gpio_set_value(info->gpio_en, info->en_polarity);
  173. usleep_range(10000, 15000);
  174. gpio_set_value(info->gpio_en, !info->en_polarity);
  175. usleep_range(10000, 15000);
  176. }
  177. static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
  178. {
  179. int r;
  180. usleep_range(3000, 6000);
  181. r = i2c_master_send(client, buf, len);
  182. if (r == -EREMOTEIO) { /* Retry, chip was in standby */
  183. usleep_range(6000, 10000);
  184. r = i2c_master_send(client, buf, len);
  185. }
  186. if (r >= 0 && r != len)
  187. r = -EREMOTEIO;
  188. return r;
  189. }
  190. static int check_crc(u8 *buf, int buflen)
  191. {
  192. int len;
  193. u16 crc;
  194. len = buf[0] + 1;
  195. crc = crc_ccitt(0xffff, buf, len - 2);
  196. crc = ~crc;
  197. if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
  198. pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
  199. crc, buf[len - 1], buf[len - 2]);
  200. pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
  201. print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
  202. 16, 2, buf, buflen, false);
  203. return -EPERM;
  204. }
  205. return 0;
  206. }
  207. /*
  208. * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
  209. * that i2c bus will be flushed and that next read will start on a new frame.
  210. * returned skb contains only LLC header and payload.
  211. * returns:
  212. * -EREMOTEIO : i2c read error (fatal)
  213. * -EBADMSG : frame was incorrect and discarded
  214. * -ENOMEM : cannot allocate skb, frame dropped
  215. */
  216. static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
  217. {
  218. int r;
  219. u8 len;
  220. u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
  221. r = i2c_master_recv(client, &len, 1);
  222. if (r != 1) {
  223. dev_err(&client->dev, "cannot read len byte\n");
  224. return -EREMOTEIO;
  225. }
  226. if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
  227. (len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
  228. dev_err(&client->dev, "invalid len byte\n");
  229. r = -EBADMSG;
  230. goto flush;
  231. }
  232. *skb = alloc_skb(1 + len, GFP_KERNEL);
  233. if (*skb == NULL) {
  234. r = -ENOMEM;
  235. goto flush;
  236. }
  237. *skb_put(*skb, 1) = len;
  238. r = i2c_master_recv(client, skb_put(*skb, len), len);
  239. if (r != len) {
  240. kfree_skb(*skb);
  241. return -EREMOTEIO;
  242. }
  243. r = check_crc((*skb)->data, (*skb)->len);
  244. if (r != 0) {
  245. kfree_skb(*skb);
  246. r = -EBADMSG;
  247. goto flush;
  248. }
  249. skb_pull(*skb, 1);
  250. skb_trim(*skb, (*skb)->len - 2);
  251. usleep_range(3000, 6000);
  252. return 0;
  253. flush:
  254. if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
  255. r = -EREMOTEIO;
  256. usleep_range(3000, 6000);
  257. return r;
  258. }
  259. /*
  260. * Reads an shdlc frame from the chip. This is not as straightforward as it
  261. * seems. There are cases where we could loose the frame start synchronization.
  262. * The frame format is len-data-crc, and corruption can occur anywhere while
  263. * transiting on i2c bus, such that we could read an invalid len.
  264. * In order to recover synchronization with the next frame, we must be sure
  265. * to read the real amount of data without using the len byte. We do this by
  266. * assuming the following:
  267. * - the chip will always present only one single complete frame on the bus
  268. * before triggering the interrupt
  269. * - the chip will not present a new frame until we have completely read
  270. * the previous one (or until we have handled the interrupt).
  271. * The tricky case is when we read a corrupted len that is less than the real
  272. * len. We must detect this here in order to determine that we need to flush
  273. * the bus. This is the reason why we check the crc here.
  274. */
  275. static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
  276. {
  277. struct pn544_hci_info *info = dev_id;
  278. struct i2c_client *client = info->i2c_dev;
  279. struct sk_buff *skb = NULL;
  280. int r;
  281. BUG_ON(!info);
  282. BUG_ON(irq != info->i2c_dev->irq);
  283. dev_dbg(&client->dev, "IRQ\n");
  284. if (info->hard_fault != 0)
  285. return IRQ_HANDLED;
  286. r = pn544_hci_i2c_read(client, &skb);
  287. if (r == -EREMOTEIO) {
  288. info->hard_fault = r;
  289. nfc_shdlc_recv_frame(info->shdlc, NULL);
  290. return IRQ_HANDLED;
  291. } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
  292. return IRQ_HANDLED;
  293. }
  294. nfc_shdlc_recv_frame(info->shdlc, skb);
  295. return IRQ_HANDLED;
  296. }
  297. static int pn544_hci_open(struct nfc_shdlc *shdlc)
  298. {
  299. struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
  300. int r = 0;
  301. mutex_lock(&info->info_lock);
  302. if (info->state != PN544_ST_COLD) {
  303. r = -EBUSY;
  304. goto out;
  305. }
  306. r = pn544_hci_enable(info, HCI_MODE);
  307. if (r == 0)
  308. info->state = PN544_ST_READY;
  309. out:
  310. mutex_unlock(&info->info_lock);
  311. return r;
  312. }
  313. static void pn544_hci_close(struct nfc_shdlc *shdlc)
  314. {
  315. struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
  316. mutex_lock(&info->info_lock);
  317. if (info->state == PN544_ST_COLD)
  318. goto out;
  319. pn544_hci_disable(info);
  320. info->state = PN544_ST_COLD;
  321. out:
  322. mutex_unlock(&info->info_lock);
  323. }
  324. static int pn544_hci_ready(struct nfc_shdlc *shdlc)
  325. {
  326. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  327. struct sk_buff *skb;
  328. static struct hw_config {
  329. u8 adr[2];
  330. u8 value;
  331. } hw_config[] = {
  332. {{0x9f, 0x9a}, 0x00},
  333. {{0x98, 0x10}, 0xbc},
  334. {{0x9e, 0x71}, 0x00},
  335. {{0x98, 0x09}, 0x00},
  336. {{0x9e, 0xb4}, 0x00},
  337. {{0x9e, 0xd9}, 0xff},
  338. {{0x9e, 0xda}, 0xff},
  339. {{0x9e, 0xdb}, 0x23},
  340. {{0x9e, 0xdc}, 0x21},
  341. {{0x9e, 0xdd}, 0x22},
  342. {{0x9e, 0xde}, 0x24},
  343. {{0x9c, 0x01}, 0x08},
  344. {{0x9e, 0xaa}, 0x01},
  345. {{0x9b, 0xd1}, 0x0d},
  346. {{0x9b, 0xd2}, 0x24},
  347. {{0x9b, 0xd3}, 0x0a},
  348. {{0x9b, 0xd4}, 0x22},
  349. {{0x9b, 0xd5}, 0x08},
  350. {{0x9b, 0xd6}, 0x1e},
  351. {{0x9b, 0xdd}, 0x1c},
  352. {{0x9b, 0x84}, 0x13},
  353. {{0x99, 0x81}, 0x7f},
  354. {{0x99, 0x31}, 0x70},
  355. {{0x98, 0x00}, 0x3f},
  356. {{0x9f, 0x09}, 0x00},
  357. {{0x9f, 0x0a}, 0x05},
  358. {{0x9e, 0xd1}, 0xa1},
  359. {{0x99, 0x23}, 0x00},
  360. {{0x9e, 0x74}, 0x80},
  361. {{0x9f, 0x28}, 0x10},
  362. {{0x9f, 0x35}, 0x14},
  363. {{0x9f, 0x36}, 0x60},
  364. {{0x9c, 0x31}, 0x00},
  365. {{0x9c, 0x32}, 0xc8},
  366. {{0x9c, 0x19}, 0x40},
  367. {{0x9c, 0x1a}, 0x40},
  368. {{0x9c, 0x0c}, 0x00},
  369. {{0x9c, 0x0d}, 0x00},
  370. {{0x9c, 0x12}, 0x00},
  371. {{0x9c, 0x13}, 0x00},
  372. {{0x98, 0xa2}, 0x0e},
  373. {{0x98, 0x93}, 0x40},
  374. {{0x98, 0x7d}, 0x02},
  375. {{0x98, 0x7e}, 0x00},
  376. {{0x9f, 0xc8}, 0x01},
  377. };
  378. struct hw_config *p = hw_config;
  379. int count = ARRAY_SIZE(hw_config);
  380. struct sk_buff *res_skb;
  381. u8 param[4];
  382. int r;
  383. param[0] = 0;
  384. while (count--) {
  385. param[1] = p->adr[0];
  386. param[2] = p->adr[1];
  387. param[3] = p->value;
  388. r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
  389. param, 4, &res_skb);
  390. if (r < 0)
  391. return r;
  392. if (res_skb->len != 1) {
  393. kfree_skb(res_skb);
  394. return -EPROTO;
  395. }
  396. if (res_skb->data[0] != p->value) {
  397. kfree_skb(res_skb);
  398. return -EIO;
  399. }
  400. kfree_skb(res_skb);
  401. p++;
  402. }
  403. param[0] = NFC_HCI_UICC_HOST_ID;
  404. r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
  405. NFC_HCI_ADMIN_WHITELIST, param, 1);
  406. if (r < 0)
  407. return r;
  408. param[0] = 0x3d;
  409. r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
  410. PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
  411. if (r < 0)
  412. return r;
  413. param[0] = 0x0;
  414. r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
  415. PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
  416. if (r < 0)
  417. return r;
  418. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  419. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  420. if (r < 0)
  421. return r;
  422. param[0] = 0x1;
  423. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  424. PN544_PL_NFCT_DEACTIVATED, param, 1);
  425. if (r < 0)
  426. return r;
  427. param[0] = 0x0;
  428. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  429. PN544_PL_RDPHASES, param, 1);
  430. if (r < 0)
  431. return r;
  432. r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
  433. PN544_ID_MGMT_FULL_VERSION_SW, &skb);
  434. if (r < 0)
  435. return r;
  436. if (skb->len != FULL_VERSION_LEN) {
  437. kfree_skb(skb);
  438. return -EINVAL;
  439. }
  440. print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
  441. DUMP_PREFIX_NONE, 16, 1,
  442. skb->data, FULL_VERSION_LEN, false);
  443. kfree_skb(skb);
  444. return 0;
  445. }
  446. static void pn544_hci_add_len_crc(struct sk_buff *skb)
  447. {
  448. u16 crc;
  449. int len;
  450. len = skb->len + 2;
  451. *skb_push(skb, 1) = len;
  452. crc = crc_ccitt(0xffff, skb->data, skb->len);
  453. crc = ~crc;
  454. *skb_put(skb, 1) = crc & 0xff;
  455. *skb_put(skb, 1) = crc >> 8;
  456. }
  457. static void pn544_hci_remove_len_crc(struct sk_buff *skb)
  458. {
  459. skb_pull(skb, PN544_FRAME_HEADROOM);
  460. skb_trim(skb, PN544_FRAME_TAILROOM);
  461. }
  462. static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb)
  463. {
  464. struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
  465. struct i2c_client *client = info->i2c_dev;
  466. int r;
  467. if (info->hard_fault != 0)
  468. return info->hard_fault;
  469. pn544_hci_add_len_crc(skb);
  470. r = pn544_hci_i2c_write(client, skb->data, skb->len);
  471. pn544_hci_remove_len_crc(skb);
  472. return r;
  473. }
  474. static int pn544_hci_start_poll(struct nfc_shdlc *shdlc,
  475. u32 im_protocols, u32 tm_protocols)
  476. {
  477. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  478. u8 phases = 0;
  479. int r;
  480. u8 duration[2];
  481. u8 activated;
  482. pr_info(DRIVER_DESC ": %s protocols 0x%x 0x%x\n",
  483. __func__, im_protocols, tm_protocols);
  484. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  485. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  486. if (r < 0)
  487. return r;
  488. duration[0] = 0x18;
  489. duration[1] = 0x6a;
  490. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  491. PN544_PL_EMULATION, duration, 2);
  492. if (r < 0)
  493. return r;
  494. activated = 0;
  495. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  496. PN544_PL_NFCT_DEACTIVATED, &activated, 1);
  497. if (r < 0)
  498. return r;
  499. if (im_protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |
  500. NFC_PROTO_JEWEL_MASK))
  501. phases |= 1; /* Type A */
  502. if (im_protocols & NFC_PROTO_FELICA_MASK) {
  503. phases |= (1 << 2); /* Type F 212 */
  504. phases |= (1 << 3); /* Type F 424 */
  505. }
  506. phases |= (1 << 5); /* NFC active */
  507. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  508. PN544_PL_RDPHASES, &phases, 1);
  509. if (r < 0)
  510. return r;
  511. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  512. NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
  513. if (r < 0)
  514. nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  515. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  516. return r;
  517. }
  518. static int pn544_hci_target_from_gate(struct nfc_shdlc *shdlc, u8 gate,
  519. struct nfc_target *target)
  520. {
  521. switch (gate) {
  522. case PN544_RF_READER_F_GATE:
  523. target->supported_protocols = NFC_PROTO_FELICA_MASK;
  524. break;
  525. case PN544_RF_READER_JEWEL_GATE:
  526. target->supported_protocols = NFC_PROTO_JEWEL_MASK;
  527. target->sens_res = 0x0c00;
  528. break;
  529. default:
  530. return -EPROTO;
  531. }
  532. return 0;
  533. }
  534. static int pn544_hci_complete_target_discovered(struct nfc_shdlc *shdlc,
  535. u8 gate,
  536. struct nfc_target *target)
  537. {
  538. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  539. struct sk_buff *uid_skb;
  540. int r = 0;
  541. if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  542. if (target->nfcid1_len != 4 && target->nfcid1_len != 7 &&
  543. target->nfcid1_len != 10)
  544. return -EPROTO;
  545. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  546. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  547. target->nfcid1, target->nfcid1_len, NULL);
  548. } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) {
  549. r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,
  550. PN544_FELICA_ID, &uid_skb);
  551. if (r < 0)
  552. return r;
  553. if (uid_skb->len != 8) {
  554. kfree_skb(uid_skb);
  555. return -EPROTO;
  556. }
  557. r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,
  558. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  559. uid_skb->data, uid_skb->len, NULL);
  560. kfree_skb(uid_skb);
  561. } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) {
  562. /*
  563. * TODO: maybe other ISO 14443 require some kind of continue
  564. * activation, but for now we've seen only this one below.
  565. */
  566. if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */
  567. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  568. PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,
  569. NULL, 0, NULL);
  570. }
  571. return r;
  572. }
  573. #define PN544_CB_TYPE_READER_F 1
  574. static void pn544_hci_data_exchange_cb(void *context, struct sk_buff *skb,
  575. int err)
  576. {
  577. struct pn544_hci_info *info = context;
  578. switch (info->async_cb_type) {
  579. case PN544_CB_TYPE_READER_F:
  580. if (err == 0)
  581. skb_pull(skb, 1);
  582. info->async_cb(info->async_cb_context, skb, err);
  583. break;
  584. default:
  585. if (err == 0)
  586. kfree_skb(skb);
  587. break;
  588. }
  589. }
  590. #define MIFARE_CMD_AUTH_KEY_A 0x60
  591. #define MIFARE_CMD_AUTH_KEY_B 0x61
  592. #define MIFARE_CMD_HEADER 2
  593. #define MIFARE_UID_LEN 4
  594. #define MIFARE_KEY_LEN 6
  595. #define MIFARE_CMD_LEN 12
  596. /*
  597. * Returns:
  598. * <= 0: driver handled the data exchange
  599. * 1: driver doesn't especially handle, please do standard processing
  600. */
  601. static int pn544_hci_data_exchange(struct nfc_shdlc *shdlc,
  602. struct nfc_target *target,
  603. struct sk_buff *skb, data_exchange_cb_t cb,
  604. void *cb_context)
  605. {
  606. struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
  607. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  608. pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,
  609. target->hci_reader_gate);
  610. switch (target->hci_reader_gate) {
  611. case NFC_HCI_RF_READER_A_GATE:
  612. if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  613. /*
  614. * It seems that pn544 is inverting key and UID for
  615. * MIFARE authentication commands.
  616. */
  617. if (skb->len == MIFARE_CMD_LEN &&
  618. (skb->data[0] == MIFARE_CMD_AUTH_KEY_A ||
  619. skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) {
  620. u8 uid[MIFARE_UID_LEN];
  621. u8 *data = skb->data + MIFARE_CMD_HEADER;
  622. memcpy(uid, data + MIFARE_KEY_LEN,
  623. MIFARE_UID_LEN);
  624. memmove(data + MIFARE_UID_LEN, data,
  625. MIFARE_KEY_LEN);
  626. memcpy(data, uid, MIFARE_UID_LEN);
  627. }
  628. return nfc_hci_send_cmd_async(hdev,
  629. target->hci_reader_gate,
  630. PN544_MIFARE_CMD,
  631. skb->data, skb->len,
  632. cb, cb_context);
  633. } else
  634. return 1;
  635. case PN544_RF_READER_F_GATE:
  636. *skb_push(skb, 1) = 0;
  637. *skb_push(skb, 1) = 0;
  638. info->async_cb_type = PN544_CB_TYPE_READER_F;
  639. info->async_cb = cb;
  640. info->async_cb_context = cb_context;
  641. return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
  642. PN544_FELICA_RAW, skb->data,
  643. skb->len,
  644. pn544_hci_data_exchange_cb, info);
  645. case PN544_RF_READER_JEWEL_GATE:
  646. return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
  647. PN544_JEWEL_RAW_CMD, skb->data,
  648. skb->len, cb, cb_context);
  649. default:
  650. return 1;
  651. }
  652. }
  653. static int pn544_hci_check_presence(struct nfc_shdlc *shdlc,
  654. struct nfc_target *target)
  655. {
  656. struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
  657. return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
  658. PN544_RF_READER_CMD_PRESENCE_CHECK,
  659. NULL, 0, NULL);
  660. }
  661. static struct nfc_shdlc_ops pn544_shdlc_ops = {
  662. .open = pn544_hci_open,
  663. .close = pn544_hci_close,
  664. .hci_ready = pn544_hci_ready,
  665. .xmit = pn544_hci_xmit,
  666. .start_poll = pn544_hci_start_poll,
  667. .target_from_gate = pn544_hci_target_from_gate,
  668. .complete_target_discovered = pn544_hci_complete_target_discovered,
  669. .data_exchange = pn544_hci_data_exchange,
  670. .check_presence = pn544_hci_check_presence,
  671. };
  672. static int __devinit pn544_hci_probe(struct i2c_client *client,
  673. const struct i2c_device_id *id)
  674. {
  675. struct pn544_hci_info *info;
  676. struct pn544_nfc_platform_data *pdata;
  677. int r = 0;
  678. u32 protocols;
  679. struct nfc_hci_init_data init_data;
  680. dev_dbg(&client->dev, "%s\n", __func__);
  681. dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
  682. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  683. dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
  684. return -ENODEV;
  685. }
  686. info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);
  687. if (!info) {
  688. dev_err(&client->dev,
  689. "Cannot allocate memory for pn544_hci_info.\n");
  690. r = -ENOMEM;
  691. goto err_info_alloc;
  692. }
  693. info->i2c_dev = client;
  694. info->state = PN544_ST_COLD;
  695. mutex_init(&info->info_lock);
  696. i2c_set_clientdata(client, info);
  697. pdata = client->dev.platform_data;
  698. if (pdata == NULL) {
  699. dev_err(&client->dev, "No platform data\n");
  700. r = -EINVAL;
  701. goto err_pdata;
  702. }
  703. if (pdata->request_resources == NULL) {
  704. dev_err(&client->dev, "request_resources() missing\n");
  705. r = -EINVAL;
  706. goto err_pdata;
  707. }
  708. r = pdata->request_resources(client);
  709. if (r) {
  710. dev_err(&client->dev, "Cannot get platform resources\n");
  711. goto err_pdata;
  712. }
  713. info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
  714. info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
  715. info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
  716. pn544_hci_platform_init(info);
  717. r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn,
  718. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  719. PN544_HCI_DRIVER_NAME, info);
  720. if (r < 0) {
  721. dev_err(&client->dev, "Unable to register IRQ handler\n");
  722. goto err_rti;
  723. }
  724. init_data.gate_count = ARRAY_SIZE(pn544_gates);
  725. memcpy(init_data.gates, pn544_gates, sizeof(pn544_gates));
  726. /*
  727. * TODO: Session id must include the driver name + some bus addr
  728. * persistent info to discriminate 2 identical chips
  729. */
  730. strcpy(init_data.session_id, "ID544HCI");
  731. protocols = NFC_PROTO_JEWEL_MASK |
  732. NFC_PROTO_MIFARE_MASK |
  733. NFC_PROTO_FELICA_MASK |
  734. NFC_PROTO_ISO14443_MASK |
  735. NFC_PROTO_ISO14443_B_MASK |
  736. NFC_PROTO_NFC_DEP_MASK;
  737. info->shdlc = nfc_shdlc_allocate(&pn544_shdlc_ops,
  738. &init_data, protocols,
  739. PN544_FRAME_HEADROOM + PN544_CMDS_HEADROOM,
  740. PN544_FRAME_TAILROOM,
  741. PN544_HCI_LLC_MAX_PAYLOAD,
  742. dev_name(&client->dev));
  743. if (!info->shdlc) {
  744. dev_err(&client->dev, "Cannot allocate nfc shdlc.\n");
  745. r = -ENOMEM;
  746. goto err_allocshdlc;
  747. }
  748. nfc_shdlc_set_clientdata(info->shdlc, info);
  749. return 0;
  750. err_allocshdlc:
  751. free_irq(client->irq, info);
  752. err_rti:
  753. if (pdata->free_resources != NULL)
  754. pdata->free_resources();
  755. err_pdata:
  756. kfree(info);
  757. err_info_alloc:
  758. return r;
  759. }
  760. static __devexit int pn544_hci_remove(struct i2c_client *client)
  761. {
  762. struct pn544_hci_info *info = i2c_get_clientdata(client);
  763. struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
  764. dev_dbg(&client->dev, "%s\n", __func__);
  765. nfc_shdlc_free(info->shdlc);
  766. if (info->state != PN544_ST_COLD) {
  767. if (pdata->disable)
  768. pdata->disable();
  769. }
  770. free_irq(client->irq, info);
  771. if (pdata->free_resources)
  772. pdata->free_resources();
  773. kfree(info);
  774. return 0;
  775. }
  776. static struct i2c_driver pn544_hci_driver = {
  777. .driver = {
  778. .name = PN544_HCI_DRIVER_NAME,
  779. },
  780. .probe = pn544_hci_probe,
  781. .id_table = pn544_hci_id_table,
  782. .remove = __devexit_p(pn544_hci_remove),
  783. };
  784. static int __init pn544_hci_init(void)
  785. {
  786. int r;
  787. pr_debug(DRIVER_DESC ": %s\n", __func__);
  788. r = i2c_add_driver(&pn544_hci_driver);
  789. if (r) {
  790. pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");
  791. return r;
  792. }
  793. return 0;
  794. }
  795. static void __exit pn544_hci_exit(void)
  796. {
  797. i2c_del_driver(&pn544_hci_driver);
  798. }
  799. module_init(pn544_hci_init);
  800. module_exit(pn544_hci_exit);
  801. MODULE_LICENSE("GPL");
  802. MODULE_DESCRIPTION(DRIVER_DESC);