mpc8349emitxgp.dts 4.2 KB

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  1. /*
  2. * MPC8349E-mITX-GP Device Tree Source
  3. *
  4. * Copyright 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8349EMITXGP";
  13. compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. aliases {
  17. ethernet0 = &enet0;
  18. serial0 = &serial0;
  19. serial1 = &serial1;
  20. pci0 = &pci0;
  21. };
  22. cpus {
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. PowerPC,8349@0 {
  26. device_type = "cpu";
  27. reg = <0>;
  28. d-cache-line-size = <20>;
  29. i-cache-line-size = <20>;
  30. d-cache-size = <8000>;
  31. i-cache-size = <8000>;
  32. timebase-frequency = <0>; // from bootloader
  33. bus-frequency = <0>; // from bootloader
  34. clock-frequency = <0>; // from bootloader
  35. };
  36. };
  37. memory {
  38. device_type = "memory";
  39. reg = <00000000 10000000>;
  40. };
  41. soc8349@e0000000 {
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. device_type = "soc";
  45. ranges = <0 e0000000 00100000>;
  46. reg = <e0000000 00000200>;
  47. bus-frequency = <0>; // from bootloader
  48. wdt@200 {
  49. device_type = "watchdog";
  50. compatible = "mpc83xx_wdt";
  51. reg = <200 100>;
  52. };
  53. i2c@3000 {
  54. #address-cells = <1>;
  55. #size-cells = <0>;
  56. cell-index = <0>;
  57. compatible = "fsl-i2c";
  58. reg = <3000 100>;
  59. interrupts = <e 8>;
  60. interrupt-parent = < &ipic >;
  61. dfsrr;
  62. };
  63. i2c@3100 {
  64. #address-cells = <1>;
  65. #size-cells = <0>;
  66. cell-index = <1>;
  67. compatible = "fsl-i2c";
  68. reg = <3100 100>;
  69. interrupts = <f 8>;
  70. interrupt-parent = < &ipic >;
  71. dfsrr;
  72. };
  73. spi@7000 {
  74. cell-index = <0>;
  75. compatible = "fsl,spi";
  76. reg = <7000 1000>;
  77. interrupts = <10 8>;
  78. interrupt-parent = < &ipic >;
  79. mode = "cpu";
  80. };
  81. usb@23000 {
  82. compatible = "fsl-usb2-dr";
  83. reg = <23000 1000>;
  84. #address-cells = <1>;
  85. #size-cells = <0>;
  86. interrupt-parent = < &ipic >;
  87. interrupts = <26 8>;
  88. dr_mode = "otg";
  89. phy_type = "ulpi";
  90. };
  91. mdio@24520 {
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. compatible = "fsl,gianfar-mdio";
  95. reg = <24520 20>;
  96. /* Vitesse 8201 */
  97. phy1c: ethernet-phy@1c {
  98. interrupt-parent = < &ipic >;
  99. interrupts = <12 8>;
  100. reg = <1c>;
  101. device_type = "ethernet-phy";
  102. };
  103. };
  104. enet0: ethernet@24000 {
  105. cell-index = <0>;
  106. device_type = "network";
  107. model = "TSEC";
  108. compatible = "gianfar";
  109. reg = <24000 1000>;
  110. local-mac-address = [ 00 00 00 00 00 00 ];
  111. interrupts = <20 8 21 8 22 8>;
  112. interrupt-parent = < &ipic >;
  113. phy-handle = < &phy1c >;
  114. linux,network-index = <0>;
  115. };
  116. serial0: serial@4500 {
  117. cell-index = <0>;
  118. device_type = "serial";
  119. compatible = "ns16550";
  120. reg = <4500 100>;
  121. clock-frequency = <0>; // from bootloader
  122. interrupts = <9 8>;
  123. interrupt-parent = < &ipic >;
  124. };
  125. serial1: serial@4600 {
  126. cell-index = <1>;
  127. device_type = "serial";
  128. compatible = "ns16550";
  129. reg = <4600 100>;
  130. clock-frequency = <0>; // from bootloader
  131. interrupts = <a 8>;
  132. interrupt-parent = < &ipic >;
  133. };
  134. crypto@30000 {
  135. device_type = "crypto";
  136. model = "SEC2";
  137. compatible = "talitos";
  138. reg = <30000 10000>;
  139. interrupts = <b 8>;
  140. interrupt-parent = < &ipic >;
  141. num-channels = <4>;
  142. channel-fifo-len = <18>;
  143. exec-units-mask = <0000007e>;
  144. descriptor-types-mask = <01010ebf>;
  145. };
  146. ipic: pic@700 {
  147. interrupt-controller;
  148. #address-cells = <0>;
  149. #interrupt-cells = <2>;
  150. reg = <700 100>;
  151. device_type = "ipic";
  152. };
  153. };
  154. pci0: pci@e0008600 {
  155. cell-index = <2>;
  156. interrupt-map-mask = <f800 0 0 7>;
  157. interrupt-map = <
  158. /* IDSEL 0x0F - PCI Slot */
  159. 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
  160. 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
  161. >;
  162. interrupt-parent = < &ipic >;
  163. interrupts = <43 8>;
  164. bus-range = <1 1>;
  165. ranges = <42000000 0 a0000000 a0000000 0 10000000
  166. 02000000 0 b0000000 b0000000 0 10000000
  167. 01000000 0 00000000 e3000000 0 01000000>;
  168. clock-frequency = <3f940aa>;
  169. #interrupt-cells = <1>;
  170. #size-cells = <2>;
  171. #address-cells = <3>;
  172. reg = <e0008600 100>;
  173. compatible = "fsl,mpc8349-pci";
  174. device_type = "pci";
  175. };
  176. };