hd64465_ss.c 24 KB

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  1. /*
  2. * Device driver for the PCMCIA controller module of the
  3. * Hitachi HD64465 handheld companion chip.
  4. *
  5. * Note that the HD64465 provides a very thin PCMCIA host bridge
  6. * layer, requiring a lot of the work of supporting cards to be
  7. * performed by the processor. For example: mapping of card
  8. * interrupts to processor IRQs is done by IRQ demuxing software;
  9. * IO and memory mappings are fixed; setting voltages according
  10. * to card Voltage Select pins etc is done in software.
  11. *
  12. * Note also that this driver uses only the simple, fixed,
  13. * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
  14. * HD64465. Larger mappings, smaller mappings, or mappings of
  15. * different width to the same socket, are all possible only by
  16. * involving the SH7750's MMU, which is considered unnecessary here.
  17. * The downside is that it may be possible for some drivers to
  18. * break because they need or expect 8-bit mappings.
  19. *
  20. * This driver currently supports only the following configuration:
  21. * SH7750 CPU, HD64465, TPS2206 voltage control chip.
  22. *
  23. * by Greg Banks <gbanks@pocketpenguins.com>
  24. * (c) 2000 PocketPenguins Inc
  25. */
  26. #include <linux/types.h>
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/string.h>
  30. #include <linux/kernel.h>
  31. #include <linux/ioport.h>
  32. #include <linux/mm.h>
  33. #include <linux/vmalloc.h>
  34. #include <asm/errno.h>
  35. #include <linux/irq.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/platform_device.h>
  38. #include <asm/io.h>
  39. #include <asm/hd64465/hd64465.h>
  40. #include <asm/hd64465/io.h>
  41. #include <pcmcia/cs_types.h>
  42. #include <pcmcia/cs.h>
  43. #include <pcmcia/cistpl.h>
  44. #include <pcmcia/ds.h>
  45. #include <pcmcia/ss.h>
  46. #include <pcmcia/bulkmem.h>
  47. #include "cs_internal.h"
  48. #define MODNAME "hd64465_ss"
  49. /* #define HD64465_DEBUG 1 */
  50. #if HD64465_DEBUG
  51. #define DPRINTK(args...) printk(MODNAME ": " args)
  52. #else
  53. #define DPRINTK(args...)
  54. #endif
  55. extern int hd64465_io_debug;
  56. extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
  57. extern void p3_iounmap(void *addr);
  58. /*============================================================*/
  59. #define HS_IO_MAP_SIZE (64*1024)
  60. typedef struct hs_socket_t
  61. {
  62. unsigned int number;
  63. u_int irq;
  64. u_long mem_base;
  65. void *io_base;
  66. u_long mem_length;
  67. u_int ctrl_base;
  68. socket_state_t state;
  69. pccard_io_map io_maps[MAX_IO_WIN];
  70. pccard_mem_map mem_maps[MAX_WIN];
  71. struct pcmcia_socket socket;
  72. } hs_socket_t;
  73. #define HS_MAX_SOCKETS 2
  74. static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
  75. #define hs_in(sp, r) inb((sp)->ctrl_base + (r))
  76. #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
  77. /* translate a boolean value to a bit in a register */
  78. #define bool_to_regbit(sp, r, bi, bo) \
  79. do { \
  80. unsigned short v = hs_in(sp, r); \
  81. if (bo) \
  82. v |= (bi); \
  83. else \
  84. v &= ~(bi); \
  85. hs_out(sp, v, r); \
  86. } while(0)
  87. /* register offsets from HD64465_REG_PCC[01]ISR */
  88. #define ISR 0x0
  89. #define GCR 0x2
  90. #define CSCR 0x4
  91. #define CSCIER 0x6
  92. #define SCR 0x8
  93. /* Mask and values for CSCIER register */
  94. #define IER_MASK 0x80
  95. #define IER_ON 0x3f /* interrupts on */
  96. #define IER_OFF 0x00 /* interrupts off */
  97. /*============================================================*/
  98. #if HD64465_DEBUG > 10
  99. static void cis_hex_dump(const unsigned char *x, int len)
  100. {
  101. int i;
  102. for (i=0 ; i<len ; i++)
  103. {
  104. if (!(i & 0xf))
  105. printk("\n%08x", (unsigned)(x + i));
  106. printk(" %02x", *(volatile unsigned short*)x);
  107. x += 2;
  108. }
  109. printk("\n");
  110. }
  111. #endif
  112. /*============================================================*/
  113. /*
  114. * This code helps create the illusion that the IREQ line from
  115. * the PC card is mapped to one of the CPU's IRQ lines by the
  116. * host bridge hardware (which is how every host bridge *except*
  117. * the HD64465 works). In particular, it supports enabling
  118. * and disabling the IREQ line by code which knows nothing
  119. * about the host bridge (e.g. device drivers, IDE code) using
  120. * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
  121. * functions. Also, it supports sharing the mapped IRQ with
  122. * real hardware IRQs from the -IRL0-3 lines.
  123. */
  124. #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
  125. static struct
  126. {
  127. /* index is mapped irq number */
  128. hs_socket_t *sock;
  129. hw_irq_controller *old_handler;
  130. } hs_mapped_irq[HS_NUM_MAPPED_IRQS];
  131. static void hs_socket_enable_ireq(hs_socket_t *sp)
  132. {
  133. unsigned short cscier;
  134. DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
  135. cscier = hs_in(sp, CSCIER);
  136. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  137. cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
  138. hs_out(sp, cscier, CSCIER);
  139. }
  140. static void hs_socket_disable_ireq(hs_socket_t *sp)
  141. {
  142. unsigned short cscier;
  143. DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
  144. cscier = hs_in(sp, CSCIER);
  145. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  146. hs_out(sp, cscier, CSCIER);
  147. }
  148. static unsigned int hs_startup_irq(unsigned int irq)
  149. {
  150. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  151. hs_mapped_irq[irq].old_handler->startup(irq);
  152. return 0;
  153. }
  154. static void hs_shutdown_irq(unsigned int irq)
  155. {
  156. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  157. hs_mapped_irq[irq].old_handler->shutdown(irq);
  158. }
  159. static void hs_enable_irq(unsigned int irq)
  160. {
  161. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  162. hs_mapped_irq[irq].old_handler->enable(irq);
  163. }
  164. static void hs_disable_irq(unsigned int irq)
  165. {
  166. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  167. hs_mapped_irq[irq].old_handler->disable(irq);
  168. }
  169. extern struct hw_interrupt_type no_irq_type;
  170. static void hs_mask_and_ack_irq(unsigned int irq)
  171. {
  172. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  173. /* ack_none() spuriously complains about an unexpected IRQ */
  174. if (hs_mapped_irq[irq].old_handler != &no_irq_type)
  175. hs_mapped_irq[irq].old_handler->ack(irq);
  176. }
  177. static void hs_end_irq(unsigned int irq)
  178. {
  179. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  180. hs_mapped_irq[irq].old_handler->end(irq);
  181. }
  182. static struct hw_interrupt_type hd64465_ss_irq_type = {
  183. .typename = "PCMCIA-IRQ",
  184. .startup = hs_startup_irq,
  185. .shutdown = hs_shutdown_irq,
  186. .enable = hs_enable_irq,
  187. .disable = hs_disable_irq,
  188. .ack = hs_mask_and_ack_irq,
  189. .end = hs_end_irq
  190. };
  191. /*
  192. * This function should only ever be called with interrupts disabled.
  193. */
  194. static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
  195. {
  196. DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
  197. if (irq >= HS_NUM_MAPPED_IRQS)
  198. return;
  199. hs_mapped_irq[irq].sock = sp;
  200. /* insert ourselves as the irq controller */
  201. hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
  202. irq_desc[irq].chip = &hd64465_ss_irq_type;
  203. }
  204. /*
  205. * This function should only ever be called with interrupts disabled.
  206. */
  207. static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
  208. {
  209. DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
  210. if (irq >= HS_NUM_MAPPED_IRQS)
  211. return;
  212. /* restore the original irq controller */
  213. irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
  214. }
  215. /*============================================================*/
  216. /*
  217. * Set Vpp and Vcc (in tenths of a Volt). Does not
  218. * support the hi-Z state.
  219. *
  220. * Note, this assumes the board uses a TPS2206 chip to control
  221. * the Vcc and Vpp voltages to the hs_sockets. If your board
  222. * uses the MIC2563 (also supported by the HD64465) then you
  223. * will have to modify this function.
  224. */
  225. /* 0V 3.3V 5.5V */
  226. static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
  227. static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
  228. static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
  229. {
  230. u_int psr;
  231. u_int vcci = 0;
  232. u_int sock = sp->number;
  233. DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
  234. switch (Vcc)
  235. {
  236. case 0: vcci = 0; break;
  237. case 33: vcci = 1; break;
  238. case 50: vcci = 2; break;
  239. default: return 0;
  240. }
  241. /* Note: Vpp = 120 not supported -- Greg Banks */
  242. if (Vpp != 0 && Vpp != Vcc)
  243. return 0;
  244. /* The PSR register holds 8 of the 9 bits which control
  245. * the TPS2206 via its serial interface.
  246. */
  247. psr = inw(HD64465_REG_PCCPSR);
  248. switch (sock)
  249. {
  250. case 0:
  251. psr &= 0x0f;
  252. psr |= hs_tps2206_avcc[vcci];
  253. psr |= (Vpp == 0 ? 0x00 : 0x02);
  254. break;
  255. case 1:
  256. psr &= 0xf0;
  257. psr |= hs_tps2206_bvcc[vcci];
  258. psr |= (Vpp == 0 ? 0x00 : 0x20);
  259. break;
  260. };
  261. outw(psr, HD64465_REG_PCCPSR);
  262. return 1;
  263. }
  264. /*============================================================*/
  265. /*
  266. * Drive the RESET line to the card.
  267. */
  268. static void hs_reset_socket(hs_socket_t *sp, int on)
  269. {
  270. unsigned short v;
  271. v = hs_in(sp, GCR);
  272. if (on)
  273. v |= HD64465_PCCGCR_PCCR;
  274. else
  275. v &= ~HD64465_PCCGCR_PCCR;
  276. hs_out(sp, v, GCR);
  277. }
  278. /*============================================================*/
  279. static int hs_init(struct pcmcia_socket *s)
  280. {
  281. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  282. DPRINTK("hs_init(%d)\n", sp->number);
  283. return 0;
  284. }
  285. /*============================================================*/
  286. static int hs_get_status(struct pcmcia_socket *s, u_int *value)
  287. {
  288. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  289. unsigned int isr;
  290. u_int status = 0;
  291. isr = hs_in(sp, ISR);
  292. /* Card is seated and powered when *both* CD pins are low */
  293. if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
  294. {
  295. status |= SS_DETECT; /* card present */
  296. switch (isr & HD64465_PCCISR_PBVD_MASK)
  297. {
  298. case HD64465_PCCISR_PBVD_BATGOOD:
  299. break;
  300. case HD64465_PCCISR_PBVD_BATWARN:
  301. status |= SS_BATWARN;
  302. break;
  303. default:
  304. status |= SS_BATDEAD;
  305. break;
  306. }
  307. if (isr & HD64465_PCCISR_PREADY)
  308. status |= SS_READY;
  309. if (isr & HD64465_PCCISR_PMWP)
  310. status |= SS_WRPROT;
  311. /* Voltage Select pins interpreted as per Table 4-5 of the std.
  312. * Assuming we have the TPS2206, the socket is a "Low Voltage
  313. * key, 3.3V and 5V available, no X.XV available".
  314. */
  315. switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
  316. {
  317. case HD64465_PCCISR_PVS1:
  318. printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
  319. status = 0;
  320. break;
  321. case 0:
  322. case HD64465_PCCISR_PVS2:
  323. /* 3.3V */
  324. status |= SS_3VCARD;
  325. break;
  326. case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
  327. /* 5V */
  328. break;
  329. }
  330. /* TODO: SS_POWERON */
  331. /* TODO: SS_STSCHG */
  332. }
  333. DPRINTK("hs_get_status(%d) = %x\n", sock, status);
  334. *value = status;
  335. return 0;
  336. }
  337. /*============================================================*/
  338. static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
  339. {
  340. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  341. u_long flags;
  342. u_int changed;
  343. unsigned short cscier;
  344. DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
  345. sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
  346. local_irq_save(flags); /* Don't want interrupts happening here */
  347. if (state->Vpp != sp->state.Vpp ||
  348. state->Vcc != sp->state.Vcc) {
  349. if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
  350. local_irq_restore(flags);
  351. return -EINVAL;
  352. }
  353. }
  354. /* hd64465_io_debug = 1; */
  355. /*
  356. * Handle changes in the Card Status Change mask,
  357. * by propagating to the CSCR register
  358. */
  359. changed = sp->state.csc_mask ^ state->csc_mask;
  360. cscier = hs_in(sp, CSCIER);
  361. if (changed & SS_DETECT) {
  362. if (state->csc_mask & SS_DETECT)
  363. cscier |= HD64465_PCCCSCIER_PCDE;
  364. else
  365. cscier &= ~HD64465_PCCCSCIER_PCDE;
  366. }
  367. if (changed & SS_READY) {
  368. if (state->csc_mask & SS_READY)
  369. cscier |= HD64465_PCCCSCIER_PRE;
  370. else
  371. cscier &= ~HD64465_PCCCSCIER_PRE;
  372. }
  373. if (changed & SS_BATDEAD) {
  374. if (state->csc_mask & SS_BATDEAD)
  375. cscier |= HD64465_PCCCSCIER_PBDE;
  376. else
  377. cscier &= ~HD64465_PCCCSCIER_PBDE;
  378. }
  379. if (changed & SS_BATWARN) {
  380. if (state->csc_mask & SS_BATWARN)
  381. cscier |= HD64465_PCCCSCIER_PBWE;
  382. else
  383. cscier &= ~HD64465_PCCCSCIER_PBWE;
  384. }
  385. if (changed & SS_STSCHG) {
  386. if (state->csc_mask & SS_STSCHG)
  387. cscier |= HD64465_PCCCSCIER_PSCE;
  388. else
  389. cscier &= ~HD64465_PCCCSCIER_PSCE;
  390. }
  391. hs_out(sp, cscier, CSCIER);
  392. if (sp->state.io_irq && !state->io_irq)
  393. hs_unmap_irq(sp, sp->state.io_irq);
  394. else if (!sp->state.io_irq && state->io_irq)
  395. hs_map_irq(sp, state->io_irq);
  396. /*
  397. * Handle changes in the flags field,
  398. * by propagating to config registers.
  399. */
  400. changed = sp->state.flags ^ state->flags;
  401. if (changed & SS_IOCARD) {
  402. DPRINTK("card type: %s\n",
  403. (state->flags & SS_IOCARD ? "i/o" : "memory" ));
  404. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
  405. state->flags & SS_IOCARD);
  406. }
  407. if (changed & SS_RESET) {
  408. DPRINTK("%s reset card\n",
  409. (state->flags & SS_RESET ? "start" : "stop"));
  410. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
  411. state->flags & SS_RESET);
  412. }
  413. if (changed & SS_OUTPUT_ENA) {
  414. DPRINTK("%sabling card output\n",
  415. (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
  416. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
  417. state->flags & SS_OUTPUT_ENA);
  418. }
  419. /* TODO: SS_SPKR_ENA */
  420. /* hd64465_io_debug = 0; */
  421. sp->state = *state;
  422. local_irq_restore(flags);
  423. #if HD64465_DEBUG > 10
  424. if (state->flags & SS_OUTPUT_ENA)
  425. cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
  426. #endif
  427. return 0;
  428. }
  429. /*============================================================*/
  430. static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
  431. {
  432. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  433. int map = io->map;
  434. int sock = sp->number;
  435. struct pccard_io_map *sio;
  436. pgprot_t prot;
  437. DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
  438. sock, map, io->flags, io->speed, io->start, io->stop);
  439. if (map >= MAX_IO_WIN)
  440. return -EINVAL;
  441. sio = &sp->io_maps[map];
  442. /* check for null changes */
  443. if (io->flags == sio->flags &&
  444. io->start == sio->start &&
  445. io->stop == sio->stop)
  446. return 0;
  447. if (io->flags & MAP_AUTOSZ)
  448. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
  449. else if (io->flags & MAP_16BIT)
  450. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
  451. else
  452. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
  453. /* TODO: handle MAP_USE_WAIT */
  454. if (io->flags & MAP_USE_WAIT)
  455. printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
  456. /* TODO: handle MAP_PREFETCH */
  457. if (io->flags & MAP_PREFETCH)
  458. printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
  459. /* TODO: handle MAP_WRPROT */
  460. if (io->flags & MAP_WRPROT)
  461. printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
  462. /* TODO: handle MAP_0WS */
  463. if (io->flags & MAP_0WS)
  464. printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
  465. if (io->flags & MAP_ACTIVE) {
  466. unsigned long pstart, psize, paddrbase;
  467. paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
  468. pstart = io->start & PAGE_MASK;
  469. psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
  470. /*
  471. * Change PTEs in only that portion of the mapping requested
  472. * by the caller. This means that most of the time, most of
  473. * the PTEs in the io_vma will be unmapped and only the bottom
  474. * page will be mapped. But the code allows for weird cards
  475. * that might want IO ports > 4K.
  476. */
  477. sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
  478. /*
  479. * Change the mapping used by inb() outb() etc
  480. */
  481. hd64465_port_map(io->start,
  482. io->stop - io->start + 1,
  483. (unsigned long)sp->io_base + io->start, 0);
  484. } else {
  485. hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
  486. p3_iounmap(sp->io_base);
  487. }
  488. *sio = *io;
  489. return 0;
  490. }
  491. /*============================================================*/
  492. static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
  493. {
  494. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  495. struct pccard_mem_map *smem;
  496. int map = mem->map;
  497. unsigned long paddr;
  498. #if 0
  499. DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
  500. sock, map, mem->flags, mem->card_start);
  501. #endif
  502. if (map >= MAX_WIN)
  503. return -EINVAL;
  504. smem = &sp->mem_maps[map];
  505. paddr = sp->mem_base; /* base of Attribute mapping */
  506. if (!(mem->flags & MAP_ATTRIB))
  507. paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
  508. paddr += mem->card_start;
  509. /* Because we specified SS_CAP_STATIC_MAP, we are obliged
  510. * at this time to report the system address corresponding
  511. * to the card address requested. This is how Socket Services
  512. * queries our fixed mapping. I wish this fact had been
  513. * documented - Greg Banks.
  514. */
  515. mem->static_start = paddr;
  516. *smem = *mem;
  517. return 0;
  518. }
  519. /* TODO: do we need to use the MMU to access Common memory ??? */
  520. /*============================================================*/
  521. /*
  522. * This function is registered with the HD64465 glue code to do a
  523. * secondary demux step on the PCMCIA interrupts. It handles
  524. * mapping the IREQ request from the card to a standard Linux
  525. * IRQ, as requested by SocketServices.
  526. */
  527. static int hs_irq_demux(int irq, void *dev)
  528. {
  529. hs_socket_t *sp = dev;
  530. u_int cscr;
  531. DPRINTK("hs_irq_demux(irq=%d)\n", irq);
  532. if (sp->state.io_irq &&
  533. (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
  534. cscr &= ~HD64465_PCCCSCR_PIREQ;
  535. hs_out(sp, cscr, CSCR);
  536. return sp->state.io_irq;
  537. }
  538. return irq;
  539. }
  540. /*============================================================*/
  541. /*
  542. * Interrupt handling routine.
  543. */
  544. static irqreturn_t hs_interrupt(int irq, void *dev)
  545. {
  546. hs_socket_t *sp = dev;
  547. u_int events = 0;
  548. u_int cscr;
  549. cscr = hs_in(sp, CSCR);
  550. DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
  551. /* check for bus-related changes to be reported to Socket Services */
  552. if (cscr & HD64465_PCCCSCR_PCDC) {
  553. /* double-check for a 16-bit card, as we don't support CardBus */
  554. if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
  555. printk(KERN_NOTICE MODNAME
  556. ": socket %d, card not a supported card type or not inserted correctly\n",
  557. sp->number);
  558. /* Don't do the rest unless a card is present */
  559. cscr &= ~(HD64465_PCCCSCR_PCDC|
  560. HD64465_PCCCSCR_PRC|
  561. HD64465_PCCCSCR_PBW|
  562. HD64465_PCCCSCR_PBD|
  563. HD64465_PCCCSCR_PSC);
  564. } else {
  565. cscr &= ~HD64465_PCCCSCR_PCDC;
  566. events |= SS_DETECT; /* card insertion or removal */
  567. }
  568. }
  569. if (cscr & HD64465_PCCCSCR_PRC) {
  570. cscr &= ~HD64465_PCCCSCR_PRC;
  571. events |= SS_READY; /* ready signal changed */
  572. }
  573. if (cscr & HD64465_PCCCSCR_PBW) {
  574. cscr &= ~HD64465_PCCCSCR_PSC;
  575. events |= SS_BATWARN; /* battery warning */
  576. }
  577. if (cscr & HD64465_PCCCSCR_PBD) {
  578. cscr &= ~HD64465_PCCCSCR_PSC;
  579. events |= SS_BATDEAD; /* battery dead */
  580. }
  581. if (cscr & HD64465_PCCCSCR_PSC) {
  582. cscr &= ~HD64465_PCCCSCR_PSC;
  583. events |= SS_STSCHG; /* STSCHG (status changed) signal */
  584. }
  585. if (cscr & HD64465_PCCCSCR_PIREQ) {
  586. cscr &= ~HD64465_PCCCSCR_PIREQ;
  587. /* This should have been dealt with during irq demux */
  588. printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
  589. }
  590. hs_out(sp, cscr, CSCR);
  591. if (events)
  592. pcmcia_parse_events(&sp->socket, events);
  593. return IRQ_HANDLED;
  594. }
  595. /*============================================================*/
  596. static struct pccard_operations hs_operations = {
  597. .init = hs_init,
  598. .get_status = hs_get_status,
  599. .set_socket = hs_set_socket,
  600. .set_io_map = hs_set_io_map,
  601. .set_mem_map = hs_set_mem_map,
  602. };
  603. static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
  604. unsigned int ctrl_base)
  605. {
  606. unsigned short v;
  607. int i, err;
  608. memset(sp, 0, sizeof(*sp));
  609. sp->irq = irq;
  610. sp->mem_base = mem_base;
  611. sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
  612. sp->ctrl_base = ctrl_base;
  613. for (i=0 ; i<MAX_IO_WIN ; i++)
  614. sp->io_maps[i].map = i;
  615. for (i=0 ; i<MAX_WIN ; i++)
  616. sp->mem_maps[i].map = i;
  617. hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
  618. if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0)
  619. return err;
  620. if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
  621. sp->mem_base = 0;
  622. return -ENOMEM;
  623. }
  624. /* According to section 3.2 of the PCMCIA standard, low-voltage
  625. * capable cards must implement cold insertion, i.e. Vpp and
  626. * Vcc set to 0 before card is inserted.
  627. */
  628. /*hs_set_voltages(sp, 0, 0);*/
  629. /* hi-Z the outputs to the card and set 16MB map mode */
  630. v = hs_in(sp, GCR);
  631. v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
  632. hs_out(sp, v, GCR);
  633. v = hs_in(sp, GCR);
  634. v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
  635. hs_out(sp, v, GCR);
  636. v = hs_in(sp, GCR);
  637. v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
  638. hs_out(sp, v, GCR);
  639. v = hs_in(sp, GCR);
  640. /* lowest 16MB of Common */
  641. v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
  642. hs_out(sp, v, GCR);
  643. hs_reset_socket(sp, 1);
  644. printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
  645. i, sp->mem_base, sp->irq);
  646. return 0;
  647. }
  648. static void hs_exit_socket(hs_socket_t *sp)
  649. {
  650. unsigned short cscier, gcr;
  651. unsigned long flags;
  652. local_irq_save(flags);
  653. /* turn off interrupts in hardware */
  654. cscier = hs_in(sp, CSCIER);
  655. cscier = (cscier & IER_MASK) | IER_OFF;
  656. hs_out(sp, cscier, CSCIER);
  657. /* hi-Z the outputs to the card */
  658. gcr = hs_in(sp, GCR);
  659. gcr &= HD64465_PCCGCR_PDRV;
  660. hs_out(sp, gcr, GCR);
  661. /* power the card down */
  662. hs_set_voltages(sp, 0, 0);
  663. if (sp->mem_base != 0)
  664. release_mem_region(sp->mem_base, sp->mem_length);
  665. if (sp->irq != 0) {
  666. free_irq(sp->irq, hs_interrupt);
  667. hd64465_unregister_irq_demux(sp->irq);
  668. }
  669. local_irq_restore(flags);
  670. }
  671. static struct device_driver hd64465_driver = {
  672. .name = "hd64465-pcmcia",
  673. .bus = &platform_bus_type,
  674. .suspend = pcmcia_socket_dev_suspend,
  675. .resume = pcmcia_socket_dev_resume,
  676. };
  677. static struct platform_device hd64465_device = {
  678. .name = "hd64465-pcmcia",
  679. .id = 0,
  680. };
  681. static int __init init_hs(void)
  682. {
  683. int i;
  684. unsigned short v;
  685. /* hd64465_io_debug = 1; */
  686. if (driver_register(&hd64465_driver))
  687. return -EINVAL;
  688. /* Wake both sockets out of STANDBY mode */
  689. /* TODO: wait 15ms */
  690. v = inw(HD64465_REG_SMSCR);
  691. v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
  692. outw(v, HD64465_REG_SMSCR);
  693. /* keep power controller out of shutdown mode */
  694. v = inb(HD64465_REG_PCC0SCR);
  695. v |= HD64465_PCCSCR_SHDN;
  696. outb(v, HD64465_REG_PCC0SCR);
  697. /* use serial (TPS2206) power controller */
  698. v = inb(HD64465_REG_PCC0CSCR);
  699. v |= HD64465_PCCCSCR_PSWSEL;
  700. outb(v, HD64465_REG_PCC0CSCR);
  701. /*
  702. * Setup hs_sockets[] structures and request system resources.
  703. * TODO: on memory allocation failure, power down the socket
  704. * before quitting.
  705. */
  706. for (i=0; i<HS_MAX_SOCKETS; i++) {
  707. hs_set_voltages(&hs_sockets[i], 0, 0);
  708. hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
  709. hs_sockets[i].socket.resource_ops = &pccard_static_ops;
  710. hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
  711. hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
  712. hs_sockets[i].socket.owner = THIS_MODULE;
  713. hs_sockets[i].socket.ss_entry = &hs_operations;
  714. }
  715. i = hs_init_socket(&hs_sockets[0],
  716. HD64465_IRQ_PCMCIA0,
  717. HD64465_PCC0_BASE,
  718. HD64465_REG_PCC0ISR);
  719. if (i < 0) {
  720. unregister_driver(&hd64465_driver);
  721. return i;
  722. }
  723. i = hs_init_socket(&hs_sockets[1],
  724. HD64465_IRQ_PCMCIA1,
  725. HD64465_PCC1_BASE,
  726. HD64465_REG_PCC1ISR);
  727. if (i < 0) {
  728. unregister_driver(&hd64465_driver);
  729. return i;
  730. }
  731. /* hd64465_io_debug = 0; */
  732. platform_device_register(&hd64465_device);
  733. for (i=0; i<HS_MAX_SOCKETS; i++) {
  734. unsigned int ret;
  735. hs_sockets[i].socket.dev.parent = &hd64465_device.dev;
  736. hs_sockets[i].number = i;
  737. ret = pcmcia_register_socket(&hs_sockets[i].socket);
  738. if (ret && i)
  739. pcmcia_unregister_socket(&hs_sockets[0].socket);
  740. }
  741. return 0;
  742. }
  743. static void __exit exit_hs(void)
  744. {
  745. int i;
  746. for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
  747. pcmcia_unregister_socket(&hs_sockets[i].socket);
  748. hs_exit_socket(&hs_sockets[i]);
  749. }
  750. platform_device_unregister(&hd64465_device);
  751. unregister_driver(&hd64465_driver);
  752. }
  753. module_init(init_hs);
  754. module_exit(exit_hs);
  755. /*============================================================*/
  756. /*END*/