pci-sysfs.c 38 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. } \
  42. static DEVICE_ATTR_RO(field)
  43. pci_config_attr(vendor, "0x%04x\n");
  44. pci_config_attr(device, "0x%04x\n");
  45. pci_config_attr(subsystem_vendor, "0x%04x\n");
  46. pci_config_attr(subsystem_device, "0x%04x\n");
  47. pci_config_attr(class, "0x%06x\n");
  48. pci_config_attr(irq, "%u\n");
  49. static ssize_t broken_parity_status_show(struct device *dev,
  50. struct device_attribute *attr,
  51. char *buf)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  55. }
  56. static ssize_t broken_parity_status_store(struct device *dev,
  57. struct device_attribute *attr,
  58. const char *buf, size_t count)
  59. {
  60. struct pci_dev *pdev = to_pci_dev(dev);
  61. unsigned long val;
  62. if (kstrtoul(buf, 0, &val) < 0)
  63. return -EINVAL;
  64. pdev->broken_parity_status = !!val;
  65. return count;
  66. }
  67. static DEVICE_ATTR_RW(broken_parity_status);
  68. static ssize_t local_cpus_show(struct device *dev,
  69. struct device_attribute *attr, char *buf)
  70. {
  71. const struct cpumask *mask;
  72. int len;
  73. #ifdef CONFIG_NUMA
  74. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  75. cpumask_of_node(dev_to_node(dev));
  76. #else
  77. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  78. #endif
  79. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  80. buf[len++] = '\n';
  81. buf[len] = '\0';
  82. return len;
  83. }
  84. static DEVICE_ATTR_RO(local_cpus);
  85. static ssize_t local_cpulist_show(struct device *dev,
  86. struct device_attribute *attr, char *buf)
  87. {
  88. const struct cpumask *mask;
  89. int len;
  90. #ifdef CONFIG_NUMA
  91. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  92. cpumask_of_node(dev_to_node(dev));
  93. #else
  94. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  95. #endif
  96. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  97. buf[len++] = '\n';
  98. buf[len] = '\0';
  99. return len;
  100. }
  101. static DEVICE_ATTR_RO(local_cpulist);
  102. /*
  103. * PCI Bus Class Devices
  104. */
  105. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  106. int type,
  107. struct device_attribute *attr,
  108. char *buf)
  109. {
  110. int ret;
  111. const struct cpumask *cpumask;
  112. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  113. ret = type ?
  114. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  115. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  116. buf[ret++] = '\n';
  117. buf[ret] = '\0';
  118. return ret;
  119. }
  120. static ssize_t cpuaffinity_show(struct device *dev,
  121. struct device_attribute *attr, char *buf)
  122. {
  123. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  124. }
  125. static DEVICE_ATTR_RO(cpuaffinity);
  126. static ssize_t cpulistaffinity_show(struct device *dev,
  127. struct device_attribute *attr, char *buf)
  128. {
  129. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  130. }
  131. static DEVICE_ATTR_RO(cpulistaffinity);
  132. /* show resources */
  133. static ssize_t
  134. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  135. {
  136. struct pci_dev * pci_dev = to_pci_dev(dev);
  137. char * str = buf;
  138. int i;
  139. int max;
  140. resource_size_t start, end;
  141. if (pci_dev->subordinate)
  142. max = DEVICE_COUNT_RESOURCE;
  143. else
  144. max = PCI_BRIDGE_RESOURCES;
  145. for (i = 0; i < max; i++) {
  146. struct resource *res = &pci_dev->resource[i];
  147. pci_resource_to_user(pci_dev, i, res, &start, &end);
  148. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  149. (unsigned long long)start,
  150. (unsigned long long)end,
  151. (unsigned long long)res->flags);
  152. }
  153. return (str - buf);
  154. }
  155. static DEVICE_ATTR_RO(resource);
  156. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  157. {
  158. struct pci_dev *pci_dev = to_pci_dev(dev);
  159. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  160. pci_dev->vendor, pci_dev->device,
  161. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  162. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  163. (u8)(pci_dev->class));
  164. }
  165. static DEVICE_ATTR_RO(modalias);
  166. static ssize_t enabled_store(struct device *dev,
  167. struct device_attribute *attr, const char *buf,
  168. size_t count)
  169. {
  170. struct pci_dev *pdev = to_pci_dev(dev);
  171. unsigned long val;
  172. ssize_t result = kstrtoul(buf, 0, &val);
  173. if (result < 0)
  174. return result;
  175. /* this can crash the machine when done on the "wrong" device */
  176. if (!capable(CAP_SYS_ADMIN))
  177. return -EPERM;
  178. if (!val) {
  179. if (pci_is_enabled(pdev))
  180. pci_disable_device(pdev);
  181. else
  182. result = -EIO;
  183. } else
  184. result = pci_enable_device(pdev);
  185. return result < 0 ? result : count;
  186. }
  187. static ssize_t enabled_show(struct device *dev,
  188. struct device_attribute *attr, char *buf)
  189. {
  190. struct pci_dev *pdev;
  191. pdev = to_pci_dev (dev);
  192. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  193. }
  194. static DEVICE_ATTR_RW(enabled);
  195. #ifdef CONFIG_NUMA
  196. static ssize_t
  197. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  198. {
  199. return sprintf (buf, "%d\n", dev->numa_node);
  200. }
  201. static DEVICE_ATTR_RO(numa_node);
  202. #endif
  203. static ssize_t
  204. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  205. {
  206. struct pci_dev *pdev = to_pci_dev(dev);
  207. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  208. }
  209. static DEVICE_ATTR_RO(dma_mask_bits);
  210. static ssize_t
  211. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  212. char *buf)
  213. {
  214. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  215. }
  216. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  217. static ssize_t
  218. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. if (!pdev->subordinate)
  222. return 0;
  223. return sprintf (buf, "%u\n",
  224. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  225. }
  226. static ssize_t
  227. msi_bus_store(struct device *dev, struct device_attribute *attr,
  228. const char *buf, size_t count)
  229. {
  230. struct pci_dev *pdev = to_pci_dev(dev);
  231. unsigned long val;
  232. if (kstrtoul(buf, 0, &val) < 0)
  233. return -EINVAL;
  234. /* bad things may happen if the no_msi flag is changed
  235. * while some drivers are loaded */
  236. if (!capable(CAP_SYS_ADMIN))
  237. return -EPERM;
  238. /* Maybe pci devices without subordinate busses shouldn't even have this
  239. * attribute in the first place? */
  240. if (!pdev->subordinate)
  241. return count;
  242. /* Is the flag going to change, or keep the value it already had? */
  243. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  244. !!val) {
  245. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  246. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  247. " bad things could happen\n", val ? "" : " not");
  248. }
  249. return count;
  250. }
  251. static DEVICE_ATTR_RW(msi_bus);
  252. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  253. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  254. size_t count)
  255. {
  256. unsigned long val;
  257. struct pci_bus *b = NULL;
  258. if (kstrtoul(buf, 0, &val) < 0)
  259. return -EINVAL;
  260. if (val) {
  261. mutex_lock(&pci_remove_rescan_mutex);
  262. while ((b = pci_find_next_bus(b)) != NULL)
  263. pci_rescan_bus(b);
  264. mutex_unlock(&pci_remove_rescan_mutex);
  265. }
  266. return count;
  267. }
  268. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  269. static struct attribute *pci_bus_attrs[] = {
  270. &bus_attr_rescan.attr,
  271. NULL,
  272. };
  273. static const struct attribute_group pci_bus_group = {
  274. .attrs = pci_bus_attrs,
  275. };
  276. const struct attribute_group *pci_bus_groups[] = {
  277. &pci_bus_group,
  278. NULL,
  279. };
  280. static ssize_t
  281. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  282. const char *buf, size_t count)
  283. {
  284. unsigned long val;
  285. struct pci_dev *pdev = to_pci_dev(dev);
  286. if (kstrtoul(buf, 0, &val) < 0)
  287. return -EINVAL;
  288. if (val) {
  289. mutex_lock(&pci_remove_rescan_mutex);
  290. pci_rescan_bus(pdev->bus);
  291. mutex_unlock(&pci_remove_rescan_mutex);
  292. }
  293. return count;
  294. }
  295. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  296. (S_IWUSR|S_IWGRP),
  297. NULL, dev_rescan_store);
  298. static void remove_callback(struct device *dev)
  299. {
  300. struct pci_dev *pdev = to_pci_dev(dev);
  301. mutex_lock(&pci_remove_rescan_mutex);
  302. pci_stop_and_remove_bus_device(pdev);
  303. mutex_unlock(&pci_remove_rescan_mutex);
  304. }
  305. static ssize_t
  306. remove_store(struct device *dev, struct device_attribute *dummy,
  307. const char *buf, size_t count)
  308. {
  309. int ret = 0;
  310. unsigned long val;
  311. if (kstrtoul(buf, 0, &val) < 0)
  312. return -EINVAL;
  313. /* An attribute cannot be unregistered by one of its own methods,
  314. * so we have to use this roundabout approach.
  315. */
  316. if (val)
  317. ret = device_schedule_callback(dev, remove_callback);
  318. if (ret)
  319. count = ret;
  320. return count;
  321. }
  322. static struct device_attribute dev_remove_attr = __ATTR(remove,
  323. (S_IWUSR|S_IWGRP),
  324. NULL, remove_store);
  325. static ssize_t
  326. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  327. const char *buf, size_t count)
  328. {
  329. unsigned long val;
  330. struct pci_bus *bus = to_pci_bus(dev);
  331. if (kstrtoul(buf, 0, &val) < 0)
  332. return -EINVAL;
  333. if (val) {
  334. mutex_lock(&pci_remove_rescan_mutex);
  335. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  336. pci_rescan_bus_bridge_resize(bus->self);
  337. else
  338. pci_rescan_bus(bus);
  339. mutex_unlock(&pci_remove_rescan_mutex);
  340. }
  341. return count;
  342. }
  343. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  344. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  345. static ssize_t d3cold_allowed_store(struct device *dev,
  346. struct device_attribute *attr,
  347. const char *buf, size_t count)
  348. {
  349. struct pci_dev *pdev = to_pci_dev(dev);
  350. unsigned long val;
  351. if (kstrtoul(buf, 0, &val) < 0)
  352. return -EINVAL;
  353. pdev->d3cold_allowed = !!val;
  354. pm_runtime_resume(dev);
  355. return count;
  356. }
  357. static ssize_t d3cold_allowed_show(struct device *dev,
  358. struct device_attribute *attr, char *buf)
  359. {
  360. struct pci_dev *pdev = to_pci_dev(dev);
  361. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  362. }
  363. static DEVICE_ATTR_RW(d3cold_allowed);
  364. #endif
  365. #ifdef CONFIG_PCI_IOV
  366. static ssize_t sriov_totalvfs_show(struct device *dev,
  367. struct device_attribute *attr,
  368. char *buf)
  369. {
  370. struct pci_dev *pdev = to_pci_dev(dev);
  371. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  372. }
  373. static ssize_t sriov_numvfs_show(struct device *dev,
  374. struct device_attribute *attr,
  375. char *buf)
  376. {
  377. struct pci_dev *pdev = to_pci_dev(dev);
  378. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  379. }
  380. /*
  381. * num_vfs > 0; number of VFs to enable
  382. * num_vfs = 0; disable all VFs
  383. *
  384. * Note: SRIOV spec doesn't allow partial VF
  385. * disable, so it's all or none.
  386. */
  387. static ssize_t sriov_numvfs_store(struct device *dev,
  388. struct device_attribute *attr,
  389. const char *buf, size_t count)
  390. {
  391. struct pci_dev *pdev = to_pci_dev(dev);
  392. int ret;
  393. u16 num_vfs;
  394. ret = kstrtou16(buf, 0, &num_vfs);
  395. if (ret < 0)
  396. return ret;
  397. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  398. return -ERANGE;
  399. if (num_vfs == pdev->sriov->num_VFs)
  400. return count; /* no change */
  401. /* is PF driver loaded w/callback */
  402. if (!pdev->driver || !pdev->driver->sriov_configure) {
  403. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  404. return -ENOSYS;
  405. }
  406. if (num_vfs == 0) {
  407. /* disable VFs */
  408. ret = pdev->driver->sriov_configure(pdev, 0);
  409. if (ret < 0)
  410. return ret;
  411. return count;
  412. }
  413. /* enable VFs */
  414. if (pdev->sriov->num_VFs) {
  415. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  416. pdev->sriov->num_VFs, num_vfs);
  417. return -EBUSY;
  418. }
  419. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  420. if (ret < 0)
  421. return ret;
  422. if (ret != num_vfs)
  423. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  424. num_vfs, ret);
  425. return count;
  426. }
  427. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  428. static struct device_attribute sriov_numvfs_attr =
  429. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  430. sriov_numvfs_show, sriov_numvfs_store);
  431. #endif /* CONFIG_PCI_IOV */
  432. static struct attribute *pci_dev_attrs[] = {
  433. &dev_attr_resource.attr,
  434. &dev_attr_vendor.attr,
  435. &dev_attr_device.attr,
  436. &dev_attr_subsystem_vendor.attr,
  437. &dev_attr_subsystem_device.attr,
  438. &dev_attr_class.attr,
  439. &dev_attr_irq.attr,
  440. &dev_attr_local_cpus.attr,
  441. &dev_attr_local_cpulist.attr,
  442. &dev_attr_modalias.attr,
  443. #ifdef CONFIG_NUMA
  444. &dev_attr_numa_node.attr,
  445. #endif
  446. &dev_attr_dma_mask_bits.attr,
  447. &dev_attr_consistent_dma_mask_bits.attr,
  448. &dev_attr_enabled.attr,
  449. &dev_attr_broken_parity_status.attr,
  450. &dev_attr_msi_bus.attr,
  451. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  452. &dev_attr_d3cold_allowed.attr,
  453. #endif
  454. NULL,
  455. };
  456. static const struct attribute_group pci_dev_group = {
  457. .attrs = pci_dev_attrs,
  458. };
  459. const struct attribute_group *pci_dev_groups[] = {
  460. &pci_dev_group,
  461. NULL,
  462. };
  463. static struct attribute *pcibus_attrs[] = {
  464. &dev_attr_rescan.attr,
  465. &dev_attr_cpuaffinity.attr,
  466. &dev_attr_cpulistaffinity.attr,
  467. NULL,
  468. };
  469. static const struct attribute_group pcibus_group = {
  470. .attrs = pcibus_attrs,
  471. };
  472. const struct attribute_group *pcibus_groups[] = {
  473. &pcibus_group,
  474. NULL,
  475. };
  476. static ssize_t
  477. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  478. {
  479. struct pci_dev *pdev = to_pci_dev(dev);
  480. struct pci_dev *vga_dev = vga_default_device();
  481. if (vga_dev)
  482. return sprintf(buf, "%u\n", (pdev == vga_dev));
  483. return sprintf(buf, "%u\n",
  484. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  485. IORESOURCE_ROM_SHADOW));
  486. }
  487. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  488. static ssize_t
  489. pci_read_config(struct file *filp, struct kobject *kobj,
  490. struct bin_attribute *bin_attr,
  491. char *buf, loff_t off, size_t count)
  492. {
  493. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  494. unsigned int size = 64;
  495. loff_t init_off = off;
  496. u8 *data = (u8*) buf;
  497. /* Several chips lock up trying to read undefined config space */
  498. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  499. size = dev->cfg_size;
  500. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  501. size = 128;
  502. }
  503. if (off > size)
  504. return 0;
  505. if (off + count > size) {
  506. size -= off;
  507. count = size;
  508. } else {
  509. size = count;
  510. }
  511. pci_config_pm_runtime_get(dev);
  512. if ((off & 1) && size) {
  513. u8 val;
  514. pci_user_read_config_byte(dev, off, &val);
  515. data[off - init_off] = val;
  516. off++;
  517. size--;
  518. }
  519. if ((off & 3) && size > 2) {
  520. u16 val;
  521. pci_user_read_config_word(dev, off, &val);
  522. data[off - init_off] = val & 0xff;
  523. data[off - init_off + 1] = (val >> 8) & 0xff;
  524. off += 2;
  525. size -= 2;
  526. }
  527. while (size > 3) {
  528. u32 val;
  529. pci_user_read_config_dword(dev, off, &val);
  530. data[off - init_off] = val & 0xff;
  531. data[off - init_off + 1] = (val >> 8) & 0xff;
  532. data[off - init_off + 2] = (val >> 16) & 0xff;
  533. data[off - init_off + 3] = (val >> 24) & 0xff;
  534. off += 4;
  535. size -= 4;
  536. }
  537. if (size >= 2) {
  538. u16 val;
  539. pci_user_read_config_word(dev, off, &val);
  540. data[off - init_off] = val & 0xff;
  541. data[off - init_off + 1] = (val >> 8) & 0xff;
  542. off += 2;
  543. size -= 2;
  544. }
  545. if (size > 0) {
  546. u8 val;
  547. pci_user_read_config_byte(dev, off, &val);
  548. data[off - init_off] = val;
  549. off++;
  550. --size;
  551. }
  552. pci_config_pm_runtime_put(dev);
  553. return count;
  554. }
  555. static ssize_t
  556. pci_write_config(struct file* filp, struct kobject *kobj,
  557. struct bin_attribute *bin_attr,
  558. char *buf, loff_t off, size_t count)
  559. {
  560. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  561. unsigned int size = count;
  562. loff_t init_off = off;
  563. u8 *data = (u8*) buf;
  564. if (off > dev->cfg_size)
  565. return 0;
  566. if (off + count > dev->cfg_size) {
  567. size = dev->cfg_size - off;
  568. count = size;
  569. }
  570. pci_config_pm_runtime_get(dev);
  571. if ((off & 1) && size) {
  572. pci_user_write_config_byte(dev, off, data[off - init_off]);
  573. off++;
  574. size--;
  575. }
  576. if ((off & 3) && size > 2) {
  577. u16 val = data[off - init_off];
  578. val |= (u16) data[off - init_off + 1] << 8;
  579. pci_user_write_config_word(dev, off, val);
  580. off += 2;
  581. size -= 2;
  582. }
  583. while (size > 3) {
  584. u32 val = data[off - init_off];
  585. val |= (u32) data[off - init_off + 1] << 8;
  586. val |= (u32) data[off - init_off + 2] << 16;
  587. val |= (u32) data[off - init_off + 3] << 24;
  588. pci_user_write_config_dword(dev, off, val);
  589. off += 4;
  590. size -= 4;
  591. }
  592. if (size >= 2) {
  593. u16 val = data[off - init_off];
  594. val |= (u16) data[off - init_off + 1] << 8;
  595. pci_user_write_config_word(dev, off, val);
  596. off += 2;
  597. size -= 2;
  598. }
  599. if (size) {
  600. pci_user_write_config_byte(dev, off, data[off - init_off]);
  601. off++;
  602. --size;
  603. }
  604. pci_config_pm_runtime_put(dev);
  605. return count;
  606. }
  607. static ssize_t
  608. read_vpd_attr(struct file *filp, struct kobject *kobj,
  609. struct bin_attribute *bin_attr,
  610. char *buf, loff_t off, size_t count)
  611. {
  612. struct pci_dev *dev =
  613. to_pci_dev(container_of(kobj, struct device, kobj));
  614. if (off > bin_attr->size)
  615. count = 0;
  616. else if (count > bin_attr->size - off)
  617. count = bin_attr->size - off;
  618. return pci_read_vpd(dev, off, count, buf);
  619. }
  620. static ssize_t
  621. write_vpd_attr(struct file *filp, struct kobject *kobj,
  622. struct bin_attribute *bin_attr,
  623. char *buf, loff_t off, size_t count)
  624. {
  625. struct pci_dev *dev =
  626. to_pci_dev(container_of(kobj, struct device, kobj));
  627. if (off > bin_attr->size)
  628. count = 0;
  629. else if (count > bin_attr->size - off)
  630. count = bin_attr->size - off;
  631. return pci_write_vpd(dev, off, count, buf);
  632. }
  633. #ifdef HAVE_PCI_LEGACY
  634. /**
  635. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  636. * @filp: open sysfs file
  637. * @kobj: kobject corresponding to file to read from
  638. * @bin_attr: struct bin_attribute for this file
  639. * @buf: buffer to store results
  640. * @off: offset into legacy I/O port space
  641. * @count: number of bytes to read
  642. *
  643. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  644. * callback routine (pci_legacy_read).
  645. */
  646. static ssize_t
  647. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  648. struct bin_attribute *bin_attr,
  649. char *buf, loff_t off, size_t count)
  650. {
  651. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  652. struct device,
  653. kobj));
  654. /* Only support 1, 2 or 4 byte accesses */
  655. if (count != 1 && count != 2 && count != 4)
  656. return -EINVAL;
  657. return pci_legacy_read(bus, off, (u32 *)buf, count);
  658. }
  659. /**
  660. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  661. * @filp: open sysfs file
  662. * @kobj: kobject corresponding to file to read from
  663. * @bin_attr: struct bin_attribute for this file
  664. * @buf: buffer containing value to be written
  665. * @off: offset into legacy I/O port space
  666. * @count: number of bytes to write
  667. *
  668. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  669. * callback routine (pci_legacy_write).
  670. */
  671. static ssize_t
  672. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  673. struct bin_attribute *bin_attr,
  674. char *buf, loff_t off, size_t count)
  675. {
  676. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  677. struct device,
  678. kobj));
  679. /* Only support 1, 2 or 4 byte accesses */
  680. if (count != 1 && count != 2 && count != 4)
  681. return -EINVAL;
  682. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  683. }
  684. /**
  685. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  686. * @filp: open sysfs file
  687. * @kobj: kobject corresponding to device to be mapped
  688. * @attr: struct bin_attribute for this file
  689. * @vma: struct vm_area_struct passed to mmap
  690. *
  691. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  692. * legacy memory space (first meg of bus space) into application virtual
  693. * memory space.
  694. */
  695. static int
  696. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  697. struct bin_attribute *attr,
  698. struct vm_area_struct *vma)
  699. {
  700. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  701. struct device,
  702. kobj));
  703. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  704. }
  705. /**
  706. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  707. * @filp: open sysfs file
  708. * @kobj: kobject corresponding to device to be mapped
  709. * @attr: struct bin_attribute for this file
  710. * @vma: struct vm_area_struct passed to mmap
  711. *
  712. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  713. * legacy IO space (first meg of bus space) into application virtual
  714. * memory space. Returns -ENOSYS if the operation isn't supported
  715. */
  716. static int
  717. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  718. struct bin_attribute *attr,
  719. struct vm_area_struct *vma)
  720. {
  721. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  722. struct device,
  723. kobj));
  724. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  725. }
  726. /**
  727. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  728. * @b: bus to create files under
  729. * @mmap_type: I/O port or memory
  730. *
  731. * Stub implementation. Can be overridden by arch if necessary.
  732. */
  733. void __weak
  734. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  735. {
  736. return;
  737. }
  738. /**
  739. * pci_create_legacy_files - create legacy I/O port and memory files
  740. * @b: bus to create files under
  741. *
  742. * Some platforms allow access to legacy I/O port and ISA memory space on
  743. * a per-bus basis. This routine creates the files and ties them into
  744. * their associated read, write and mmap files from pci-sysfs.c
  745. *
  746. * On error unwind, but don't propagate the error to the caller
  747. * as it is ok to set up the PCI bus without these files.
  748. */
  749. void pci_create_legacy_files(struct pci_bus *b)
  750. {
  751. int error;
  752. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  753. GFP_ATOMIC);
  754. if (!b->legacy_io)
  755. goto kzalloc_err;
  756. sysfs_bin_attr_init(b->legacy_io);
  757. b->legacy_io->attr.name = "legacy_io";
  758. b->legacy_io->size = 0xffff;
  759. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  760. b->legacy_io->read = pci_read_legacy_io;
  761. b->legacy_io->write = pci_write_legacy_io;
  762. b->legacy_io->mmap = pci_mmap_legacy_io;
  763. pci_adjust_legacy_attr(b, pci_mmap_io);
  764. error = device_create_bin_file(&b->dev, b->legacy_io);
  765. if (error)
  766. goto legacy_io_err;
  767. /* Allocated above after the legacy_io struct */
  768. b->legacy_mem = b->legacy_io + 1;
  769. sysfs_bin_attr_init(b->legacy_mem);
  770. b->legacy_mem->attr.name = "legacy_mem";
  771. b->legacy_mem->size = 1024*1024;
  772. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  773. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  774. pci_adjust_legacy_attr(b, pci_mmap_mem);
  775. error = device_create_bin_file(&b->dev, b->legacy_mem);
  776. if (error)
  777. goto legacy_mem_err;
  778. return;
  779. legacy_mem_err:
  780. device_remove_bin_file(&b->dev, b->legacy_io);
  781. legacy_io_err:
  782. kfree(b->legacy_io);
  783. b->legacy_io = NULL;
  784. kzalloc_err:
  785. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  786. "and ISA memory resources to sysfs\n");
  787. return;
  788. }
  789. void pci_remove_legacy_files(struct pci_bus *b)
  790. {
  791. if (b->legacy_io) {
  792. device_remove_bin_file(&b->dev, b->legacy_io);
  793. device_remove_bin_file(&b->dev, b->legacy_mem);
  794. kfree(b->legacy_io); /* both are allocated here */
  795. }
  796. }
  797. #endif /* HAVE_PCI_LEGACY */
  798. #ifdef HAVE_PCI_MMAP
  799. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  800. enum pci_mmap_api mmap_api)
  801. {
  802. unsigned long nr, start, size, pci_start;
  803. if (pci_resource_len(pdev, resno) == 0)
  804. return 0;
  805. nr = vma_pages(vma);
  806. start = vma->vm_pgoff;
  807. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  808. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  809. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  810. if (start >= pci_start && start < pci_start + size &&
  811. start + nr <= pci_start + size)
  812. return 1;
  813. return 0;
  814. }
  815. /**
  816. * pci_mmap_resource - map a PCI resource into user memory space
  817. * @kobj: kobject for mapping
  818. * @attr: struct bin_attribute for the file being mapped
  819. * @vma: struct vm_area_struct passed into the mmap
  820. * @write_combine: 1 for write_combine mapping
  821. *
  822. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  823. */
  824. static int
  825. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  826. struct vm_area_struct *vma, int write_combine)
  827. {
  828. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  829. struct device, kobj));
  830. struct resource *res = attr->private;
  831. enum pci_mmap_state mmap_type;
  832. resource_size_t start, end;
  833. int i;
  834. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  835. if (res == &pdev->resource[i])
  836. break;
  837. if (i >= PCI_ROM_RESOURCE)
  838. return -ENODEV;
  839. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  840. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  841. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  842. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  843. pci_name(pdev), i,
  844. (u64)pci_resource_start(pdev, i),
  845. (u64)pci_resource_len(pdev, i));
  846. return -EINVAL;
  847. }
  848. /* pci_mmap_page_range() expects the same kind of entry as coming
  849. * from /proc/bus/pci/ which is a "user visible" value. If this is
  850. * different from the resource itself, arch will do necessary fixup.
  851. */
  852. pci_resource_to_user(pdev, i, res, &start, &end);
  853. vma->vm_pgoff += start >> PAGE_SHIFT;
  854. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  855. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  856. return -EINVAL;
  857. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  858. }
  859. static int
  860. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  861. struct bin_attribute *attr,
  862. struct vm_area_struct *vma)
  863. {
  864. return pci_mmap_resource(kobj, attr, vma, 0);
  865. }
  866. static int
  867. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  868. struct bin_attribute *attr,
  869. struct vm_area_struct *vma)
  870. {
  871. return pci_mmap_resource(kobj, attr, vma, 1);
  872. }
  873. static ssize_t
  874. pci_resource_io(struct file *filp, struct kobject *kobj,
  875. struct bin_attribute *attr, char *buf,
  876. loff_t off, size_t count, bool write)
  877. {
  878. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  879. struct device, kobj));
  880. struct resource *res = attr->private;
  881. unsigned long port = off;
  882. int i;
  883. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  884. if (res == &pdev->resource[i])
  885. break;
  886. if (i >= PCI_ROM_RESOURCE)
  887. return -ENODEV;
  888. port += pci_resource_start(pdev, i);
  889. if (port > pci_resource_end(pdev, i))
  890. return 0;
  891. if (port + count - 1 > pci_resource_end(pdev, i))
  892. return -EINVAL;
  893. switch (count) {
  894. case 1:
  895. if (write)
  896. outb(*(u8 *)buf, port);
  897. else
  898. *(u8 *)buf = inb(port);
  899. return 1;
  900. case 2:
  901. if (write)
  902. outw(*(u16 *)buf, port);
  903. else
  904. *(u16 *)buf = inw(port);
  905. return 2;
  906. case 4:
  907. if (write)
  908. outl(*(u32 *)buf, port);
  909. else
  910. *(u32 *)buf = inl(port);
  911. return 4;
  912. }
  913. return -EINVAL;
  914. }
  915. static ssize_t
  916. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  917. struct bin_attribute *attr, char *buf,
  918. loff_t off, size_t count)
  919. {
  920. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  921. }
  922. static ssize_t
  923. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  924. struct bin_attribute *attr, char *buf,
  925. loff_t off, size_t count)
  926. {
  927. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  928. }
  929. /**
  930. * pci_remove_resource_files - cleanup resource files
  931. * @pdev: dev to cleanup
  932. *
  933. * If we created resource files for @pdev, remove them from sysfs and
  934. * free their resources.
  935. */
  936. static void
  937. pci_remove_resource_files(struct pci_dev *pdev)
  938. {
  939. int i;
  940. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  941. struct bin_attribute *res_attr;
  942. res_attr = pdev->res_attr[i];
  943. if (res_attr) {
  944. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  945. kfree(res_attr);
  946. }
  947. res_attr = pdev->res_attr_wc[i];
  948. if (res_attr) {
  949. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  950. kfree(res_attr);
  951. }
  952. }
  953. }
  954. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  955. {
  956. /* allocate attribute structure, piggyback attribute name */
  957. int name_len = write_combine ? 13 : 10;
  958. struct bin_attribute *res_attr;
  959. int retval;
  960. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  961. if (res_attr) {
  962. char *res_attr_name = (char *)(res_attr + 1);
  963. sysfs_bin_attr_init(res_attr);
  964. if (write_combine) {
  965. pdev->res_attr_wc[num] = res_attr;
  966. sprintf(res_attr_name, "resource%d_wc", num);
  967. res_attr->mmap = pci_mmap_resource_wc;
  968. } else {
  969. pdev->res_attr[num] = res_attr;
  970. sprintf(res_attr_name, "resource%d", num);
  971. res_attr->mmap = pci_mmap_resource_uc;
  972. }
  973. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  974. res_attr->read = pci_read_resource_io;
  975. res_attr->write = pci_write_resource_io;
  976. }
  977. res_attr->attr.name = res_attr_name;
  978. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  979. res_attr->size = pci_resource_len(pdev, num);
  980. res_attr->private = &pdev->resource[num];
  981. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  982. } else
  983. retval = -ENOMEM;
  984. return retval;
  985. }
  986. /**
  987. * pci_create_resource_files - create resource files in sysfs for @dev
  988. * @pdev: dev in question
  989. *
  990. * Walk the resources in @pdev creating files for each resource available.
  991. */
  992. static int pci_create_resource_files(struct pci_dev *pdev)
  993. {
  994. int i;
  995. int retval;
  996. /* Expose the PCI resources from this device as files */
  997. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  998. /* skip empty resources */
  999. if (!pci_resource_len(pdev, i))
  1000. continue;
  1001. retval = pci_create_attr(pdev, i, 0);
  1002. /* for prefetchable resources, create a WC mappable file */
  1003. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1004. retval = pci_create_attr(pdev, i, 1);
  1005. if (retval) {
  1006. pci_remove_resource_files(pdev);
  1007. return retval;
  1008. }
  1009. }
  1010. return 0;
  1011. }
  1012. #else /* !HAVE_PCI_MMAP */
  1013. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1014. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1015. #endif /* HAVE_PCI_MMAP */
  1016. /**
  1017. * pci_write_rom - used to enable access to the PCI ROM display
  1018. * @filp: sysfs file
  1019. * @kobj: kernel object handle
  1020. * @bin_attr: struct bin_attribute for this file
  1021. * @buf: user input
  1022. * @off: file offset
  1023. * @count: number of byte in input
  1024. *
  1025. * writing anything except 0 enables it
  1026. */
  1027. static ssize_t
  1028. pci_write_rom(struct file *filp, struct kobject *kobj,
  1029. struct bin_attribute *bin_attr,
  1030. char *buf, loff_t off, size_t count)
  1031. {
  1032. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1033. if ((off == 0) && (*buf == '0') && (count == 2))
  1034. pdev->rom_attr_enabled = 0;
  1035. else
  1036. pdev->rom_attr_enabled = 1;
  1037. return count;
  1038. }
  1039. /**
  1040. * pci_read_rom - read a PCI ROM
  1041. * @filp: sysfs file
  1042. * @kobj: kernel object handle
  1043. * @bin_attr: struct bin_attribute for this file
  1044. * @buf: where to put the data we read from the ROM
  1045. * @off: file offset
  1046. * @count: number of bytes to read
  1047. *
  1048. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1049. * device corresponding to @kobj.
  1050. */
  1051. static ssize_t
  1052. pci_read_rom(struct file *filp, struct kobject *kobj,
  1053. struct bin_attribute *bin_attr,
  1054. char *buf, loff_t off, size_t count)
  1055. {
  1056. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1057. void __iomem *rom;
  1058. size_t size;
  1059. if (!pdev->rom_attr_enabled)
  1060. return -EINVAL;
  1061. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1062. if (!rom || !size)
  1063. return -EIO;
  1064. if (off >= size)
  1065. count = 0;
  1066. else {
  1067. if (off + count > size)
  1068. count = size - off;
  1069. memcpy_fromio(buf, rom + off, count);
  1070. }
  1071. pci_unmap_rom(pdev, rom);
  1072. return count;
  1073. }
  1074. static struct bin_attribute pci_config_attr = {
  1075. .attr = {
  1076. .name = "config",
  1077. .mode = S_IRUGO | S_IWUSR,
  1078. },
  1079. .size = PCI_CFG_SPACE_SIZE,
  1080. .read = pci_read_config,
  1081. .write = pci_write_config,
  1082. };
  1083. static struct bin_attribute pcie_config_attr = {
  1084. .attr = {
  1085. .name = "config",
  1086. .mode = S_IRUGO | S_IWUSR,
  1087. },
  1088. .size = PCI_CFG_SPACE_EXP_SIZE,
  1089. .read = pci_read_config,
  1090. .write = pci_write_config,
  1091. };
  1092. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  1093. {
  1094. return 0;
  1095. }
  1096. static ssize_t reset_store(struct device *dev,
  1097. struct device_attribute *attr, const char *buf,
  1098. size_t count)
  1099. {
  1100. struct pci_dev *pdev = to_pci_dev(dev);
  1101. unsigned long val;
  1102. ssize_t result = kstrtoul(buf, 0, &val);
  1103. if (result < 0)
  1104. return result;
  1105. if (val != 1)
  1106. return -EINVAL;
  1107. result = pci_reset_function(pdev);
  1108. if (result < 0)
  1109. return result;
  1110. return count;
  1111. }
  1112. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1113. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1114. {
  1115. int retval;
  1116. struct bin_attribute *attr;
  1117. /* If the device has VPD, try to expose it in sysfs. */
  1118. if (dev->vpd) {
  1119. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1120. if (!attr)
  1121. return -ENOMEM;
  1122. sysfs_bin_attr_init(attr);
  1123. attr->size = dev->vpd->len;
  1124. attr->attr.name = "vpd";
  1125. attr->attr.mode = S_IRUSR | S_IWUSR;
  1126. attr->read = read_vpd_attr;
  1127. attr->write = write_vpd_attr;
  1128. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1129. if (retval) {
  1130. kfree(attr);
  1131. return retval;
  1132. }
  1133. dev->vpd->attr = attr;
  1134. }
  1135. /* Active State Power Management */
  1136. pcie_aspm_create_sysfs_dev_files(dev);
  1137. if (!pci_probe_reset_function(dev)) {
  1138. retval = device_create_file(&dev->dev, &reset_attr);
  1139. if (retval)
  1140. goto error;
  1141. dev->reset_fn = 1;
  1142. }
  1143. return 0;
  1144. error:
  1145. pcie_aspm_remove_sysfs_dev_files(dev);
  1146. if (dev->vpd && dev->vpd->attr) {
  1147. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1148. kfree(dev->vpd->attr);
  1149. }
  1150. return retval;
  1151. }
  1152. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1153. {
  1154. int retval;
  1155. int rom_size = 0;
  1156. struct bin_attribute *attr;
  1157. if (!sysfs_initialized)
  1158. return -EACCES;
  1159. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1160. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1161. else
  1162. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1163. if (retval)
  1164. goto err;
  1165. retval = pci_create_resource_files(pdev);
  1166. if (retval)
  1167. goto err_config_file;
  1168. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1169. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1170. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1171. rom_size = 0x20000;
  1172. /* If the device has a ROM, try to expose it in sysfs. */
  1173. if (rom_size) {
  1174. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1175. if (!attr) {
  1176. retval = -ENOMEM;
  1177. goto err_resource_files;
  1178. }
  1179. sysfs_bin_attr_init(attr);
  1180. attr->size = rom_size;
  1181. attr->attr.name = "rom";
  1182. attr->attr.mode = S_IRUSR | S_IWUSR;
  1183. attr->read = pci_read_rom;
  1184. attr->write = pci_write_rom;
  1185. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1186. if (retval) {
  1187. kfree(attr);
  1188. goto err_resource_files;
  1189. }
  1190. pdev->rom_attr = attr;
  1191. }
  1192. /* add platform-specific attributes */
  1193. retval = pcibios_add_platform_entries(pdev);
  1194. if (retval)
  1195. goto err_rom_file;
  1196. /* add sysfs entries for various capabilities */
  1197. retval = pci_create_capabilities_sysfs(pdev);
  1198. if (retval)
  1199. goto err_rom_file;
  1200. pci_create_firmware_label_files(pdev);
  1201. return 0;
  1202. err_rom_file:
  1203. if (rom_size) {
  1204. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1205. kfree(pdev->rom_attr);
  1206. pdev->rom_attr = NULL;
  1207. }
  1208. err_resource_files:
  1209. pci_remove_resource_files(pdev);
  1210. err_config_file:
  1211. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1212. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1213. else
  1214. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1215. err:
  1216. return retval;
  1217. }
  1218. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1219. {
  1220. if (dev->vpd && dev->vpd->attr) {
  1221. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1222. kfree(dev->vpd->attr);
  1223. }
  1224. pcie_aspm_remove_sysfs_dev_files(dev);
  1225. if (dev->reset_fn) {
  1226. device_remove_file(&dev->dev, &reset_attr);
  1227. dev->reset_fn = 0;
  1228. }
  1229. }
  1230. /**
  1231. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1232. * @pdev: device whose entries we should free
  1233. *
  1234. * Cleanup when @pdev is removed from sysfs.
  1235. */
  1236. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1237. {
  1238. int rom_size = 0;
  1239. if (!sysfs_initialized)
  1240. return;
  1241. pci_remove_capabilities_sysfs(pdev);
  1242. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1243. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1244. else
  1245. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1246. pci_remove_resource_files(pdev);
  1247. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1248. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1249. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1250. rom_size = 0x20000;
  1251. if (rom_size && pdev->rom_attr) {
  1252. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1253. kfree(pdev->rom_attr);
  1254. }
  1255. pci_remove_firmware_label_files(pdev);
  1256. }
  1257. static int __init pci_sysfs_init(void)
  1258. {
  1259. struct pci_dev *pdev = NULL;
  1260. int retval;
  1261. sysfs_initialized = 1;
  1262. for_each_pci_dev(pdev) {
  1263. retval = pci_create_sysfs_dev_files(pdev);
  1264. if (retval) {
  1265. pci_dev_put(pdev);
  1266. return retval;
  1267. }
  1268. }
  1269. return 0;
  1270. }
  1271. late_initcall(pci_sysfs_init);
  1272. static struct attribute *pci_dev_dev_attrs[] = {
  1273. &vga_attr.attr,
  1274. NULL,
  1275. };
  1276. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1277. struct attribute *a, int n)
  1278. {
  1279. struct device *dev = container_of(kobj, struct device, kobj);
  1280. struct pci_dev *pdev = to_pci_dev(dev);
  1281. if (a == &vga_attr.attr)
  1282. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1283. return 0;
  1284. return a->mode;
  1285. }
  1286. static struct attribute *pci_dev_hp_attrs[] = {
  1287. &dev_remove_attr.attr,
  1288. &dev_rescan_attr.attr,
  1289. NULL,
  1290. };
  1291. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1292. struct attribute *a, int n)
  1293. {
  1294. struct device *dev = container_of(kobj, struct device, kobj);
  1295. struct pci_dev *pdev = to_pci_dev(dev);
  1296. if (pdev->is_virtfn)
  1297. return 0;
  1298. return a->mode;
  1299. }
  1300. static struct attribute_group pci_dev_hp_attr_group = {
  1301. .attrs = pci_dev_hp_attrs,
  1302. .is_visible = pci_dev_hp_attrs_are_visible,
  1303. };
  1304. #ifdef CONFIG_PCI_IOV
  1305. static struct attribute *sriov_dev_attrs[] = {
  1306. &sriov_totalvfs_attr.attr,
  1307. &sriov_numvfs_attr.attr,
  1308. NULL,
  1309. };
  1310. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1311. struct attribute *a, int n)
  1312. {
  1313. struct device *dev = container_of(kobj, struct device, kobj);
  1314. if (!dev_is_pf(dev))
  1315. return 0;
  1316. return a->mode;
  1317. }
  1318. static struct attribute_group sriov_dev_attr_group = {
  1319. .attrs = sriov_dev_attrs,
  1320. .is_visible = sriov_attrs_are_visible,
  1321. };
  1322. #endif /* CONFIG_PCI_IOV */
  1323. static struct attribute_group pci_dev_attr_group = {
  1324. .attrs = pci_dev_dev_attrs,
  1325. .is_visible = pci_dev_attrs_are_visible,
  1326. };
  1327. static const struct attribute_group *pci_dev_attr_groups[] = {
  1328. &pci_dev_attr_group,
  1329. &pci_dev_hp_attr_group,
  1330. #ifdef CONFIG_PCI_IOV
  1331. &sriov_dev_attr_group,
  1332. #endif
  1333. NULL,
  1334. };
  1335. struct device_type pci_dev_type = {
  1336. .groups = pci_dev_attr_groups,
  1337. };