soc-cache.c 36 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. #include <trace/events/asoc.h>
  20. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  21. unsigned int reg)
  22. {
  23. int ret;
  24. unsigned int val;
  25. if (reg >= codec->driver->reg_cache_size ||
  26. snd_soc_codec_volatile_register(codec, reg) ||
  27. codec->cache_bypass) {
  28. if (codec->cache_only)
  29. return -1;
  30. BUG_ON(!codec->hw_read);
  31. return codec->hw_read(codec, reg);
  32. }
  33. ret = snd_soc_cache_read(codec, reg, &val);
  34. if (ret < 0)
  35. return -1;
  36. return val;
  37. }
  38. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  39. unsigned int value)
  40. {
  41. u8 data[2];
  42. int ret;
  43. data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  44. data[1] = value & 0x00ff;
  45. if (!snd_soc_codec_volatile_register(codec, reg) &&
  46. reg < codec->driver->reg_cache_size &&
  47. !codec->cache_bypass) {
  48. ret = snd_soc_cache_write(codec, reg, value);
  49. if (ret < 0)
  50. return -1;
  51. }
  52. if (codec->cache_only) {
  53. codec->cache_sync = 1;
  54. return 0;
  55. }
  56. ret = codec->hw_write(codec->control_data, data, 2);
  57. if (ret == 2)
  58. return 0;
  59. if (ret < 0)
  60. return ret;
  61. else
  62. return -EIO;
  63. }
  64. #if defined(CONFIG_SPI_MASTER)
  65. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  66. int len)
  67. {
  68. struct spi_device *spi = control_data;
  69. struct spi_transfer t;
  70. struct spi_message m;
  71. u8 msg[2];
  72. if (len <= 0)
  73. return 0;
  74. msg[0] = data[1];
  75. msg[1] = data[0];
  76. spi_message_init(&m);
  77. memset(&t, 0, sizeof t);
  78. t.tx_buf = &msg[0];
  79. t.len = len;
  80. spi_message_add_tail(&t, &m);
  81. spi_sync(spi, &m);
  82. return len;
  83. }
  84. #else
  85. #define snd_soc_4_12_spi_write NULL
  86. #endif
  87. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  88. unsigned int reg)
  89. {
  90. int ret;
  91. unsigned int val;
  92. if (reg >= codec->driver->reg_cache_size ||
  93. snd_soc_codec_volatile_register(codec, reg) ||
  94. codec->cache_bypass) {
  95. if (codec->cache_only)
  96. return -1;
  97. BUG_ON(!codec->hw_read);
  98. return codec->hw_read(codec, reg);
  99. }
  100. ret = snd_soc_cache_read(codec, reg, &val);
  101. if (ret < 0)
  102. return -1;
  103. return val;
  104. }
  105. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  106. unsigned int value)
  107. {
  108. u8 data[2];
  109. int ret;
  110. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  111. data[1] = value & 0x00ff;
  112. if (!snd_soc_codec_volatile_register(codec, reg) &&
  113. reg < codec->driver->reg_cache_size &&
  114. !codec->cache_bypass) {
  115. ret = snd_soc_cache_write(codec, reg, value);
  116. if (ret < 0)
  117. return -1;
  118. }
  119. if (codec->cache_only) {
  120. codec->cache_sync = 1;
  121. return 0;
  122. }
  123. ret = codec->hw_write(codec->control_data, data, 2);
  124. if (ret == 2)
  125. return 0;
  126. if (ret < 0)
  127. return ret;
  128. else
  129. return -EIO;
  130. }
  131. #if defined(CONFIG_SPI_MASTER)
  132. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  133. int len)
  134. {
  135. struct spi_device *spi = control_data;
  136. struct spi_transfer t;
  137. struct spi_message m;
  138. u8 msg[2];
  139. if (len <= 0)
  140. return 0;
  141. msg[0] = data[0];
  142. msg[1] = data[1];
  143. spi_message_init(&m);
  144. memset(&t, 0, sizeof t);
  145. t.tx_buf = &msg[0];
  146. t.len = len;
  147. spi_message_add_tail(&t, &m);
  148. spi_sync(spi, &m);
  149. return len;
  150. }
  151. #else
  152. #define snd_soc_7_9_spi_write NULL
  153. #endif
  154. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  155. unsigned int value)
  156. {
  157. u8 data[2];
  158. int ret;
  159. reg &= 0xff;
  160. data[0] = reg;
  161. data[1] = value & 0xff;
  162. if (!snd_soc_codec_volatile_register(codec, reg) &&
  163. reg < codec->driver->reg_cache_size &&
  164. !codec->cache_bypass) {
  165. ret = snd_soc_cache_write(codec, reg, value);
  166. if (ret < 0)
  167. return -1;
  168. }
  169. if (codec->cache_only) {
  170. codec->cache_sync = 1;
  171. return 0;
  172. }
  173. if (codec->hw_write(codec->control_data, data, 2) == 2)
  174. return 0;
  175. else
  176. return -EIO;
  177. }
  178. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  179. unsigned int reg)
  180. {
  181. int ret;
  182. unsigned int val;
  183. reg &= 0xff;
  184. if (reg >= codec->driver->reg_cache_size ||
  185. snd_soc_codec_volatile_register(codec, reg) ||
  186. codec->cache_bypass) {
  187. if (codec->cache_only)
  188. return -1;
  189. BUG_ON(!codec->hw_read);
  190. return codec->hw_read(codec, reg);
  191. }
  192. ret = snd_soc_cache_read(codec, reg, &val);
  193. if (ret < 0)
  194. return -1;
  195. return val;
  196. }
  197. #if defined(CONFIG_SPI_MASTER)
  198. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  199. int len)
  200. {
  201. struct spi_device *spi = control_data;
  202. struct spi_transfer t;
  203. struct spi_message m;
  204. u8 msg[2];
  205. if (len <= 0)
  206. return 0;
  207. msg[0] = data[0];
  208. msg[1] = data[1];
  209. spi_message_init(&m);
  210. memset(&t, 0, sizeof t);
  211. t.tx_buf = &msg[0];
  212. t.len = len;
  213. spi_message_add_tail(&t, &m);
  214. spi_sync(spi, &m);
  215. return len;
  216. }
  217. #else
  218. #define snd_soc_8_8_spi_write NULL
  219. #endif
  220. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  221. unsigned int value)
  222. {
  223. u8 data[3];
  224. int ret;
  225. data[0] = reg;
  226. data[1] = (value >> 8) & 0xff;
  227. data[2] = value & 0xff;
  228. if (!snd_soc_codec_volatile_register(codec, reg) &&
  229. reg < codec->driver->reg_cache_size &&
  230. !codec->cache_bypass) {
  231. ret = snd_soc_cache_write(codec, reg, value);
  232. if (ret < 0)
  233. return -1;
  234. }
  235. if (codec->cache_only) {
  236. codec->cache_sync = 1;
  237. return 0;
  238. }
  239. if (codec->hw_write(codec->control_data, data, 3) == 3)
  240. return 0;
  241. else
  242. return -EIO;
  243. }
  244. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  245. unsigned int reg)
  246. {
  247. int ret;
  248. unsigned int val;
  249. if (reg >= codec->driver->reg_cache_size ||
  250. snd_soc_codec_volatile_register(codec, reg) ||
  251. codec->cache_bypass) {
  252. if (codec->cache_only)
  253. return -1;
  254. BUG_ON(!codec->hw_read);
  255. return codec->hw_read(codec, reg);
  256. }
  257. ret = snd_soc_cache_read(codec, reg, &val);
  258. if (ret < 0)
  259. return -1;
  260. return val;
  261. }
  262. #if defined(CONFIG_SPI_MASTER)
  263. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  264. int len)
  265. {
  266. struct spi_device *spi = control_data;
  267. struct spi_transfer t;
  268. struct spi_message m;
  269. u8 msg[3];
  270. if (len <= 0)
  271. return 0;
  272. msg[0] = data[0];
  273. msg[1] = data[1];
  274. msg[2] = data[2];
  275. spi_message_init(&m);
  276. memset(&t, 0, sizeof t);
  277. t.tx_buf = &msg[0];
  278. t.len = len;
  279. spi_message_add_tail(&t, &m);
  280. spi_sync(spi, &m);
  281. return len;
  282. }
  283. #else
  284. #define snd_soc_8_16_spi_write NULL
  285. #endif
  286. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  287. static unsigned int do_i2c_read(struct snd_soc_codec *codec,
  288. void *reg, int reglen,
  289. void *data, int datalen)
  290. {
  291. struct i2c_msg xfer[2];
  292. int ret;
  293. struct i2c_client *client = codec->control_data;
  294. /* Write register */
  295. xfer[0].addr = client->addr;
  296. xfer[0].flags = 0;
  297. xfer[0].len = reglen;
  298. xfer[0].buf = reg;
  299. /* Read data */
  300. xfer[1].addr = client->addr;
  301. xfer[1].flags = I2C_M_RD;
  302. xfer[1].len = datalen;
  303. xfer[1].buf = data;
  304. ret = i2c_transfer(client->adapter, xfer, 2);
  305. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  306. if (ret == 2)
  307. return 0;
  308. else if (ret < 0)
  309. return ret;
  310. else
  311. return -EIO;
  312. }
  313. #endif
  314. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  315. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  316. unsigned int r)
  317. {
  318. u8 reg = r;
  319. u8 data;
  320. int ret;
  321. ret = do_i2c_read(codec, &reg, 1, &data, 1);
  322. if (ret < 0)
  323. return 0;
  324. return data;
  325. }
  326. #else
  327. #define snd_soc_8_8_read_i2c NULL
  328. #endif
  329. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  330. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  331. unsigned int r)
  332. {
  333. u8 reg = r;
  334. u16 data;
  335. int ret;
  336. ret = do_i2c_read(codec, &reg, 1, &data, 2);
  337. if (ret < 0)
  338. return 0;
  339. return (data >> 8) | ((data & 0xff) << 8);
  340. }
  341. #else
  342. #define snd_soc_8_16_read_i2c NULL
  343. #endif
  344. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  345. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  346. unsigned int r)
  347. {
  348. u16 reg = r;
  349. u8 data;
  350. int ret;
  351. ret = do_i2c_read(codec, &reg, 2, &data, 1);
  352. if (ret < 0)
  353. return 0;
  354. return data;
  355. }
  356. #else
  357. #define snd_soc_16_8_read_i2c NULL
  358. #endif
  359. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  360. unsigned int reg)
  361. {
  362. int ret;
  363. unsigned int val;
  364. reg &= 0xff;
  365. if (reg >= codec->driver->reg_cache_size ||
  366. snd_soc_codec_volatile_register(codec, reg) ||
  367. codec->cache_bypass) {
  368. if (codec->cache_only)
  369. return -1;
  370. BUG_ON(!codec->hw_read);
  371. return codec->hw_read(codec, reg);
  372. }
  373. ret = snd_soc_cache_read(codec, reg, &val);
  374. if (ret < 0)
  375. return -1;
  376. return val;
  377. }
  378. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  379. unsigned int value)
  380. {
  381. u8 data[3];
  382. int ret;
  383. data[0] = (reg >> 8) & 0xff;
  384. data[1] = reg & 0xff;
  385. data[2] = value;
  386. reg &= 0xff;
  387. if (!snd_soc_codec_volatile_register(codec, reg) &&
  388. reg < codec->driver->reg_cache_size &&
  389. !codec->cache_bypass) {
  390. ret = snd_soc_cache_write(codec, reg, value);
  391. if (ret < 0)
  392. return -1;
  393. }
  394. if (codec->cache_only) {
  395. codec->cache_sync = 1;
  396. return 0;
  397. }
  398. ret = codec->hw_write(codec->control_data, data, 3);
  399. if (ret == 3)
  400. return 0;
  401. if (ret < 0)
  402. return ret;
  403. else
  404. return -EIO;
  405. }
  406. #if defined(CONFIG_SPI_MASTER)
  407. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  408. int len)
  409. {
  410. struct spi_device *spi = control_data;
  411. struct spi_transfer t;
  412. struct spi_message m;
  413. u8 msg[3];
  414. if (len <= 0)
  415. return 0;
  416. msg[0] = data[0];
  417. msg[1] = data[1];
  418. msg[2] = data[2];
  419. spi_message_init(&m);
  420. memset(&t, 0, sizeof t);
  421. t.tx_buf = &msg[0];
  422. t.len = len;
  423. spi_message_add_tail(&t, &m);
  424. spi_sync(spi, &m);
  425. return len;
  426. }
  427. #else
  428. #define snd_soc_16_8_spi_write NULL
  429. #endif
  430. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  431. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  432. unsigned int r)
  433. {
  434. u16 reg = cpu_to_be16(r);
  435. u16 data;
  436. int ret;
  437. ret = do_i2c_read(codec, &reg, 2, &data, 2);
  438. if (ret < 0)
  439. return 0;
  440. return be16_to_cpu(data);
  441. }
  442. #else
  443. #define snd_soc_16_16_read_i2c NULL
  444. #endif
  445. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  446. unsigned int reg)
  447. {
  448. int ret;
  449. unsigned int val;
  450. if (reg >= codec->driver->reg_cache_size ||
  451. snd_soc_codec_volatile_register(codec, reg) ||
  452. codec->cache_bypass) {
  453. if (codec->cache_only)
  454. return -1;
  455. BUG_ON(!codec->hw_read);
  456. return codec->hw_read(codec, reg);
  457. }
  458. ret = snd_soc_cache_read(codec, reg, &val);
  459. if (ret < 0)
  460. return -1;
  461. return val;
  462. }
  463. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  464. unsigned int value)
  465. {
  466. u8 data[4];
  467. int ret;
  468. data[0] = (reg >> 8) & 0xff;
  469. data[1] = reg & 0xff;
  470. data[2] = (value >> 8) & 0xff;
  471. data[3] = value & 0xff;
  472. if (!snd_soc_codec_volatile_register(codec, reg) &&
  473. reg < codec->driver->reg_cache_size &&
  474. !codec->cache_bypass) {
  475. ret = snd_soc_cache_write(codec, reg, value);
  476. if (ret < 0)
  477. return -1;
  478. }
  479. if (codec->cache_only) {
  480. codec->cache_sync = 1;
  481. return 0;
  482. }
  483. ret = codec->hw_write(codec->control_data, data, 4);
  484. if (ret == 4)
  485. return 0;
  486. if (ret < 0)
  487. return ret;
  488. else
  489. return -EIO;
  490. }
  491. #if defined(CONFIG_SPI_MASTER)
  492. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  493. int len)
  494. {
  495. struct spi_device *spi = control_data;
  496. struct spi_transfer t;
  497. struct spi_message m;
  498. u8 msg[4];
  499. if (len <= 0)
  500. return 0;
  501. msg[0] = data[0];
  502. msg[1] = data[1];
  503. msg[2] = data[2];
  504. msg[3] = data[3];
  505. spi_message_init(&m);
  506. memset(&t, 0, sizeof t);
  507. t.tx_buf = &msg[0];
  508. t.len = len;
  509. spi_message_add_tail(&t, &m);
  510. spi_sync(spi, &m);
  511. return len;
  512. }
  513. #else
  514. #define snd_soc_16_16_spi_write NULL
  515. #endif
  516. static struct {
  517. int addr_bits;
  518. int data_bits;
  519. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  520. int (*spi_write)(void *, const char *, int);
  521. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  522. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  523. } io_types[] = {
  524. {
  525. .addr_bits = 4, .data_bits = 12,
  526. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  527. .spi_write = snd_soc_4_12_spi_write,
  528. },
  529. {
  530. .addr_bits = 7, .data_bits = 9,
  531. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  532. .spi_write = snd_soc_7_9_spi_write,
  533. },
  534. {
  535. .addr_bits = 8, .data_bits = 8,
  536. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  537. .i2c_read = snd_soc_8_8_read_i2c,
  538. .spi_write = snd_soc_8_8_spi_write,
  539. },
  540. {
  541. .addr_bits = 8, .data_bits = 16,
  542. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  543. .i2c_read = snd_soc_8_16_read_i2c,
  544. .spi_write = snd_soc_8_16_spi_write,
  545. },
  546. {
  547. .addr_bits = 16, .data_bits = 8,
  548. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  549. .i2c_read = snd_soc_16_8_read_i2c,
  550. .spi_write = snd_soc_16_8_spi_write,
  551. },
  552. {
  553. .addr_bits = 16, .data_bits = 16,
  554. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  555. .i2c_read = snd_soc_16_16_read_i2c,
  556. .spi_write = snd_soc_16_16_spi_write,
  557. },
  558. };
  559. /**
  560. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  561. *
  562. * @codec: CODEC to configure.
  563. * @type: Type of cache.
  564. * @addr_bits: Number of bits of register address data.
  565. * @data_bits: Number of bits of data per register.
  566. * @control: Control bus used.
  567. *
  568. * Register formats are frequently shared between many I2C and SPI
  569. * devices. In order to promote code reuse the ASoC core provides
  570. * some standard implementations of CODEC read and write operations
  571. * which can be set up using this function.
  572. *
  573. * The caller is responsible for allocating and initialising the
  574. * actual cache.
  575. *
  576. * Note that at present this code cannot be used by CODECs with
  577. * volatile registers.
  578. */
  579. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  580. int addr_bits, int data_bits,
  581. enum snd_soc_control_type control)
  582. {
  583. int i;
  584. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  585. if (io_types[i].addr_bits == addr_bits &&
  586. io_types[i].data_bits == data_bits)
  587. break;
  588. if (i == ARRAY_SIZE(io_types)) {
  589. printk(KERN_ERR
  590. "No I/O functions for %d bit address %d bit data\n",
  591. addr_bits, data_bits);
  592. return -EINVAL;
  593. }
  594. codec->write = io_types[i].write;
  595. codec->read = io_types[i].read;
  596. switch (control) {
  597. case SND_SOC_CUSTOM:
  598. break;
  599. case SND_SOC_I2C:
  600. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  601. codec->hw_write = (hw_write_t)i2c_master_send;
  602. #endif
  603. if (io_types[i].i2c_read)
  604. codec->hw_read = io_types[i].i2c_read;
  605. codec->control_data = container_of(codec->dev,
  606. struct i2c_client,
  607. dev);
  608. break;
  609. case SND_SOC_SPI:
  610. if (io_types[i].spi_write)
  611. codec->hw_write = io_types[i].spi_write;
  612. codec->control_data = container_of(codec->dev,
  613. struct spi_device,
  614. dev);
  615. break;
  616. }
  617. return 0;
  618. }
  619. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  620. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  621. unsigned int val, unsigned int word_size)
  622. {
  623. switch (word_size) {
  624. case 1: {
  625. u8 *cache = base;
  626. if (cache[idx] == val)
  627. return true;
  628. cache[idx] = val;
  629. break;
  630. }
  631. case 2: {
  632. u16 *cache = base;
  633. if (cache[idx] == val)
  634. return true;
  635. cache[idx] = val;
  636. break;
  637. }
  638. default:
  639. BUG();
  640. }
  641. return false;
  642. }
  643. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  644. unsigned int word_size)
  645. {
  646. switch (word_size) {
  647. case 1: {
  648. const u8 *cache = base;
  649. return cache[idx];
  650. }
  651. case 2: {
  652. const u16 *cache = base;
  653. return cache[idx];
  654. }
  655. default:
  656. BUG();
  657. }
  658. /* unreachable */
  659. return -1;
  660. }
  661. struct snd_soc_rbtree_node {
  662. struct rb_node node;
  663. unsigned int reg;
  664. unsigned int value;
  665. unsigned int defval;
  666. } __attribute__ ((packed));
  667. struct snd_soc_rbtree_ctx {
  668. struct rb_root root;
  669. };
  670. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  671. struct rb_root *root, unsigned int reg)
  672. {
  673. struct rb_node *node;
  674. struct snd_soc_rbtree_node *rbnode;
  675. node = root->rb_node;
  676. while (node) {
  677. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  678. if (rbnode->reg < reg)
  679. node = node->rb_left;
  680. else if (rbnode->reg > reg)
  681. node = node->rb_right;
  682. else
  683. return rbnode;
  684. }
  685. return NULL;
  686. }
  687. static int snd_soc_rbtree_insert(struct rb_root *root,
  688. struct snd_soc_rbtree_node *rbnode)
  689. {
  690. struct rb_node **new, *parent;
  691. struct snd_soc_rbtree_node *rbnode_tmp;
  692. parent = NULL;
  693. new = &root->rb_node;
  694. while (*new) {
  695. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  696. node);
  697. parent = *new;
  698. if (rbnode_tmp->reg < rbnode->reg)
  699. new = &((*new)->rb_left);
  700. else if (rbnode_tmp->reg > rbnode->reg)
  701. new = &((*new)->rb_right);
  702. else
  703. return 0;
  704. }
  705. /* insert the node into the rbtree */
  706. rb_link_node(&rbnode->node, parent, new);
  707. rb_insert_color(&rbnode->node, root);
  708. return 1;
  709. }
  710. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  711. {
  712. struct snd_soc_rbtree_ctx *rbtree_ctx;
  713. struct rb_node *node;
  714. struct snd_soc_rbtree_node *rbnode;
  715. unsigned int val;
  716. int ret;
  717. rbtree_ctx = codec->reg_cache;
  718. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  719. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  720. if (rbnode->value == rbnode->defval)
  721. continue;
  722. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  723. if (ret)
  724. return ret;
  725. codec->cache_bypass = 1;
  726. ret = snd_soc_write(codec, rbnode->reg, val);
  727. codec->cache_bypass = 0;
  728. if (ret)
  729. return ret;
  730. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  731. rbnode->reg, val);
  732. }
  733. return 0;
  734. }
  735. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  736. unsigned int reg, unsigned int value)
  737. {
  738. struct snd_soc_rbtree_ctx *rbtree_ctx;
  739. struct snd_soc_rbtree_node *rbnode;
  740. rbtree_ctx = codec->reg_cache;
  741. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  742. if (rbnode) {
  743. if (rbnode->value == value)
  744. return 0;
  745. rbnode->value = value;
  746. } else {
  747. /* bail out early, no need to create the rbnode yet */
  748. if (!value)
  749. return 0;
  750. /*
  751. * for uninitialized registers whose value is changed
  752. * from the default zero, create an rbnode and insert
  753. * it into the tree.
  754. */
  755. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  756. if (!rbnode)
  757. return -ENOMEM;
  758. rbnode->reg = reg;
  759. rbnode->value = value;
  760. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  761. }
  762. return 0;
  763. }
  764. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  765. unsigned int reg, unsigned int *value)
  766. {
  767. struct snd_soc_rbtree_ctx *rbtree_ctx;
  768. struct snd_soc_rbtree_node *rbnode;
  769. rbtree_ctx = codec->reg_cache;
  770. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  771. if (rbnode) {
  772. *value = rbnode->value;
  773. } else {
  774. /* uninitialized registers default to 0 */
  775. *value = 0;
  776. }
  777. return 0;
  778. }
  779. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  780. {
  781. struct rb_node *next;
  782. struct snd_soc_rbtree_ctx *rbtree_ctx;
  783. struct snd_soc_rbtree_node *rbtree_node;
  784. /* if we've already been called then just return */
  785. rbtree_ctx = codec->reg_cache;
  786. if (!rbtree_ctx)
  787. return 0;
  788. /* free up the rbtree */
  789. next = rb_first(&rbtree_ctx->root);
  790. while (next) {
  791. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  792. next = rb_next(&rbtree_node->node);
  793. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  794. kfree(rbtree_node);
  795. }
  796. /* release the resources */
  797. kfree(codec->reg_cache);
  798. codec->reg_cache = NULL;
  799. return 0;
  800. }
  801. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  802. {
  803. struct snd_soc_rbtree_node *rbtree_node;
  804. struct snd_soc_rbtree_ctx *rbtree_ctx;
  805. unsigned int val;
  806. unsigned int word_size;
  807. int i;
  808. int ret;
  809. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  810. if (!codec->reg_cache)
  811. return -ENOMEM;
  812. rbtree_ctx = codec->reg_cache;
  813. rbtree_ctx->root = RB_ROOT;
  814. if (!codec->reg_def_copy)
  815. return 0;
  816. /*
  817. * populate the rbtree with the initialized registers. All other
  818. * registers will be inserted when they are first modified.
  819. */
  820. word_size = codec->driver->reg_word_size;
  821. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  822. val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
  823. if (!val)
  824. continue;
  825. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
  826. if (!rbtree_node) {
  827. ret = -ENOMEM;
  828. snd_soc_cache_exit(codec);
  829. break;
  830. }
  831. rbtree_node->reg = i;
  832. rbtree_node->value = val;
  833. rbtree_node->defval = val;
  834. snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
  835. }
  836. return 0;
  837. }
  838. #ifdef CONFIG_SND_SOC_CACHE_LZO
  839. struct snd_soc_lzo_ctx {
  840. void *wmem;
  841. void *dst;
  842. const void *src;
  843. size_t src_len;
  844. size_t dst_len;
  845. size_t decompressed_size;
  846. unsigned long *sync_bmp;
  847. int sync_bmp_nbits;
  848. };
  849. #define LZO_BLOCK_NUM 8
  850. static int snd_soc_lzo_block_count(void)
  851. {
  852. return LZO_BLOCK_NUM;
  853. }
  854. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  855. {
  856. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  857. if (!lzo_ctx->wmem)
  858. return -ENOMEM;
  859. return 0;
  860. }
  861. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  862. {
  863. size_t compress_size;
  864. int ret;
  865. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  866. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  867. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  868. return -EINVAL;
  869. lzo_ctx->dst_len = compress_size;
  870. return 0;
  871. }
  872. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  873. {
  874. size_t dst_len;
  875. int ret;
  876. dst_len = lzo_ctx->dst_len;
  877. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  878. lzo_ctx->dst, &dst_len);
  879. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  880. return -EINVAL;
  881. return 0;
  882. }
  883. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  884. struct snd_soc_lzo_ctx *lzo_ctx)
  885. {
  886. int ret;
  887. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  888. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  889. if (!lzo_ctx->dst) {
  890. lzo_ctx->dst_len = 0;
  891. return -ENOMEM;
  892. }
  893. ret = snd_soc_lzo_compress(lzo_ctx);
  894. if (ret < 0)
  895. return ret;
  896. return 0;
  897. }
  898. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  899. struct snd_soc_lzo_ctx *lzo_ctx)
  900. {
  901. int ret;
  902. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  903. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  904. if (!lzo_ctx->dst) {
  905. lzo_ctx->dst_len = 0;
  906. return -ENOMEM;
  907. }
  908. ret = snd_soc_lzo_decompress(lzo_ctx);
  909. if (ret < 0)
  910. return ret;
  911. return 0;
  912. }
  913. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  914. unsigned int reg)
  915. {
  916. const struct snd_soc_codec_driver *codec_drv;
  917. codec_drv = codec->driver;
  918. return (reg * codec_drv->reg_word_size) /
  919. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  920. }
  921. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  922. unsigned int reg)
  923. {
  924. const struct snd_soc_codec_driver *codec_drv;
  925. codec_drv = codec->driver;
  926. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  927. codec_drv->reg_word_size);
  928. }
  929. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  930. {
  931. const struct snd_soc_codec_driver *codec_drv;
  932. codec_drv = codec->driver;
  933. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  934. }
  935. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  936. {
  937. struct snd_soc_lzo_ctx **lzo_blocks;
  938. unsigned int val;
  939. int i;
  940. int ret;
  941. lzo_blocks = codec->reg_cache;
  942. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  943. ret = snd_soc_cache_read(codec, i, &val);
  944. if (ret)
  945. return ret;
  946. codec->cache_bypass = 1;
  947. ret = snd_soc_write(codec, i, val);
  948. codec->cache_bypass = 0;
  949. if (ret)
  950. return ret;
  951. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  952. i, val);
  953. }
  954. return 0;
  955. }
  956. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  957. unsigned int reg, unsigned int value)
  958. {
  959. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  960. int ret, blkindex, blkpos;
  961. size_t blksize, tmp_dst_len;
  962. void *tmp_dst;
  963. /* index of the compressed lzo block */
  964. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  965. /* register index within the decompressed block */
  966. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  967. /* size of the compressed block */
  968. blksize = snd_soc_lzo_get_blksize(codec);
  969. lzo_blocks = codec->reg_cache;
  970. lzo_block = lzo_blocks[blkindex];
  971. /* save the pointer and length of the compressed block */
  972. tmp_dst = lzo_block->dst;
  973. tmp_dst_len = lzo_block->dst_len;
  974. /* prepare the source to be the compressed block */
  975. lzo_block->src = lzo_block->dst;
  976. lzo_block->src_len = lzo_block->dst_len;
  977. /* decompress the block */
  978. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  979. if (ret < 0) {
  980. kfree(lzo_block->dst);
  981. goto out;
  982. }
  983. /* write the new value to the cache */
  984. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  985. codec->driver->reg_word_size)) {
  986. kfree(lzo_block->dst);
  987. goto out;
  988. }
  989. /* prepare the source to be the decompressed block */
  990. lzo_block->src = lzo_block->dst;
  991. lzo_block->src_len = lzo_block->dst_len;
  992. /* compress the block */
  993. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  994. if (ret < 0) {
  995. kfree(lzo_block->dst);
  996. kfree(lzo_block->src);
  997. goto out;
  998. }
  999. /* set the bit so we know we have to sync this register */
  1000. set_bit(reg, lzo_block->sync_bmp);
  1001. kfree(tmp_dst);
  1002. kfree(lzo_block->src);
  1003. return 0;
  1004. out:
  1005. lzo_block->dst = tmp_dst;
  1006. lzo_block->dst_len = tmp_dst_len;
  1007. return ret;
  1008. }
  1009. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  1010. unsigned int reg, unsigned int *value)
  1011. {
  1012. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  1013. int ret, blkindex, blkpos;
  1014. size_t blksize, tmp_dst_len;
  1015. void *tmp_dst;
  1016. *value = 0;
  1017. /* index of the compressed lzo block */
  1018. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  1019. /* register index within the decompressed block */
  1020. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  1021. /* size of the compressed block */
  1022. blksize = snd_soc_lzo_get_blksize(codec);
  1023. lzo_blocks = codec->reg_cache;
  1024. lzo_block = lzo_blocks[blkindex];
  1025. /* save the pointer and length of the compressed block */
  1026. tmp_dst = lzo_block->dst;
  1027. tmp_dst_len = lzo_block->dst_len;
  1028. /* prepare the source to be the compressed block */
  1029. lzo_block->src = lzo_block->dst;
  1030. lzo_block->src_len = lzo_block->dst_len;
  1031. /* decompress the block */
  1032. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  1033. if (ret >= 0)
  1034. /* fetch the value from the cache */
  1035. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  1036. codec->driver->reg_word_size);
  1037. kfree(lzo_block->dst);
  1038. /* restore the pointer and length of the compressed block */
  1039. lzo_block->dst = tmp_dst;
  1040. lzo_block->dst_len = tmp_dst_len;
  1041. return 0;
  1042. }
  1043. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  1044. {
  1045. struct snd_soc_lzo_ctx **lzo_blocks;
  1046. int i, blkcount;
  1047. lzo_blocks = codec->reg_cache;
  1048. if (!lzo_blocks)
  1049. return 0;
  1050. blkcount = snd_soc_lzo_block_count();
  1051. /*
  1052. * the pointer to the bitmap used for syncing the cache
  1053. * is shared amongst all lzo_blocks. Ensure it is freed
  1054. * only once.
  1055. */
  1056. if (lzo_blocks[0])
  1057. kfree(lzo_blocks[0]->sync_bmp);
  1058. for (i = 0; i < blkcount; ++i) {
  1059. if (lzo_blocks[i]) {
  1060. kfree(lzo_blocks[i]->wmem);
  1061. kfree(lzo_blocks[i]->dst);
  1062. }
  1063. /* each lzo_block is a pointer returned by kmalloc or NULL */
  1064. kfree(lzo_blocks[i]);
  1065. }
  1066. kfree(lzo_blocks);
  1067. codec->reg_cache = NULL;
  1068. return 0;
  1069. }
  1070. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  1071. {
  1072. struct snd_soc_lzo_ctx **lzo_blocks;
  1073. size_t bmp_size;
  1074. const struct snd_soc_codec_driver *codec_drv;
  1075. int ret, tofree, i, blksize, blkcount;
  1076. const char *p, *end;
  1077. unsigned long *sync_bmp;
  1078. ret = 0;
  1079. codec_drv = codec->driver;
  1080. /*
  1081. * If we have not been given a default register cache
  1082. * then allocate a dummy zero-ed out region, compress it
  1083. * and remember to free it afterwards.
  1084. */
  1085. tofree = 0;
  1086. if (!codec->reg_def_copy)
  1087. tofree = 1;
  1088. if (!codec->reg_def_copy) {
  1089. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  1090. if (!codec->reg_def_copy)
  1091. return -ENOMEM;
  1092. }
  1093. blkcount = snd_soc_lzo_block_count();
  1094. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  1095. GFP_KERNEL);
  1096. if (!codec->reg_cache) {
  1097. ret = -ENOMEM;
  1098. goto err_tofree;
  1099. }
  1100. lzo_blocks = codec->reg_cache;
  1101. /*
  1102. * allocate a bitmap to be used when syncing the cache with
  1103. * the hardware. Each time a register is modified, the corresponding
  1104. * bit is set in the bitmap, so we know that we have to sync
  1105. * that register.
  1106. */
  1107. bmp_size = codec_drv->reg_cache_size;
  1108. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  1109. GFP_KERNEL);
  1110. if (!sync_bmp) {
  1111. ret = -ENOMEM;
  1112. goto err;
  1113. }
  1114. bitmap_zero(sync_bmp, bmp_size);
  1115. /* allocate the lzo blocks and initialize them */
  1116. for (i = 0; i < blkcount; ++i) {
  1117. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  1118. GFP_KERNEL);
  1119. if (!lzo_blocks[i]) {
  1120. kfree(sync_bmp);
  1121. ret = -ENOMEM;
  1122. goto err;
  1123. }
  1124. lzo_blocks[i]->sync_bmp = sync_bmp;
  1125. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  1126. /* alloc the working space for the compressed block */
  1127. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  1128. if (ret < 0)
  1129. goto err;
  1130. }
  1131. blksize = snd_soc_lzo_get_blksize(codec);
  1132. p = codec->reg_def_copy;
  1133. end = codec->reg_def_copy + codec->reg_size;
  1134. /* compress the register map and fill the lzo blocks */
  1135. for (i = 0; i < blkcount; ++i, p += blksize) {
  1136. lzo_blocks[i]->src = p;
  1137. if (p + blksize > end)
  1138. lzo_blocks[i]->src_len = end - p;
  1139. else
  1140. lzo_blocks[i]->src_len = blksize;
  1141. ret = snd_soc_lzo_compress_cache_block(codec,
  1142. lzo_blocks[i]);
  1143. if (ret < 0)
  1144. goto err;
  1145. lzo_blocks[i]->decompressed_size =
  1146. lzo_blocks[i]->src_len;
  1147. }
  1148. if (tofree) {
  1149. kfree(codec->reg_def_copy);
  1150. codec->reg_def_copy = NULL;
  1151. }
  1152. return 0;
  1153. err:
  1154. snd_soc_cache_exit(codec);
  1155. err_tofree:
  1156. if (tofree) {
  1157. kfree(codec->reg_def_copy);
  1158. codec->reg_def_copy = NULL;
  1159. }
  1160. return ret;
  1161. }
  1162. #endif
  1163. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1164. {
  1165. int i;
  1166. int ret;
  1167. const struct snd_soc_codec_driver *codec_drv;
  1168. unsigned int val;
  1169. codec_drv = codec->driver;
  1170. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1171. ret = snd_soc_cache_read(codec, i, &val);
  1172. if (ret)
  1173. return ret;
  1174. if (codec->reg_def_copy)
  1175. if (snd_soc_get_cache_val(codec->reg_def_copy,
  1176. i, codec_drv->reg_word_size) == val)
  1177. continue;
  1178. ret = snd_soc_write(codec, i, val);
  1179. if (ret)
  1180. return ret;
  1181. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1182. i, val);
  1183. }
  1184. return 0;
  1185. }
  1186. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1187. unsigned int reg, unsigned int value)
  1188. {
  1189. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  1190. codec->driver->reg_word_size);
  1191. return 0;
  1192. }
  1193. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1194. unsigned int reg, unsigned int *value)
  1195. {
  1196. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  1197. codec->driver->reg_word_size);
  1198. return 0;
  1199. }
  1200. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1201. {
  1202. if (!codec->reg_cache)
  1203. return 0;
  1204. kfree(codec->reg_cache);
  1205. codec->reg_cache = NULL;
  1206. return 0;
  1207. }
  1208. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1209. {
  1210. const struct snd_soc_codec_driver *codec_drv;
  1211. codec_drv = codec->driver;
  1212. if (codec->reg_def_copy)
  1213. codec->reg_cache = kmemdup(codec->reg_def_copy,
  1214. codec->reg_size, GFP_KERNEL);
  1215. else
  1216. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  1217. if (!codec->reg_cache)
  1218. return -ENOMEM;
  1219. return 0;
  1220. }
  1221. /* an array of all supported compression types */
  1222. static const struct snd_soc_cache_ops cache_types[] = {
  1223. /* Flat *must* be the first entry for fallback */
  1224. {
  1225. .id = SND_SOC_FLAT_COMPRESSION,
  1226. .name = "flat",
  1227. .init = snd_soc_flat_cache_init,
  1228. .exit = snd_soc_flat_cache_exit,
  1229. .read = snd_soc_flat_cache_read,
  1230. .write = snd_soc_flat_cache_write,
  1231. .sync = snd_soc_flat_cache_sync
  1232. },
  1233. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1234. {
  1235. .id = SND_SOC_LZO_COMPRESSION,
  1236. .name = "LZO",
  1237. .init = snd_soc_lzo_cache_init,
  1238. .exit = snd_soc_lzo_cache_exit,
  1239. .read = snd_soc_lzo_cache_read,
  1240. .write = snd_soc_lzo_cache_write,
  1241. .sync = snd_soc_lzo_cache_sync
  1242. },
  1243. #endif
  1244. {
  1245. .id = SND_SOC_RBTREE_COMPRESSION,
  1246. .name = "rbtree",
  1247. .init = snd_soc_rbtree_cache_init,
  1248. .exit = snd_soc_rbtree_cache_exit,
  1249. .read = snd_soc_rbtree_cache_read,
  1250. .write = snd_soc_rbtree_cache_write,
  1251. .sync = snd_soc_rbtree_cache_sync
  1252. }
  1253. };
  1254. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1255. {
  1256. int i;
  1257. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1258. if (cache_types[i].id == codec->compress_type)
  1259. break;
  1260. /* Fall back to flat compression */
  1261. if (i == ARRAY_SIZE(cache_types)) {
  1262. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1263. codec->compress_type);
  1264. i = 0;
  1265. }
  1266. mutex_init(&codec->cache_rw_mutex);
  1267. codec->cache_ops = &cache_types[i];
  1268. if (codec->cache_ops->init) {
  1269. if (codec->cache_ops->name)
  1270. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1271. codec->cache_ops->name, codec->name);
  1272. return codec->cache_ops->init(codec);
  1273. }
  1274. return -EINVAL;
  1275. }
  1276. /*
  1277. * NOTE: keep in mind that this function might be called
  1278. * multiple times.
  1279. */
  1280. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1281. {
  1282. if (codec->cache_ops && codec->cache_ops->exit) {
  1283. if (codec->cache_ops->name)
  1284. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1285. codec->cache_ops->name, codec->name);
  1286. return codec->cache_ops->exit(codec);
  1287. }
  1288. return -EINVAL;
  1289. }
  1290. /**
  1291. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1292. *
  1293. * @codec: CODEC to configure.
  1294. * @reg: The register index.
  1295. * @value: The value to be returned.
  1296. */
  1297. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1298. unsigned int reg, unsigned int *value)
  1299. {
  1300. int ret;
  1301. mutex_lock(&codec->cache_rw_mutex);
  1302. if (value && codec->cache_ops && codec->cache_ops->read) {
  1303. ret = codec->cache_ops->read(codec, reg, value);
  1304. mutex_unlock(&codec->cache_rw_mutex);
  1305. return ret;
  1306. }
  1307. mutex_unlock(&codec->cache_rw_mutex);
  1308. return -EINVAL;
  1309. }
  1310. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1311. /**
  1312. * snd_soc_cache_write: Set the value of a given register in the cache.
  1313. *
  1314. * @codec: CODEC to configure.
  1315. * @reg: The register index.
  1316. * @value: The new register value.
  1317. */
  1318. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1319. unsigned int reg, unsigned int value)
  1320. {
  1321. int ret;
  1322. mutex_lock(&codec->cache_rw_mutex);
  1323. if (codec->cache_ops && codec->cache_ops->write) {
  1324. ret = codec->cache_ops->write(codec, reg, value);
  1325. mutex_unlock(&codec->cache_rw_mutex);
  1326. return ret;
  1327. }
  1328. mutex_unlock(&codec->cache_rw_mutex);
  1329. return -EINVAL;
  1330. }
  1331. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1332. /**
  1333. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1334. *
  1335. * @codec: CODEC to configure.
  1336. *
  1337. * Any registers that should not be synced should be marked as
  1338. * volatile. In general drivers can choose not to use the provided
  1339. * syncing functionality if they so require.
  1340. */
  1341. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1342. {
  1343. int ret;
  1344. const char *name;
  1345. if (!codec->cache_sync) {
  1346. return 0;
  1347. }
  1348. if (!codec->cache_ops || !codec->cache_ops->sync)
  1349. return -EINVAL;
  1350. if (codec->cache_ops->name)
  1351. name = codec->cache_ops->name;
  1352. else
  1353. name = "unknown";
  1354. if (codec->cache_ops->name)
  1355. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1356. codec->cache_ops->name, codec->name);
  1357. trace_snd_soc_cache_sync(codec, name, "start");
  1358. ret = codec->cache_ops->sync(codec);
  1359. if (!ret)
  1360. codec->cache_sync = 0;
  1361. trace_snd_soc_cache_sync(codec, name, "end");
  1362. return ret;
  1363. }
  1364. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
  1365. static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
  1366. unsigned int reg)
  1367. {
  1368. const struct snd_soc_codec_driver *codec_drv;
  1369. unsigned int min, max, index;
  1370. codec_drv = codec->driver;
  1371. min = 0;
  1372. max = codec_drv->reg_access_size - 1;
  1373. do {
  1374. index = (min + max) / 2;
  1375. if (codec_drv->reg_access_default[index].reg == reg)
  1376. return index;
  1377. if (codec_drv->reg_access_default[index].reg < reg)
  1378. min = index + 1;
  1379. else
  1380. max = index;
  1381. } while (min <= max);
  1382. return -1;
  1383. }
  1384. int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
  1385. unsigned int reg)
  1386. {
  1387. int index;
  1388. if (reg >= codec->driver->reg_cache_size)
  1389. return 1;
  1390. index = snd_soc_get_reg_access_index(codec, reg);
  1391. if (index < 0)
  1392. return 0;
  1393. return codec->driver->reg_access_default[index].vol;
  1394. }
  1395. EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
  1396. int snd_soc_default_readable_register(struct snd_soc_codec *codec,
  1397. unsigned int reg)
  1398. {
  1399. int index;
  1400. if (reg >= codec->driver->reg_cache_size)
  1401. return 1;
  1402. index = snd_soc_get_reg_access_index(codec, reg);
  1403. if (index < 0)
  1404. return 0;
  1405. return codec->driver->reg_access_default[index].read;
  1406. }
  1407. EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);