main.c 101 KB

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  1. /*
  2. *
  3. * Broadcom B43legacy wireless driver
  4. *
  5. * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
  6. * Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
  7. * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
  8. * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  9. * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10. * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11. *
  12. * Some parts of the code in this file are derived from the ipw2200
  13. * driver Copyright(c) 2003 - 2004 Intel Corporation.
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; see the file COPYING. If not, write to
  26. * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  27. * Boston, MA 02110-1301, USA.
  28. *
  29. */
  30. #include <linux/delay.h>
  31. #include <linux/init.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/if_arp.h>
  34. #include <linux/etherdevice.h>
  35. #include <linux/version.h>
  36. #include <linux/firmware.h>
  37. #include <linux/wireless.h>
  38. #include <linux/workqueue.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/dma-mapping.h>
  41. #include <net/dst.h>
  42. #include <asm/unaligned.h>
  43. #include "b43legacy.h"
  44. #include "main.h"
  45. #include "debugfs.h"
  46. #include "phy.h"
  47. #include "dma.h"
  48. #include "pio.h"
  49. #include "sysfs.h"
  50. #include "xmit.h"
  51. #include "radio.h"
  52. MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  53. MODULE_AUTHOR("Martin Langer");
  54. MODULE_AUTHOR("Stefano Brivio");
  55. MODULE_AUTHOR("Michael Buesch");
  56. MODULE_LICENSE("GPL");
  57. #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  58. static int modparam_pio;
  59. module_param_named(pio, modparam_pio, int, 0444);
  60. MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  61. #elif defined(CONFIG_B43LEGACY_DMA)
  62. # define modparam_pio 0
  63. #elif defined(CONFIG_B43LEGACY_PIO)
  64. # define modparam_pio 1
  65. #endif
  66. static int modparam_bad_frames_preempt;
  67. module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  68. MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  69. " Preemption");
  70. static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
  71. module_param_named(short_retry, modparam_short_retry, int, 0444);
  72. MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
  73. static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
  74. module_param_named(long_retry, modparam_long_retry, int, 0444);
  75. MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
  76. static char modparam_fwpostfix[16];
  77. module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  78. MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  79. /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  80. static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  81. SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  82. SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  83. SSB_DEVTABLE_END
  84. };
  85. MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  86. /* Channel and ratetables are shared for all devices.
  87. * They can't be const, because ieee80211 puts some precalculated
  88. * data in there. This data is the same for all devices, so we don't
  89. * get concurrency issues */
  90. #define RATETAB_ENT(_rateid, _flags) \
  91. { \
  92. .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
  93. .val = (_rateid), \
  94. .val2 = (_rateid), \
  95. .flags = (_flags), \
  96. }
  97. static struct ieee80211_rate __b43legacy_ratetable[] = {
  98. RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
  99. RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
  100. RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
  101. RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
  102. RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
  103. RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
  104. RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
  105. RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
  106. RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
  107. RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
  108. RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
  109. RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
  110. };
  111. #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
  112. #define b43legacy_a_ratetable_size 8
  113. #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
  114. #define b43legacy_b_ratetable_size 4
  115. #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
  116. #define b43legacy_g_ratetable_size 12
  117. #define CHANTAB_ENT(_chanid, _freq) \
  118. { \
  119. .chan = (_chanid), \
  120. .freq = (_freq), \
  121. .val = (_chanid), \
  122. .flag = IEEE80211_CHAN_W_SCAN | \
  123. IEEE80211_CHAN_W_ACTIVE_SCAN | \
  124. IEEE80211_CHAN_W_IBSS, \
  125. .power_level = 0x0A, \
  126. .antenna_max = 0xFF, \
  127. }
  128. static struct ieee80211_channel b43legacy_bg_chantable[] = {
  129. CHANTAB_ENT(1, 2412),
  130. CHANTAB_ENT(2, 2417),
  131. CHANTAB_ENT(3, 2422),
  132. CHANTAB_ENT(4, 2427),
  133. CHANTAB_ENT(5, 2432),
  134. CHANTAB_ENT(6, 2437),
  135. CHANTAB_ENT(7, 2442),
  136. CHANTAB_ENT(8, 2447),
  137. CHANTAB_ENT(9, 2452),
  138. CHANTAB_ENT(10, 2457),
  139. CHANTAB_ENT(11, 2462),
  140. CHANTAB_ENT(12, 2467),
  141. CHANTAB_ENT(13, 2472),
  142. CHANTAB_ENT(14, 2484),
  143. };
  144. #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
  145. static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
  146. static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
  147. static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
  148. static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
  149. static int b43legacy_ratelimit(struct b43legacy_wl *wl)
  150. {
  151. if (!wl || !wl->current_dev)
  152. return 1;
  153. if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
  154. return 1;
  155. /* We are up and running.
  156. * Ratelimit the messages to avoid DoS over the net. */
  157. return net_ratelimit();
  158. }
  159. void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
  160. {
  161. va_list args;
  162. if (!b43legacy_ratelimit(wl))
  163. return;
  164. va_start(args, fmt);
  165. printk(KERN_INFO "b43legacy-%s: ",
  166. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
  167. vprintk(fmt, args);
  168. va_end(args);
  169. }
  170. void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
  171. {
  172. va_list args;
  173. if (!b43legacy_ratelimit(wl))
  174. return;
  175. va_start(args, fmt);
  176. printk(KERN_ERR "b43legacy-%s ERROR: ",
  177. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
  178. vprintk(fmt, args);
  179. va_end(args);
  180. }
  181. void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
  182. {
  183. va_list args;
  184. if (!b43legacy_ratelimit(wl))
  185. return;
  186. va_start(args, fmt);
  187. printk(KERN_WARNING "b43legacy-%s warning: ",
  188. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
  189. vprintk(fmt, args);
  190. va_end(args);
  191. }
  192. #if B43legacy_DEBUG
  193. void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
  194. {
  195. va_list args;
  196. va_start(args, fmt);
  197. printk(KERN_DEBUG "b43legacy-%s debug: ",
  198. (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
  199. vprintk(fmt, args);
  200. va_end(args);
  201. }
  202. #endif /* DEBUG */
  203. static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
  204. u32 val)
  205. {
  206. u32 status;
  207. B43legacy_WARN_ON(offset % 4 != 0);
  208. status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  209. if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
  210. val = swab32(val);
  211. b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
  212. mmiowb();
  213. b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
  214. }
  215. static inline
  216. void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
  217. u16 routing, u16 offset)
  218. {
  219. u32 control;
  220. /* "offset" is the WORD offset. */
  221. control = routing;
  222. control <<= 16;
  223. control |= offset;
  224. b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
  225. }
  226. u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
  227. u16 routing, u16 offset)
  228. {
  229. u32 ret;
  230. if (routing == B43legacy_SHM_SHARED) {
  231. B43legacy_WARN_ON((offset & 0x0001) != 0);
  232. if (offset & 0x0003) {
  233. /* Unaligned access */
  234. b43legacy_shm_control_word(dev, routing, offset >> 2);
  235. ret = b43legacy_read16(dev,
  236. B43legacy_MMIO_SHM_DATA_UNALIGNED);
  237. ret <<= 16;
  238. b43legacy_shm_control_word(dev, routing,
  239. (offset >> 2) + 1);
  240. ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
  241. return ret;
  242. }
  243. offset >>= 2;
  244. }
  245. b43legacy_shm_control_word(dev, routing, offset);
  246. ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
  247. return ret;
  248. }
  249. u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
  250. u16 routing, u16 offset)
  251. {
  252. u16 ret;
  253. if (routing == B43legacy_SHM_SHARED) {
  254. B43legacy_WARN_ON((offset & 0x0001) != 0);
  255. if (offset & 0x0003) {
  256. /* Unaligned access */
  257. b43legacy_shm_control_word(dev, routing, offset >> 2);
  258. ret = b43legacy_read16(dev,
  259. B43legacy_MMIO_SHM_DATA_UNALIGNED);
  260. return ret;
  261. }
  262. offset >>= 2;
  263. }
  264. b43legacy_shm_control_word(dev, routing, offset);
  265. ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
  266. return ret;
  267. }
  268. void b43legacy_shm_write32(struct b43legacy_wldev *dev,
  269. u16 routing, u16 offset,
  270. u32 value)
  271. {
  272. if (routing == B43legacy_SHM_SHARED) {
  273. B43legacy_WARN_ON((offset & 0x0001) != 0);
  274. if (offset & 0x0003) {
  275. /* Unaligned access */
  276. b43legacy_shm_control_word(dev, routing, offset >> 2);
  277. mmiowb();
  278. b43legacy_write16(dev,
  279. B43legacy_MMIO_SHM_DATA_UNALIGNED,
  280. (value >> 16) & 0xffff);
  281. mmiowb();
  282. b43legacy_shm_control_word(dev, routing,
  283. (offset >> 2) + 1);
  284. mmiowb();
  285. b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
  286. value & 0xffff);
  287. return;
  288. }
  289. offset >>= 2;
  290. }
  291. b43legacy_shm_control_word(dev, routing, offset);
  292. mmiowb();
  293. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
  294. }
  295. void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
  296. u16 value)
  297. {
  298. if (routing == B43legacy_SHM_SHARED) {
  299. B43legacy_WARN_ON((offset & 0x0001) != 0);
  300. if (offset & 0x0003) {
  301. /* Unaligned access */
  302. b43legacy_shm_control_word(dev, routing, offset >> 2);
  303. mmiowb();
  304. b43legacy_write16(dev,
  305. B43legacy_MMIO_SHM_DATA_UNALIGNED,
  306. value);
  307. return;
  308. }
  309. offset >>= 2;
  310. }
  311. b43legacy_shm_control_word(dev, routing, offset);
  312. mmiowb();
  313. b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
  314. }
  315. /* Read HostFlags */
  316. u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
  317. {
  318. u32 ret;
  319. ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  320. B43legacy_SHM_SH_HOSTFHI);
  321. ret <<= 16;
  322. ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  323. B43legacy_SHM_SH_HOSTFLO);
  324. return ret;
  325. }
  326. /* Write HostFlags */
  327. void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
  328. {
  329. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  330. B43legacy_SHM_SH_HOSTFLO,
  331. (value & 0x0000FFFF));
  332. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  333. B43legacy_SHM_SH_HOSTFHI,
  334. ((value & 0xFFFF0000) >> 16));
  335. }
  336. void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
  337. {
  338. /* We need to be careful. As we read the TSF from multiple
  339. * registers, we should take care of register overflows.
  340. * In theory, the whole tsf read process should be atomic.
  341. * We try to be atomic here, by restaring the read process,
  342. * if any of the high registers changed (overflew).
  343. */
  344. if (dev->dev->id.revision >= 3) {
  345. u32 low;
  346. u32 high;
  347. u32 high2;
  348. do {
  349. high = b43legacy_read32(dev,
  350. B43legacy_MMIO_REV3PLUS_TSF_HIGH);
  351. low = b43legacy_read32(dev,
  352. B43legacy_MMIO_REV3PLUS_TSF_LOW);
  353. high2 = b43legacy_read32(dev,
  354. B43legacy_MMIO_REV3PLUS_TSF_HIGH);
  355. } while (unlikely(high != high2));
  356. *tsf = high;
  357. *tsf <<= 32;
  358. *tsf |= low;
  359. } else {
  360. u64 tmp;
  361. u16 v0;
  362. u16 v1;
  363. u16 v2;
  364. u16 v3;
  365. u16 test1;
  366. u16 test2;
  367. u16 test3;
  368. do {
  369. v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
  370. v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
  371. v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
  372. v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
  373. test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
  374. test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
  375. test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
  376. } while (v3 != test3 || v2 != test2 || v1 != test1);
  377. *tsf = v3;
  378. *tsf <<= 48;
  379. tmp = v2;
  380. tmp <<= 32;
  381. *tsf |= tmp;
  382. tmp = v1;
  383. tmp <<= 16;
  384. *tsf |= tmp;
  385. *tsf |= v0;
  386. }
  387. }
  388. static void b43legacy_time_lock(struct b43legacy_wldev *dev)
  389. {
  390. u32 status;
  391. status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  392. status |= B43legacy_SBF_TIME_UPDATE;
  393. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
  394. mmiowb();
  395. }
  396. static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
  397. {
  398. u32 status;
  399. status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  400. status &= ~B43legacy_SBF_TIME_UPDATE;
  401. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
  402. }
  403. static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
  404. {
  405. /* Be careful with the in-progress timer.
  406. * First zero out the low register, so we have a full
  407. * register-overflow duration to complete the operation.
  408. */
  409. if (dev->dev->id.revision >= 3) {
  410. u32 lo = (tsf & 0x00000000FFFFFFFFULL);
  411. u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
  412. b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
  413. mmiowb();
  414. b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
  415. hi);
  416. mmiowb();
  417. b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
  418. lo);
  419. } else {
  420. u16 v0 = (tsf & 0x000000000000FFFFULL);
  421. u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
  422. u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
  423. u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
  424. b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
  425. mmiowb();
  426. b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
  427. mmiowb();
  428. b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
  429. mmiowb();
  430. b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
  431. mmiowb();
  432. b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
  433. }
  434. }
  435. void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
  436. {
  437. b43legacy_time_lock(dev);
  438. b43legacy_tsf_write_locked(dev, tsf);
  439. b43legacy_time_unlock(dev);
  440. }
  441. static
  442. void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
  443. u16 offset, const u8 *mac)
  444. {
  445. static const u8 zero_addr[ETH_ALEN] = { 0 };
  446. u16 data;
  447. if (!mac)
  448. mac = zero_addr;
  449. offset |= 0x0020;
  450. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
  451. data = mac[0];
  452. data |= mac[1] << 8;
  453. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
  454. data = mac[2];
  455. data |= mac[3] << 8;
  456. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
  457. data = mac[4];
  458. data |= mac[5] << 8;
  459. b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
  460. }
  461. static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
  462. {
  463. static const u8 zero_addr[ETH_ALEN] = { 0 };
  464. const u8 *mac = dev->wl->mac_addr;
  465. const u8 *bssid = dev->wl->bssid;
  466. u8 mac_bssid[ETH_ALEN * 2];
  467. int i;
  468. u32 tmp;
  469. if (!bssid)
  470. bssid = zero_addr;
  471. if (!mac)
  472. mac = zero_addr;
  473. b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
  474. memcpy(mac_bssid, mac, ETH_ALEN);
  475. memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
  476. /* Write our MAC address and BSSID to template ram */
  477. for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
  478. tmp = (u32)(mac_bssid[i + 0]);
  479. tmp |= (u32)(mac_bssid[i + 1]) << 8;
  480. tmp |= (u32)(mac_bssid[i + 2]) << 16;
  481. tmp |= (u32)(mac_bssid[i + 3]) << 24;
  482. b43legacy_ram_write(dev, 0x20 + i, tmp);
  483. b43legacy_ram_write(dev, 0x78 + i, tmp);
  484. b43legacy_ram_write(dev, 0x478 + i, tmp);
  485. }
  486. }
  487. static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
  488. {
  489. b43legacy_write_mac_bssid_templates(dev);
  490. b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
  491. dev->wl->mac_addr);
  492. }
  493. static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
  494. u16 slot_time)
  495. {
  496. /* slot_time is in usec. */
  497. if (dev->phy.type != B43legacy_PHYTYPE_G)
  498. return;
  499. b43legacy_write16(dev, 0x684, 510 + slot_time);
  500. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
  501. slot_time);
  502. }
  503. static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
  504. {
  505. b43legacy_set_slot_time(dev, 9);
  506. dev->short_slot = 1;
  507. }
  508. static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
  509. {
  510. b43legacy_set_slot_time(dev, 20);
  511. dev->short_slot = 0;
  512. }
  513. /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
  514. * Returns the _previously_ enabled IRQ mask.
  515. */
  516. static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
  517. u32 mask)
  518. {
  519. u32 old_mask;
  520. old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
  521. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
  522. mask);
  523. return old_mask;
  524. }
  525. /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
  526. * Returns the _previously_ enabled IRQ mask.
  527. */
  528. static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
  529. u32 mask)
  530. {
  531. u32 old_mask;
  532. old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
  533. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
  534. return old_mask;
  535. }
  536. /* Synchronize IRQ top- and bottom-half.
  537. * IRQs must be masked before calling this.
  538. * This must not be called with the irq_lock held.
  539. */
  540. static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
  541. {
  542. synchronize_irq(dev->dev->irq);
  543. tasklet_kill(&dev->isr_tasklet);
  544. }
  545. /* DummyTransmission function, as documented on
  546. * http://bcm-specs.sipsolutions.net/DummyTransmission
  547. */
  548. void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
  549. {
  550. struct b43legacy_phy *phy = &dev->phy;
  551. unsigned int i;
  552. unsigned int max_loop;
  553. u16 value;
  554. u32 buffer[5] = {
  555. 0x00000000,
  556. 0x00D40000,
  557. 0x00000000,
  558. 0x01000000,
  559. 0x00000000,
  560. };
  561. switch (phy->type) {
  562. case B43legacy_PHYTYPE_B:
  563. case B43legacy_PHYTYPE_G:
  564. max_loop = 0xFA;
  565. buffer[0] = 0x000B846E;
  566. break;
  567. default:
  568. B43legacy_BUG_ON(1);
  569. return;
  570. }
  571. for (i = 0; i < 5; i++)
  572. b43legacy_ram_write(dev, i * 4, buffer[i]);
  573. /* dummy read follows */
  574. b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  575. b43legacy_write16(dev, 0x0568, 0x0000);
  576. b43legacy_write16(dev, 0x07C0, 0x0000);
  577. b43legacy_write16(dev, 0x050C, 0x0000);
  578. b43legacy_write16(dev, 0x0508, 0x0000);
  579. b43legacy_write16(dev, 0x050A, 0x0000);
  580. b43legacy_write16(dev, 0x054C, 0x0000);
  581. b43legacy_write16(dev, 0x056A, 0x0014);
  582. b43legacy_write16(dev, 0x0568, 0x0826);
  583. b43legacy_write16(dev, 0x0500, 0x0000);
  584. b43legacy_write16(dev, 0x0502, 0x0030);
  585. if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
  586. b43legacy_radio_write16(dev, 0x0051, 0x0017);
  587. for (i = 0x00; i < max_loop; i++) {
  588. value = b43legacy_read16(dev, 0x050E);
  589. if (value & 0x0080)
  590. break;
  591. udelay(10);
  592. }
  593. for (i = 0x00; i < 0x0A; i++) {
  594. value = b43legacy_read16(dev, 0x050E);
  595. if (value & 0x0400)
  596. break;
  597. udelay(10);
  598. }
  599. for (i = 0x00; i < 0x0A; i++) {
  600. value = b43legacy_read16(dev, 0x0690);
  601. if (!(value & 0x0100))
  602. break;
  603. udelay(10);
  604. }
  605. if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
  606. b43legacy_radio_write16(dev, 0x0051, 0x0037);
  607. }
  608. /* Turn the Analog ON/OFF */
  609. static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
  610. {
  611. b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
  612. }
  613. void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
  614. {
  615. u32 tmslow;
  616. u32 macctl;
  617. flags |= B43legacy_TMSLOW_PHYCLKEN;
  618. flags |= B43legacy_TMSLOW_PHYRESET;
  619. ssb_device_enable(dev->dev, flags);
  620. msleep(2); /* Wait for the PLL to turn on. */
  621. /* Now take the PHY out of Reset again */
  622. tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
  623. tmslow |= SSB_TMSLOW_FGC;
  624. tmslow &= ~B43legacy_TMSLOW_PHYRESET;
  625. ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
  626. ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
  627. msleep(1);
  628. tmslow &= ~SSB_TMSLOW_FGC;
  629. ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
  630. ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
  631. msleep(1);
  632. /* Turn Analog ON */
  633. b43legacy_switch_analog(dev, 1);
  634. macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  635. macctl &= ~B43legacy_MACCTL_GMODE;
  636. if (flags & B43legacy_TMSLOW_GMODE) {
  637. macctl |= B43legacy_MACCTL_GMODE;
  638. dev->phy.gmode = 1;
  639. } else
  640. dev->phy.gmode = 0;
  641. macctl |= B43legacy_MACCTL_IHR_ENABLED;
  642. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
  643. }
  644. static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
  645. {
  646. u32 v0;
  647. u32 v1;
  648. u16 tmp;
  649. struct b43legacy_txstatus stat;
  650. while (1) {
  651. v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
  652. if (!(v0 & 0x00000001))
  653. break;
  654. v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
  655. stat.cookie = (v0 >> 16);
  656. stat.seq = (v1 & 0x0000FFFF);
  657. stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
  658. tmp = (v0 & 0x0000FFFF);
  659. stat.frame_count = ((tmp & 0xF000) >> 12);
  660. stat.rts_count = ((tmp & 0x0F00) >> 8);
  661. stat.supp_reason = ((tmp & 0x001C) >> 2);
  662. stat.pm_indicated = !!(tmp & 0x0080);
  663. stat.intermediate = !!(tmp & 0x0040);
  664. stat.for_ampdu = !!(tmp & 0x0020);
  665. stat.acked = !!(tmp & 0x0002);
  666. b43legacy_handle_txstatus(dev, &stat);
  667. }
  668. }
  669. static void drain_txstatus_queue(struct b43legacy_wldev *dev)
  670. {
  671. u32 dummy;
  672. if (dev->dev->id.revision < 5)
  673. return;
  674. /* Read all entries from the microcode TXstatus FIFO
  675. * and throw them away.
  676. */
  677. while (1) {
  678. dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
  679. if (!(dummy & 0x00000001))
  680. break;
  681. dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
  682. }
  683. }
  684. static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
  685. {
  686. u32 val = 0;
  687. val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
  688. val <<= 16;
  689. val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
  690. return val;
  691. }
  692. static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
  693. {
  694. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
  695. (jssi & 0x0000FFFF));
  696. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
  697. (jssi & 0xFFFF0000) >> 16);
  698. }
  699. static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
  700. {
  701. b43legacy_jssi_write(dev, 0x7F7F7F7F);
  702. b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
  703. b43legacy_read32(dev,
  704. B43legacy_MMIO_STATUS2_BITFIELD)
  705. | (1 << 4));
  706. B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
  707. dev->phy.channel);
  708. }
  709. static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
  710. {
  711. /* Top half of Link Quality calculation. */
  712. if (dev->noisecalc.calculation_running)
  713. return;
  714. dev->noisecalc.channel_at_start = dev->phy.channel;
  715. dev->noisecalc.calculation_running = 1;
  716. dev->noisecalc.nr_samples = 0;
  717. b43legacy_generate_noise_sample(dev);
  718. }
  719. static void handle_irq_noise(struct b43legacy_wldev *dev)
  720. {
  721. struct b43legacy_phy *phy = &dev->phy;
  722. u16 tmp;
  723. u8 noise[4];
  724. u8 i;
  725. u8 j;
  726. s32 average;
  727. /* Bottom half of Link Quality calculation. */
  728. B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
  729. if (dev->noisecalc.channel_at_start != phy->channel)
  730. goto drop_calculation;
  731. *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
  732. if (noise[0] == 0x7F || noise[1] == 0x7F ||
  733. noise[2] == 0x7F || noise[3] == 0x7F)
  734. goto generate_new;
  735. /* Get the noise samples. */
  736. B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
  737. i = dev->noisecalc.nr_samples;
  738. noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  739. noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  740. noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  741. noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
  742. dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
  743. dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
  744. dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
  745. dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
  746. dev->noisecalc.nr_samples++;
  747. if (dev->noisecalc.nr_samples == 8) {
  748. /* Calculate the Link Quality by the noise samples. */
  749. average = 0;
  750. for (i = 0; i < 8; i++) {
  751. for (j = 0; j < 4; j++)
  752. average += dev->noisecalc.samples[i][j];
  753. }
  754. average /= (8 * 4);
  755. average *= 125;
  756. average += 64;
  757. average /= 128;
  758. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  759. 0x40C);
  760. tmp = (tmp / 128) & 0x1F;
  761. if (tmp >= 8)
  762. average += 2;
  763. else
  764. average -= 25;
  765. if (tmp == 8)
  766. average -= 72;
  767. else
  768. average -= 48;
  769. dev->stats.link_noise = average;
  770. drop_calculation:
  771. dev->noisecalc.calculation_running = 0;
  772. return;
  773. }
  774. generate_new:
  775. b43legacy_generate_noise_sample(dev);
  776. }
  777. static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
  778. {
  779. if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
  780. /* TODO: PS TBTT */
  781. } else {
  782. if (1/*FIXME: the last PSpoll frame was sent successfully */)
  783. b43legacy_power_saving_ctl_bits(dev, -1, -1);
  784. }
  785. dev->reg124_set_0x4 = 0;
  786. if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
  787. dev->reg124_set_0x4 = 1;
  788. }
  789. static void handle_irq_atim_end(struct b43legacy_wldev *dev)
  790. {
  791. if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
  792. return;
  793. b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
  794. b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
  795. | 0x4);
  796. }
  797. static void handle_irq_pmq(struct b43legacy_wldev *dev)
  798. {
  799. u32 tmp;
  800. /* TODO: AP mode. */
  801. while (1) {
  802. tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
  803. if (!(tmp & 0x00000008))
  804. break;
  805. }
  806. /* 16bit write is odd, but correct. */
  807. b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
  808. }
  809. static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
  810. const u8 *data, u16 size,
  811. u16 ram_offset,
  812. u16 shm_size_offset, u8 rate)
  813. {
  814. u32 i;
  815. u32 tmp;
  816. struct b43legacy_plcp_hdr4 plcp;
  817. plcp.data = 0;
  818. b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
  819. b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
  820. ram_offset += sizeof(u32);
  821. /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
  822. * So leave the first two bytes of the next write blank.
  823. */
  824. tmp = (u32)(data[0]) << 16;
  825. tmp |= (u32)(data[1]) << 24;
  826. b43legacy_ram_write(dev, ram_offset, tmp);
  827. ram_offset += sizeof(u32);
  828. for (i = 2; i < size; i += sizeof(u32)) {
  829. tmp = (u32)(data[i + 0]);
  830. if (i + 1 < size)
  831. tmp |= (u32)(data[i + 1]) << 8;
  832. if (i + 2 < size)
  833. tmp |= (u32)(data[i + 2]) << 16;
  834. if (i + 3 < size)
  835. tmp |= (u32)(data[i + 3]) << 24;
  836. b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
  837. }
  838. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
  839. size + sizeof(struct b43legacy_plcp_hdr6));
  840. }
  841. static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
  842. u16 ram_offset,
  843. u16 shm_size_offset, u8 rate)
  844. {
  845. int len;
  846. const u8 *data;
  847. B43legacy_WARN_ON(!dev->cached_beacon);
  848. len = min((size_t)dev->cached_beacon->len,
  849. 0x200 - sizeof(struct b43legacy_plcp_hdr6));
  850. data = (const u8 *)(dev->cached_beacon->data);
  851. b43legacy_write_template_common(dev, data,
  852. len, ram_offset,
  853. shm_size_offset, rate);
  854. }
  855. static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
  856. u16 shm_offset, u16 size,
  857. u8 rate)
  858. {
  859. struct b43legacy_plcp_hdr4 plcp;
  860. u32 tmp;
  861. __le16 dur;
  862. plcp.data = 0;
  863. b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
  864. dur = ieee80211_generic_frame_duration(dev->wl->hw,
  865. dev->wl->if_id,
  866. size,
  867. B43legacy_RATE_TO_100KBPS(rate));
  868. /* Write PLCP in two parts and timing for packet transfer */
  869. tmp = le32_to_cpu(plcp.data);
  870. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
  871. tmp & 0xFFFF);
  872. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
  873. tmp >> 16);
  874. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
  875. le16_to_cpu(dur));
  876. }
  877. /* Instead of using custom probe response template, this function
  878. * just patches custom beacon template by:
  879. * 1) Changing packet type
  880. * 2) Patching duration field
  881. * 3) Stripping TIM
  882. */
  883. static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
  884. u16 *dest_size, u8 rate)
  885. {
  886. const u8 *src_data;
  887. u8 *dest_data;
  888. u16 src_size;
  889. u16 elem_size;
  890. u16 src_pos;
  891. u16 dest_pos;
  892. __le16 dur;
  893. struct ieee80211_hdr *hdr;
  894. B43legacy_WARN_ON(!dev->cached_beacon);
  895. src_size = dev->cached_beacon->len;
  896. src_data = (const u8 *)dev->cached_beacon->data;
  897. if (unlikely(src_size < 0x24)) {
  898. b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
  899. "invalid beacon\n");
  900. return NULL;
  901. }
  902. dest_data = kmalloc(src_size, GFP_ATOMIC);
  903. if (unlikely(!dest_data))
  904. return NULL;
  905. /* 0x24 is offset of first variable-len Information-Element
  906. * in beacon frame.
  907. */
  908. memcpy(dest_data, src_data, 0x24);
  909. src_pos = 0x24;
  910. dest_pos = 0x24;
  911. for (; src_pos < src_size - 2; src_pos += elem_size) {
  912. elem_size = src_data[src_pos + 1] + 2;
  913. if (src_data[src_pos] != 0x05) { /* TIM */
  914. memcpy(dest_data + dest_pos, src_data + src_pos,
  915. elem_size);
  916. dest_pos += elem_size;
  917. }
  918. }
  919. *dest_size = dest_pos;
  920. hdr = (struct ieee80211_hdr *)dest_data;
  921. /* Set the frame control. */
  922. hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
  923. IEEE80211_STYPE_PROBE_RESP);
  924. dur = ieee80211_generic_frame_duration(dev->wl->hw,
  925. dev->wl->if_id,
  926. *dest_size,
  927. B43legacy_RATE_TO_100KBPS(rate));
  928. hdr->duration_id = dur;
  929. return dest_data;
  930. }
  931. static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
  932. u16 ram_offset,
  933. u16 shm_size_offset, u8 rate)
  934. {
  935. u8 *probe_resp_data;
  936. u16 size;
  937. B43legacy_WARN_ON(!dev->cached_beacon);
  938. size = dev->cached_beacon->len;
  939. probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
  940. if (unlikely(!probe_resp_data))
  941. return;
  942. /* Looks like PLCP headers plus packet timings are stored for
  943. * all possible basic rates
  944. */
  945. b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
  946. B43legacy_CCK_RATE_1MB);
  947. b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
  948. B43legacy_CCK_RATE_2MB);
  949. b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
  950. B43legacy_CCK_RATE_5MB);
  951. b43legacy_write_probe_resp_plcp(dev, 0x350, size,
  952. B43legacy_CCK_RATE_11MB);
  953. size = min((size_t)size,
  954. 0x200 - sizeof(struct b43legacy_plcp_hdr6));
  955. b43legacy_write_template_common(dev, probe_resp_data,
  956. size, ram_offset,
  957. shm_size_offset, rate);
  958. kfree(probe_resp_data);
  959. }
  960. static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
  961. struct sk_buff *beacon)
  962. {
  963. if (dev->cached_beacon)
  964. kfree_skb(dev->cached_beacon);
  965. dev->cached_beacon = beacon;
  966. return 0;
  967. }
  968. static void b43legacy_update_templates(struct b43legacy_wldev *dev)
  969. {
  970. u32 status;
  971. B43legacy_WARN_ON(!dev->cached_beacon);
  972. b43legacy_write_beacon_template(dev, 0x68, 0x18,
  973. B43legacy_CCK_RATE_1MB);
  974. b43legacy_write_beacon_template(dev, 0x468, 0x1A,
  975. B43legacy_CCK_RATE_1MB);
  976. b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
  977. B43legacy_CCK_RATE_11MB);
  978. status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
  979. status |= 0x03;
  980. b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
  981. }
  982. static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
  983. struct sk_buff *beacon)
  984. {
  985. int err;
  986. err = b43legacy_refresh_cached_beacon(dev, beacon);
  987. if (unlikely(err))
  988. return;
  989. b43legacy_update_templates(dev);
  990. }
  991. static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
  992. const u8 *ssid, u8 ssid_len)
  993. {
  994. u32 tmp;
  995. u16 i;
  996. u16 len;
  997. len = min((u16)ssid_len, (u16)0x100);
  998. for (i = 0; i < len; i += sizeof(u32)) {
  999. tmp = (u32)(ssid[i + 0]);
  1000. if (i + 1 < len)
  1001. tmp |= (u32)(ssid[i + 1]) << 8;
  1002. if (i + 2 < len)
  1003. tmp |= (u32)(ssid[i + 2]) << 16;
  1004. if (i + 3 < len)
  1005. tmp |= (u32)(ssid[i + 3]) << 24;
  1006. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
  1007. 0x380 + i, tmp);
  1008. }
  1009. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  1010. 0x48, len);
  1011. }
  1012. static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
  1013. u16 beacon_int)
  1014. {
  1015. b43legacy_time_lock(dev);
  1016. if (dev->dev->id.revision >= 3)
  1017. b43legacy_write32(dev, 0x188, (beacon_int << 16));
  1018. else {
  1019. b43legacy_write16(dev, 0x606, (beacon_int >> 6));
  1020. b43legacy_write16(dev, 0x610, beacon_int);
  1021. }
  1022. b43legacy_time_unlock(dev);
  1023. }
  1024. static void handle_irq_beacon(struct b43legacy_wldev *dev)
  1025. {
  1026. u32 status;
  1027. if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
  1028. return;
  1029. dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
  1030. status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
  1031. if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
  1032. /* ACK beacon IRQ. */
  1033. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
  1034. B43legacy_IRQ_BEACON);
  1035. dev->irq_savedstate |= B43legacy_IRQ_BEACON;
  1036. if (dev->cached_beacon)
  1037. kfree_skb(dev->cached_beacon);
  1038. dev->cached_beacon = NULL;
  1039. return;
  1040. }
  1041. if (!(status & 0x1)) {
  1042. b43legacy_write_beacon_template(dev, 0x68, 0x18,
  1043. B43legacy_CCK_RATE_1MB);
  1044. status |= 0x1;
  1045. b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
  1046. status);
  1047. }
  1048. if (!(status & 0x2)) {
  1049. b43legacy_write_beacon_template(dev, 0x468, 0x1A,
  1050. B43legacy_CCK_RATE_1MB);
  1051. status |= 0x2;
  1052. b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
  1053. status);
  1054. }
  1055. }
  1056. static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
  1057. {
  1058. }
  1059. /* Interrupt handler bottom-half */
  1060. static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
  1061. {
  1062. u32 reason;
  1063. u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
  1064. u32 merged_dma_reason = 0;
  1065. int i;
  1066. unsigned long flags;
  1067. spin_lock_irqsave(&dev->wl->irq_lock, flags);
  1068. B43legacy_WARN_ON(b43legacy_status(dev) <
  1069. B43legacy_STAT_INITIALIZED);
  1070. reason = dev->irq_reason;
  1071. for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
  1072. dma_reason[i] = dev->dma_reason[i];
  1073. merged_dma_reason |= dma_reason[i];
  1074. }
  1075. if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
  1076. b43legacyerr(dev->wl, "MAC transmission error\n");
  1077. if (unlikely(reason & B43legacy_IRQ_PHY_TXERR))
  1078. b43legacyerr(dev->wl, "PHY transmission error\n");
  1079. if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
  1080. B43legacy_DMAIRQ_NONFATALMASK))) {
  1081. if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
  1082. b43legacyerr(dev->wl, "Fatal DMA error: "
  1083. "0x%08X, 0x%08X, 0x%08X, "
  1084. "0x%08X, 0x%08X, 0x%08X\n",
  1085. dma_reason[0], dma_reason[1],
  1086. dma_reason[2], dma_reason[3],
  1087. dma_reason[4], dma_reason[5]);
  1088. b43legacy_controller_restart(dev, "DMA error");
  1089. mmiowb();
  1090. spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
  1091. return;
  1092. }
  1093. if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
  1094. b43legacyerr(dev->wl, "DMA error: "
  1095. "0x%08X, 0x%08X, 0x%08X, "
  1096. "0x%08X, 0x%08X, 0x%08X\n",
  1097. dma_reason[0], dma_reason[1],
  1098. dma_reason[2], dma_reason[3],
  1099. dma_reason[4], dma_reason[5]);
  1100. }
  1101. if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
  1102. handle_irq_ucode_debug(dev);
  1103. if (reason & B43legacy_IRQ_TBTT_INDI)
  1104. handle_irq_tbtt_indication(dev);
  1105. if (reason & B43legacy_IRQ_ATIM_END)
  1106. handle_irq_atim_end(dev);
  1107. if (reason & B43legacy_IRQ_BEACON)
  1108. handle_irq_beacon(dev);
  1109. if (reason & B43legacy_IRQ_PMQ)
  1110. handle_irq_pmq(dev);
  1111. if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
  1112. ;/*TODO*/
  1113. if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
  1114. handle_irq_noise(dev);
  1115. /* Check the DMA reason registers for received data. */
  1116. if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
  1117. if (b43legacy_using_pio(dev))
  1118. b43legacy_pio_rx(dev->pio.queue0);
  1119. else
  1120. b43legacy_dma_rx(dev->dma.rx_ring0);
  1121. }
  1122. B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
  1123. B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
  1124. if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
  1125. if (b43legacy_using_pio(dev))
  1126. b43legacy_pio_rx(dev->pio.queue3);
  1127. else
  1128. b43legacy_dma_rx(dev->dma.rx_ring3);
  1129. }
  1130. B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
  1131. B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
  1132. if (reason & B43legacy_IRQ_TX_OK)
  1133. handle_irq_transmit_status(dev);
  1134. b43legacy_interrupt_enable(dev, dev->irq_savedstate);
  1135. mmiowb();
  1136. spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
  1137. }
  1138. static void pio_irq_workaround(struct b43legacy_wldev *dev,
  1139. u16 base, int queueidx)
  1140. {
  1141. u16 rxctl;
  1142. rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
  1143. if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
  1144. dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
  1145. else
  1146. dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
  1147. }
  1148. static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
  1149. {
  1150. if (b43legacy_using_pio(dev) &&
  1151. (dev->dev->id.revision < 3) &&
  1152. (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
  1153. /* Apply a PIO specific workaround to the dma_reasons */
  1154. pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
  1155. pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
  1156. pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
  1157. pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
  1158. }
  1159. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
  1160. b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
  1161. dev->dma_reason[0]);
  1162. b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
  1163. dev->dma_reason[1]);
  1164. b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
  1165. dev->dma_reason[2]);
  1166. b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
  1167. dev->dma_reason[3]);
  1168. b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
  1169. dev->dma_reason[4]);
  1170. b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
  1171. dev->dma_reason[5]);
  1172. }
  1173. /* Interrupt handler top-half */
  1174. static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
  1175. {
  1176. irqreturn_t ret = IRQ_NONE;
  1177. struct b43legacy_wldev *dev = dev_id;
  1178. u32 reason;
  1179. if (!dev)
  1180. return IRQ_NONE;
  1181. spin_lock(&dev->wl->irq_lock);
  1182. if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
  1183. goto out;
  1184. reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1185. if (reason == 0xffffffff) /* shared IRQ */
  1186. goto out;
  1187. ret = IRQ_HANDLED;
  1188. reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
  1189. if (!reason)
  1190. goto out;
  1191. dev->dma_reason[0] = b43legacy_read32(dev,
  1192. B43legacy_MMIO_DMA0_REASON)
  1193. & 0x0001DC00;
  1194. dev->dma_reason[1] = b43legacy_read32(dev,
  1195. B43legacy_MMIO_DMA1_REASON)
  1196. & 0x0000DC00;
  1197. dev->dma_reason[2] = b43legacy_read32(dev,
  1198. B43legacy_MMIO_DMA2_REASON)
  1199. & 0x0000DC00;
  1200. dev->dma_reason[3] = b43legacy_read32(dev,
  1201. B43legacy_MMIO_DMA3_REASON)
  1202. & 0x0001DC00;
  1203. dev->dma_reason[4] = b43legacy_read32(dev,
  1204. B43legacy_MMIO_DMA4_REASON)
  1205. & 0x0000DC00;
  1206. dev->dma_reason[5] = b43legacy_read32(dev,
  1207. B43legacy_MMIO_DMA5_REASON)
  1208. & 0x0000DC00;
  1209. b43legacy_interrupt_ack(dev, reason);
  1210. /* disable all IRQs. They are enabled again in the bottom half. */
  1211. dev->irq_savedstate = b43legacy_interrupt_disable(dev,
  1212. B43legacy_IRQ_ALL);
  1213. /* save the reason code and call our bottom half. */
  1214. dev->irq_reason = reason;
  1215. tasklet_schedule(&dev->isr_tasklet);
  1216. out:
  1217. mmiowb();
  1218. spin_unlock(&dev->wl->irq_lock);
  1219. return ret;
  1220. }
  1221. static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
  1222. {
  1223. release_firmware(dev->fw.ucode);
  1224. dev->fw.ucode = NULL;
  1225. release_firmware(dev->fw.pcm);
  1226. dev->fw.pcm = NULL;
  1227. release_firmware(dev->fw.initvals);
  1228. dev->fw.initvals = NULL;
  1229. release_firmware(dev->fw.initvals_band);
  1230. dev->fw.initvals_band = NULL;
  1231. }
  1232. static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
  1233. {
  1234. b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
  1235. "Drivers/b43#devicefirmware "
  1236. "and download the correct firmware (version 3).\n");
  1237. }
  1238. static int do_request_fw(struct b43legacy_wldev *dev,
  1239. const char *name,
  1240. const struct firmware **fw)
  1241. {
  1242. char path[sizeof(modparam_fwpostfix) + 32];
  1243. struct b43legacy_fw_header *hdr;
  1244. u32 size;
  1245. int err;
  1246. if (!name)
  1247. return 0;
  1248. snprintf(path, ARRAY_SIZE(path),
  1249. "b43legacy%s/%s.fw",
  1250. modparam_fwpostfix, name);
  1251. err = request_firmware(fw, path, dev->dev->dev);
  1252. if (err) {
  1253. b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
  1254. "or load failed.\n", path);
  1255. return err;
  1256. }
  1257. if ((*fw)->size < sizeof(struct b43legacy_fw_header))
  1258. goto err_format;
  1259. hdr = (struct b43legacy_fw_header *)((*fw)->data);
  1260. switch (hdr->type) {
  1261. case B43legacy_FW_TYPE_UCODE:
  1262. case B43legacy_FW_TYPE_PCM:
  1263. size = be32_to_cpu(hdr->size);
  1264. if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
  1265. goto err_format;
  1266. /* fallthrough */
  1267. case B43legacy_FW_TYPE_IV:
  1268. if (hdr->ver != 1)
  1269. goto err_format;
  1270. break;
  1271. default:
  1272. goto err_format;
  1273. }
  1274. return err;
  1275. err_format:
  1276. b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
  1277. return -EPROTO;
  1278. }
  1279. static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
  1280. {
  1281. struct b43legacy_firmware *fw = &dev->fw;
  1282. const u8 rev = dev->dev->id.revision;
  1283. const char *filename;
  1284. u32 tmshigh;
  1285. int err;
  1286. tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
  1287. if (!fw->ucode) {
  1288. if (rev == 2)
  1289. filename = "ucode2";
  1290. else if (rev == 4)
  1291. filename = "ucode4";
  1292. else
  1293. filename = "ucode5";
  1294. err = do_request_fw(dev, filename, &fw->ucode);
  1295. if (err)
  1296. goto err_load;
  1297. }
  1298. if (!fw->pcm) {
  1299. if (rev < 5)
  1300. filename = "pcm4";
  1301. else
  1302. filename = "pcm5";
  1303. err = do_request_fw(dev, filename, &fw->pcm);
  1304. if (err)
  1305. goto err_load;
  1306. }
  1307. if (!fw->initvals) {
  1308. switch (dev->phy.type) {
  1309. case B43legacy_PHYTYPE_G:
  1310. if ((rev >= 5) && (rev <= 10))
  1311. filename = "b0g0initvals5";
  1312. else if (rev == 2 || rev == 4)
  1313. filename = "b0g0initvals2";
  1314. else
  1315. goto err_no_initvals;
  1316. break;
  1317. default:
  1318. goto err_no_initvals;
  1319. }
  1320. err = do_request_fw(dev, filename, &fw->initvals);
  1321. if (err)
  1322. goto err_load;
  1323. }
  1324. if (!fw->initvals_band) {
  1325. switch (dev->phy.type) {
  1326. case B43legacy_PHYTYPE_G:
  1327. if ((rev >= 5) && (rev <= 10))
  1328. filename = "b0g0bsinitvals5";
  1329. else if (rev >= 11)
  1330. filename = NULL;
  1331. else if (rev == 2 || rev == 4)
  1332. filename = NULL;
  1333. else
  1334. goto err_no_initvals;
  1335. break;
  1336. default:
  1337. goto err_no_initvals;
  1338. }
  1339. err = do_request_fw(dev, filename, &fw->initvals_band);
  1340. if (err)
  1341. goto err_load;
  1342. }
  1343. return 0;
  1344. err_load:
  1345. b43legacy_print_fw_helptext(dev->wl);
  1346. goto error;
  1347. err_no_initvals:
  1348. err = -ENODEV;
  1349. b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
  1350. "core rev %u\n", dev->phy.type, rev);
  1351. goto error;
  1352. error:
  1353. b43legacy_release_firmware(dev);
  1354. return err;
  1355. }
  1356. static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
  1357. {
  1358. const size_t hdr_len = sizeof(struct b43legacy_fw_header);
  1359. const __be32 *data;
  1360. unsigned int i;
  1361. unsigned int len;
  1362. u16 fwrev;
  1363. u16 fwpatch;
  1364. u16 fwdate;
  1365. u16 fwtime;
  1366. u32 tmp;
  1367. int err = 0;
  1368. /* Upload Microcode. */
  1369. data = (__be32 *) (dev->fw.ucode->data + hdr_len);
  1370. len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
  1371. b43legacy_shm_control_word(dev,
  1372. B43legacy_SHM_UCODE |
  1373. B43legacy_SHM_AUTOINC_W,
  1374. 0x0000);
  1375. for (i = 0; i < len; i++) {
  1376. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
  1377. be32_to_cpu(data[i]));
  1378. udelay(10);
  1379. }
  1380. if (dev->fw.pcm) {
  1381. /* Upload PCM data. */
  1382. data = (__be32 *) (dev->fw.pcm->data + hdr_len);
  1383. len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
  1384. b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
  1385. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
  1386. /* No need for autoinc bit in SHM_HW */
  1387. b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
  1388. for (i = 0; i < len; i++) {
  1389. b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
  1390. be32_to_cpu(data[i]));
  1391. udelay(10);
  1392. }
  1393. }
  1394. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
  1395. B43legacy_IRQ_ALL);
  1396. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
  1397. /* Wait for the microcode to load and respond */
  1398. i = 0;
  1399. while (1) {
  1400. tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1401. if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
  1402. break;
  1403. i++;
  1404. if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
  1405. b43legacyerr(dev->wl, "Microcode not responding\n");
  1406. b43legacy_print_fw_helptext(dev->wl);
  1407. err = -ENODEV;
  1408. goto out;
  1409. }
  1410. udelay(10);
  1411. }
  1412. /* dummy read follows */
  1413. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1414. /* Get and check the revisions. */
  1415. fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1416. B43legacy_SHM_SH_UCODEREV);
  1417. fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1418. B43legacy_SHM_SH_UCODEPATCH);
  1419. fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1420. B43legacy_SHM_SH_UCODEDATE);
  1421. fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1422. B43legacy_SHM_SH_UCODETIME);
  1423. if (fwrev > 0x128) {
  1424. b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
  1425. " Only firmware from binary drivers version 3.x"
  1426. " is supported. You must change your firmware"
  1427. " files.\n");
  1428. b43legacy_print_fw_helptext(dev->wl);
  1429. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
  1430. err = -EOPNOTSUPP;
  1431. goto out;
  1432. }
  1433. b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
  1434. "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
  1435. (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
  1436. (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
  1437. dev->fw.rev = fwrev;
  1438. dev->fw.patch = fwpatch;
  1439. out:
  1440. return err;
  1441. }
  1442. static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
  1443. const struct b43legacy_iv *ivals,
  1444. size_t count,
  1445. size_t array_size)
  1446. {
  1447. const struct b43legacy_iv *iv;
  1448. u16 offset;
  1449. size_t i;
  1450. bool bit32;
  1451. BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
  1452. iv = ivals;
  1453. for (i = 0; i < count; i++) {
  1454. if (array_size < sizeof(iv->offset_size))
  1455. goto err_format;
  1456. array_size -= sizeof(iv->offset_size);
  1457. offset = be16_to_cpu(iv->offset_size);
  1458. bit32 = !!(offset & B43legacy_IV_32BIT);
  1459. offset &= B43legacy_IV_OFFSET_MASK;
  1460. if (offset >= 0x1000)
  1461. goto err_format;
  1462. if (bit32) {
  1463. u32 value;
  1464. if (array_size < sizeof(iv->data.d32))
  1465. goto err_format;
  1466. array_size -= sizeof(iv->data.d32);
  1467. value = be32_to_cpu(get_unaligned(&iv->data.d32));
  1468. b43legacy_write32(dev, offset, value);
  1469. iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
  1470. sizeof(__be16) +
  1471. sizeof(__be32));
  1472. } else {
  1473. u16 value;
  1474. if (array_size < sizeof(iv->data.d16))
  1475. goto err_format;
  1476. array_size -= sizeof(iv->data.d16);
  1477. value = be16_to_cpu(iv->data.d16);
  1478. b43legacy_write16(dev, offset, value);
  1479. iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
  1480. sizeof(__be16) +
  1481. sizeof(__be16));
  1482. }
  1483. }
  1484. if (array_size)
  1485. goto err_format;
  1486. return 0;
  1487. err_format:
  1488. b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
  1489. b43legacy_print_fw_helptext(dev->wl);
  1490. return -EPROTO;
  1491. }
  1492. static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
  1493. {
  1494. const size_t hdr_len = sizeof(struct b43legacy_fw_header);
  1495. const struct b43legacy_fw_header *hdr;
  1496. struct b43legacy_firmware *fw = &dev->fw;
  1497. const struct b43legacy_iv *ivals;
  1498. size_t count;
  1499. int err;
  1500. hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
  1501. ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
  1502. count = be32_to_cpu(hdr->size);
  1503. err = b43legacy_write_initvals(dev, ivals, count,
  1504. fw->initvals->size - hdr_len);
  1505. if (err)
  1506. goto out;
  1507. if (fw->initvals_band) {
  1508. hdr = (const struct b43legacy_fw_header *)
  1509. (fw->initvals_band->data);
  1510. ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
  1511. + hdr_len);
  1512. count = be32_to_cpu(hdr->size);
  1513. err = b43legacy_write_initvals(dev, ivals, count,
  1514. fw->initvals_band->size - hdr_len);
  1515. if (err)
  1516. goto out;
  1517. }
  1518. out:
  1519. return err;
  1520. }
  1521. /* Initialize the GPIOs
  1522. * http://bcm-specs.sipsolutions.net/GPIO
  1523. */
  1524. static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
  1525. {
  1526. struct ssb_bus *bus = dev->dev->bus;
  1527. struct ssb_device *gpiodev, *pcidev = NULL;
  1528. u32 mask;
  1529. u32 set;
  1530. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
  1531. b43legacy_read32(dev,
  1532. B43legacy_MMIO_STATUS_BITFIELD)
  1533. & 0xFFFF3FFF);
  1534. b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
  1535. b43legacy_read16(dev,
  1536. B43legacy_MMIO_GPIO_MASK)
  1537. | 0x000F);
  1538. mask = 0x0000001F;
  1539. set = 0x0000000F;
  1540. if (dev->dev->bus->chip_id == 0x4301) {
  1541. mask |= 0x0060;
  1542. set |= 0x0060;
  1543. }
  1544. if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) {
  1545. b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
  1546. b43legacy_read16(dev,
  1547. B43legacy_MMIO_GPIO_MASK)
  1548. | 0x0200);
  1549. mask |= 0x0200;
  1550. set |= 0x0200;
  1551. }
  1552. if (dev->dev->id.revision >= 2)
  1553. mask |= 0x0010; /* FIXME: This is redundant. */
  1554. #ifdef CONFIG_SSB_DRIVER_PCICORE
  1555. pcidev = bus->pcicore.dev;
  1556. #endif
  1557. gpiodev = bus->chipco.dev ? : pcidev;
  1558. if (!gpiodev)
  1559. return 0;
  1560. ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
  1561. (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
  1562. & mask) | set);
  1563. return 0;
  1564. }
  1565. /* Turn off all GPIO stuff. Call this on module unload, for example. */
  1566. static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
  1567. {
  1568. struct ssb_bus *bus = dev->dev->bus;
  1569. struct ssb_device *gpiodev, *pcidev = NULL;
  1570. #ifdef CONFIG_SSB_DRIVER_PCICORE
  1571. pcidev = bus->pcicore.dev;
  1572. #endif
  1573. gpiodev = bus->chipco.dev ? : pcidev;
  1574. if (!gpiodev)
  1575. return;
  1576. ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
  1577. }
  1578. /* http://bcm-specs.sipsolutions.net/EnableMac */
  1579. void b43legacy_mac_enable(struct b43legacy_wldev *dev)
  1580. {
  1581. dev->mac_suspended--;
  1582. B43legacy_WARN_ON(dev->mac_suspended < 0);
  1583. B43legacy_WARN_ON(irqs_disabled());
  1584. if (dev->mac_suspended == 0) {
  1585. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
  1586. b43legacy_read32(dev,
  1587. B43legacy_MMIO_STATUS_BITFIELD)
  1588. | B43legacy_SBF_MAC_ENABLED);
  1589. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
  1590. B43legacy_IRQ_MAC_SUSPENDED);
  1591. /* the next two are dummy reads */
  1592. b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  1593. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1594. b43legacy_power_saving_ctl_bits(dev, -1, -1);
  1595. /* Re-enable IRQs. */
  1596. spin_lock_irq(&dev->wl->irq_lock);
  1597. b43legacy_interrupt_enable(dev, dev->irq_savedstate);
  1598. spin_unlock_irq(&dev->wl->irq_lock);
  1599. }
  1600. }
  1601. /* http://bcm-specs.sipsolutions.net/SuspendMAC */
  1602. void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
  1603. {
  1604. int i;
  1605. u32 tmp;
  1606. might_sleep();
  1607. B43legacy_WARN_ON(irqs_disabled());
  1608. B43legacy_WARN_ON(dev->mac_suspended < 0);
  1609. if (dev->mac_suspended == 0) {
  1610. /* Mask IRQs before suspending MAC. Otherwise
  1611. * the MAC stays busy and won't suspend. */
  1612. spin_lock_irq(&dev->wl->irq_lock);
  1613. tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
  1614. spin_unlock_irq(&dev->wl->irq_lock);
  1615. b43legacy_synchronize_irq(dev);
  1616. dev->irq_savedstate = tmp;
  1617. b43legacy_power_saving_ctl_bits(dev, -1, 1);
  1618. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
  1619. b43legacy_read32(dev,
  1620. B43legacy_MMIO_STATUS_BITFIELD)
  1621. & ~B43legacy_SBF_MAC_ENABLED);
  1622. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1623. for (i = 40; i; i--) {
  1624. tmp = b43legacy_read32(dev,
  1625. B43legacy_MMIO_GEN_IRQ_REASON);
  1626. if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
  1627. goto out;
  1628. msleep(1);
  1629. }
  1630. b43legacyerr(dev->wl, "MAC suspend failed\n");
  1631. }
  1632. out:
  1633. dev->mac_suspended++;
  1634. }
  1635. static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
  1636. {
  1637. struct b43legacy_wl *wl = dev->wl;
  1638. u32 ctl;
  1639. u16 cfp_pretbtt;
  1640. ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1641. /* Reset status to STA infrastructure mode. */
  1642. ctl &= ~B43legacy_MACCTL_AP;
  1643. ctl &= ~B43legacy_MACCTL_KEEP_CTL;
  1644. ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
  1645. ctl &= ~B43legacy_MACCTL_KEEP_BAD;
  1646. ctl &= ~B43legacy_MACCTL_PROMISC;
  1647. ctl &= ~B43legacy_MACCTL_BEACPROMISC;
  1648. ctl |= B43legacy_MACCTL_INFRA;
  1649. if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
  1650. ctl |= B43legacy_MACCTL_AP;
  1651. else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
  1652. ctl &= ~B43legacy_MACCTL_INFRA;
  1653. if (wl->filter_flags & FIF_CONTROL)
  1654. ctl |= B43legacy_MACCTL_KEEP_CTL;
  1655. if (wl->filter_flags & FIF_FCSFAIL)
  1656. ctl |= B43legacy_MACCTL_KEEP_BAD;
  1657. if (wl->filter_flags & FIF_PLCPFAIL)
  1658. ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
  1659. if (wl->filter_flags & FIF_PROMISC_IN_BSS)
  1660. ctl |= B43legacy_MACCTL_PROMISC;
  1661. if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
  1662. ctl |= B43legacy_MACCTL_BEACPROMISC;
  1663. /* Workaround: On old hardware the HW-MAC-address-filter
  1664. * doesn't work properly, so always run promisc in filter
  1665. * it in software. */
  1666. if (dev->dev->id.revision <= 4)
  1667. ctl |= B43legacy_MACCTL_PROMISC;
  1668. b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
  1669. cfp_pretbtt = 2;
  1670. if ((ctl & B43legacy_MACCTL_INFRA) &&
  1671. !(ctl & B43legacy_MACCTL_AP)) {
  1672. if (dev->dev->bus->chip_id == 0x4306 &&
  1673. dev->dev->bus->chip_rev == 3)
  1674. cfp_pretbtt = 100;
  1675. else
  1676. cfp_pretbtt = 50;
  1677. }
  1678. b43legacy_write16(dev, 0x612, cfp_pretbtt);
  1679. }
  1680. static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
  1681. u16 rate,
  1682. int is_ofdm)
  1683. {
  1684. u16 offset;
  1685. if (is_ofdm) {
  1686. offset = 0x480;
  1687. offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
  1688. } else {
  1689. offset = 0x4C0;
  1690. offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
  1691. }
  1692. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
  1693. b43legacy_shm_read16(dev,
  1694. B43legacy_SHM_SHARED, offset));
  1695. }
  1696. static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
  1697. {
  1698. switch (dev->phy.type) {
  1699. case B43legacy_PHYTYPE_G:
  1700. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
  1701. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
  1702. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
  1703. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
  1704. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
  1705. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
  1706. b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
  1707. /* fallthrough */
  1708. case B43legacy_PHYTYPE_B:
  1709. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
  1710. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
  1711. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
  1712. b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
  1713. break;
  1714. default:
  1715. B43legacy_BUG_ON(1);
  1716. }
  1717. }
  1718. /* Set the TX-Antenna for management frames sent by firmware. */
  1719. static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
  1720. int antenna)
  1721. {
  1722. u16 ant = 0;
  1723. u16 tmp;
  1724. switch (antenna) {
  1725. case B43legacy_ANTENNA0:
  1726. ant |= B43legacy_TX4_PHY_ANT0;
  1727. break;
  1728. case B43legacy_ANTENNA1:
  1729. ant |= B43legacy_TX4_PHY_ANT1;
  1730. break;
  1731. case B43legacy_ANTENNA_AUTO:
  1732. ant |= B43legacy_TX4_PHY_ANTLAST;
  1733. break;
  1734. default:
  1735. B43legacy_BUG_ON(1);
  1736. }
  1737. /* FIXME We also need to set the other flags of the PHY control
  1738. * field somewhere. */
  1739. /* For Beacons */
  1740. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1741. B43legacy_SHM_SH_BEACPHYCTL);
  1742. tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
  1743. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  1744. B43legacy_SHM_SH_BEACPHYCTL, tmp);
  1745. /* For ACK/CTS */
  1746. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1747. B43legacy_SHM_SH_ACKCTSPHYCTL);
  1748. tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
  1749. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  1750. B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
  1751. /* For Probe Resposes */
  1752. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1753. B43legacy_SHM_SH_PRPHYCTL);
  1754. tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
  1755. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  1756. B43legacy_SHM_SH_PRPHYCTL, tmp);
  1757. }
  1758. /* This is the opposite of b43legacy_chip_init() */
  1759. static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
  1760. {
  1761. b43legacy_radio_turn_off(dev, 1);
  1762. b43legacy_leds_exit(dev);
  1763. b43legacy_gpio_cleanup(dev);
  1764. /* firmware is released later */
  1765. }
  1766. /* Initialize the chip
  1767. * http://bcm-specs.sipsolutions.net/ChipInit
  1768. */
  1769. static int b43legacy_chip_init(struct b43legacy_wldev *dev)
  1770. {
  1771. struct b43legacy_phy *phy = &dev->phy;
  1772. int err;
  1773. int tmp;
  1774. u32 value32;
  1775. u16 value16;
  1776. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
  1777. B43legacy_SBF_CORE_READY
  1778. | B43legacy_SBF_400);
  1779. err = b43legacy_request_firmware(dev);
  1780. if (err)
  1781. goto out;
  1782. err = b43legacy_upload_microcode(dev);
  1783. if (err)
  1784. goto out; /* firmware is released later */
  1785. err = b43legacy_gpio_init(dev);
  1786. if (err)
  1787. goto out; /* firmware is released later */
  1788. b43legacy_leds_init(dev);
  1789. err = b43legacy_upload_initvals(dev);
  1790. if (err)
  1791. goto err_leds_exit;
  1792. b43legacy_radio_turn_on(dev);
  1793. b43legacy_write16(dev, 0x03E6, 0x0000);
  1794. err = b43legacy_phy_init(dev);
  1795. if (err)
  1796. goto err_radio_off;
  1797. /* Select initial Interference Mitigation. */
  1798. tmp = phy->interfmode;
  1799. phy->interfmode = B43legacy_INTERFMODE_NONE;
  1800. b43legacy_radio_set_interference_mitigation(dev, tmp);
  1801. b43legacy_phy_set_antenna_diversity(dev);
  1802. b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
  1803. if (phy->type == B43legacy_PHYTYPE_B) {
  1804. value16 = b43legacy_read16(dev, 0x005E);
  1805. value16 |= 0x0004;
  1806. b43legacy_write16(dev, 0x005E, value16);
  1807. }
  1808. b43legacy_write32(dev, 0x0100, 0x01000000);
  1809. if (dev->dev->id.revision < 5)
  1810. b43legacy_write32(dev, 0x010C, 0x01000000);
  1811. value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  1812. value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
  1813. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
  1814. value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  1815. value32 |= B43legacy_SBF_MODE_NOTADHOC;
  1816. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
  1817. if (b43legacy_using_pio(dev)) {
  1818. b43legacy_write32(dev, 0x0210, 0x00000100);
  1819. b43legacy_write32(dev, 0x0230, 0x00000100);
  1820. b43legacy_write32(dev, 0x0250, 0x00000100);
  1821. b43legacy_write32(dev, 0x0270, 0x00000100);
  1822. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
  1823. 0x0000);
  1824. }
  1825. /* Probe Response Timeout value */
  1826. /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
  1827. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
  1828. /* Initially set the wireless operation mode. */
  1829. b43legacy_adjust_opmode(dev);
  1830. if (dev->dev->id.revision < 3) {
  1831. b43legacy_write16(dev, 0x060E, 0x0000);
  1832. b43legacy_write16(dev, 0x0610, 0x8000);
  1833. b43legacy_write16(dev, 0x0604, 0x0000);
  1834. b43legacy_write16(dev, 0x0606, 0x0200);
  1835. } else {
  1836. b43legacy_write32(dev, 0x0188, 0x80000000);
  1837. b43legacy_write32(dev, 0x018C, 0x02000000);
  1838. }
  1839. b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
  1840. b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
  1841. b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
  1842. b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
  1843. b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
  1844. b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
  1845. b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
  1846. value32 = ssb_read32(dev->dev, SSB_TMSLOW);
  1847. value32 |= 0x00100000;
  1848. ssb_write32(dev->dev, SSB_TMSLOW, value32);
  1849. b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
  1850. dev->dev->bus->chipco.fast_pwrup_delay);
  1851. B43legacy_WARN_ON(err != 0);
  1852. b43legacydbg(dev->wl, "Chip initialized\n");
  1853. out:
  1854. return err;
  1855. err_radio_off:
  1856. b43legacy_radio_turn_off(dev, 1);
  1857. err_leds_exit:
  1858. b43legacy_leds_exit(dev);
  1859. b43legacy_gpio_cleanup(dev);
  1860. goto out;
  1861. }
  1862. static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
  1863. {
  1864. struct b43legacy_phy *phy = &dev->phy;
  1865. if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
  1866. return;
  1867. b43legacy_mac_suspend(dev);
  1868. b43legacy_phy_lo_g_measure(dev);
  1869. b43legacy_mac_enable(dev);
  1870. }
  1871. static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
  1872. {
  1873. b43legacy_phy_lo_mark_all_unused(dev);
  1874. if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
  1875. b43legacy_mac_suspend(dev);
  1876. b43legacy_calc_nrssi_slope(dev);
  1877. b43legacy_mac_enable(dev);
  1878. }
  1879. }
  1880. static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
  1881. {
  1882. /* Update device statistics. */
  1883. b43legacy_calculate_link_quality(dev);
  1884. }
  1885. static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
  1886. {
  1887. b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
  1888. }
  1889. static void do_periodic_work(struct b43legacy_wldev *dev)
  1890. {
  1891. unsigned int state;
  1892. state = dev->periodic_state;
  1893. if (state % 8 == 0)
  1894. b43legacy_periodic_every120sec(dev);
  1895. if (state % 4 == 0)
  1896. b43legacy_periodic_every60sec(dev);
  1897. if (state % 2 == 0)
  1898. b43legacy_periodic_every30sec(dev);
  1899. b43legacy_periodic_every15sec(dev);
  1900. }
  1901. /* Periodic work locking policy:
  1902. * The whole periodic work handler is protected by
  1903. * wl->mutex. If another lock is needed somewhere in the
  1904. * pwork callchain, it's aquired in-place, where it's needed.
  1905. */
  1906. static void b43legacy_periodic_work_handler(struct work_struct *work)
  1907. {
  1908. struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
  1909. periodic_work.work);
  1910. struct b43legacy_wl *wl = dev->wl;
  1911. unsigned long delay;
  1912. mutex_lock(&wl->mutex);
  1913. if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
  1914. goto out;
  1915. if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
  1916. goto out_requeue;
  1917. do_periodic_work(dev);
  1918. dev->periodic_state++;
  1919. out_requeue:
  1920. if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
  1921. delay = msecs_to_jiffies(50);
  1922. else
  1923. delay = round_jiffies_relative(HZ * 15);
  1924. queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
  1925. out:
  1926. mutex_unlock(&wl->mutex);
  1927. }
  1928. static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
  1929. {
  1930. struct delayed_work *work = &dev->periodic_work;
  1931. dev->periodic_state = 0;
  1932. INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
  1933. queue_delayed_work(dev->wl->hw->workqueue, work, 0);
  1934. }
  1935. /* Validate access to the chip (SHM) */
  1936. static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
  1937. {
  1938. u32 value;
  1939. u32 shm_backup;
  1940. shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
  1941. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
  1942. if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
  1943. 0xAA5555AA)
  1944. goto error;
  1945. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
  1946. if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
  1947. 0x55AAAA55)
  1948. goto error;
  1949. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
  1950. value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
  1951. if ((value | B43legacy_MACCTL_GMODE) !=
  1952. (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
  1953. goto error;
  1954. value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
  1955. if (value)
  1956. goto error;
  1957. return 0;
  1958. error:
  1959. b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
  1960. return -ENODEV;
  1961. }
  1962. static void b43legacy_security_init(struct b43legacy_wldev *dev)
  1963. {
  1964. dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
  1965. B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
  1966. dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1967. 0x0056);
  1968. /* KTP is a word address, but we address SHM bytewise.
  1969. * So multiply by two.
  1970. */
  1971. dev->ktp *= 2;
  1972. if (dev->dev->id.revision >= 5)
  1973. /* Number of RCMTA address slots */
  1974. b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
  1975. dev->max_nr_keys - 8);
  1976. }
  1977. static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
  1978. {
  1979. struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
  1980. unsigned long flags;
  1981. /* Don't take wl->mutex here, as it could deadlock with
  1982. * hwrng internal locking. It's not needed to take
  1983. * wl->mutex here, anyway. */
  1984. spin_lock_irqsave(&wl->irq_lock, flags);
  1985. *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
  1986. spin_unlock_irqrestore(&wl->irq_lock, flags);
  1987. return (sizeof(u16));
  1988. }
  1989. static void b43legacy_rng_exit(struct b43legacy_wl *wl)
  1990. {
  1991. if (wl->rng_initialized)
  1992. hwrng_unregister(&wl->rng);
  1993. }
  1994. static int b43legacy_rng_init(struct b43legacy_wl *wl)
  1995. {
  1996. int err;
  1997. snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
  1998. "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
  1999. wl->rng.name = wl->rng_name;
  2000. wl->rng.data_read = b43legacy_rng_read;
  2001. wl->rng.priv = (unsigned long)wl;
  2002. wl->rng_initialized = 1;
  2003. err = hwrng_register(&wl->rng);
  2004. if (err) {
  2005. wl->rng_initialized = 0;
  2006. b43legacyerr(wl, "Failed to register the random "
  2007. "number generator (%d)\n", err);
  2008. }
  2009. return err;
  2010. }
  2011. static int b43legacy_tx(struct ieee80211_hw *hw,
  2012. struct sk_buff *skb,
  2013. struct ieee80211_tx_control *ctl)
  2014. {
  2015. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2016. struct b43legacy_wldev *dev = wl->current_dev;
  2017. int err = -ENODEV;
  2018. unsigned long flags;
  2019. if (unlikely(!dev))
  2020. goto out;
  2021. if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
  2022. goto out;
  2023. /* DMA-TX is done without a global lock. */
  2024. if (b43legacy_using_pio(dev)) {
  2025. spin_lock_irqsave(&wl->irq_lock, flags);
  2026. err = b43legacy_pio_tx(dev, skb, ctl);
  2027. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2028. } else
  2029. err = b43legacy_dma_tx(dev, skb, ctl);
  2030. out:
  2031. if (unlikely(err))
  2032. return NETDEV_TX_BUSY;
  2033. return NETDEV_TX_OK;
  2034. }
  2035. static int b43legacy_conf_tx(struct ieee80211_hw *hw,
  2036. int queue,
  2037. const struct ieee80211_tx_queue_params *params)
  2038. {
  2039. return 0;
  2040. }
  2041. static int b43legacy_get_tx_stats(struct ieee80211_hw *hw,
  2042. struct ieee80211_tx_queue_stats *stats)
  2043. {
  2044. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2045. struct b43legacy_wldev *dev = wl->current_dev;
  2046. unsigned long flags;
  2047. int err = -ENODEV;
  2048. if (!dev)
  2049. goto out;
  2050. spin_lock_irqsave(&wl->irq_lock, flags);
  2051. if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
  2052. if (b43legacy_using_pio(dev))
  2053. b43legacy_pio_get_tx_stats(dev, stats);
  2054. else
  2055. b43legacy_dma_get_tx_stats(dev, stats);
  2056. err = 0;
  2057. }
  2058. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2059. out:
  2060. return err;
  2061. }
  2062. static int b43legacy_get_stats(struct ieee80211_hw *hw,
  2063. struct ieee80211_low_level_stats *stats)
  2064. {
  2065. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2066. unsigned long flags;
  2067. spin_lock_irqsave(&wl->irq_lock, flags);
  2068. memcpy(stats, &wl->ieee_stats, sizeof(*stats));
  2069. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2070. return 0;
  2071. }
  2072. static const char *phymode_to_string(unsigned int phymode)
  2073. {
  2074. switch (phymode) {
  2075. case B43legacy_PHYMODE_B:
  2076. return "B";
  2077. case B43legacy_PHYMODE_G:
  2078. return "G";
  2079. default:
  2080. B43legacy_BUG_ON(1);
  2081. }
  2082. return "";
  2083. }
  2084. static int find_wldev_for_phymode(struct b43legacy_wl *wl,
  2085. unsigned int phymode,
  2086. struct b43legacy_wldev **dev,
  2087. bool *gmode)
  2088. {
  2089. struct b43legacy_wldev *d;
  2090. list_for_each_entry(d, &wl->devlist, list) {
  2091. if (d->phy.possible_phymodes & phymode) {
  2092. /* Ok, this device supports the PHY-mode.
  2093. * Set the gmode bit. */
  2094. *gmode = 1;
  2095. *dev = d;
  2096. return 0;
  2097. }
  2098. }
  2099. return -ESRCH;
  2100. }
  2101. static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
  2102. {
  2103. struct ssb_device *sdev = dev->dev;
  2104. u32 tmslow;
  2105. tmslow = ssb_read32(sdev, SSB_TMSLOW);
  2106. tmslow &= ~B43legacy_TMSLOW_GMODE;
  2107. tmslow |= B43legacy_TMSLOW_PHYRESET;
  2108. tmslow |= SSB_TMSLOW_FGC;
  2109. ssb_write32(sdev, SSB_TMSLOW, tmslow);
  2110. msleep(1);
  2111. tmslow = ssb_read32(sdev, SSB_TMSLOW);
  2112. tmslow &= ~SSB_TMSLOW_FGC;
  2113. tmslow |= B43legacy_TMSLOW_PHYRESET;
  2114. ssb_write32(sdev, SSB_TMSLOW, tmslow);
  2115. msleep(1);
  2116. }
  2117. /* Expects wl->mutex locked */
  2118. static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
  2119. unsigned int new_mode)
  2120. {
  2121. struct b43legacy_wldev *up_dev;
  2122. struct b43legacy_wldev *down_dev;
  2123. int err;
  2124. bool gmode = 0;
  2125. int prev_status;
  2126. err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
  2127. if (err) {
  2128. b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
  2129. phymode_to_string(new_mode));
  2130. return err;
  2131. }
  2132. if ((up_dev == wl->current_dev) &&
  2133. (!!wl->current_dev->phy.gmode == !!gmode))
  2134. /* This device is already running. */
  2135. return 0;
  2136. b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
  2137. phymode_to_string(new_mode));
  2138. down_dev = wl->current_dev;
  2139. prev_status = b43legacy_status(down_dev);
  2140. /* Shutdown the currently running core. */
  2141. if (prev_status >= B43legacy_STAT_STARTED)
  2142. b43legacy_wireless_core_stop(down_dev);
  2143. if (prev_status >= B43legacy_STAT_INITIALIZED)
  2144. b43legacy_wireless_core_exit(down_dev);
  2145. if (down_dev != up_dev)
  2146. /* We switch to a different core, so we put PHY into
  2147. * RESET on the old core. */
  2148. b43legacy_put_phy_into_reset(down_dev);
  2149. /* Now start the new core. */
  2150. up_dev->phy.gmode = gmode;
  2151. if (prev_status >= B43legacy_STAT_INITIALIZED) {
  2152. err = b43legacy_wireless_core_init(up_dev);
  2153. if (err) {
  2154. b43legacyerr(wl, "Fatal: Could not initialize device"
  2155. " for newly selected %s-PHY mode\n",
  2156. phymode_to_string(new_mode));
  2157. goto init_failure;
  2158. }
  2159. }
  2160. if (prev_status >= B43legacy_STAT_STARTED) {
  2161. err = b43legacy_wireless_core_start(up_dev);
  2162. if (err) {
  2163. b43legacyerr(wl, "Fatal: Coult not start device for "
  2164. "newly selected %s-PHY mode\n",
  2165. phymode_to_string(new_mode));
  2166. b43legacy_wireless_core_exit(up_dev);
  2167. goto init_failure;
  2168. }
  2169. }
  2170. B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
  2171. b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
  2172. wl->current_dev = up_dev;
  2173. return 0;
  2174. init_failure:
  2175. /* Whoops, failed to init the new core. No core is operating now. */
  2176. wl->current_dev = NULL;
  2177. return err;
  2178. }
  2179. static int b43legacy_antenna_from_ieee80211(u8 antenna)
  2180. {
  2181. switch (antenna) {
  2182. case 0: /* default/diversity */
  2183. return B43legacy_ANTENNA_DEFAULT;
  2184. case 1: /* Antenna 0 */
  2185. return B43legacy_ANTENNA0;
  2186. case 2: /* Antenna 1 */
  2187. return B43legacy_ANTENNA1;
  2188. default:
  2189. return B43legacy_ANTENNA_DEFAULT;
  2190. }
  2191. }
  2192. static int b43legacy_dev_config(struct ieee80211_hw *hw,
  2193. struct ieee80211_conf *conf)
  2194. {
  2195. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2196. struct b43legacy_wldev *dev;
  2197. struct b43legacy_phy *phy;
  2198. unsigned long flags;
  2199. unsigned int new_phymode = 0xFFFF;
  2200. int antenna_tx;
  2201. int antenna_rx;
  2202. int err = 0;
  2203. u32 savedirqs;
  2204. antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
  2205. antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
  2206. mutex_lock(&wl->mutex);
  2207. /* Switch the PHY mode (if necessary). */
  2208. switch (conf->phymode) {
  2209. case MODE_IEEE80211B:
  2210. new_phymode = B43legacy_PHYMODE_B;
  2211. break;
  2212. case MODE_IEEE80211G:
  2213. new_phymode = B43legacy_PHYMODE_G;
  2214. break;
  2215. default:
  2216. B43legacy_WARN_ON(1);
  2217. }
  2218. err = b43legacy_switch_phymode(wl, new_phymode);
  2219. if (err)
  2220. goto out_unlock_mutex;
  2221. dev = wl->current_dev;
  2222. phy = &dev->phy;
  2223. /* Disable IRQs while reconfiguring the device.
  2224. * This makes it possible to drop the spinlock throughout
  2225. * the reconfiguration process. */
  2226. spin_lock_irqsave(&wl->irq_lock, flags);
  2227. if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
  2228. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2229. goto out_unlock_mutex;
  2230. }
  2231. savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
  2232. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2233. b43legacy_synchronize_irq(dev);
  2234. /* Switch to the requested channel.
  2235. * The firmware takes care of races with the TX handler. */
  2236. if (conf->channel_val != phy->channel)
  2237. b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
  2238. /* Enable/Disable ShortSlot timing. */
  2239. if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
  2240. != dev->short_slot) {
  2241. B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
  2242. if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
  2243. b43legacy_short_slot_timing_enable(dev);
  2244. else
  2245. b43legacy_short_slot_timing_disable(dev);
  2246. }
  2247. /* Adjust the desired TX power level. */
  2248. if (conf->power_level != 0) {
  2249. if (conf->power_level != phy->power_level) {
  2250. phy->power_level = conf->power_level;
  2251. b43legacy_phy_xmitpower(dev);
  2252. }
  2253. }
  2254. /* Antennas for RX and management frame TX. */
  2255. b43legacy_mgmtframe_txantenna(dev, antenna_tx);
  2256. /* Update templates for AP mode. */
  2257. if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
  2258. b43legacy_set_beacon_int(dev, conf->beacon_int);
  2259. if (!!conf->radio_enabled != phy->radio_on) {
  2260. if (conf->radio_enabled) {
  2261. b43legacy_radio_turn_on(dev);
  2262. b43legacyinfo(dev->wl, "Radio turned on by software\n");
  2263. if (!dev->radio_hw_enable)
  2264. b43legacyinfo(dev->wl, "The hardware RF-kill"
  2265. " button still turns the radio"
  2266. " physically off. Press the"
  2267. " button to turn it on.\n");
  2268. } else {
  2269. b43legacy_radio_turn_off(dev, 0);
  2270. b43legacyinfo(dev->wl, "Radio turned off by"
  2271. " software\n");
  2272. }
  2273. }
  2274. spin_lock_irqsave(&wl->irq_lock, flags);
  2275. b43legacy_interrupt_enable(dev, savedirqs);
  2276. mmiowb();
  2277. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2278. out_unlock_mutex:
  2279. mutex_unlock(&wl->mutex);
  2280. return err;
  2281. }
  2282. static int b43legacy_dev_set_key(struct ieee80211_hw *hw,
  2283. enum set_key_cmd cmd,
  2284. const u8 *local_addr, const u8 *addr,
  2285. struct ieee80211_key_conf *key)
  2286. {
  2287. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2288. struct b43legacy_wldev *dev = wl->current_dev;
  2289. unsigned long flags;
  2290. int err = -EOPNOTSUPP;
  2291. DECLARE_MAC_BUF(mac);
  2292. if (!dev)
  2293. return -ENODEV;
  2294. mutex_lock(&wl->mutex);
  2295. spin_lock_irqsave(&wl->irq_lock, flags);
  2296. if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
  2297. err = -ENODEV;
  2298. }
  2299. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2300. mutex_unlock(&wl->mutex);
  2301. b43legacydbg(wl, "Using software based encryption for "
  2302. "mac: %s\n", print_mac(mac, addr));
  2303. return err;
  2304. }
  2305. static void b43legacy_configure_filter(struct ieee80211_hw *hw,
  2306. unsigned int changed,
  2307. unsigned int *fflags,
  2308. int mc_count,
  2309. struct dev_addr_list *mc_list)
  2310. {
  2311. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2312. struct b43legacy_wldev *dev = wl->current_dev;
  2313. unsigned long flags;
  2314. if (!dev) {
  2315. *fflags = 0;
  2316. return;
  2317. }
  2318. spin_lock_irqsave(&wl->irq_lock, flags);
  2319. *fflags &= FIF_PROMISC_IN_BSS |
  2320. FIF_ALLMULTI |
  2321. FIF_FCSFAIL |
  2322. FIF_PLCPFAIL |
  2323. FIF_CONTROL |
  2324. FIF_OTHER_BSS |
  2325. FIF_BCN_PRBRESP_PROMISC;
  2326. changed &= FIF_PROMISC_IN_BSS |
  2327. FIF_ALLMULTI |
  2328. FIF_FCSFAIL |
  2329. FIF_PLCPFAIL |
  2330. FIF_CONTROL |
  2331. FIF_OTHER_BSS |
  2332. FIF_BCN_PRBRESP_PROMISC;
  2333. wl->filter_flags = *fflags;
  2334. if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
  2335. b43legacy_adjust_opmode(dev);
  2336. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2337. }
  2338. static int b43legacy_config_interface(struct ieee80211_hw *hw,
  2339. int if_id,
  2340. struct ieee80211_if_conf *conf)
  2341. {
  2342. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2343. struct b43legacy_wldev *dev = wl->current_dev;
  2344. unsigned long flags;
  2345. if (!dev)
  2346. return -ENODEV;
  2347. mutex_lock(&wl->mutex);
  2348. spin_lock_irqsave(&wl->irq_lock, flags);
  2349. B43legacy_WARN_ON(wl->if_id != if_id);
  2350. if (conf->bssid)
  2351. memcpy(wl->bssid, conf->bssid, ETH_ALEN);
  2352. else
  2353. memset(wl->bssid, 0, ETH_ALEN);
  2354. if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
  2355. if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
  2356. B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
  2357. b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
  2358. if (conf->beacon)
  2359. b43legacy_refresh_templates(dev, conf->beacon);
  2360. }
  2361. b43legacy_write_mac_bssid_templates(dev);
  2362. }
  2363. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2364. mutex_unlock(&wl->mutex);
  2365. return 0;
  2366. }
  2367. /* Locking: wl->mutex */
  2368. static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
  2369. {
  2370. struct b43legacy_wl *wl = dev->wl;
  2371. unsigned long flags;
  2372. if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
  2373. return;
  2374. /* Disable and sync interrupts. We must do this before than
  2375. * setting the status to INITIALIZED, as the interrupt handler
  2376. * won't care about IRQs then. */
  2377. spin_lock_irqsave(&wl->irq_lock, flags);
  2378. dev->irq_savedstate = b43legacy_interrupt_disable(dev,
  2379. B43legacy_IRQ_ALL);
  2380. b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
  2381. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2382. b43legacy_synchronize_irq(dev);
  2383. b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
  2384. mutex_unlock(&wl->mutex);
  2385. /* Must unlock as it would otherwise deadlock. No races here.
  2386. * Cancel the possibly running self-rearming periodic work. */
  2387. cancel_delayed_work_sync(&dev->periodic_work);
  2388. mutex_lock(&wl->mutex);
  2389. ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
  2390. b43legacy_mac_suspend(dev);
  2391. free_irq(dev->dev->irq, dev);
  2392. b43legacydbg(wl, "Wireless interface stopped\n");
  2393. }
  2394. /* Locking: wl->mutex */
  2395. static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
  2396. {
  2397. int err;
  2398. B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
  2399. drain_txstatus_queue(dev);
  2400. err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
  2401. IRQF_SHARED, KBUILD_MODNAME, dev);
  2402. if (err) {
  2403. b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
  2404. dev->dev->irq);
  2405. goto out;
  2406. }
  2407. /* We are ready to run. */
  2408. b43legacy_set_status(dev, B43legacy_STAT_STARTED);
  2409. /* Start data flow (TX/RX) */
  2410. b43legacy_mac_enable(dev);
  2411. b43legacy_interrupt_enable(dev, dev->irq_savedstate);
  2412. ieee80211_start_queues(dev->wl->hw);
  2413. /* Start maintenance work */
  2414. b43legacy_periodic_tasks_setup(dev);
  2415. b43legacydbg(dev->wl, "Wireless interface started\n");
  2416. out:
  2417. return err;
  2418. }
  2419. /* Get PHY and RADIO versioning numbers */
  2420. static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
  2421. {
  2422. struct b43legacy_phy *phy = &dev->phy;
  2423. u32 tmp;
  2424. u8 analog_type;
  2425. u8 phy_type;
  2426. u8 phy_rev;
  2427. u16 radio_manuf;
  2428. u16 radio_ver;
  2429. u16 radio_rev;
  2430. int unsupported = 0;
  2431. /* Get PHY versioning */
  2432. tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
  2433. analog_type = (tmp & B43legacy_PHYVER_ANALOG)
  2434. >> B43legacy_PHYVER_ANALOG_SHIFT;
  2435. phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
  2436. phy_rev = (tmp & B43legacy_PHYVER_VERSION);
  2437. switch (phy_type) {
  2438. case B43legacy_PHYTYPE_B:
  2439. if (phy_rev != 2 && phy_rev != 4
  2440. && phy_rev != 6 && phy_rev != 7)
  2441. unsupported = 1;
  2442. break;
  2443. case B43legacy_PHYTYPE_G:
  2444. if (phy_rev > 8)
  2445. unsupported = 1;
  2446. break;
  2447. default:
  2448. unsupported = 1;
  2449. };
  2450. if (unsupported) {
  2451. b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
  2452. "(Analog %u, Type %u, Revision %u)\n",
  2453. analog_type, phy_type, phy_rev);
  2454. return -EOPNOTSUPP;
  2455. }
  2456. b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
  2457. analog_type, phy_type, phy_rev);
  2458. /* Get RADIO versioning */
  2459. if (dev->dev->bus->chip_id == 0x4317) {
  2460. if (dev->dev->bus->chip_rev == 0)
  2461. tmp = 0x3205017F;
  2462. else if (dev->dev->bus->chip_rev == 1)
  2463. tmp = 0x4205017F;
  2464. else
  2465. tmp = 0x5205017F;
  2466. } else {
  2467. b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
  2468. B43legacy_RADIOCTL_ID);
  2469. tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
  2470. tmp <<= 16;
  2471. b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
  2472. B43legacy_RADIOCTL_ID);
  2473. tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
  2474. }
  2475. radio_manuf = (tmp & 0x00000FFF);
  2476. radio_ver = (tmp & 0x0FFFF000) >> 12;
  2477. radio_rev = (tmp & 0xF0000000) >> 28;
  2478. switch (phy_type) {
  2479. case B43legacy_PHYTYPE_B:
  2480. if ((radio_ver & 0xFFF0) != 0x2050)
  2481. unsupported = 1;
  2482. break;
  2483. case B43legacy_PHYTYPE_G:
  2484. if (radio_ver != 0x2050)
  2485. unsupported = 1;
  2486. break;
  2487. default:
  2488. B43legacy_BUG_ON(1);
  2489. }
  2490. if (unsupported) {
  2491. b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
  2492. "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
  2493. radio_manuf, radio_ver, radio_rev);
  2494. return -EOPNOTSUPP;
  2495. }
  2496. b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
  2497. " Revision %u\n", radio_manuf, radio_ver, radio_rev);
  2498. phy->radio_manuf = radio_manuf;
  2499. phy->radio_ver = radio_ver;
  2500. phy->radio_rev = radio_rev;
  2501. phy->analog = analog_type;
  2502. phy->type = phy_type;
  2503. phy->rev = phy_rev;
  2504. return 0;
  2505. }
  2506. static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
  2507. struct b43legacy_phy *phy)
  2508. {
  2509. struct b43legacy_lopair *lo;
  2510. int i;
  2511. memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
  2512. memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
  2513. /* Flags */
  2514. phy->locked = 0;
  2515. /* Assume the radio is enabled. If it's not enabled, the state will
  2516. * immediately get fixed on the first periodic work run. */
  2517. dev->radio_hw_enable = 1;
  2518. phy->savedpctlreg = 0xFFFF;
  2519. phy->aci_enable = 0;
  2520. phy->aci_wlan_automatic = 0;
  2521. phy->aci_hw_rssi = 0;
  2522. lo = phy->_lo_pairs;
  2523. if (lo)
  2524. memset(lo, 0, sizeof(struct b43legacy_lopair) *
  2525. B43legacy_LO_COUNT);
  2526. phy->max_lb_gain = 0;
  2527. phy->trsw_rx_gain = 0;
  2528. /* Set default attenuation values. */
  2529. phy->bbatt = b43legacy_default_baseband_attenuation(dev);
  2530. phy->rfatt = b43legacy_default_radio_attenuation(dev);
  2531. phy->txctl1 = b43legacy_default_txctl1(dev);
  2532. phy->txpwr_offset = 0;
  2533. /* NRSSI */
  2534. phy->nrssislope = 0;
  2535. for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
  2536. phy->nrssi[i] = -1000;
  2537. for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
  2538. phy->nrssi_lt[i] = i;
  2539. phy->lofcal = 0xFFFF;
  2540. phy->initval = 0xFFFF;
  2541. spin_lock_init(&phy->lock);
  2542. phy->interfmode = B43legacy_INTERFMODE_NONE;
  2543. phy->channel = 0xFF;
  2544. }
  2545. static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
  2546. {
  2547. /* Flags */
  2548. dev->reg124_set_0x4 = 0;
  2549. /* Stats */
  2550. memset(&dev->stats, 0, sizeof(dev->stats));
  2551. setup_struct_phy_for_init(dev, &dev->phy);
  2552. /* IRQ related flags */
  2553. dev->irq_reason = 0;
  2554. memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
  2555. dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
  2556. dev->mac_suspended = 1;
  2557. /* Noise calculation context */
  2558. memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
  2559. }
  2560. static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
  2561. {
  2562. #ifdef CONFIG_SSB_DRIVER_PCICORE
  2563. struct ssb_bus *bus = dev->dev->bus;
  2564. u32 tmp;
  2565. if (bus->pcicore.dev &&
  2566. bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
  2567. bus->pcicore.dev->id.revision <= 5) {
  2568. /* IMCFGLO timeouts workaround. */
  2569. tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
  2570. tmp &= ~SSB_IMCFGLO_REQTO;
  2571. tmp &= ~SSB_IMCFGLO_SERTO;
  2572. switch (bus->bustype) {
  2573. case SSB_BUSTYPE_PCI:
  2574. case SSB_BUSTYPE_PCMCIA:
  2575. tmp |= 0x32;
  2576. break;
  2577. case SSB_BUSTYPE_SSB:
  2578. tmp |= 0x53;
  2579. break;
  2580. }
  2581. ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
  2582. }
  2583. #endif /* CONFIG_SSB_DRIVER_PCICORE */
  2584. }
  2585. /* Shutdown a wireless core */
  2586. /* Locking: wl->mutex */
  2587. static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
  2588. {
  2589. struct b43legacy_wl *wl = dev->wl;
  2590. struct b43legacy_phy *phy = &dev->phy;
  2591. B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
  2592. if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
  2593. return;
  2594. b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
  2595. mutex_unlock(&wl->mutex);
  2596. /* Must unlock as it would otherwise deadlock. No races here.
  2597. * Cancel possibly pending workqueues. */
  2598. cancel_work_sync(&dev->restart_work);
  2599. mutex_lock(&wl->mutex);
  2600. mutex_unlock(&dev->wl->mutex);
  2601. b43legacy_rfkill_exit(dev);
  2602. mutex_lock(&dev->wl->mutex);
  2603. b43legacy_rng_exit(dev->wl);
  2604. b43legacy_pio_free(dev);
  2605. b43legacy_dma_free(dev);
  2606. b43legacy_chip_exit(dev);
  2607. b43legacy_radio_turn_off(dev, 1);
  2608. b43legacy_switch_analog(dev, 0);
  2609. if (phy->dyn_tssi_tbl)
  2610. kfree(phy->tssi2dbm);
  2611. kfree(phy->lo_control);
  2612. phy->lo_control = NULL;
  2613. ssb_device_disable(dev->dev, 0);
  2614. ssb_bus_may_powerdown(dev->dev->bus);
  2615. }
  2616. static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
  2617. {
  2618. struct b43legacy_phy *phy = &dev->phy;
  2619. int i;
  2620. /* Set default attenuation values. */
  2621. phy->bbatt = b43legacy_default_baseband_attenuation(dev);
  2622. phy->rfatt = b43legacy_default_radio_attenuation(dev);
  2623. phy->txctl1 = b43legacy_default_txctl1(dev);
  2624. phy->txctl2 = 0xFFFF;
  2625. phy->txpwr_offset = 0;
  2626. /* NRSSI */
  2627. phy->nrssislope = 0;
  2628. for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
  2629. phy->nrssi[i] = -1000;
  2630. for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
  2631. phy->nrssi_lt[i] = i;
  2632. phy->lofcal = 0xFFFF;
  2633. phy->initval = 0xFFFF;
  2634. phy->aci_enable = 0;
  2635. phy->aci_wlan_automatic = 0;
  2636. phy->aci_hw_rssi = 0;
  2637. phy->antenna_diversity = 0xFFFF;
  2638. memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
  2639. memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
  2640. /* Flags */
  2641. phy->calibrated = 0;
  2642. phy->locked = 0;
  2643. if (phy->_lo_pairs)
  2644. memset(phy->_lo_pairs, 0,
  2645. sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
  2646. memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
  2647. }
  2648. /* Initialize a wireless core */
  2649. static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
  2650. {
  2651. struct b43legacy_wl *wl = dev->wl;
  2652. struct ssb_bus *bus = dev->dev->bus;
  2653. struct b43legacy_phy *phy = &dev->phy;
  2654. struct ssb_sprom *sprom = &dev->dev->bus->sprom;
  2655. int err;
  2656. u32 hf;
  2657. u32 tmp;
  2658. B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
  2659. err = ssb_bus_powerup(bus, 0);
  2660. if (err)
  2661. goto out;
  2662. if (!ssb_device_is_enabled(dev->dev)) {
  2663. tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
  2664. b43legacy_wireless_core_reset(dev, tmp);
  2665. }
  2666. if ((phy->type == B43legacy_PHYTYPE_B) ||
  2667. (phy->type == B43legacy_PHYTYPE_G)) {
  2668. phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
  2669. * B43legacy_LO_COUNT,
  2670. GFP_KERNEL);
  2671. if (!phy->_lo_pairs)
  2672. return -ENOMEM;
  2673. }
  2674. setup_struct_wldev_for_init(dev);
  2675. err = b43legacy_phy_init_tssi2dbm_table(dev);
  2676. if (err)
  2677. goto err_kfree_lo_control;
  2678. /* Enable IRQ routing to this device. */
  2679. ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
  2680. b43legacy_imcfglo_timeouts_workaround(dev);
  2681. prepare_phy_data_for_init(dev);
  2682. b43legacy_phy_calibrate(dev);
  2683. err = b43legacy_chip_init(dev);
  2684. if (err)
  2685. goto err_kfree_tssitbl;
  2686. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2687. B43legacy_SHM_SH_WLCOREREV,
  2688. dev->dev->id.revision);
  2689. hf = b43legacy_hf_read(dev);
  2690. if (phy->type == B43legacy_PHYTYPE_G) {
  2691. hf |= B43legacy_HF_SYMW;
  2692. if (phy->rev == 1)
  2693. hf |= B43legacy_HF_GDCW;
  2694. if (sprom->r1.boardflags_lo & B43legacy_BFL_PACTRL)
  2695. hf |= B43legacy_HF_OFDMPABOOST;
  2696. } else if (phy->type == B43legacy_PHYTYPE_B) {
  2697. hf |= B43legacy_HF_SYMW;
  2698. if (phy->rev >= 2 && phy->radio_ver == 0x2050)
  2699. hf &= ~B43legacy_HF_GDCW;
  2700. }
  2701. b43legacy_hf_write(dev, hf);
  2702. /* Short/Long Retry Limit.
  2703. * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
  2704. * the chip-internal counter.
  2705. */
  2706. tmp = limit_value(modparam_short_retry, 0, 0xF);
  2707. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2708. 0x0006, tmp);
  2709. tmp = limit_value(modparam_long_retry, 0, 0xF);
  2710. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2711. 0x0007, tmp);
  2712. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2713. 0x0044, 3);
  2714. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2715. 0x0046, 2);
  2716. /* Disable sending probe responses from firmware.
  2717. * Setting the MaxTime to one usec will always trigger
  2718. * a timeout, so we never send any probe resp.
  2719. * A timeout of zero is infinite. */
  2720. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
  2721. B43legacy_SHM_SH_PRMAXTIME, 1);
  2722. b43legacy_rate_memory_init(dev);
  2723. /* Minimum Contention Window */
  2724. if (phy->type == B43legacy_PHYTYPE_B)
  2725. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2726. 0x0003, 31);
  2727. else
  2728. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2729. 0x0003, 15);
  2730. /* Maximum Contention Window */
  2731. b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
  2732. 0x0004, 1023);
  2733. do {
  2734. if (b43legacy_using_pio(dev))
  2735. err = b43legacy_pio_init(dev);
  2736. else {
  2737. err = b43legacy_dma_init(dev);
  2738. if (!err)
  2739. b43legacy_qos_init(dev);
  2740. }
  2741. } while (err == -EAGAIN);
  2742. if (err)
  2743. goto err_chip_exit;
  2744. b43legacy_write16(dev, 0x0612, 0x0050);
  2745. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
  2746. b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
  2747. ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
  2748. memset(wl->bssid, 0, ETH_ALEN);
  2749. memset(wl->mac_addr, 0, ETH_ALEN);
  2750. b43legacy_upload_card_macaddress(dev);
  2751. b43legacy_security_init(dev);
  2752. b43legacy_rfkill_init(dev);
  2753. b43legacy_rng_init(wl);
  2754. b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
  2755. out:
  2756. return err;
  2757. err_chip_exit:
  2758. b43legacy_chip_exit(dev);
  2759. err_kfree_tssitbl:
  2760. if (phy->dyn_tssi_tbl)
  2761. kfree(phy->tssi2dbm);
  2762. err_kfree_lo_control:
  2763. kfree(phy->lo_control);
  2764. phy->lo_control = NULL;
  2765. ssb_bus_may_powerdown(bus);
  2766. B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
  2767. return err;
  2768. }
  2769. static int b43legacy_add_interface(struct ieee80211_hw *hw,
  2770. struct ieee80211_if_init_conf *conf)
  2771. {
  2772. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2773. struct b43legacy_wldev *dev;
  2774. unsigned long flags;
  2775. int err = -EOPNOTSUPP;
  2776. /* TODO: allow WDS/AP devices to coexist */
  2777. if (conf->type != IEEE80211_IF_TYPE_AP &&
  2778. conf->type != IEEE80211_IF_TYPE_STA &&
  2779. conf->type != IEEE80211_IF_TYPE_WDS &&
  2780. conf->type != IEEE80211_IF_TYPE_IBSS)
  2781. return -EOPNOTSUPP;
  2782. mutex_lock(&wl->mutex);
  2783. if (wl->operating)
  2784. goto out_mutex_unlock;
  2785. b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
  2786. dev = wl->current_dev;
  2787. wl->operating = 1;
  2788. wl->if_id = conf->if_id;
  2789. wl->if_type = conf->type;
  2790. memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
  2791. spin_lock_irqsave(&wl->irq_lock, flags);
  2792. b43legacy_adjust_opmode(dev);
  2793. b43legacy_upload_card_macaddress(dev);
  2794. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2795. err = 0;
  2796. out_mutex_unlock:
  2797. mutex_unlock(&wl->mutex);
  2798. return err;
  2799. }
  2800. static void b43legacy_remove_interface(struct ieee80211_hw *hw,
  2801. struct ieee80211_if_init_conf *conf)
  2802. {
  2803. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2804. struct b43legacy_wldev *dev = wl->current_dev;
  2805. unsigned long flags;
  2806. b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
  2807. mutex_lock(&wl->mutex);
  2808. B43legacy_WARN_ON(!wl->operating);
  2809. B43legacy_WARN_ON(wl->if_id != conf->if_id);
  2810. wl->operating = 0;
  2811. spin_lock_irqsave(&wl->irq_lock, flags);
  2812. b43legacy_adjust_opmode(dev);
  2813. memset(wl->mac_addr, 0, ETH_ALEN);
  2814. b43legacy_upload_card_macaddress(dev);
  2815. spin_unlock_irqrestore(&wl->irq_lock, flags);
  2816. mutex_unlock(&wl->mutex);
  2817. }
  2818. static int b43legacy_start(struct ieee80211_hw *hw)
  2819. {
  2820. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2821. struct b43legacy_wldev *dev = wl->current_dev;
  2822. int did_init = 0;
  2823. int err = 0;
  2824. mutex_lock(&wl->mutex);
  2825. if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
  2826. err = b43legacy_wireless_core_init(dev);
  2827. if (err)
  2828. goto out_mutex_unlock;
  2829. did_init = 1;
  2830. }
  2831. if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
  2832. err = b43legacy_wireless_core_start(dev);
  2833. if (err) {
  2834. if (did_init)
  2835. b43legacy_wireless_core_exit(dev);
  2836. goto out_mutex_unlock;
  2837. }
  2838. }
  2839. out_mutex_unlock:
  2840. mutex_unlock(&wl->mutex);
  2841. return err;
  2842. }
  2843. static void b43legacy_stop(struct ieee80211_hw *hw)
  2844. {
  2845. struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
  2846. struct b43legacy_wldev *dev = wl->current_dev;
  2847. mutex_lock(&wl->mutex);
  2848. if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
  2849. b43legacy_wireless_core_stop(dev);
  2850. b43legacy_wireless_core_exit(dev);
  2851. mutex_unlock(&wl->mutex);
  2852. }
  2853. static const struct ieee80211_ops b43legacy_hw_ops = {
  2854. .tx = b43legacy_tx,
  2855. .conf_tx = b43legacy_conf_tx,
  2856. .add_interface = b43legacy_add_interface,
  2857. .remove_interface = b43legacy_remove_interface,
  2858. .config = b43legacy_dev_config,
  2859. .config_interface = b43legacy_config_interface,
  2860. .set_key = b43legacy_dev_set_key,
  2861. .configure_filter = b43legacy_configure_filter,
  2862. .get_stats = b43legacy_get_stats,
  2863. .get_tx_stats = b43legacy_get_tx_stats,
  2864. .start = b43legacy_start,
  2865. .stop = b43legacy_stop,
  2866. };
  2867. /* Hard-reset the chip. Do not call this directly.
  2868. * Use b43legacy_controller_restart()
  2869. */
  2870. static void b43legacy_chip_reset(struct work_struct *work)
  2871. {
  2872. struct b43legacy_wldev *dev =
  2873. container_of(work, struct b43legacy_wldev, restart_work);
  2874. struct b43legacy_wl *wl = dev->wl;
  2875. int err = 0;
  2876. int prev_status;
  2877. mutex_lock(&wl->mutex);
  2878. prev_status = b43legacy_status(dev);
  2879. /* Bring the device down... */
  2880. if (prev_status >= B43legacy_STAT_STARTED)
  2881. b43legacy_wireless_core_stop(dev);
  2882. if (prev_status >= B43legacy_STAT_INITIALIZED)
  2883. b43legacy_wireless_core_exit(dev);
  2884. /* ...and up again. */
  2885. if (prev_status >= B43legacy_STAT_INITIALIZED) {
  2886. err = b43legacy_wireless_core_init(dev);
  2887. if (err)
  2888. goto out;
  2889. }
  2890. if (prev_status >= B43legacy_STAT_STARTED) {
  2891. err = b43legacy_wireless_core_start(dev);
  2892. if (err) {
  2893. b43legacy_wireless_core_exit(dev);
  2894. goto out;
  2895. }
  2896. }
  2897. out:
  2898. mutex_unlock(&wl->mutex);
  2899. if (err)
  2900. b43legacyerr(wl, "Controller restart FAILED\n");
  2901. else
  2902. b43legacyinfo(wl, "Controller restarted\n");
  2903. }
  2904. static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
  2905. int have_bphy,
  2906. int have_gphy)
  2907. {
  2908. struct ieee80211_hw *hw = dev->wl->hw;
  2909. struct ieee80211_hw_mode *mode;
  2910. struct b43legacy_phy *phy = &dev->phy;
  2911. int cnt = 0;
  2912. int err;
  2913. phy->possible_phymodes = 0;
  2914. for (; 1; cnt++) {
  2915. if (have_bphy) {
  2916. B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
  2917. mode = &phy->hwmodes[cnt];
  2918. mode->mode = MODE_IEEE80211B;
  2919. mode->num_channels = b43legacy_bg_chantable_size;
  2920. mode->channels = b43legacy_bg_chantable;
  2921. mode->num_rates = b43legacy_b_ratetable_size;
  2922. mode->rates = b43legacy_b_ratetable;
  2923. err = ieee80211_register_hwmode(hw, mode);
  2924. if (err)
  2925. return err;
  2926. phy->possible_phymodes |= B43legacy_PHYMODE_B;
  2927. have_bphy = 0;
  2928. continue;
  2929. }
  2930. if (have_gphy) {
  2931. B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
  2932. mode = &phy->hwmodes[cnt];
  2933. mode->mode = MODE_IEEE80211G;
  2934. mode->num_channels = b43legacy_bg_chantable_size;
  2935. mode->channels = b43legacy_bg_chantable;
  2936. mode->num_rates = b43legacy_g_ratetable_size;
  2937. mode->rates = b43legacy_g_ratetable;
  2938. err = ieee80211_register_hwmode(hw, mode);
  2939. if (err)
  2940. return err;
  2941. phy->possible_phymodes |= B43legacy_PHYMODE_G;
  2942. have_gphy = 0;
  2943. continue;
  2944. }
  2945. break;
  2946. }
  2947. return 0;
  2948. }
  2949. static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
  2950. {
  2951. b43legacy_rfkill_free(dev);
  2952. /* We release firmware that late to not be required to re-request
  2953. * is all the time when we reinit the core. */
  2954. b43legacy_release_firmware(dev);
  2955. }
  2956. static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
  2957. {
  2958. struct b43legacy_wl *wl = dev->wl;
  2959. struct ssb_bus *bus = dev->dev->bus;
  2960. struct pci_dev *pdev = bus->host_pci;
  2961. int err;
  2962. int have_bphy = 0;
  2963. int have_gphy = 0;
  2964. u32 tmp;
  2965. /* Do NOT do any device initialization here.
  2966. * Do it in wireless_core_init() instead.
  2967. * This function is for gathering basic information about the HW, only.
  2968. * Also some structs may be set up here. But most likely you want to
  2969. * have that in core_init(), too.
  2970. */
  2971. err = ssb_bus_powerup(bus, 0);
  2972. if (err) {
  2973. b43legacyerr(wl, "Bus powerup failed\n");
  2974. goto out;
  2975. }
  2976. /* Get the PHY type. */
  2977. if (dev->dev->id.revision >= 5) {
  2978. u32 tmshigh;
  2979. tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
  2980. have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
  2981. if (!have_gphy)
  2982. have_bphy = 1;
  2983. } else if (dev->dev->id.revision == 4)
  2984. have_gphy = 1;
  2985. else
  2986. have_bphy = 1;
  2987. dev->phy.gmode = (have_gphy || have_bphy);
  2988. tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
  2989. b43legacy_wireless_core_reset(dev, tmp);
  2990. err = b43legacy_phy_versioning(dev);
  2991. if (err)
  2992. goto err_powerdown;
  2993. /* Check if this device supports multiband. */
  2994. if (!pdev ||
  2995. (pdev->device != 0x4312 &&
  2996. pdev->device != 0x4319 &&
  2997. pdev->device != 0x4324)) {
  2998. /* No multiband support. */
  2999. have_bphy = 0;
  3000. have_gphy = 0;
  3001. switch (dev->phy.type) {
  3002. case B43legacy_PHYTYPE_B:
  3003. have_bphy = 1;
  3004. break;
  3005. case B43legacy_PHYTYPE_G:
  3006. have_gphy = 1;
  3007. break;
  3008. default:
  3009. B43legacy_BUG_ON(1);
  3010. }
  3011. }
  3012. dev->phy.gmode = (have_gphy || have_bphy);
  3013. tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
  3014. b43legacy_wireless_core_reset(dev, tmp);
  3015. err = b43legacy_validate_chipaccess(dev);
  3016. if (err)
  3017. goto err_powerdown;
  3018. err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
  3019. if (err)
  3020. goto err_powerdown;
  3021. /* Now set some default "current_dev" */
  3022. if (!wl->current_dev)
  3023. wl->current_dev = dev;
  3024. INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
  3025. b43legacy_rfkill_alloc(dev);
  3026. b43legacy_radio_turn_off(dev, 1);
  3027. b43legacy_switch_analog(dev, 0);
  3028. ssb_device_disable(dev->dev, 0);
  3029. ssb_bus_may_powerdown(bus);
  3030. out:
  3031. return err;
  3032. err_powerdown:
  3033. ssb_bus_may_powerdown(bus);
  3034. return err;
  3035. }
  3036. static void b43legacy_one_core_detach(struct ssb_device *dev)
  3037. {
  3038. struct b43legacy_wldev *wldev;
  3039. struct b43legacy_wl *wl;
  3040. wldev = ssb_get_drvdata(dev);
  3041. wl = wldev->wl;
  3042. cancel_work_sync(&wldev->restart_work);
  3043. b43legacy_debugfs_remove_device(wldev);
  3044. b43legacy_wireless_core_detach(wldev);
  3045. list_del(&wldev->list);
  3046. wl->nr_devs--;
  3047. ssb_set_drvdata(dev, NULL);
  3048. kfree(wldev);
  3049. }
  3050. static int b43legacy_one_core_attach(struct ssb_device *dev,
  3051. struct b43legacy_wl *wl)
  3052. {
  3053. struct b43legacy_wldev *wldev;
  3054. struct pci_dev *pdev;
  3055. int err = -ENOMEM;
  3056. if (!list_empty(&wl->devlist)) {
  3057. /* We are not the first core on this chip. */
  3058. pdev = dev->bus->host_pci;
  3059. /* Only special chips support more than one wireless
  3060. * core, although some of the other chips have more than
  3061. * one wireless core as well. Check for this and
  3062. * bail out early.
  3063. */
  3064. if (!pdev ||
  3065. ((pdev->device != 0x4321) &&
  3066. (pdev->device != 0x4313) &&
  3067. (pdev->device != 0x431A))) {
  3068. b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
  3069. return -ENODEV;
  3070. }
  3071. }
  3072. wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
  3073. if (!wldev)
  3074. goto out;
  3075. wldev->dev = dev;
  3076. wldev->wl = wl;
  3077. b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
  3078. wldev->bad_frames_preempt = modparam_bad_frames_preempt;
  3079. tasklet_init(&wldev->isr_tasklet,
  3080. (void (*)(unsigned long))b43legacy_interrupt_tasklet,
  3081. (unsigned long)wldev);
  3082. if (modparam_pio)
  3083. wldev->__using_pio = 1;
  3084. INIT_LIST_HEAD(&wldev->list);
  3085. err = b43legacy_wireless_core_attach(wldev);
  3086. if (err)
  3087. goto err_kfree_wldev;
  3088. list_add(&wldev->list, &wl->devlist);
  3089. wl->nr_devs++;
  3090. ssb_set_drvdata(dev, wldev);
  3091. b43legacy_debugfs_add_device(wldev);
  3092. out:
  3093. return err;
  3094. err_kfree_wldev:
  3095. kfree(wldev);
  3096. return err;
  3097. }
  3098. static void b43legacy_sprom_fixup(struct ssb_bus *bus)
  3099. {
  3100. /* boardflags workarounds */
  3101. if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
  3102. bus->boardinfo.type == 0x4E &&
  3103. bus->boardinfo.rev > 0x40)
  3104. bus->sprom.r1.boardflags_lo |= B43legacy_BFL_PACTRL;
  3105. /* Convert Antennagain values to Q5.2 */
  3106. if (bus->sprom.r1.antenna_gain_bg == 0xFF)
  3107. bus->sprom.r1.antenna_gain_bg = 2; /* if unset, use 2 dBm */
  3108. bus->sprom.r1.antenna_gain_bg <<= 2;
  3109. }
  3110. static void b43legacy_wireless_exit(struct ssb_device *dev,
  3111. struct b43legacy_wl *wl)
  3112. {
  3113. struct ieee80211_hw *hw = wl->hw;
  3114. ssb_set_devtypedata(dev, NULL);
  3115. ieee80211_free_hw(hw);
  3116. }
  3117. static int b43legacy_wireless_init(struct ssb_device *dev)
  3118. {
  3119. struct ssb_sprom *sprom = &dev->bus->sprom;
  3120. struct ieee80211_hw *hw;
  3121. struct b43legacy_wl *wl;
  3122. int err = -ENOMEM;
  3123. b43legacy_sprom_fixup(dev->bus);
  3124. hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
  3125. if (!hw) {
  3126. b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
  3127. goto out;
  3128. }
  3129. /* fill hw info */
  3130. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
  3131. IEEE80211_HW_RX_INCLUDES_FCS;
  3132. hw->max_signal = 100;
  3133. hw->max_rssi = -110;
  3134. hw->max_noise = -110;
  3135. hw->queues = 1; /* FIXME: hardware has more queues */
  3136. SET_IEEE80211_DEV(hw, dev->dev);
  3137. if (is_valid_ether_addr(sprom->r1.et1mac))
  3138. SET_IEEE80211_PERM_ADDR(hw, sprom->r1.et1mac);
  3139. else
  3140. SET_IEEE80211_PERM_ADDR(hw, sprom->r1.il0mac);
  3141. /* Get and initialize struct b43legacy_wl */
  3142. wl = hw_to_b43legacy_wl(hw);
  3143. memset(wl, 0, sizeof(*wl));
  3144. wl->hw = hw;
  3145. spin_lock_init(&wl->irq_lock);
  3146. spin_lock_init(&wl->leds_lock);
  3147. mutex_init(&wl->mutex);
  3148. INIT_LIST_HEAD(&wl->devlist);
  3149. ssb_set_devtypedata(dev, wl);
  3150. b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
  3151. err = 0;
  3152. out:
  3153. return err;
  3154. }
  3155. static int b43legacy_probe(struct ssb_device *dev,
  3156. const struct ssb_device_id *id)
  3157. {
  3158. struct b43legacy_wl *wl;
  3159. int err;
  3160. int first = 0;
  3161. wl = ssb_get_devtypedata(dev);
  3162. if (!wl) {
  3163. /* Probing the first core - setup common struct b43legacy_wl */
  3164. first = 1;
  3165. err = b43legacy_wireless_init(dev);
  3166. if (err)
  3167. goto out;
  3168. wl = ssb_get_devtypedata(dev);
  3169. B43legacy_WARN_ON(!wl);
  3170. }
  3171. err = b43legacy_one_core_attach(dev, wl);
  3172. if (err)
  3173. goto err_wireless_exit;
  3174. if (first) {
  3175. err = ieee80211_register_hw(wl->hw);
  3176. if (err)
  3177. goto err_one_core_detach;
  3178. }
  3179. out:
  3180. return err;
  3181. err_one_core_detach:
  3182. b43legacy_one_core_detach(dev);
  3183. err_wireless_exit:
  3184. if (first)
  3185. b43legacy_wireless_exit(dev, wl);
  3186. return err;
  3187. }
  3188. static void b43legacy_remove(struct ssb_device *dev)
  3189. {
  3190. struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
  3191. struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
  3192. B43legacy_WARN_ON(!wl);
  3193. if (wl->current_dev == wldev)
  3194. ieee80211_unregister_hw(wl->hw);
  3195. b43legacy_one_core_detach(dev);
  3196. if (list_empty(&wl->devlist))
  3197. /* Last core on the chip unregistered.
  3198. * We can destroy common struct b43legacy_wl.
  3199. */
  3200. b43legacy_wireless_exit(dev, wl);
  3201. }
  3202. /* Perform a hardware reset. This can be called from any context. */
  3203. void b43legacy_controller_restart(struct b43legacy_wldev *dev,
  3204. const char *reason)
  3205. {
  3206. /* Must avoid requeueing, if we are in shutdown. */
  3207. if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
  3208. return;
  3209. b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
  3210. queue_work(dev->wl->hw->workqueue, &dev->restart_work);
  3211. }
  3212. #ifdef CONFIG_PM
  3213. static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
  3214. {
  3215. struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
  3216. struct b43legacy_wl *wl = wldev->wl;
  3217. b43legacydbg(wl, "Suspending...\n");
  3218. mutex_lock(&wl->mutex);
  3219. wldev->suspend_init_status = b43legacy_status(wldev);
  3220. if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
  3221. b43legacy_wireless_core_stop(wldev);
  3222. if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
  3223. b43legacy_wireless_core_exit(wldev);
  3224. mutex_unlock(&wl->mutex);
  3225. b43legacydbg(wl, "Device suspended.\n");
  3226. return 0;
  3227. }
  3228. static int b43legacy_resume(struct ssb_device *dev)
  3229. {
  3230. struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
  3231. struct b43legacy_wl *wl = wldev->wl;
  3232. int err = 0;
  3233. b43legacydbg(wl, "Resuming...\n");
  3234. mutex_lock(&wl->mutex);
  3235. if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
  3236. err = b43legacy_wireless_core_init(wldev);
  3237. if (err) {
  3238. b43legacyerr(wl, "Resume failed at core init\n");
  3239. goto out;
  3240. }
  3241. }
  3242. if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
  3243. err = b43legacy_wireless_core_start(wldev);
  3244. if (err) {
  3245. b43legacy_wireless_core_exit(wldev);
  3246. b43legacyerr(wl, "Resume failed at core start\n");
  3247. goto out;
  3248. }
  3249. }
  3250. mutex_unlock(&wl->mutex);
  3251. b43legacydbg(wl, "Device resumed.\n");
  3252. out:
  3253. return err;
  3254. }
  3255. #else /* CONFIG_PM */
  3256. # define b43legacy_suspend NULL
  3257. # define b43legacy_resume NULL
  3258. #endif /* CONFIG_PM */
  3259. static struct ssb_driver b43legacy_ssb_driver = {
  3260. .name = KBUILD_MODNAME,
  3261. .id_table = b43legacy_ssb_tbl,
  3262. .probe = b43legacy_probe,
  3263. .remove = b43legacy_remove,
  3264. .suspend = b43legacy_suspend,
  3265. .resume = b43legacy_resume,
  3266. };
  3267. static int __init b43legacy_init(void)
  3268. {
  3269. int err;
  3270. b43legacy_debugfs_init();
  3271. err = ssb_driver_register(&b43legacy_ssb_driver);
  3272. if (err)
  3273. goto err_dfs_exit;
  3274. return err;
  3275. err_dfs_exit:
  3276. b43legacy_debugfs_exit();
  3277. return err;
  3278. }
  3279. static void __exit b43legacy_exit(void)
  3280. {
  3281. ssb_driver_unregister(&b43legacy_ssb_driver);
  3282. b43legacy_debugfs_exit();
  3283. }
  3284. module_init(b43legacy_init)
  3285. module_exit(b43legacy_exit)