sn9c102_pas202bcb.c 10 KB

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  1. /***************************************************************************
  2. * Plug-in for PAS202BCB image sensor connected to the SN9C1xx PC Camera *
  3. * Controllers *
  4. * *
  5. * Copyright (C) 2004 by Carlos Eduardo Medaglia Dyonisio *
  6. * <medaglia@undl.org.br> *
  7. * http://cadu.homelinux.com:8080/ *
  8. * *
  9. * Support for SN9C103, DAC Magnitude, exposure and green gain controls *
  10. * added by Luca Risolia <luca.risolia@studio.unibo.it> *
  11. * *
  12. * This program is free software; you can redistribute it and/or modify *
  13. * it under the terms of the GNU General Public License as published by *
  14. * the Free Software Foundation; either version 2 of the License, or *
  15. * (at your option) any later version. *
  16. * *
  17. * This program is distributed in the hope that it will be useful, *
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  20. * GNU General Public License for more details. *
  21. * *
  22. * You should have received a copy of the GNU General Public License *
  23. * along with this program; if not, write to the Free Software *
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
  25. ***************************************************************************/
  26. #include <linux/delay.h>
  27. #include "sn9c102_sensor.h"
  28. static struct sn9c102_sensor pas202bcb;
  29. static int pas202bcb_init(struct sn9c102_device* cam)
  30. {
  31. int err = 0;
  32. switch (sn9c102_get_bridge(cam)) {
  33. case BRIDGE_SN9C101:
  34. case BRIDGE_SN9C102:
  35. err += sn9c102_write_reg(cam, 0x00, 0x10);
  36. err += sn9c102_write_reg(cam, 0x00, 0x11);
  37. err += sn9c102_write_reg(cam, 0x00, 0x14);
  38. err += sn9c102_write_reg(cam, 0x20, 0x17);
  39. err += sn9c102_write_reg(cam, 0x30, 0x19);
  40. err += sn9c102_write_reg(cam, 0x09, 0x18);
  41. break;
  42. case BRIDGE_SN9C103:
  43. err += sn9c102_write_reg(cam, 0x00, 0x02);
  44. err += sn9c102_write_reg(cam, 0x00, 0x03);
  45. err += sn9c102_write_reg(cam, 0x1a, 0x04);
  46. err += sn9c102_write_reg(cam, 0x20, 0x05);
  47. err += sn9c102_write_reg(cam, 0x20, 0x06);
  48. err += sn9c102_write_reg(cam, 0x20, 0x07);
  49. err += sn9c102_write_reg(cam, 0x00, 0x10);
  50. err += sn9c102_write_reg(cam, 0x00, 0x11);
  51. err += sn9c102_write_reg(cam, 0x00, 0x14);
  52. err += sn9c102_write_reg(cam, 0x20, 0x17);
  53. err += sn9c102_write_reg(cam, 0x30, 0x19);
  54. err += sn9c102_write_reg(cam, 0x09, 0x18);
  55. err += sn9c102_write_reg(cam, 0x02, 0x1c);
  56. err += sn9c102_write_reg(cam, 0x03, 0x1d);
  57. err += sn9c102_write_reg(cam, 0x0f, 0x1e);
  58. err += sn9c102_write_reg(cam, 0x0c, 0x1f);
  59. err += sn9c102_write_reg(cam, 0x00, 0x20);
  60. err += sn9c102_write_reg(cam, 0x10, 0x21);
  61. err += sn9c102_write_reg(cam, 0x20, 0x22);
  62. err += sn9c102_write_reg(cam, 0x30, 0x23);
  63. err += sn9c102_write_reg(cam, 0x40, 0x24);
  64. err += sn9c102_write_reg(cam, 0x50, 0x25);
  65. err += sn9c102_write_reg(cam, 0x60, 0x26);
  66. err += sn9c102_write_reg(cam, 0x70, 0x27);
  67. err += sn9c102_write_reg(cam, 0x80, 0x28);
  68. err += sn9c102_write_reg(cam, 0x90, 0x29);
  69. err += sn9c102_write_reg(cam, 0xa0, 0x2a);
  70. err += sn9c102_write_reg(cam, 0xb0, 0x2b);
  71. err += sn9c102_write_reg(cam, 0xc0, 0x2c);
  72. err += sn9c102_write_reg(cam, 0xd0, 0x2d);
  73. err += sn9c102_write_reg(cam, 0xe0, 0x2e);
  74. err += sn9c102_write_reg(cam, 0xf0, 0x2f);
  75. err += sn9c102_write_reg(cam, 0xff, 0x30);
  76. break;
  77. default:
  78. break;
  79. }
  80. err += sn9c102_i2c_write(cam, 0x02, 0x14);
  81. err += sn9c102_i2c_write(cam, 0x03, 0x40);
  82. err += sn9c102_i2c_write(cam, 0x0d, 0x2c);
  83. err += sn9c102_i2c_write(cam, 0x0e, 0x01);
  84. err += sn9c102_i2c_write(cam, 0x0f, 0xa9);
  85. err += sn9c102_i2c_write(cam, 0x10, 0x08);
  86. err += sn9c102_i2c_write(cam, 0x13, 0x63);
  87. err += sn9c102_i2c_write(cam, 0x15, 0x70);
  88. err += sn9c102_i2c_write(cam, 0x11, 0x01);
  89. msleep(400);
  90. return err;
  91. }
  92. static int pas202bcb_get_ctrl(struct sn9c102_device* cam,
  93. struct v4l2_control* ctrl)
  94. {
  95. switch (ctrl->id) {
  96. case V4L2_CID_EXPOSURE:
  97. {
  98. int r1 = sn9c102_i2c_read(cam, 0x04),
  99. r2 = sn9c102_i2c_read(cam, 0x05);
  100. if (r1 < 0 || r2 < 0)
  101. return -EIO;
  102. ctrl->value = (r1 << 6) | (r2 & 0x3f);
  103. }
  104. return 0;
  105. case V4L2_CID_RED_BALANCE:
  106. if ((ctrl->value = sn9c102_i2c_read(cam, 0x09)) < 0)
  107. return -EIO;
  108. ctrl->value &= 0x0f;
  109. return 0;
  110. case V4L2_CID_BLUE_BALANCE:
  111. if ((ctrl->value = sn9c102_i2c_read(cam, 0x07)) < 0)
  112. return -EIO;
  113. ctrl->value &= 0x0f;
  114. return 0;
  115. case V4L2_CID_GAIN:
  116. if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
  117. return -EIO;
  118. ctrl->value &= 0x1f;
  119. return 0;
  120. case SN9C102_V4L2_CID_GREEN_BALANCE:
  121. if ((ctrl->value = sn9c102_i2c_read(cam, 0x08)) < 0)
  122. return -EIO;
  123. ctrl->value &= 0x0f;
  124. return 0;
  125. case SN9C102_V4L2_CID_DAC_MAGNITUDE:
  126. if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
  127. return -EIO;
  128. return 0;
  129. default:
  130. return -EINVAL;
  131. }
  132. }
  133. static int pas202bcb_set_pix_format(struct sn9c102_device* cam,
  134. const struct v4l2_pix_format* pix)
  135. {
  136. int err = 0;
  137. if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X)
  138. err += sn9c102_write_reg(cam, 0x28, 0x17);
  139. else
  140. err += sn9c102_write_reg(cam, 0x20, 0x17);
  141. return err;
  142. }
  143. static int pas202bcb_set_ctrl(struct sn9c102_device* cam,
  144. const struct v4l2_control* ctrl)
  145. {
  146. int err = 0;
  147. switch (ctrl->id) {
  148. case V4L2_CID_EXPOSURE:
  149. err += sn9c102_i2c_write(cam, 0x04, ctrl->value >> 6);
  150. err += sn9c102_i2c_write(cam, 0x05, ctrl->value & 0x3f);
  151. break;
  152. case V4L2_CID_RED_BALANCE:
  153. err += sn9c102_i2c_write(cam, 0x09, ctrl->value);
  154. break;
  155. case V4L2_CID_BLUE_BALANCE:
  156. err += sn9c102_i2c_write(cam, 0x07, ctrl->value);
  157. break;
  158. case V4L2_CID_GAIN:
  159. err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
  160. break;
  161. case SN9C102_V4L2_CID_GREEN_BALANCE:
  162. err += sn9c102_i2c_write(cam, 0x08, ctrl->value);
  163. break;
  164. case SN9C102_V4L2_CID_DAC_MAGNITUDE:
  165. err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
  166. break;
  167. default:
  168. return -EINVAL;
  169. }
  170. err += sn9c102_i2c_write(cam, 0x11, 0x01);
  171. return err ? -EIO : 0;
  172. }
  173. static int pas202bcb_set_crop(struct sn9c102_device* cam,
  174. const struct v4l2_rect* rect)
  175. {
  176. struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
  177. int err = 0;
  178. u8 h_start = 0,
  179. v_start = (u8)(rect->top - s->cropcap.bounds.top) + 3;
  180. switch (sn9c102_get_bridge(cam)) {
  181. case BRIDGE_SN9C101:
  182. case BRIDGE_SN9C102:
  183. h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4;
  184. break;
  185. case BRIDGE_SN9C103:
  186. h_start = (u8)(rect->left - s->cropcap.bounds.left) + 3;
  187. break;
  188. default:
  189. break;
  190. }
  191. err += sn9c102_write_reg(cam, h_start, 0x12);
  192. err += sn9c102_write_reg(cam, v_start, 0x13);
  193. return err;
  194. }
  195. static struct sn9c102_sensor pas202bcb = {
  196. .name = "PAS202BCB",
  197. .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
  198. .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103,
  199. .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
  200. .frequency = SN9C102_I2C_400KHZ | SN9C102_I2C_100KHZ,
  201. .interface = SN9C102_I2C_2WIRES,
  202. .i2c_slave_id = 0x40,
  203. .init = &pas202bcb_init,
  204. .qctrl = {
  205. {
  206. .id = V4L2_CID_EXPOSURE,
  207. .type = V4L2_CTRL_TYPE_INTEGER,
  208. .name = "exposure",
  209. .minimum = 0x01e5,
  210. .maximum = 0x3fff,
  211. .step = 0x0001,
  212. .default_value = 0x01e5,
  213. .flags = 0,
  214. },
  215. {
  216. .id = V4L2_CID_GAIN,
  217. .type = V4L2_CTRL_TYPE_INTEGER,
  218. .name = "global gain",
  219. .minimum = 0x00,
  220. .maximum = 0x1f,
  221. .step = 0x01,
  222. .default_value = 0x0b,
  223. .flags = 0,
  224. },
  225. {
  226. .id = V4L2_CID_RED_BALANCE,
  227. .type = V4L2_CTRL_TYPE_INTEGER,
  228. .name = "red balance",
  229. .minimum = 0x00,
  230. .maximum = 0x0f,
  231. .step = 0x01,
  232. .default_value = 0x00,
  233. .flags = 0,
  234. },
  235. {
  236. .id = V4L2_CID_BLUE_BALANCE,
  237. .type = V4L2_CTRL_TYPE_INTEGER,
  238. .name = "blue balance",
  239. .minimum = 0x00,
  240. .maximum = 0x0f,
  241. .step = 0x01,
  242. .default_value = 0x05,
  243. .flags = 0,
  244. },
  245. {
  246. .id = SN9C102_V4L2_CID_GREEN_BALANCE,
  247. .type = V4L2_CTRL_TYPE_INTEGER,
  248. .name = "green balance",
  249. .minimum = 0x00,
  250. .maximum = 0x0f,
  251. .step = 0x01,
  252. .default_value = 0x00,
  253. .flags = 0,
  254. },
  255. {
  256. .id = SN9C102_V4L2_CID_DAC_MAGNITUDE,
  257. .type = V4L2_CTRL_TYPE_INTEGER,
  258. .name = "DAC magnitude",
  259. .minimum = 0x00,
  260. .maximum = 0xff,
  261. .step = 0x01,
  262. .default_value = 0x04,
  263. .flags = 0,
  264. },
  265. },
  266. .get_ctrl = &pas202bcb_get_ctrl,
  267. .set_ctrl = &pas202bcb_set_ctrl,
  268. .cropcap = {
  269. .bounds = {
  270. .left = 0,
  271. .top = 0,
  272. .width = 640,
  273. .height = 480,
  274. },
  275. .defrect = {
  276. .left = 0,
  277. .top = 0,
  278. .width = 640,
  279. .height = 480,
  280. },
  281. },
  282. .set_crop = &pas202bcb_set_crop,
  283. .pix_format = {
  284. .width = 640,
  285. .height = 480,
  286. .pixelformat = V4L2_PIX_FMT_SBGGR8,
  287. .priv = 8,
  288. },
  289. .set_pix_format = &pas202bcb_set_pix_format
  290. };
  291. int sn9c102_probe_pas202bcb(struct sn9c102_device* cam)
  292. {
  293. int r0 = 0, r1 = 0, err = 0;
  294. unsigned int pid = 0;
  295. /*
  296. * Minimal initialization to enable the I2C communication
  297. * NOTE: do NOT change the values!
  298. */
  299. switch (sn9c102_get_bridge(cam)) {
  300. case BRIDGE_SN9C101:
  301. case BRIDGE_SN9C102:
  302. err += sn9c102_write_reg(cam, 0x01, 0x01); /* power down */
  303. err += sn9c102_write_reg(cam, 0x40, 0x01); /* power on */
  304. err += sn9c102_write_reg(cam, 0x28, 0x17); /* clock 24 MHz */
  305. break;
  306. case BRIDGE_SN9C103: /* do _not_ change anything! */
  307. err += sn9c102_write_reg(cam, 0x09, 0x01);
  308. err += sn9c102_write_reg(cam, 0x44, 0x01);
  309. err += sn9c102_write_reg(cam, 0x44, 0x02);
  310. err += sn9c102_write_reg(cam, 0x29, 0x17);
  311. break;
  312. default:
  313. break;
  314. }
  315. r0 = sn9c102_i2c_try_read(cam, &pas202bcb, 0x00);
  316. r1 = sn9c102_i2c_try_read(cam, &pas202bcb, 0x01);
  317. if (err || r0 < 0 || r1 < 0)
  318. return -EIO;
  319. pid = (r0 << 4) | ((r1 & 0xf0) >> 4);
  320. if (pid != 0x017)
  321. return -ENODEV;
  322. sn9c102_attach_sensor(cam, &pas202bcb);
  323. return 0;
  324. }