sn9c102_ov7630.c 13 KB

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  1. /***************************************************************************
  2. * Plug-in for OV7630 image sensor connected to the SN9C1xx PC Camera *
  3. * Controllers *
  4. * *
  5. * Copyright (C) 2006-2007 by Luca Risolia <luca.risolia@studio.unibo.it> *
  6. * *
  7. * This program is free software; you can redistribute it and/or modify *
  8. * it under the terms of the GNU General Public License as published by *
  9. * the Free Software Foundation; either version 2 of the License, or *
  10. * (at your option) any later version. *
  11. * *
  12. * This program is distributed in the hope that it will be useful, *
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  15. * GNU General Public License for more details. *
  16. * *
  17. * You should have received a copy of the GNU General Public License *
  18. * along with this program; if not, write to the Free Software *
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
  20. ***************************************************************************/
  21. #include "sn9c102_sensor.h"
  22. static struct sn9c102_sensor ov7630;
  23. static int ov7630_init(struct sn9c102_device* cam)
  24. {
  25. int err = 0;
  26. switch (sn9c102_get_bridge(cam)) {
  27. case BRIDGE_SN9C101:
  28. case BRIDGE_SN9C102:
  29. err += sn9c102_write_reg(cam, 0x00, 0x14);
  30. err += sn9c102_write_reg(cam, 0x60, 0x17);
  31. err += sn9c102_write_reg(cam, 0x0f, 0x18);
  32. err += sn9c102_write_reg(cam, 0x50, 0x19);
  33. err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  34. err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  35. err += sn9c102_i2c_write(cam, 0x11, 0x00);
  36. err += sn9c102_i2c_write(cam, 0x15, 0x34);
  37. err += sn9c102_i2c_write(cam, 0x16, 0x03);
  38. err += sn9c102_i2c_write(cam, 0x17, 0x1c);
  39. err += sn9c102_i2c_write(cam, 0x18, 0xbd);
  40. err += sn9c102_i2c_write(cam, 0x19, 0x06);
  41. err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
  42. err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  43. err += sn9c102_i2c_write(cam, 0x20, 0x44);
  44. err += sn9c102_i2c_write(cam, 0x23, 0xee);
  45. err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  46. err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  47. err += sn9c102_i2c_write(cam, 0x28, 0x20);
  48. err += sn9c102_i2c_write(cam, 0x29, 0x30);
  49. err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  50. err += sn9c102_i2c_write(cam, 0x30, 0x24);
  51. err += sn9c102_i2c_write(cam, 0x32, 0x86);
  52. err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  53. err += sn9c102_i2c_write(cam, 0x61, 0x42);
  54. err += sn9c102_i2c_write(cam, 0x65, 0x00);
  55. err += sn9c102_i2c_write(cam, 0x69, 0x38);
  56. err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  57. err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  58. err += sn9c102_i2c_write(cam, 0x71, 0x00);
  59. err += sn9c102_i2c_write(cam, 0x74, 0x21);
  60. err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  61. break;
  62. case BRIDGE_SN9C103:
  63. err += sn9c102_write_reg(cam, 0x00, 0x02);
  64. err += sn9c102_write_reg(cam, 0x00, 0x03);
  65. err += sn9c102_write_reg(cam, 0x1a, 0x04);
  66. err += sn9c102_write_reg(cam, 0x20, 0x05);
  67. err += sn9c102_write_reg(cam, 0x20, 0x06);
  68. err += sn9c102_write_reg(cam, 0x20, 0x07);
  69. err += sn9c102_write_reg(cam, 0x03, 0x10);
  70. err += sn9c102_write_reg(cam, 0x0a, 0x14);
  71. err += sn9c102_write_reg(cam, 0x60, 0x17);
  72. err += sn9c102_write_reg(cam, 0x0f, 0x18);
  73. err += sn9c102_write_reg(cam, 0x50, 0x19);
  74. err += sn9c102_write_reg(cam, 0x1d, 0x1a);
  75. err += sn9c102_write_reg(cam, 0x10, 0x1b);
  76. err += sn9c102_write_reg(cam, 0x02, 0x1c);
  77. err += sn9c102_write_reg(cam, 0x03, 0x1d);
  78. err += sn9c102_write_reg(cam, 0x0f, 0x1e);
  79. err += sn9c102_write_reg(cam, 0x0c, 0x1f);
  80. err += sn9c102_write_reg(cam, 0x00, 0x20);
  81. err += sn9c102_write_reg(cam, 0x10, 0x21);
  82. err += sn9c102_write_reg(cam, 0x20, 0x22);
  83. err += sn9c102_write_reg(cam, 0x30, 0x23);
  84. err += sn9c102_write_reg(cam, 0x40, 0x24);
  85. err += sn9c102_write_reg(cam, 0x50, 0x25);
  86. err += sn9c102_write_reg(cam, 0x60, 0x26);
  87. err += sn9c102_write_reg(cam, 0x70, 0x27);
  88. err += sn9c102_write_reg(cam, 0x80, 0x28);
  89. err += sn9c102_write_reg(cam, 0x90, 0x29);
  90. err += sn9c102_write_reg(cam, 0xa0, 0x2a);
  91. err += sn9c102_write_reg(cam, 0xb0, 0x2b);
  92. err += sn9c102_write_reg(cam, 0xc0, 0x2c);
  93. err += sn9c102_write_reg(cam, 0xd0, 0x2d);
  94. err += sn9c102_write_reg(cam, 0xe0, 0x2e);
  95. err += sn9c102_write_reg(cam, 0xf0, 0x2f);
  96. err += sn9c102_write_reg(cam, 0xff, 0x30);
  97. err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  98. err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  99. err += sn9c102_i2c_write(cam, 0x15, 0x34);
  100. err += sn9c102_i2c_write(cam, 0x11, 0x01);
  101. err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  102. err += sn9c102_i2c_write(cam, 0x20, 0x44);
  103. err += sn9c102_i2c_write(cam, 0x23, 0xee);
  104. err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  105. err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  106. err += sn9c102_i2c_write(cam, 0x28, 0x20);
  107. err += sn9c102_i2c_write(cam, 0x29, 0x30);
  108. err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  109. err += sn9c102_i2c_write(cam, 0x30, 0x24);
  110. err += sn9c102_i2c_write(cam, 0x32, 0x86);
  111. err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  112. err += sn9c102_i2c_write(cam, 0x61, 0x42);
  113. err += sn9c102_i2c_write(cam, 0x65, 0x00);
  114. err += sn9c102_i2c_write(cam, 0x69, 0x38);
  115. err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  116. err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  117. err += sn9c102_i2c_write(cam, 0x71, 0x00);
  118. err += sn9c102_i2c_write(cam, 0x74, 0x21);
  119. err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  120. break;
  121. default:
  122. break;
  123. }
  124. return err;
  125. }
  126. static int ov7630_get_ctrl(struct sn9c102_device* cam,
  127. struct v4l2_control* ctrl)
  128. {
  129. int err = 0;
  130. switch (ctrl->id) {
  131. case V4L2_CID_EXPOSURE:
  132. if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
  133. return -EIO;
  134. break;
  135. case V4L2_CID_RED_BALANCE:
  136. ctrl->value = sn9c102_pread_reg(cam, 0x07);
  137. break;
  138. case V4L2_CID_BLUE_BALANCE:
  139. ctrl->value = sn9c102_pread_reg(cam, 0x06);
  140. break;
  141. case SN9C102_V4L2_CID_GREEN_BALANCE:
  142. ctrl->value = sn9c102_pread_reg(cam, 0x05);
  143. break;
  144. case V4L2_CID_GAIN:
  145. if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
  146. return -EIO;
  147. ctrl->value &= 0x3f;
  148. break;
  149. case V4L2_CID_DO_WHITE_BALANCE:
  150. if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
  151. return -EIO;
  152. ctrl->value &= 0x3f;
  153. break;
  154. case V4L2_CID_WHITENESS:
  155. if ((ctrl->value = sn9c102_i2c_read(cam, 0x0d)) < 0)
  156. return -EIO;
  157. ctrl->value &= 0x3f;
  158. break;
  159. case V4L2_CID_AUTOGAIN:
  160. if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
  161. return -EIO;
  162. ctrl->value &= 0x01;
  163. break;
  164. case V4L2_CID_VFLIP:
  165. if ((ctrl->value = sn9c102_i2c_read(cam, 0x75)) < 0)
  166. return -EIO;
  167. ctrl->value = (ctrl->value & 0x80) ? 1 : 0;
  168. break;
  169. case SN9C102_V4L2_CID_GAMMA:
  170. if ((ctrl->value = sn9c102_i2c_read(cam, 0x14)) < 0)
  171. return -EIO;
  172. ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
  173. break;
  174. case SN9C102_V4L2_CID_BAND_FILTER:
  175. if ((ctrl->value = sn9c102_i2c_read(cam, 0x2d)) < 0)
  176. return -EIO;
  177. ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
  178. break;
  179. default:
  180. return -EINVAL;
  181. }
  182. return err ? -EIO : 0;
  183. }
  184. static int ov7630_set_ctrl(struct sn9c102_device* cam,
  185. const struct v4l2_control* ctrl)
  186. {
  187. int err = 0;
  188. switch (ctrl->id) {
  189. case V4L2_CID_EXPOSURE:
  190. err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
  191. break;
  192. case V4L2_CID_RED_BALANCE:
  193. err += sn9c102_write_reg(cam, ctrl->value, 0x07);
  194. break;
  195. case V4L2_CID_BLUE_BALANCE:
  196. err += sn9c102_write_reg(cam, ctrl->value, 0x06);
  197. break;
  198. case SN9C102_V4L2_CID_GREEN_BALANCE:
  199. err += sn9c102_write_reg(cam, ctrl->value, 0x05);
  200. break;
  201. case V4L2_CID_GAIN:
  202. err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
  203. break;
  204. case V4L2_CID_DO_WHITE_BALANCE:
  205. err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
  206. break;
  207. case V4L2_CID_WHITENESS:
  208. err += sn9c102_i2c_write(cam, 0x0d, ctrl->value);
  209. break;
  210. case V4L2_CID_AUTOGAIN:
  211. err += sn9c102_i2c_write(cam, 0x13, ctrl->value |
  212. (ctrl->value << 1));
  213. break;
  214. case V4L2_CID_VFLIP:
  215. err += sn9c102_i2c_write(cam, 0x75, 0x0e | (ctrl->value << 7));
  216. break;
  217. case SN9C102_V4L2_CID_GAMMA:
  218. err += sn9c102_i2c_write(cam, 0x14, ctrl->value << 2);
  219. break;
  220. case SN9C102_V4L2_CID_BAND_FILTER:
  221. err += sn9c102_i2c_write(cam, 0x2d, ctrl->value << 2);
  222. break;
  223. default:
  224. return -EINVAL;
  225. }
  226. return err ? -EIO : 0;
  227. }
  228. static int ov7630_set_crop(struct sn9c102_device* cam,
  229. const struct v4l2_rect* rect)
  230. {
  231. struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
  232. int err = 0;
  233. u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1,
  234. v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
  235. err += sn9c102_write_reg(cam, h_start, 0x12);
  236. err += sn9c102_write_reg(cam, v_start, 0x13);
  237. return err;
  238. }
  239. static int ov7630_set_pix_format(struct sn9c102_device* cam,
  240. const struct v4l2_pix_format* pix)
  241. {
  242. int err = 0;
  243. if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X)
  244. err += sn9c102_write_reg(cam, 0x20, 0x19);
  245. else
  246. err += sn9c102_write_reg(cam, 0x50, 0x19);
  247. return err;
  248. }
  249. static struct sn9c102_sensor ov7630 = {
  250. .name = "OV7630",
  251. .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
  252. .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103,
  253. .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
  254. .frequency = SN9C102_I2C_100KHZ,
  255. .interface = SN9C102_I2C_2WIRES,
  256. .i2c_slave_id = 0x21,
  257. .init = &ov7630_init,
  258. .qctrl = {
  259. {
  260. .id = V4L2_CID_GAIN,
  261. .type = V4L2_CTRL_TYPE_INTEGER,
  262. .name = "global gain",
  263. .minimum = 0x00,
  264. .maximum = 0x3f,
  265. .step = 0x01,
  266. .default_value = 0x14,
  267. .flags = 0,
  268. },
  269. {
  270. .id = V4L2_CID_EXPOSURE,
  271. .type = V4L2_CTRL_TYPE_INTEGER,
  272. .name = "exposure",
  273. .minimum = 0x00,
  274. .maximum = 0xff,
  275. .step = 0x01,
  276. .default_value = 0x60,
  277. .flags = 0,
  278. },
  279. {
  280. .id = V4L2_CID_WHITENESS,
  281. .type = V4L2_CTRL_TYPE_INTEGER,
  282. .name = "white balance background: red",
  283. .minimum = 0x00,
  284. .maximum = 0x3f,
  285. .step = 0x01,
  286. .default_value = 0x20,
  287. .flags = 0,
  288. },
  289. {
  290. .id = V4L2_CID_DO_WHITE_BALANCE,
  291. .type = V4L2_CTRL_TYPE_INTEGER,
  292. .name = "white balance background: blue",
  293. .minimum = 0x00,
  294. .maximum = 0x3f,
  295. .step = 0x01,
  296. .default_value = 0x20,
  297. .flags = 0,
  298. },
  299. {
  300. .id = V4L2_CID_RED_BALANCE,
  301. .type = V4L2_CTRL_TYPE_INTEGER,
  302. .name = "red balance",
  303. .minimum = 0x00,
  304. .maximum = 0x7f,
  305. .step = 0x01,
  306. .default_value = 0x20,
  307. .flags = 0,
  308. },
  309. {
  310. .id = V4L2_CID_BLUE_BALANCE,
  311. .type = V4L2_CTRL_TYPE_INTEGER,
  312. .name = "blue balance",
  313. .minimum = 0x00,
  314. .maximum = 0x7f,
  315. .step = 0x01,
  316. .default_value = 0x20,
  317. .flags = 0,
  318. },
  319. {
  320. .id = V4L2_CID_AUTOGAIN,
  321. .type = V4L2_CTRL_TYPE_BOOLEAN,
  322. .name = "auto adjust",
  323. .minimum = 0x00,
  324. .maximum = 0x01,
  325. .step = 0x01,
  326. .default_value = 0x00,
  327. .flags = 0,
  328. },
  329. {
  330. .id = V4L2_CID_VFLIP,
  331. .type = V4L2_CTRL_TYPE_BOOLEAN,
  332. .name = "vertical flip",
  333. .minimum = 0x00,
  334. .maximum = 0x01,
  335. .step = 0x01,
  336. .default_value = 0x01,
  337. .flags = 0,
  338. },
  339. {
  340. .id = SN9C102_V4L2_CID_GREEN_BALANCE,
  341. .type = V4L2_CTRL_TYPE_INTEGER,
  342. .name = "green balance",
  343. .minimum = 0x00,
  344. .maximum = 0x7f,
  345. .step = 0x01,
  346. .default_value = 0x20,
  347. .flags = 0,
  348. },
  349. {
  350. .id = SN9C102_V4L2_CID_BAND_FILTER,
  351. .type = V4L2_CTRL_TYPE_BOOLEAN,
  352. .name = "band filter",
  353. .minimum = 0x00,
  354. .maximum = 0x01,
  355. .step = 0x01,
  356. .default_value = 0x00,
  357. .flags = 0,
  358. },
  359. {
  360. .id = SN9C102_V4L2_CID_GAMMA,
  361. .type = V4L2_CTRL_TYPE_BOOLEAN,
  362. .name = "rgb gamma",
  363. .minimum = 0x00,
  364. .maximum = 0x01,
  365. .step = 0x01,
  366. .default_value = 0x00,
  367. .flags = 0,
  368. },
  369. },
  370. .get_ctrl = &ov7630_get_ctrl,
  371. .set_ctrl = &ov7630_set_ctrl,
  372. .cropcap = {
  373. .bounds = {
  374. .left = 0,
  375. .top = 0,
  376. .width = 640,
  377. .height = 480,
  378. },
  379. .defrect = {
  380. .left = 0,
  381. .top = 0,
  382. .width = 640,
  383. .height = 480,
  384. },
  385. },
  386. .set_crop = &ov7630_set_crop,
  387. .pix_format = {
  388. .width = 640,
  389. .height = 480,
  390. .pixelformat = V4L2_PIX_FMT_SN9C10X,
  391. .priv = 8,
  392. },
  393. .set_pix_format = &ov7630_set_pix_format
  394. };
  395. int sn9c102_probe_ov7630(struct sn9c102_device* cam)
  396. {
  397. int pid, ver, err = 0;
  398. switch (sn9c102_get_bridge(cam)) {
  399. case BRIDGE_SN9C101:
  400. case BRIDGE_SN9C102:
  401. err += sn9c102_write_reg(cam, 0x01, 0x01);
  402. err += sn9c102_write_reg(cam, 0x00, 0x01);
  403. err += sn9c102_write_reg(cam, 0x28, 0x17);
  404. break;
  405. case BRIDGE_SN9C103: /* do _not_ change anything! */
  406. err += sn9c102_write_reg(cam, 0x09, 0x01);
  407. err += sn9c102_write_reg(cam, 0x42, 0x01);
  408. err += sn9c102_write_reg(cam, 0x28, 0x17);
  409. err += sn9c102_write_reg(cam, 0x44, 0x02);
  410. pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
  411. if (err || pid < 0) { /* try a different initialization */
  412. err = sn9c102_write_reg(cam, 0x01, 0x01);
  413. err += sn9c102_write_reg(cam, 0x00, 0x01);
  414. }
  415. break;
  416. default:
  417. break;
  418. }
  419. pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
  420. ver = sn9c102_i2c_try_read(cam, &ov7630, 0x0b);
  421. if (err || pid < 0 || ver < 0)
  422. return -EIO;
  423. if (pid != 0x76 || ver != 0x31)
  424. return -ENODEV;
  425. sn9c102_attach_sensor(cam, &ov7630);
  426. return 0;
  427. }