qlcnic_init.c 42 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/netdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/slab.h>
  27. #include <linux/if_vlan.h>
  28. #include "qlcnic.h"
  29. struct crb_addr_pair {
  30. u32 addr;
  31. u32 data;
  32. };
  33. #define QLCNIC_MAX_CRB_XFORM 60
  34. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  35. #define crb_addr_transform(name) \
  36. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  37. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  38. #define QLCNIC_ADDR_ERROR (0xffffffff)
  39. static void
  40. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  41. struct qlcnic_host_rds_ring *rds_ring);
  42. static int
  43. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
  44. static void crb_addr_transform_setup(void)
  45. {
  46. crb_addr_transform(XDMA);
  47. crb_addr_transform(TIMR);
  48. crb_addr_transform(SRE);
  49. crb_addr_transform(SQN3);
  50. crb_addr_transform(SQN2);
  51. crb_addr_transform(SQN1);
  52. crb_addr_transform(SQN0);
  53. crb_addr_transform(SQS3);
  54. crb_addr_transform(SQS2);
  55. crb_addr_transform(SQS1);
  56. crb_addr_transform(SQS0);
  57. crb_addr_transform(RPMX7);
  58. crb_addr_transform(RPMX6);
  59. crb_addr_transform(RPMX5);
  60. crb_addr_transform(RPMX4);
  61. crb_addr_transform(RPMX3);
  62. crb_addr_transform(RPMX2);
  63. crb_addr_transform(RPMX1);
  64. crb_addr_transform(RPMX0);
  65. crb_addr_transform(ROMUSB);
  66. crb_addr_transform(SN);
  67. crb_addr_transform(QMN);
  68. crb_addr_transform(QMS);
  69. crb_addr_transform(PGNI);
  70. crb_addr_transform(PGND);
  71. crb_addr_transform(PGN3);
  72. crb_addr_transform(PGN2);
  73. crb_addr_transform(PGN1);
  74. crb_addr_transform(PGN0);
  75. crb_addr_transform(PGSI);
  76. crb_addr_transform(PGSD);
  77. crb_addr_transform(PGS3);
  78. crb_addr_transform(PGS2);
  79. crb_addr_transform(PGS1);
  80. crb_addr_transform(PGS0);
  81. crb_addr_transform(PS);
  82. crb_addr_transform(PH);
  83. crb_addr_transform(NIU);
  84. crb_addr_transform(I2Q);
  85. crb_addr_transform(EG);
  86. crb_addr_transform(MN);
  87. crb_addr_transform(MS);
  88. crb_addr_transform(CAS2);
  89. crb_addr_transform(CAS1);
  90. crb_addr_transform(CAS0);
  91. crb_addr_transform(CAM);
  92. crb_addr_transform(C2C1);
  93. crb_addr_transform(C2C0);
  94. crb_addr_transform(SMB);
  95. crb_addr_transform(OCM0);
  96. crb_addr_transform(I2C0);
  97. }
  98. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  99. {
  100. struct qlcnic_recv_context *recv_ctx;
  101. struct qlcnic_host_rds_ring *rds_ring;
  102. struct qlcnic_rx_buffer *rx_buf;
  103. int i, ring;
  104. recv_ctx = &adapter->recv_ctx;
  105. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  106. rds_ring = &recv_ctx->rds_rings[ring];
  107. for (i = 0; i < rds_ring->num_desc; ++i) {
  108. rx_buf = &(rds_ring->rx_buf_arr[i]);
  109. if (rx_buf->skb == NULL)
  110. continue;
  111. pci_unmap_single(adapter->pdev,
  112. rx_buf->dma,
  113. rds_ring->dma_size,
  114. PCI_DMA_FROMDEVICE);
  115. dev_kfree_skb_any(rx_buf->skb);
  116. }
  117. }
  118. }
  119. void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
  120. {
  121. struct qlcnic_recv_context *recv_ctx;
  122. struct qlcnic_host_rds_ring *rds_ring;
  123. struct qlcnic_rx_buffer *rx_buf;
  124. int i, ring;
  125. recv_ctx = &adapter->recv_ctx;
  126. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  127. rds_ring = &recv_ctx->rds_rings[ring];
  128. INIT_LIST_HEAD(&rds_ring->free_list);
  129. rx_buf = rds_ring->rx_buf_arr;
  130. for (i = 0; i < rds_ring->num_desc; i++) {
  131. list_add_tail(&rx_buf->list,
  132. &rds_ring->free_list);
  133. rx_buf++;
  134. }
  135. }
  136. }
  137. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  138. {
  139. struct qlcnic_cmd_buffer *cmd_buf;
  140. struct qlcnic_skb_frag *buffrag;
  141. int i, j;
  142. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  143. cmd_buf = tx_ring->cmd_buf_arr;
  144. for (i = 0; i < tx_ring->num_desc; i++) {
  145. buffrag = cmd_buf->frag_array;
  146. if (buffrag->dma) {
  147. pci_unmap_single(adapter->pdev, buffrag->dma,
  148. buffrag->length, PCI_DMA_TODEVICE);
  149. buffrag->dma = 0ULL;
  150. }
  151. for (j = 0; j < cmd_buf->frag_count; j++) {
  152. buffrag++;
  153. if (buffrag->dma) {
  154. pci_unmap_page(adapter->pdev, buffrag->dma,
  155. buffrag->length,
  156. PCI_DMA_TODEVICE);
  157. buffrag->dma = 0ULL;
  158. }
  159. }
  160. if (cmd_buf->skb) {
  161. dev_kfree_skb_any(cmd_buf->skb);
  162. cmd_buf->skb = NULL;
  163. }
  164. cmd_buf++;
  165. }
  166. }
  167. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  168. {
  169. struct qlcnic_recv_context *recv_ctx;
  170. struct qlcnic_host_rds_ring *rds_ring;
  171. struct qlcnic_host_tx_ring *tx_ring;
  172. int ring;
  173. recv_ctx = &adapter->recv_ctx;
  174. if (recv_ctx->rds_rings == NULL)
  175. goto skip_rds;
  176. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  177. rds_ring = &recv_ctx->rds_rings[ring];
  178. vfree(rds_ring->rx_buf_arr);
  179. rds_ring->rx_buf_arr = NULL;
  180. }
  181. kfree(recv_ctx->rds_rings);
  182. skip_rds:
  183. if (adapter->tx_ring == NULL)
  184. return;
  185. tx_ring = adapter->tx_ring;
  186. vfree(tx_ring->cmd_buf_arr);
  187. tx_ring->cmd_buf_arr = NULL;
  188. kfree(adapter->tx_ring);
  189. adapter->tx_ring = NULL;
  190. }
  191. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  192. {
  193. struct qlcnic_recv_context *recv_ctx;
  194. struct qlcnic_host_rds_ring *rds_ring;
  195. struct qlcnic_host_sds_ring *sds_ring;
  196. struct qlcnic_host_tx_ring *tx_ring;
  197. struct qlcnic_rx_buffer *rx_buf;
  198. int ring, i, size;
  199. struct qlcnic_cmd_buffer *cmd_buf_arr;
  200. struct net_device *netdev = adapter->netdev;
  201. size = sizeof(struct qlcnic_host_tx_ring);
  202. tx_ring = kzalloc(size, GFP_KERNEL);
  203. if (tx_ring == NULL) {
  204. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  205. return -ENOMEM;
  206. }
  207. adapter->tx_ring = tx_ring;
  208. tx_ring->num_desc = adapter->num_txd;
  209. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  210. cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
  211. if (cmd_buf_arr == NULL) {
  212. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  213. goto err_out;
  214. }
  215. tx_ring->cmd_buf_arr = cmd_buf_arr;
  216. recv_ctx = &adapter->recv_ctx;
  217. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  218. rds_ring = kzalloc(size, GFP_KERNEL);
  219. if (rds_ring == NULL) {
  220. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  221. goto err_out;
  222. }
  223. recv_ctx->rds_rings = rds_ring;
  224. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  225. rds_ring = &recv_ctx->rds_rings[ring];
  226. switch (ring) {
  227. case RCV_RING_NORMAL:
  228. rds_ring->num_desc = adapter->num_rxd;
  229. rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
  230. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  231. break;
  232. case RCV_RING_JUMBO:
  233. rds_ring->num_desc = adapter->num_jumbo_rxd;
  234. rds_ring->dma_size =
  235. QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
  236. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  237. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  238. rds_ring->skb_size =
  239. rds_ring->dma_size + NET_IP_ALIGN;
  240. break;
  241. }
  242. rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
  243. if (rds_ring->rx_buf_arr == NULL) {
  244. dev_err(&netdev->dev, "Failed to allocate "
  245. "rx buffer ring %d\n", ring);
  246. goto err_out;
  247. }
  248. INIT_LIST_HEAD(&rds_ring->free_list);
  249. /*
  250. * Now go through all of them, set reference handles
  251. * and put them in the queues.
  252. */
  253. rx_buf = rds_ring->rx_buf_arr;
  254. for (i = 0; i < rds_ring->num_desc; i++) {
  255. list_add_tail(&rx_buf->list,
  256. &rds_ring->free_list);
  257. rx_buf->ref_handle = i;
  258. rx_buf++;
  259. }
  260. spin_lock_init(&rds_ring->lock);
  261. }
  262. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  263. sds_ring = &recv_ctx->sds_rings[ring];
  264. sds_ring->irq = adapter->msix_entries[ring].vector;
  265. sds_ring->adapter = adapter;
  266. sds_ring->num_desc = adapter->num_rxd;
  267. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  268. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  269. }
  270. return 0;
  271. err_out:
  272. qlcnic_free_sw_resources(adapter);
  273. return -ENOMEM;
  274. }
  275. /*
  276. * Utility to translate from internal Phantom CRB address
  277. * to external PCI CRB address.
  278. */
  279. static u32 qlcnic_decode_crb_addr(u32 addr)
  280. {
  281. int i;
  282. u32 base_addr, offset, pci_base;
  283. crb_addr_transform_setup();
  284. pci_base = QLCNIC_ADDR_ERROR;
  285. base_addr = addr & 0xfff00000;
  286. offset = addr & 0x000fffff;
  287. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  288. if (crb_addr_xform[i] == base_addr) {
  289. pci_base = i << 20;
  290. break;
  291. }
  292. }
  293. if (pci_base == QLCNIC_ADDR_ERROR)
  294. return pci_base;
  295. else
  296. return pci_base + offset;
  297. }
  298. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  299. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  300. {
  301. long timeout = 0;
  302. long done = 0;
  303. cond_resched();
  304. while (done == 0) {
  305. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  306. done &= 2;
  307. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  308. dev_err(&adapter->pdev->dev,
  309. "Timeout reached waiting for rom done");
  310. return -EIO;
  311. }
  312. udelay(1);
  313. }
  314. return 0;
  315. }
  316. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  317. int addr, int *valp)
  318. {
  319. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  320. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  321. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  322. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  323. if (qlcnic_wait_rom_done(adapter)) {
  324. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  325. return -EIO;
  326. }
  327. /* reset abyte_cnt and dummy_byte_cnt */
  328. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  329. udelay(10);
  330. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  331. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  332. return 0;
  333. }
  334. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  335. u8 *bytes, size_t size)
  336. {
  337. int addridx;
  338. int ret = 0;
  339. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  340. int v;
  341. ret = do_rom_fast_read(adapter, addridx, &v);
  342. if (ret != 0)
  343. break;
  344. *(__le32 *)bytes = cpu_to_le32(v);
  345. bytes += 4;
  346. }
  347. return ret;
  348. }
  349. int
  350. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  351. u8 *bytes, size_t size)
  352. {
  353. int ret;
  354. ret = qlcnic_rom_lock(adapter);
  355. if (ret < 0)
  356. return ret;
  357. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  358. qlcnic_rom_unlock(adapter);
  359. return ret;
  360. }
  361. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
  362. {
  363. int ret;
  364. if (qlcnic_rom_lock(adapter) != 0)
  365. return -EIO;
  366. ret = do_rom_fast_read(adapter, addr, valp);
  367. qlcnic_rom_unlock(adapter);
  368. return ret;
  369. }
  370. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  371. {
  372. int addr, val;
  373. int i, n, init_delay;
  374. struct crb_addr_pair *buf;
  375. unsigned offset;
  376. u32 off;
  377. struct pci_dev *pdev = adapter->pdev;
  378. QLCWR32(adapter, CRB_CMDPEG_STATE, 0);
  379. QLCWR32(adapter, CRB_RCVPEG_STATE, 0);
  380. qlcnic_rom_lock(adapter);
  381. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
  382. qlcnic_rom_unlock(adapter);
  383. /* Init HW CRB block */
  384. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  385. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  386. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  387. return -EIO;
  388. }
  389. offset = n & 0xffffU;
  390. n = (n >> 16) & 0xffffU;
  391. if (n >= 1024) {
  392. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  393. return -EIO;
  394. }
  395. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  396. if (buf == NULL) {
  397. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  398. return -ENOMEM;
  399. }
  400. for (i = 0; i < n; i++) {
  401. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  402. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  403. kfree(buf);
  404. return -EIO;
  405. }
  406. buf[i].addr = addr;
  407. buf[i].data = val;
  408. }
  409. for (i = 0; i < n; i++) {
  410. off = qlcnic_decode_crb_addr(buf[i].addr);
  411. if (off == QLCNIC_ADDR_ERROR) {
  412. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  413. buf[i].addr);
  414. continue;
  415. }
  416. off += QLCNIC_PCI_CRBSPACE;
  417. if (off & 1)
  418. continue;
  419. /* skipping cold reboot MAGIC */
  420. if (off == QLCNIC_CAM_RAM(0x1fc))
  421. continue;
  422. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  423. continue;
  424. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  425. continue;
  426. if (off == (ROMUSB_GLB + 0xa8))
  427. continue;
  428. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  429. continue;
  430. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  431. continue;
  432. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  433. continue;
  434. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  435. continue;
  436. /* skip the function enable register */
  437. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  438. continue;
  439. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  440. continue;
  441. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  442. continue;
  443. init_delay = 1;
  444. /* After writing this register, HW needs time for CRB */
  445. /* to quiet down (else crb_window returns 0xffffffff) */
  446. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  447. init_delay = 1000;
  448. QLCWR32(adapter, off, buf[i].data);
  449. msleep(init_delay);
  450. }
  451. kfree(buf);
  452. /* Initialize protocol process engine */
  453. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  454. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  455. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  456. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  457. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  458. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  459. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  460. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  461. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  462. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  463. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  464. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
  465. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
  466. msleep(1);
  467. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
  468. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
  469. return 0;
  470. }
  471. static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
  472. {
  473. u32 val;
  474. int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
  475. do {
  476. val = QLCRD32(adapter, CRB_CMDPEG_STATE);
  477. switch (val) {
  478. case PHAN_INITIALIZE_COMPLETE:
  479. case PHAN_INITIALIZE_ACK:
  480. return 0;
  481. case PHAN_INITIALIZE_FAILED:
  482. goto out_err;
  483. default:
  484. break;
  485. }
  486. msleep(QLCNIC_CMDPEG_CHECK_DELAY);
  487. } while (--retries);
  488. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
  489. out_err:
  490. dev_err(&adapter->pdev->dev, "Command Peg initialization not "
  491. "complete, state: 0x%x.\n", val);
  492. return -EIO;
  493. }
  494. static int
  495. qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
  496. {
  497. u32 val;
  498. int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
  499. do {
  500. val = QLCRD32(adapter, CRB_RCVPEG_STATE);
  501. if (val == PHAN_PEG_RCV_INITIALIZED)
  502. return 0;
  503. msleep(QLCNIC_RCVPEG_CHECK_DELAY);
  504. } while (--retries);
  505. if (!retries) {
  506. dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
  507. "complete, state: 0x%x.\n", val);
  508. return -EIO;
  509. }
  510. return 0;
  511. }
  512. int
  513. qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
  514. {
  515. int err;
  516. err = qlcnic_cmd_peg_ready(adapter);
  517. if (err)
  518. return err;
  519. err = qlcnic_receive_peg_ready(adapter);
  520. if (err)
  521. return err;
  522. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  523. return err;
  524. }
  525. int
  526. qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
  527. int timeo;
  528. u32 val;
  529. val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
  530. val = QLC_DEV_GET_DRV(val, adapter->portnum);
  531. if ((val & 0x3) != QLCNIC_TYPE_NIC) {
  532. dev_err(&adapter->pdev->dev,
  533. "Not an Ethernet NIC func=%u\n", val);
  534. return -EIO;
  535. }
  536. adapter->physical_port = (val >> 2);
  537. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
  538. timeo = QLCNIC_INIT_TIMEOUT_SECS;
  539. adapter->dev_init_timeo = timeo;
  540. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
  541. timeo = QLCNIC_RESET_TIMEOUT_SECS;
  542. adapter->reset_ack_timeo = timeo;
  543. return 0;
  544. }
  545. int
  546. qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
  547. {
  548. u32 ver = -1, min_ver;
  549. qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, (int *)&ver);
  550. ver = QLCNIC_DECODE_VERSION(ver);
  551. min_ver = QLCNIC_MIN_FW_VERSION;
  552. if (ver < min_ver) {
  553. dev_err(&adapter->pdev->dev,
  554. "firmware version %d.%d.%d unsupported."
  555. "Min supported version %d.%d.%d\n",
  556. _major(ver), _minor(ver), _build(ver),
  557. _major(min_ver), _minor(min_ver), _build(min_ver));
  558. return -EINVAL;
  559. }
  560. return 0;
  561. }
  562. static int
  563. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  564. {
  565. u32 capability;
  566. capability = 0;
  567. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  568. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  569. return 1;
  570. return 0;
  571. }
  572. static
  573. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  574. {
  575. u32 i;
  576. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  577. __le32 entries = cpu_to_le32(directory->num_entries);
  578. for (i = 0; i < entries; i++) {
  579. __le32 offs = cpu_to_le32(directory->findex) +
  580. (i * cpu_to_le32(directory->entry_size));
  581. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  582. if (tab_type == section)
  583. return (struct uni_table_desc *) &unirom[offs];
  584. }
  585. return NULL;
  586. }
  587. #define FILEHEADER_SIZE (14 * 4)
  588. static int
  589. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  590. {
  591. const u8 *unirom = adapter->fw->data;
  592. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  593. __le32 fw_file_size = adapter->fw->size;
  594. __le32 entries;
  595. __le32 entry_size;
  596. __le32 tab_size;
  597. if (fw_file_size < FILEHEADER_SIZE)
  598. return -EINVAL;
  599. entries = cpu_to_le32(directory->num_entries);
  600. entry_size = cpu_to_le32(directory->entry_size);
  601. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  602. if (fw_file_size < tab_size)
  603. return -EINVAL;
  604. return 0;
  605. }
  606. static int
  607. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  608. {
  609. struct uni_table_desc *tab_desc;
  610. struct uni_data_desc *descr;
  611. const u8 *unirom = adapter->fw->data;
  612. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  613. QLCNIC_UNI_BOOTLD_IDX_OFF));
  614. __le32 offs;
  615. __le32 tab_size;
  616. __le32 data_size;
  617. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  618. if (!tab_desc)
  619. return -EINVAL;
  620. tab_size = cpu_to_le32(tab_desc->findex) +
  621. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  622. if (adapter->fw->size < tab_size)
  623. return -EINVAL;
  624. offs = cpu_to_le32(tab_desc->findex) +
  625. (cpu_to_le32(tab_desc->entry_size) * (idx));
  626. descr = (struct uni_data_desc *)&unirom[offs];
  627. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  628. if (adapter->fw->size < data_size)
  629. return -EINVAL;
  630. return 0;
  631. }
  632. static int
  633. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  634. {
  635. struct uni_table_desc *tab_desc;
  636. struct uni_data_desc *descr;
  637. const u8 *unirom = adapter->fw->data;
  638. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  639. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  640. __le32 offs;
  641. __le32 tab_size;
  642. __le32 data_size;
  643. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  644. if (!tab_desc)
  645. return -EINVAL;
  646. tab_size = cpu_to_le32(tab_desc->findex) +
  647. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  648. if (adapter->fw->size < tab_size)
  649. return -EINVAL;
  650. offs = cpu_to_le32(tab_desc->findex) +
  651. (cpu_to_le32(tab_desc->entry_size) * (idx));
  652. descr = (struct uni_data_desc *)&unirom[offs];
  653. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  654. if (adapter->fw->size < data_size)
  655. return -EINVAL;
  656. return 0;
  657. }
  658. static int
  659. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  660. {
  661. struct uni_table_desc *ptab_descr;
  662. const u8 *unirom = adapter->fw->data;
  663. int mn_present = qlcnic_has_mn(adapter);
  664. __le32 entries;
  665. __le32 entry_size;
  666. __le32 tab_size;
  667. u32 i;
  668. ptab_descr = qlcnic_get_table_desc(unirom,
  669. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  670. if (!ptab_descr)
  671. return -EINVAL;
  672. entries = cpu_to_le32(ptab_descr->num_entries);
  673. entry_size = cpu_to_le32(ptab_descr->entry_size);
  674. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  675. if (adapter->fw->size < tab_size)
  676. return -EINVAL;
  677. nomn:
  678. for (i = 0; i < entries; i++) {
  679. __le32 flags, file_chiprev, offs;
  680. u8 chiprev = adapter->ahw.revision_id;
  681. u32 flagbit;
  682. offs = cpu_to_le32(ptab_descr->findex) +
  683. (i * cpu_to_le32(ptab_descr->entry_size));
  684. flags = cpu_to_le32(*((int *)&unirom[offs] +
  685. QLCNIC_UNI_FLAGS_OFF));
  686. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  687. QLCNIC_UNI_CHIP_REV_OFF));
  688. flagbit = mn_present ? 1 : 2;
  689. if ((chiprev == file_chiprev) &&
  690. ((1ULL << flagbit) & flags)) {
  691. adapter->file_prd_off = offs;
  692. return 0;
  693. }
  694. }
  695. if (mn_present) {
  696. mn_present = 0;
  697. goto nomn;
  698. }
  699. return -EINVAL;
  700. }
  701. static int
  702. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  703. {
  704. if (qlcnic_validate_header(adapter)) {
  705. dev_err(&adapter->pdev->dev,
  706. "unified image: header validation failed\n");
  707. return -EINVAL;
  708. }
  709. if (qlcnic_validate_product_offs(adapter)) {
  710. dev_err(&adapter->pdev->dev,
  711. "unified image: product validation failed\n");
  712. return -EINVAL;
  713. }
  714. if (qlcnic_validate_bootld(adapter)) {
  715. dev_err(&adapter->pdev->dev,
  716. "unified image: bootld validation failed\n");
  717. return -EINVAL;
  718. }
  719. if (qlcnic_validate_fw(adapter)) {
  720. dev_err(&adapter->pdev->dev,
  721. "unified image: firmware validation failed\n");
  722. return -EINVAL;
  723. }
  724. return 0;
  725. }
  726. static
  727. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  728. u32 section, u32 idx_offset)
  729. {
  730. const u8 *unirom = adapter->fw->data;
  731. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  732. idx_offset));
  733. struct uni_table_desc *tab_desc;
  734. __le32 offs;
  735. tab_desc = qlcnic_get_table_desc(unirom, section);
  736. if (tab_desc == NULL)
  737. return NULL;
  738. offs = cpu_to_le32(tab_desc->findex) +
  739. (cpu_to_le32(tab_desc->entry_size) * idx);
  740. return (struct uni_data_desc *)&unirom[offs];
  741. }
  742. static u8 *
  743. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  744. {
  745. u32 offs = QLCNIC_BOOTLD_START;
  746. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  747. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  748. QLCNIC_UNI_DIR_SECT_BOOTLD,
  749. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  750. return (u8 *)&adapter->fw->data[offs];
  751. }
  752. static u8 *
  753. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  754. {
  755. u32 offs = QLCNIC_IMAGE_START;
  756. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  757. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  758. QLCNIC_UNI_DIR_SECT_FW,
  759. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  760. return (u8 *)&adapter->fw->data[offs];
  761. }
  762. static __le32
  763. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  764. {
  765. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  766. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  767. QLCNIC_UNI_DIR_SECT_FW,
  768. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  769. else
  770. return cpu_to_le32(
  771. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  772. }
  773. static __le32
  774. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  775. {
  776. struct uni_data_desc *fw_data_desc;
  777. const struct firmware *fw = adapter->fw;
  778. __le32 major, minor, sub;
  779. const u8 *ver_str;
  780. int i, ret;
  781. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  782. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  783. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  784. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  785. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  786. cpu_to_le32(fw_data_desc->size) - 17;
  787. for (i = 0; i < 12; i++) {
  788. if (!strncmp(&ver_str[i], "REV=", 4)) {
  789. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  790. &major, &minor, &sub);
  791. if (ret != 3)
  792. return 0;
  793. else
  794. return major + (minor << 8) + (sub << 16);
  795. }
  796. }
  797. return 0;
  798. }
  799. static __le32
  800. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  801. {
  802. const struct firmware *fw = adapter->fw;
  803. __le32 bios_ver, prd_off = adapter->file_prd_off;
  804. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  805. return cpu_to_le32(
  806. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  807. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  808. + QLCNIC_UNI_BIOS_VERSION_OFF));
  809. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  810. }
  811. static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
  812. {
  813. if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
  814. dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
  815. qlcnic_pcie_sem_unlock(adapter, 2);
  816. }
  817. static int
  818. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
  819. {
  820. u32 heartbeat, ret = -EIO;
  821. int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
  822. adapter->heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  823. do {
  824. msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
  825. heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  826. if (heartbeat != adapter->heartbeat) {
  827. ret = QLCNIC_RCODE_SUCCESS;
  828. break;
  829. }
  830. } while (--retries);
  831. return ret;
  832. }
  833. int
  834. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  835. {
  836. if (qlcnic_check_fw_hearbeat(adapter)) {
  837. qlcnic_rom_lock_recovery(adapter);
  838. return 1;
  839. }
  840. if (adapter->need_fw_reset)
  841. return 1;
  842. if (adapter->fw)
  843. return 1;
  844. return 0;
  845. }
  846. static const char *fw_name[] = {
  847. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  848. QLCNIC_FLASH_ROMIMAGE_NAME,
  849. };
  850. int
  851. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  852. {
  853. u64 *ptr64;
  854. u32 i, flashaddr, size;
  855. const struct firmware *fw = adapter->fw;
  856. struct pci_dev *pdev = adapter->pdev;
  857. dev_info(&pdev->dev, "loading firmware from %s\n",
  858. fw_name[adapter->fw_type]);
  859. if (fw) {
  860. __le64 data;
  861. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  862. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  863. flashaddr = QLCNIC_BOOTLD_START;
  864. for (i = 0; i < size; i++) {
  865. data = cpu_to_le64(ptr64[i]);
  866. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  867. return -EIO;
  868. flashaddr += 8;
  869. }
  870. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  871. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  872. flashaddr = QLCNIC_IMAGE_START;
  873. for (i = 0; i < size; i++) {
  874. data = cpu_to_le64(ptr64[i]);
  875. if (qlcnic_pci_mem_write_2M(adapter,
  876. flashaddr, data))
  877. return -EIO;
  878. flashaddr += 8;
  879. }
  880. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  881. if (size) {
  882. data = cpu_to_le64(ptr64[i]);
  883. if (qlcnic_pci_mem_write_2M(adapter,
  884. flashaddr, data))
  885. return -EIO;
  886. }
  887. } else {
  888. u64 data;
  889. u32 hi, lo;
  890. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  891. flashaddr = QLCNIC_BOOTLD_START;
  892. for (i = 0; i < size; i++) {
  893. if (qlcnic_rom_fast_read(adapter,
  894. flashaddr, (int *)&lo) != 0)
  895. return -EIO;
  896. if (qlcnic_rom_fast_read(adapter,
  897. flashaddr + 4, (int *)&hi) != 0)
  898. return -EIO;
  899. data = (((u64)hi << 32) | lo);
  900. if (qlcnic_pci_mem_write_2M(adapter,
  901. flashaddr, data))
  902. return -EIO;
  903. flashaddr += 8;
  904. }
  905. }
  906. msleep(1);
  907. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  908. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  909. return 0;
  910. }
  911. static int
  912. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  913. {
  914. __le32 val;
  915. u32 ver, bios, min_size;
  916. struct pci_dev *pdev = adapter->pdev;
  917. const struct firmware *fw = adapter->fw;
  918. u8 fw_type = adapter->fw_type;
  919. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  920. if (qlcnic_validate_unified_romimage(adapter))
  921. return -EINVAL;
  922. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  923. } else {
  924. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  925. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  926. return -EINVAL;
  927. min_size = QLCNIC_FW_MIN_SIZE;
  928. }
  929. if (fw->size < min_size)
  930. return -EINVAL;
  931. val = qlcnic_get_fw_version(adapter);
  932. ver = QLCNIC_DECODE_VERSION(val);
  933. if (ver < QLCNIC_MIN_FW_VERSION) {
  934. dev_err(&pdev->dev,
  935. "%s: firmware version %d.%d.%d unsupported\n",
  936. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  937. return -EINVAL;
  938. }
  939. val = qlcnic_get_bios_version(adapter);
  940. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  941. if ((__force u32)val != bios) {
  942. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  943. fw_name[fw_type]);
  944. return -EINVAL;
  945. }
  946. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  947. return 0;
  948. }
  949. static void
  950. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  951. {
  952. u8 fw_type;
  953. switch (adapter->fw_type) {
  954. case QLCNIC_UNKNOWN_ROMIMAGE:
  955. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  956. break;
  957. case QLCNIC_UNIFIED_ROMIMAGE:
  958. default:
  959. fw_type = QLCNIC_FLASH_ROMIMAGE;
  960. break;
  961. }
  962. adapter->fw_type = fw_type;
  963. }
  964. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  965. {
  966. struct pci_dev *pdev = adapter->pdev;
  967. int rc;
  968. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  969. next:
  970. qlcnic_get_next_fwtype(adapter);
  971. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  972. adapter->fw = NULL;
  973. } else {
  974. rc = request_firmware(&adapter->fw,
  975. fw_name[adapter->fw_type], &pdev->dev);
  976. if (rc != 0)
  977. goto next;
  978. rc = qlcnic_validate_firmware(adapter);
  979. if (rc != 0) {
  980. release_firmware(adapter->fw);
  981. msleep(1);
  982. goto next;
  983. }
  984. }
  985. }
  986. void
  987. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  988. {
  989. if (adapter->fw)
  990. release_firmware(adapter->fw);
  991. adapter->fw = NULL;
  992. }
  993. static void
  994. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  995. struct qlcnic_fw_msg *msg)
  996. {
  997. u32 cable_OUI;
  998. u16 cable_len;
  999. u16 link_speed;
  1000. u8 link_status, module, duplex, autoneg;
  1001. struct net_device *netdev = adapter->netdev;
  1002. adapter->has_link_events = 1;
  1003. cable_OUI = msg->body[1] & 0xffffffff;
  1004. cable_len = (msg->body[1] >> 32) & 0xffff;
  1005. link_speed = (msg->body[1] >> 48) & 0xffff;
  1006. link_status = msg->body[2] & 0xff;
  1007. duplex = (msg->body[2] >> 16) & 0xff;
  1008. autoneg = (msg->body[2] >> 24) & 0xff;
  1009. module = (msg->body[2] >> 8) & 0xff;
  1010. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  1011. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  1012. "length %d\n", cable_OUI, cable_len);
  1013. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  1014. dev_info(&netdev->dev, "unsupported cable length %d\n",
  1015. cable_len);
  1016. qlcnic_advert_link_change(adapter, link_status);
  1017. if (duplex == LINKEVENT_FULL_DUPLEX)
  1018. adapter->link_duplex = DUPLEX_FULL;
  1019. else
  1020. adapter->link_duplex = DUPLEX_HALF;
  1021. adapter->module_type = module;
  1022. adapter->link_autoneg = autoneg;
  1023. adapter->link_speed = link_speed;
  1024. }
  1025. static void
  1026. qlcnic_handle_fw_message(int desc_cnt, int index,
  1027. struct qlcnic_host_sds_ring *sds_ring)
  1028. {
  1029. struct qlcnic_fw_msg msg;
  1030. struct status_desc *desc;
  1031. int i = 0, opcode;
  1032. while (desc_cnt > 0 && i < 8) {
  1033. desc = &sds_ring->desc_head[index];
  1034. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1035. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1036. index = get_next_index(index, sds_ring->num_desc);
  1037. desc_cnt--;
  1038. }
  1039. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1040. switch (opcode) {
  1041. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1042. qlcnic_handle_linkevent(sds_ring->adapter, &msg);
  1043. break;
  1044. default:
  1045. break;
  1046. }
  1047. }
  1048. static int
  1049. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1050. struct qlcnic_host_rds_ring *rds_ring,
  1051. struct qlcnic_rx_buffer *buffer)
  1052. {
  1053. struct sk_buff *skb;
  1054. dma_addr_t dma;
  1055. struct pci_dev *pdev = adapter->pdev;
  1056. skb = dev_alloc_skb(rds_ring->skb_size);
  1057. if (!skb) {
  1058. adapter->stats.skb_alloc_failure++;
  1059. return -ENOMEM;
  1060. }
  1061. skb_reserve(skb, NET_IP_ALIGN);
  1062. dma = pci_map_single(pdev, skb->data,
  1063. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1064. if (pci_dma_mapping_error(pdev, dma)) {
  1065. adapter->stats.rx_dma_map_error++;
  1066. dev_kfree_skb_any(skb);
  1067. return -ENOMEM;
  1068. }
  1069. buffer->skb = skb;
  1070. buffer->dma = dma;
  1071. return 0;
  1072. }
  1073. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1074. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1075. {
  1076. struct qlcnic_rx_buffer *buffer;
  1077. struct sk_buff *skb;
  1078. buffer = &rds_ring->rx_buf_arr[index];
  1079. if (unlikely(buffer->skb == NULL)) {
  1080. WARN_ON(1);
  1081. return NULL;
  1082. }
  1083. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1084. PCI_DMA_FROMDEVICE);
  1085. skb = buffer->skb;
  1086. if (likely(adapter->rx_csum && (cksum == STATUS_CKSUM_OK ||
  1087. cksum == STATUS_CKSUM_LOOP))) {
  1088. adapter->stats.csummed++;
  1089. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1090. } else {
  1091. skb_checksum_none_assert(skb);
  1092. }
  1093. skb->dev = adapter->netdev;
  1094. buffer->skb = NULL;
  1095. return skb;
  1096. }
  1097. static int
  1098. qlcnic_check_rx_tagging(struct qlcnic_adapter *adapter, struct sk_buff *skb,
  1099. u16 *vlan_tag)
  1100. {
  1101. struct ethhdr *eth_hdr;
  1102. if (!__vlan_get_tag(skb, vlan_tag)) {
  1103. eth_hdr = (struct ethhdr *) skb->data;
  1104. memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
  1105. skb_pull(skb, VLAN_HLEN);
  1106. }
  1107. if (!adapter->pvid)
  1108. return 0;
  1109. if (*vlan_tag == adapter->pvid) {
  1110. /* Outer vlan tag. Packet should follow non-vlan path */
  1111. *vlan_tag = 0xffff;
  1112. return 0;
  1113. }
  1114. if (adapter->flags & QLCNIC_TAGGING_ENABLED)
  1115. return 0;
  1116. return -EINVAL;
  1117. }
  1118. static struct qlcnic_rx_buffer *
  1119. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1120. struct qlcnic_host_sds_ring *sds_ring,
  1121. int ring, u64 sts_data0)
  1122. {
  1123. struct net_device *netdev = adapter->netdev;
  1124. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1125. struct qlcnic_rx_buffer *buffer;
  1126. struct sk_buff *skb;
  1127. struct qlcnic_host_rds_ring *rds_ring;
  1128. int index, length, cksum, pkt_offset;
  1129. u16 vid = 0xffff;
  1130. if (unlikely(ring >= adapter->max_rds_rings))
  1131. return NULL;
  1132. rds_ring = &recv_ctx->rds_rings[ring];
  1133. index = qlcnic_get_sts_refhandle(sts_data0);
  1134. if (unlikely(index >= rds_ring->num_desc))
  1135. return NULL;
  1136. buffer = &rds_ring->rx_buf_arr[index];
  1137. length = qlcnic_get_sts_totallength(sts_data0);
  1138. cksum = qlcnic_get_sts_status(sts_data0);
  1139. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1140. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1141. if (!skb)
  1142. return buffer;
  1143. if (length > rds_ring->skb_size)
  1144. skb_put(skb, rds_ring->skb_size);
  1145. else
  1146. skb_put(skb, length);
  1147. if (pkt_offset)
  1148. skb_pull(skb, pkt_offset);
  1149. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1150. adapter->stats.rxdropped++;
  1151. dev_kfree_skb(skb);
  1152. return buffer;
  1153. }
  1154. skb->protocol = eth_type_trans(skb, netdev);
  1155. if ((vid != 0xffff) && adapter->vlgrp)
  1156. vlan_gro_receive(&sds_ring->napi, adapter->vlgrp, vid, skb);
  1157. else
  1158. napi_gro_receive(&sds_ring->napi, skb);
  1159. adapter->stats.rx_pkts++;
  1160. adapter->stats.rxbytes += length;
  1161. return buffer;
  1162. }
  1163. #define QLC_TCP_HDR_SIZE 20
  1164. #define QLC_TCP_TS_OPTION_SIZE 12
  1165. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1166. static struct qlcnic_rx_buffer *
  1167. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1168. struct qlcnic_host_sds_ring *sds_ring,
  1169. int ring, u64 sts_data0, u64 sts_data1)
  1170. {
  1171. struct net_device *netdev = adapter->netdev;
  1172. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1173. struct qlcnic_rx_buffer *buffer;
  1174. struct sk_buff *skb;
  1175. struct qlcnic_host_rds_ring *rds_ring;
  1176. struct iphdr *iph;
  1177. struct tcphdr *th;
  1178. bool push, timestamp;
  1179. int l2_hdr_offset, l4_hdr_offset;
  1180. int index;
  1181. u16 lro_length, length, data_offset;
  1182. u32 seq_number;
  1183. u16 vid = 0xffff;
  1184. if (unlikely(ring > adapter->max_rds_rings))
  1185. return NULL;
  1186. rds_ring = &recv_ctx->rds_rings[ring];
  1187. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1188. if (unlikely(index > rds_ring->num_desc))
  1189. return NULL;
  1190. buffer = &rds_ring->rx_buf_arr[index];
  1191. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1192. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1193. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1194. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1195. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1196. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1197. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1198. if (!skb)
  1199. return buffer;
  1200. if (timestamp)
  1201. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1202. else
  1203. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1204. skb_put(skb, lro_length + data_offset);
  1205. skb_pull(skb, l2_hdr_offset);
  1206. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1207. adapter->stats.rxdropped++;
  1208. dev_kfree_skb(skb);
  1209. return buffer;
  1210. }
  1211. skb->protocol = eth_type_trans(skb, netdev);
  1212. iph = (struct iphdr *)skb->data;
  1213. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1214. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1215. iph->tot_len = htons(length);
  1216. iph->check = 0;
  1217. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1218. th->psh = push;
  1219. th->seq = htonl(seq_number);
  1220. length = skb->len;
  1221. if ((vid != 0xffff) && adapter->vlgrp)
  1222. vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vid);
  1223. else
  1224. netif_receive_skb(skb);
  1225. adapter->stats.lro_pkts++;
  1226. adapter->stats.lrobytes += length;
  1227. return buffer;
  1228. }
  1229. int
  1230. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1231. {
  1232. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1233. struct list_head *cur;
  1234. struct status_desc *desc;
  1235. struct qlcnic_rx_buffer *rxbuf;
  1236. u64 sts_data0, sts_data1;
  1237. int count = 0;
  1238. int opcode, ring, desc_cnt;
  1239. u32 consumer = sds_ring->consumer;
  1240. while (count < max) {
  1241. desc = &sds_ring->desc_head[consumer];
  1242. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1243. if (!(sts_data0 & STATUS_OWNER_HOST))
  1244. break;
  1245. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1246. opcode = qlcnic_get_sts_opcode(sts_data0);
  1247. switch (opcode) {
  1248. case QLCNIC_RXPKT_DESC:
  1249. case QLCNIC_OLD_RXPKT_DESC:
  1250. case QLCNIC_SYN_OFFLOAD:
  1251. ring = qlcnic_get_sts_type(sts_data0);
  1252. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1253. ring, sts_data0);
  1254. break;
  1255. case QLCNIC_LRO_DESC:
  1256. ring = qlcnic_get_lro_sts_type(sts_data0);
  1257. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1258. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1259. ring, sts_data0, sts_data1);
  1260. break;
  1261. case QLCNIC_RESPONSE_DESC:
  1262. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1263. default:
  1264. goto skip;
  1265. }
  1266. WARN_ON(desc_cnt > 1);
  1267. if (likely(rxbuf))
  1268. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1269. else
  1270. adapter->stats.null_rxbuf++;
  1271. skip:
  1272. for (; desc_cnt > 0; desc_cnt--) {
  1273. desc = &sds_ring->desc_head[consumer];
  1274. desc->status_desc_data[0] =
  1275. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1276. consumer = get_next_index(consumer, sds_ring->num_desc);
  1277. }
  1278. count++;
  1279. }
  1280. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1281. struct qlcnic_host_rds_ring *rds_ring =
  1282. &adapter->recv_ctx.rds_rings[ring];
  1283. if (!list_empty(&sds_ring->free_list[ring])) {
  1284. list_for_each(cur, &sds_ring->free_list[ring]) {
  1285. rxbuf = list_entry(cur,
  1286. struct qlcnic_rx_buffer, list);
  1287. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1288. }
  1289. spin_lock(&rds_ring->lock);
  1290. list_splice_tail_init(&sds_ring->free_list[ring],
  1291. &rds_ring->free_list);
  1292. spin_unlock(&rds_ring->lock);
  1293. }
  1294. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1295. }
  1296. if (count) {
  1297. sds_ring->consumer = consumer;
  1298. writel(consumer, sds_ring->crb_sts_consumer);
  1299. }
  1300. return count;
  1301. }
  1302. void
  1303. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
  1304. struct qlcnic_host_rds_ring *rds_ring)
  1305. {
  1306. struct rcv_desc *pdesc;
  1307. struct qlcnic_rx_buffer *buffer;
  1308. int producer, count = 0;
  1309. struct list_head *head;
  1310. producer = rds_ring->producer;
  1311. head = &rds_ring->free_list;
  1312. while (!list_empty(head)) {
  1313. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1314. if (!buffer->skb) {
  1315. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1316. break;
  1317. }
  1318. count++;
  1319. list_del(&buffer->list);
  1320. /* make a rcv descriptor */
  1321. pdesc = &rds_ring->desc_head[producer];
  1322. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1323. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1324. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1325. producer = get_next_index(producer, rds_ring->num_desc);
  1326. }
  1327. if (count) {
  1328. rds_ring->producer = producer;
  1329. writel((producer-1) & (rds_ring->num_desc-1),
  1330. rds_ring->crb_rcv_producer);
  1331. }
  1332. }
  1333. static void
  1334. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1335. struct qlcnic_host_rds_ring *rds_ring)
  1336. {
  1337. struct rcv_desc *pdesc;
  1338. struct qlcnic_rx_buffer *buffer;
  1339. int producer, count = 0;
  1340. struct list_head *head;
  1341. if (!spin_trylock(&rds_ring->lock))
  1342. return;
  1343. producer = rds_ring->producer;
  1344. head = &rds_ring->free_list;
  1345. while (!list_empty(head)) {
  1346. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1347. if (!buffer->skb) {
  1348. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1349. break;
  1350. }
  1351. count++;
  1352. list_del(&buffer->list);
  1353. /* make a rcv descriptor */
  1354. pdesc = &rds_ring->desc_head[producer];
  1355. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1356. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1357. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1358. producer = get_next_index(producer, rds_ring->num_desc);
  1359. }
  1360. if (count) {
  1361. rds_ring->producer = producer;
  1362. writel((producer - 1) & (rds_ring->num_desc - 1),
  1363. rds_ring->crb_rcv_producer);
  1364. }
  1365. spin_unlock(&rds_ring->lock);
  1366. }
  1367. static void dump_skb(struct sk_buff *skb)
  1368. {
  1369. int i;
  1370. unsigned char *data = skb->data;
  1371. for (i = 0; i < skb->len; i++) {
  1372. printk("%02x ", data[i]);
  1373. if ((i & 0x0f) == 8)
  1374. printk("\n");
  1375. }
  1376. }
  1377. static struct qlcnic_rx_buffer *
  1378. qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
  1379. struct qlcnic_host_sds_ring *sds_ring,
  1380. int ring, u64 sts_data0)
  1381. {
  1382. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1383. struct qlcnic_rx_buffer *buffer;
  1384. struct sk_buff *skb;
  1385. struct qlcnic_host_rds_ring *rds_ring;
  1386. int index, length, cksum, pkt_offset;
  1387. if (unlikely(ring >= adapter->max_rds_rings))
  1388. return NULL;
  1389. rds_ring = &recv_ctx->rds_rings[ring];
  1390. index = qlcnic_get_sts_refhandle(sts_data0);
  1391. if (unlikely(index >= rds_ring->num_desc))
  1392. return NULL;
  1393. buffer = &rds_ring->rx_buf_arr[index];
  1394. length = qlcnic_get_sts_totallength(sts_data0);
  1395. cksum = qlcnic_get_sts_status(sts_data0);
  1396. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1397. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1398. if (!skb)
  1399. return buffer;
  1400. if (length > rds_ring->skb_size)
  1401. skb_put(skb, rds_ring->skb_size);
  1402. else
  1403. skb_put(skb, length);
  1404. if (pkt_offset)
  1405. skb_pull(skb, pkt_offset);
  1406. if (!qlcnic_check_loopback_buff(skb->data))
  1407. adapter->diag_cnt++;
  1408. else
  1409. dump_skb(skb);
  1410. dev_kfree_skb_any(skb);
  1411. adapter->stats.rx_pkts++;
  1412. adapter->stats.rxbytes += length;
  1413. return buffer;
  1414. }
  1415. void
  1416. qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
  1417. {
  1418. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1419. struct status_desc *desc;
  1420. struct qlcnic_rx_buffer *rxbuf;
  1421. u64 sts_data0;
  1422. int opcode, ring, desc_cnt;
  1423. u32 consumer = sds_ring->consumer;
  1424. desc = &sds_ring->desc_head[consumer];
  1425. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1426. if (!(sts_data0 & STATUS_OWNER_HOST))
  1427. return;
  1428. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1429. opcode = qlcnic_get_sts_opcode(sts_data0);
  1430. ring = qlcnic_get_sts_type(sts_data0);
  1431. rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring,
  1432. ring, sts_data0);
  1433. desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
  1434. consumer = get_next_index(consumer, sds_ring->num_desc);
  1435. sds_ring->consumer = consumer;
  1436. writel(consumer, sds_ring->crb_sts_consumer);
  1437. }
  1438. void
  1439. qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
  1440. u8 alt_mac, u8 *mac)
  1441. {
  1442. u32 mac_low, mac_high;
  1443. int i;
  1444. mac_low = QLCRD32(adapter, off1);
  1445. mac_high = QLCRD32(adapter, off2);
  1446. if (alt_mac) {
  1447. mac_low |= (mac_low >> 16) | (mac_high << 16);
  1448. mac_high >>= 16;
  1449. }
  1450. for (i = 0; i < 2; i++)
  1451. mac[i] = (u8)(mac_high >> ((1 - i) * 8));
  1452. for (i = 2; i < 6; i++)
  1453. mac[i] = (u8)(mac_low >> ((5 - i) * 8));
  1454. }