iwl-rx.c 41 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/etherdevice.h>
  30. #include <net/mac80211.h>
  31. #include "iwl-eeprom.h"
  32. #include "iwl-dev.h"
  33. #include "iwl-core.h"
  34. #include "iwl-sta.h"
  35. #include "iwl-io.h"
  36. #include "iwl-calib.h"
  37. #include "iwl-helpers.h"
  38. /************************** RX-FUNCTIONS ****************************/
  39. /*
  40. * Rx theory of operation
  41. *
  42. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  43. * each of which point to Receive Buffers to be filled by the NIC. These get
  44. * used not only for Rx frames, but for any command response or notification
  45. * from the NIC. The driver and NIC manage the Rx buffers by means
  46. * of indexes into the circular buffer.
  47. *
  48. * Rx Queue Indexes
  49. * The host/firmware share two index registers for managing the Rx buffers.
  50. *
  51. * The READ index maps to the first position that the firmware may be writing
  52. * to -- the driver can read up to (but not including) this position and get
  53. * good data.
  54. * The READ index is managed by the firmware once the card is enabled.
  55. *
  56. * The WRITE index maps to the last position the driver has read from -- the
  57. * position preceding WRITE is the last slot the firmware can place a packet.
  58. *
  59. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  60. * WRITE = READ.
  61. *
  62. * During initialization, the host sets up the READ queue position to the first
  63. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  64. *
  65. * When the firmware places a packet in a buffer, it will advance the READ index
  66. * and fire the RX interrupt. The driver can then query the READ index and
  67. * process as many packets as possible, moving the WRITE index forward as it
  68. * resets the Rx queue buffers with new memory.
  69. *
  70. * The management in the driver is as follows:
  71. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  72. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  73. * to replenish the iwl->rxq->rx_free.
  74. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  75. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  76. * 'processed' and 'read' driver indexes as well)
  77. * + A received packet is processed and handed to the kernel network stack,
  78. * detached from the iwl->rxq. The driver 'processed' index is updated.
  79. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  80. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  81. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  82. * were enough free buffers and RX_STALLED is set it is cleared.
  83. *
  84. *
  85. * Driver sequence:
  86. *
  87. * iwl_rx_queue_alloc() Allocates rx_free
  88. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  89. * iwl_rx_queue_restock
  90. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  91. * queue, updates firmware pointers, and updates
  92. * the WRITE index. If insufficient rx_free buffers
  93. * are available, schedules iwl_rx_replenish
  94. *
  95. * -- enable interrupts --
  96. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  97. * READ INDEX, detaching the SKB from the pool.
  98. * Moves the packet buffer from queue to rx_used.
  99. * Calls iwl_rx_queue_restock to refill any empty
  100. * slots.
  101. * ...
  102. *
  103. */
  104. /**
  105. * iwl_rx_queue_space - Return number of free slots available in queue.
  106. */
  107. int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  108. {
  109. int s = q->read - q->write;
  110. if (s <= 0)
  111. s += RX_QUEUE_SIZE;
  112. /* keep some buffer to not confuse full and empty queue */
  113. s -= 2;
  114. if (s < 0)
  115. s = 0;
  116. return s;
  117. }
  118. EXPORT_SYMBOL(iwl_rx_queue_space);
  119. /**
  120. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  121. */
  122. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  123. {
  124. u32 reg = 0;
  125. int ret = 0;
  126. unsigned long flags;
  127. spin_lock_irqsave(&q->lock, flags);
  128. if (q->need_update == 0)
  129. goto exit_unlock;
  130. /* If power-saving is in use, make sure device is awake */
  131. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  132. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  133. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  134. iwl_set_bit(priv, CSR_GP_CNTRL,
  135. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  136. goto exit_unlock;
  137. }
  138. ret = iwl_grab_nic_access(priv);
  139. if (ret)
  140. goto exit_unlock;
  141. /* Device expects a multiple of 8 */
  142. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  143. q->write & ~0x7);
  144. iwl_release_nic_access(priv);
  145. /* Else device is assumed to be awake */
  146. } else
  147. /* Device expects a multiple of 8 */
  148. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  149. q->need_update = 0;
  150. exit_unlock:
  151. spin_unlock_irqrestore(&q->lock, flags);
  152. return ret;
  153. }
  154. EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
  155. /**
  156. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  157. */
  158. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  159. dma_addr_t dma_addr)
  160. {
  161. return cpu_to_le32((u32)(dma_addr >> 8));
  162. }
  163. /**
  164. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  165. *
  166. * If there are slots in the RX queue that need to be restocked,
  167. * and we have free pre-allocated buffers, fill the ranks as much
  168. * as we can, pulling from rx_free.
  169. *
  170. * This moves the 'write' index forward to catch up with 'processed', and
  171. * also updates the memory address in the firmware to reference the new
  172. * target buffer.
  173. */
  174. int iwl_rx_queue_restock(struct iwl_priv *priv)
  175. {
  176. struct iwl_rx_queue *rxq = &priv->rxq;
  177. struct list_head *element;
  178. struct iwl_rx_mem_buffer *rxb;
  179. unsigned long flags;
  180. int write;
  181. int ret = 0;
  182. spin_lock_irqsave(&rxq->lock, flags);
  183. write = rxq->write & ~0x7;
  184. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  185. /* Get next free Rx buffer, remove from free list */
  186. element = rxq->rx_free.next;
  187. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  188. list_del(element);
  189. /* Point to Rx buffer via next RBD in circular buffer */
  190. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  191. rxq->queue[rxq->write] = rxb;
  192. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  193. rxq->free_count--;
  194. }
  195. spin_unlock_irqrestore(&rxq->lock, flags);
  196. /* If the pre-allocated buffer pool is dropping low, schedule to
  197. * refill it */
  198. if (rxq->free_count <= RX_LOW_WATERMARK)
  199. queue_work(priv->workqueue, &priv->rx_replenish);
  200. /* If we've added more space for the firmware to place data, tell it.
  201. * Increment device's write pointer in multiples of 8. */
  202. if ((write != (rxq->write & ~0x7))
  203. || (abs(rxq->write - rxq->read) > 7)) {
  204. spin_lock_irqsave(&rxq->lock, flags);
  205. rxq->need_update = 1;
  206. spin_unlock_irqrestore(&rxq->lock, flags);
  207. ret = iwl_rx_queue_update_write_ptr(priv, rxq);
  208. }
  209. return ret;
  210. }
  211. EXPORT_SYMBOL(iwl_rx_queue_restock);
  212. /**
  213. * iwl_rx_replenish - Move all used packet from rx_used to rx_free
  214. *
  215. * When moving to rx_free an SKB is allocated for the slot.
  216. *
  217. * Also restock the Rx queue via iwl_rx_queue_restock.
  218. * This is called as a scheduled work item (except for during initialization)
  219. */
  220. void iwl_rx_allocate(struct iwl_priv *priv)
  221. {
  222. struct iwl_rx_queue *rxq = &priv->rxq;
  223. struct list_head *element;
  224. struct iwl_rx_mem_buffer *rxb;
  225. unsigned long flags;
  226. spin_lock_irqsave(&rxq->lock, flags);
  227. while (!list_empty(&rxq->rx_used)) {
  228. element = rxq->rx_used.next;
  229. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  230. /* Alloc a new receive buffer */
  231. rxb->skb = alloc_skb(priv->hw_params.rx_buf_size,
  232. __GFP_NOWARN | GFP_ATOMIC);
  233. if (!rxb->skb) {
  234. if (net_ratelimit())
  235. printk(KERN_CRIT DRV_NAME
  236. ": Can not allocate SKB buffers\n");
  237. /* We don't reschedule replenish work here -- we will
  238. * call the restock method and if it still needs
  239. * more buffers it will schedule replenish */
  240. break;
  241. }
  242. priv->alloc_rxb_skb++;
  243. list_del(element);
  244. /* Get physical address of RB/SKB */
  245. rxb->dma_addr =
  246. pci_map_single(priv->pci_dev, rxb->skb->data,
  247. priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
  248. list_add_tail(&rxb->list, &rxq->rx_free);
  249. rxq->free_count++;
  250. }
  251. spin_unlock_irqrestore(&rxq->lock, flags);
  252. }
  253. EXPORT_SYMBOL(iwl_rx_allocate);
  254. void iwl_rx_replenish(struct iwl_priv *priv)
  255. {
  256. unsigned long flags;
  257. iwl_rx_allocate(priv);
  258. spin_lock_irqsave(&priv->lock, flags);
  259. iwl_rx_queue_restock(priv);
  260. spin_unlock_irqrestore(&priv->lock, flags);
  261. }
  262. EXPORT_SYMBOL(iwl_rx_replenish);
  263. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  264. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  265. * This free routine walks the list of POOL entries and if SKB is set to
  266. * non NULL it is unmapped and freed
  267. */
  268. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  269. {
  270. int i;
  271. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  272. if (rxq->pool[i].skb != NULL) {
  273. pci_unmap_single(priv->pci_dev,
  274. rxq->pool[i].dma_addr,
  275. priv->hw_params.rx_buf_size,
  276. PCI_DMA_FROMDEVICE);
  277. dev_kfree_skb(rxq->pool[i].skb);
  278. }
  279. }
  280. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  281. rxq->dma_addr);
  282. rxq->bd = NULL;
  283. }
  284. EXPORT_SYMBOL(iwl_rx_queue_free);
  285. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  286. {
  287. struct iwl_rx_queue *rxq = &priv->rxq;
  288. struct pci_dev *dev = priv->pci_dev;
  289. int i;
  290. spin_lock_init(&rxq->lock);
  291. INIT_LIST_HEAD(&rxq->rx_free);
  292. INIT_LIST_HEAD(&rxq->rx_used);
  293. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  294. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  295. if (!rxq->bd)
  296. return -ENOMEM;
  297. /* Fill the rx_used queue with _all_ of the Rx buffers */
  298. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  299. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  300. /* Set us so that we have processed and used all buffers, but have
  301. * not restocked the Rx queue with fresh buffers */
  302. rxq->read = rxq->write = 0;
  303. rxq->free_count = 0;
  304. rxq->need_update = 0;
  305. return 0;
  306. }
  307. EXPORT_SYMBOL(iwl_rx_queue_alloc);
  308. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  309. {
  310. unsigned long flags;
  311. int i;
  312. spin_lock_irqsave(&rxq->lock, flags);
  313. INIT_LIST_HEAD(&rxq->rx_free);
  314. INIT_LIST_HEAD(&rxq->rx_used);
  315. /* Fill the rx_used queue with _all_ of the Rx buffers */
  316. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  317. /* In the reset function, these buffers may have been allocated
  318. * to an SKB, so we need to unmap and free potential storage */
  319. if (rxq->pool[i].skb != NULL) {
  320. pci_unmap_single(priv->pci_dev,
  321. rxq->pool[i].dma_addr,
  322. priv->hw_params.rx_buf_size,
  323. PCI_DMA_FROMDEVICE);
  324. priv->alloc_rxb_skb--;
  325. dev_kfree_skb(rxq->pool[i].skb);
  326. rxq->pool[i].skb = NULL;
  327. }
  328. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  329. }
  330. /* Set us so that we have processed and used all buffers, but have
  331. * not restocked the Rx queue with fresh buffers */
  332. rxq->read = rxq->write = 0;
  333. rxq->free_count = 0;
  334. spin_unlock_irqrestore(&rxq->lock, flags);
  335. }
  336. EXPORT_SYMBOL(iwl_rx_queue_reset);
  337. int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  338. {
  339. int ret;
  340. unsigned long flags;
  341. unsigned int rb_size;
  342. spin_lock_irqsave(&priv->lock, flags);
  343. ret = iwl_grab_nic_access(priv);
  344. if (ret) {
  345. spin_unlock_irqrestore(&priv->lock, flags);
  346. return ret;
  347. }
  348. if (priv->cfg->mod_params->amsdu_size_8K)
  349. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
  350. else
  351. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
  352. /* Stop Rx DMA */
  353. iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  354. /* Reset driver's Rx queue write index */
  355. iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
  356. /* Tell device where to find RBD circular buffer in DRAM */
  357. iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  358. rxq->dma_addr >> 8);
  359. /* Tell device where in DRAM to update its Rx status */
  360. iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
  361. (priv->shared_phys + priv->rb_closed_offset) >> 4);
  362. /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
  363. iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
  364. FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
  365. FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
  366. rb_size |
  367. /* 0x10 << 4 | */
  368. (RX_QUEUE_SIZE_LOG <<
  369. FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
  370. /*
  371. * iwl_write32(priv,CSR_INT_COAL_REG,0);
  372. */
  373. iwl_release_nic_access(priv);
  374. spin_unlock_irqrestore(&priv->lock, flags);
  375. return 0;
  376. }
  377. int iwl_rxq_stop(struct iwl_priv *priv)
  378. {
  379. int ret;
  380. unsigned long flags;
  381. spin_lock_irqsave(&priv->lock, flags);
  382. ret = iwl_grab_nic_access(priv);
  383. if (unlikely(ret)) {
  384. spin_unlock_irqrestore(&priv->lock, flags);
  385. return ret;
  386. }
  387. /* stop Rx DMA */
  388. iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  389. ret = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
  390. (1 << 24), 1000);
  391. if (ret < 0)
  392. IWL_ERROR("Can't stop Rx DMA.\n");
  393. iwl_release_nic_access(priv);
  394. spin_unlock_irqrestore(&priv->lock, flags);
  395. return 0;
  396. }
  397. EXPORT_SYMBOL(iwl_rxq_stop);
  398. void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
  399. struct iwl_rx_mem_buffer *rxb)
  400. {
  401. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  402. struct iwl4965_missed_beacon_notif *missed_beacon;
  403. missed_beacon = &pkt->u.missed_beacon;
  404. if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
  405. IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  406. le32_to_cpu(missed_beacon->consequtive_missed_beacons),
  407. le32_to_cpu(missed_beacon->total_missed_becons),
  408. le32_to_cpu(missed_beacon->num_recvd_beacons),
  409. le32_to_cpu(missed_beacon->num_expected_beacons));
  410. if (!test_bit(STATUS_SCANNING, &priv->status))
  411. iwl_init_sensitivity(priv);
  412. }
  413. }
  414. EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
  415. int iwl_rx_agg_start(struct iwl_priv *priv, const u8 *addr, int tid, u16 ssn)
  416. {
  417. unsigned long flags;
  418. int sta_id;
  419. sta_id = iwl_find_station(priv, addr);
  420. if (sta_id == IWL_INVALID_STATION)
  421. return -ENXIO;
  422. spin_lock_irqsave(&priv->sta_lock, flags);
  423. priv->stations[sta_id].sta.station_flags_msk = 0;
  424. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  425. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  426. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  427. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  428. spin_unlock_irqrestore(&priv->sta_lock, flags);
  429. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  430. CMD_ASYNC);
  431. }
  432. EXPORT_SYMBOL(iwl_rx_agg_start);
  433. int iwl_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid)
  434. {
  435. unsigned long flags;
  436. int sta_id;
  437. sta_id = iwl_find_station(priv, addr);
  438. if (sta_id == IWL_INVALID_STATION)
  439. return -ENXIO;
  440. spin_lock_irqsave(&priv->sta_lock, flags);
  441. priv->stations[sta_id].sta.station_flags_msk = 0;
  442. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  443. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  444. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  445. spin_unlock_irqrestore(&priv->sta_lock, flags);
  446. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  447. CMD_ASYNC);
  448. }
  449. EXPORT_SYMBOL(iwl_rx_agg_stop);
  450. /* Calculate noise level, based on measurements during network silence just
  451. * before arriving beacon. This measurement can be done only if we know
  452. * exactly when to expect beacons, therefore only when we're associated. */
  453. static void iwl_rx_calc_noise(struct iwl_priv *priv)
  454. {
  455. struct statistics_rx_non_phy *rx_info
  456. = &(priv->statistics.rx.general);
  457. int num_active_rx = 0;
  458. int total_silence = 0;
  459. int bcn_silence_a =
  460. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  461. int bcn_silence_b =
  462. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  463. int bcn_silence_c =
  464. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  465. if (bcn_silence_a) {
  466. total_silence += bcn_silence_a;
  467. num_active_rx++;
  468. }
  469. if (bcn_silence_b) {
  470. total_silence += bcn_silence_b;
  471. num_active_rx++;
  472. }
  473. if (bcn_silence_c) {
  474. total_silence += bcn_silence_c;
  475. num_active_rx++;
  476. }
  477. /* Average among active antennas */
  478. if (num_active_rx)
  479. priv->last_rx_noise = (total_silence / num_active_rx) - 107;
  480. else
  481. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  482. IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
  483. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  484. priv->last_rx_noise);
  485. }
  486. #define REG_RECALIB_PERIOD (60)
  487. void iwl_rx_statistics(struct iwl_priv *priv,
  488. struct iwl_rx_mem_buffer *rxb)
  489. {
  490. int change;
  491. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  492. IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
  493. (int)sizeof(priv->statistics), pkt->len);
  494. change = ((priv->statistics.general.temperature !=
  495. pkt->u.stats.general.temperature) ||
  496. ((priv->statistics.flag &
  497. STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
  498. (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
  499. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  500. set_bit(STATUS_STATISTICS, &priv->status);
  501. /* Reschedule the statistics timer to occur in
  502. * REG_RECALIB_PERIOD seconds to ensure we get a
  503. * thermal update even if the uCode doesn't give
  504. * us one */
  505. mod_timer(&priv->statistics_periodic, jiffies +
  506. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  507. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  508. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  509. iwl_rx_calc_noise(priv);
  510. queue_work(priv->workqueue, &priv->run_time_calib_work);
  511. }
  512. iwl_leds_background(priv);
  513. if (priv->cfg->ops->lib->temperature && change)
  514. priv->cfg->ops->lib->temperature(priv);
  515. }
  516. EXPORT_SYMBOL(iwl_rx_statistics);
  517. #define PERFECT_RSSI (-20) /* dBm */
  518. #define WORST_RSSI (-95) /* dBm */
  519. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  520. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  521. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  522. * about formulas used below. */
  523. static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  524. {
  525. int sig_qual;
  526. int degradation = PERFECT_RSSI - rssi_dbm;
  527. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  528. * as indicator; formula is (signal dbm - noise dbm).
  529. * SNR at or above 40 is a great signal (100%).
  530. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  531. * Weakest usable signal is usually 10 - 15 dB SNR. */
  532. if (noise_dbm) {
  533. if (rssi_dbm - noise_dbm >= 40)
  534. return 100;
  535. else if (rssi_dbm < noise_dbm)
  536. return 0;
  537. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  538. /* Else use just the signal level.
  539. * This formula is a least squares fit of data points collected and
  540. * compared with a reference system that had a percentage (%) display
  541. * for signal quality. */
  542. } else
  543. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  544. (15 * RSSI_RANGE + 62 * degradation)) /
  545. (RSSI_RANGE * RSSI_RANGE);
  546. if (sig_qual > 100)
  547. sig_qual = 100;
  548. else if (sig_qual < 1)
  549. sig_qual = 0;
  550. return sig_qual;
  551. }
  552. #ifdef CONFIG_IWLWIFI_DEBUG
  553. /**
  554. * iwl_dbg_report_frame - dump frame to syslog during debug sessions
  555. *
  556. * You may hack this function to show different aspects of received frames,
  557. * including selective frame dumps.
  558. * group100 parameter selects whether to show 1 out of 100 good frames.
  559. *
  560. * TODO: This was originally written for 3945, need to audit for
  561. * proper operation with 4965.
  562. */
  563. static void iwl_dbg_report_frame(struct iwl_priv *priv,
  564. struct iwl_rx_packet *pkt,
  565. struct ieee80211_hdr *header, int group100)
  566. {
  567. u32 to_us;
  568. u32 print_summary = 0;
  569. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  570. u32 hundred = 0;
  571. u32 dataframe = 0;
  572. __le16 fc;
  573. u16 seq_ctl;
  574. u16 channel;
  575. u16 phy_flags;
  576. int rate_sym;
  577. u16 length;
  578. u16 status;
  579. u16 bcn_tmr;
  580. u32 tsf_low;
  581. u64 tsf;
  582. u8 rssi;
  583. u8 agc;
  584. u16 sig_avg;
  585. u16 noise_diff;
  586. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  587. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  588. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  589. u8 *data = IWL_RX_DATA(pkt);
  590. if (likely(!(priv->debug_level & IWL_DL_RX)))
  591. return;
  592. /* MAC header */
  593. fc = header->frame_control;
  594. seq_ctl = le16_to_cpu(header->seq_ctrl);
  595. /* metadata */
  596. channel = le16_to_cpu(rx_hdr->channel);
  597. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  598. rate_sym = rx_hdr->rate;
  599. length = le16_to_cpu(rx_hdr->len);
  600. /* end-of-frame status and timestamp */
  601. status = le32_to_cpu(rx_end->status);
  602. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  603. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  604. tsf = le64_to_cpu(rx_end->timestamp);
  605. /* signal statistics */
  606. rssi = rx_stats->rssi;
  607. agc = rx_stats->agc;
  608. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  609. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  610. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  611. /* if data frame is to us and all is good,
  612. * (optionally) print summary for only 1 out of every 100 */
  613. if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
  614. cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  615. dataframe = 1;
  616. if (!group100)
  617. print_summary = 1; /* print each frame */
  618. else if (priv->framecnt_to_us < 100) {
  619. priv->framecnt_to_us++;
  620. print_summary = 0;
  621. } else {
  622. priv->framecnt_to_us = 0;
  623. print_summary = 1;
  624. hundred = 1;
  625. }
  626. } else {
  627. /* print summary for all other frames */
  628. print_summary = 1;
  629. }
  630. if (print_summary) {
  631. char *title;
  632. int rate_idx;
  633. u32 bitrate;
  634. if (hundred)
  635. title = "100Frames";
  636. else if (ieee80211_has_retry(fc))
  637. title = "Retry";
  638. else if (ieee80211_is_assoc_resp(fc))
  639. title = "AscRsp";
  640. else if (ieee80211_is_reassoc_resp(fc))
  641. title = "RasRsp";
  642. else if (ieee80211_is_probe_resp(fc)) {
  643. title = "PrbRsp";
  644. print_dump = 1; /* dump frame contents */
  645. } else if (ieee80211_is_beacon(fc)) {
  646. title = "Beacon";
  647. print_dump = 1; /* dump frame contents */
  648. } else if (ieee80211_is_atim(fc))
  649. title = "ATIM";
  650. else if (ieee80211_is_auth(fc))
  651. title = "Auth";
  652. else if (ieee80211_is_deauth(fc))
  653. title = "DeAuth";
  654. else if (ieee80211_is_disassoc(fc))
  655. title = "DisAssoc";
  656. else
  657. title = "Frame";
  658. rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
  659. if (unlikely(rate_idx == -1))
  660. bitrate = 0;
  661. else
  662. bitrate = iwl_rates[rate_idx].ieee / 2;
  663. /* print frame summary.
  664. * MAC addresses show just the last byte (for brevity),
  665. * but you can hack it to show more, if you'd like to. */
  666. if (dataframe)
  667. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  668. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  669. title, le16_to_cpu(fc), header->addr1[5],
  670. length, rssi, channel, bitrate);
  671. else {
  672. /* src/dst addresses assume managed mode */
  673. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  674. "src=0x%02x, rssi=%u, tim=%lu usec, "
  675. "phy=0x%02x, chnl=%d\n",
  676. title, le16_to_cpu(fc), header->addr1[5],
  677. header->addr3[5], rssi,
  678. tsf_low - priv->scan_start_tsf,
  679. phy_flags, channel);
  680. }
  681. }
  682. if (print_dump)
  683. iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
  684. }
  685. #else
  686. static inline void iwl_dbg_report_frame(struct iwl_priv *priv,
  687. struct iwl_rx_packet *pkt,
  688. struct ieee80211_hdr *header,
  689. int group100)
  690. {
  691. }
  692. #endif
  693. static void iwl_add_radiotap(struct iwl_priv *priv,
  694. struct sk_buff *skb,
  695. struct iwl4965_rx_phy_res *rx_start,
  696. struct ieee80211_rx_status *stats,
  697. u32 ampdu_status)
  698. {
  699. s8 signal = stats->signal;
  700. s8 noise = 0;
  701. int rate = stats->rate_idx;
  702. u64 tsf = stats->mactime;
  703. __le16 antenna;
  704. __le16 phy_flags_hw = rx_start->phy_flags;
  705. struct iwl4965_rt_rx_hdr {
  706. struct ieee80211_radiotap_header rt_hdr;
  707. __le64 rt_tsf; /* TSF */
  708. u8 rt_flags; /* radiotap packet flags */
  709. u8 rt_rate; /* rate in 500kb/s */
  710. __le16 rt_channelMHz; /* channel in MHz */
  711. __le16 rt_chbitmask; /* channel bitfield */
  712. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  713. s8 rt_dbmnoise;
  714. u8 rt_antenna; /* antenna number */
  715. } __attribute__ ((packed)) *iwl4965_rt;
  716. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  717. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  718. if (net_ratelimit())
  719. printk(KERN_ERR "not enough headroom [%d] for "
  720. "radiotap head [%zd]\n",
  721. skb_headroom(skb), sizeof(*iwl4965_rt));
  722. return;
  723. }
  724. /* put radiotap header in front of 802.11 header and data */
  725. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  726. /* initialise radiotap header */
  727. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  728. iwl4965_rt->rt_hdr.it_pad = 0;
  729. /* total header + data */
  730. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  731. &iwl4965_rt->rt_hdr.it_len);
  732. /* Indicate all the fields we add to the radiotap header */
  733. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  734. (1 << IEEE80211_RADIOTAP_FLAGS) |
  735. (1 << IEEE80211_RADIOTAP_RATE) |
  736. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  737. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  738. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  739. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  740. &iwl4965_rt->rt_hdr.it_present);
  741. /* Zero the flags, we'll add to them as we go */
  742. iwl4965_rt->rt_flags = 0;
  743. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  744. iwl4965_rt->rt_dbmsignal = signal;
  745. iwl4965_rt->rt_dbmnoise = noise;
  746. /* Convert the channel frequency and set the flags */
  747. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  748. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  749. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  750. IEEE80211_CHAN_5GHZ),
  751. &iwl4965_rt->rt_chbitmask);
  752. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  753. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  754. IEEE80211_CHAN_2GHZ),
  755. &iwl4965_rt->rt_chbitmask);
  756. else /* 802.11g */
  757. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  758. IEEE80211_CHAN_2GHZ),
  759. &iwl4965_rt->rt_chbitmask);
  760. if (rate == -1)
  761. iwl4965_rt->rt_rate = 0;
  762. else
  763. iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
  764. /*
  765. * "antenna number"
  766. *
  767. * It seems that the antenna field in the phy flags value
  768. * is actually a bitfield. This is undefined by radiotap,
  769. * it wants an actual antenna number but I always get "7"
  770. * for most legacy frames I receive indicating that the
  771. * same frame was received on all three RX chains.
  772. *
  773. * I think this field should be removed in favour of a
  774. * new 802.11n radiotap field "RX chains" that is defined
  775. * as a bitmask.
  776. */
  777. antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
  778. iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
  779. /* set the preamble flag if appropriate */
  780. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  781. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  782. stats->flag |= RX_FLAG_RADIOTAP;
  783. }
  784. static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  785. {
  786. /* 0 - mgmt, 1 - cnt, 2 - data */
  787. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  788. priv->rx_stats[idx].cnt++;
  789. priv->rx_stats[idx].bytes += len;
  790. }
  791. /*
  792. * returns non-zero if packet should be dropped
  793. */
  794. static int iwl_set_decrypted_flag(struct iwl_priv *priv,
  795. struct ieee80211_hdr *hdr,
  796. u32 decrypt_res,
  797. struct ieee80211_rx_status *stats)
  798. {
  799. u16 fc = le16_to_cpu(hdr->frame_control);
  800. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  801. return 0;
  802. if (!(fc & IEEE80211_FCTL_PROTECTED))
  803. return 0;
  804. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  805. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  806. case RX_RES_STATUS_SEC_TYPE_TKIP:
  807. /* The uCode has got a bad phase 1 Key, pushes the packet.
  808. * Decryption will be done in SW. */
  809. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  810. RX_RES_STATUS_BAD_KEY_TTAK)
  811. break;
  812. case RX_RES_STATUS_SEC_TYPE_WEP:
  813. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  814. RX_RES_STATUS_BAD_ICV_MIC) {
  815. /* bad ICV, the packet is destroyed since the
  816. * decryption is inplace, drop it */
  817. IWL_DEBUG_RX("Packet destroyed\n");
  818. return -1;
  819. }
  820. case RX_RES_STATUS_SEC_TYPE_CCMP:
  821. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  822. RX_RES_STATUS_DECRYPT_OK) {
  823. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  824. stats->flag |= RX_FLAG_DECRYPTED;
  825. }
  826. break;
  827. default:
  828. break;
  829. }
  830. return 0;
  831. }
  832. static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
  833. {
  834. u32 decrypt_out = 0;
  835. if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
  836. RX_RES_STATUS_STATION_FOUND)
  837. decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
  838. RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
  839. decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
  840. /* packet was not encrypted */
  841. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  842. RX_RES_STATUS_SEC_TYPE_NONE)
  843. return decrypt_out;
  844. /* packet was encrypted with unknown alg */
  845. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  846. RX_RES_STATUS_SEC_TYPE_ERR)
  847. return decrypt_out;
  848. /* decryption was not done in HW */
  849. if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
  850. RX_MPDU_RES_STATUS_DEC_DONE_MSK)
  851. return decrypt_out;
  852. switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
  853. case RX_RES_STATUS_SEC_TYPE_CCMP:
  854. /* alg is CCM: check MIC only */
  855. if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
  856. /* Bad MIC */
  857. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  858. else
  859. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  860. break;
  861. case RX_RES_STATUS_SEC_TYPE_TKIP:
  862. if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
  863. /* Bad TTAK */
  864. decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
  865. break;
  866. }
  867. /* fall through if TTAK OK */
  868. default:
  869. if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
  870. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  871. else
  872. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  873. break;
  874. };
  875. IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
  876. decrypt_in, decrypt_out);
  877. return decrypt_out;
  878. }
  879. static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
  880. int include_phy,
  881. struct iwl_rx_mem_buffer *rxb,
  882. struct ieee80211_rx_status *stats)
  883. {
  884. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  885. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  886. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  887. struct ieee80211_hdr *hdr;
  888. u16 len;
  889. __le32 *rx_end;
  890. unsigned int skblen;
  891. u32 ampdu_status;
  892. u32 ampdu_status_legacy;
  893. if (!include_phy && priv->last_phy_res[0])
  894. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  895. if (!rx_start) {
  896. IWL_ERROR("MPDU frame without a PHY data\n");
  897. return;
  898. }
  899. if (include_phy) {
  900. hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
  901. rx_start->cfg_phy_cnt);
  902. len = le16_to_cpu(rx_start->byte_count);
  903. rx_end = (__le32 *) ((u8 *) &pkt->u.raw[0] +
  904. sizeof(struct iwl4965_rx_phy_res) +
  905. rx_start->cfg_phy_cnt + len);
  906. } else {
  907. struct iwl4965_rx_mpdu_res_start *amsdu =
  908. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  909. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  910. sizeof(struct iwl4965_rx_mpdu_res_start));
  911. len = le16_to_cpu(amsdu->byte_count);
  912. rx_start->byte_count = amsdu->byte_count;
  913. rx_end = (__le32 *) (((u8 *) hdr) + len);
  914. }
  915. ampdu_status = le32_to_cpu(*rx_end);
  916. skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
  917. if (!include_phy) {
  918. /* New status scheme, need to translate */
  919. ampdu_status_legacy = ampdu_status;
  920. ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
  921. }
  922. /* start from MAC */
  923. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  924. skb_put(rxb->skb, len); /* end where data ends */
  925. /* We only process data packets if the interface is open */
  926. if (unlikely(!priv->is_open)) {
  927. IWL_DEBUG_DROP_LIMIT
  928. ("Dropping packet while interface is not open.\n");
  929. return;
  930. }
  931. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  932. /* in case of HW accelerated crypto and bad decryption, drop */
  933. if (!priv->hw_params.sw_crypto &&
  934. iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
  935. return;
  936. if (priv->add_radiotap)
  937. iwl_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  938. iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
  939. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  940. priv->alloc_rxb_skb--;
  941. rxb->skb = NULL;
  942. }
  943. /* Calc max signal level (dBm) among 3 possible receivers */
  944. static int iwl_calc_rssi(struct iwl_priv *priv,
  945. struct iwl4965_rx_phy_res *rx_resp)
  946. {
  947. /* data from PHY/DSP regarding signal strength, etc.,
  948. * contents are always there, not configurable by host. */
  949. struct iwl4965_rx_non_cfg_phy *ncphy =
  950. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  951. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  952. >> IWL_AGC_DB_POS;
  953. u32 valid_antennae =
  954. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  955. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  956. u8 max_rssi = 0;
  957. u32 i;
  958. /* Find max rssi among 3 possible receivers.
  959. * These values are measured by the digital signal processor (DSP).
  960. * They should stay fairly constant even as the signal strength varies,
  961. * if the radio's automatic gain control (AGC) is working right.
  962. * AGC value (see below) will provide the "interesting" info. */
  963. for (i = 0; i < 3; i++)
  964. if (valid_antennae & (1 << i))
  965. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  966. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  967. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  968. max_rssi, agc);
  969. /* dBm = max_rssi dB - agc dB - constant.
  970. * Higher AGC (higher radio gain) means lower signal. */
  971. return max_rssi - agc - IWL_RSSI_OFFSET;
  972. }
  973. static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
  974. {
  975. unsigned long flags;
  976. spin_lock_irqsave(&priv->sta_lock, flags);
  977. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  978. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  979. priv->stations[sta_id].sta.sta.modify_mask = 0;
  980. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  981. spin_unlock_irqrestore(&priv->sta_lock, flags);
  982. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  983. }
  984. static void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
  985. {
  986. /* FIXME: need locking over ps_status ??? */
  987. u8 sta_id = iwl_find_station(priv, addr);
  988. if (sta_id != IWL_INVALID_STATION) {
  989. u8 sta_awake = priv->stations[sta_id].
  990. ps_status == STA_PS_STATUS_WAKE;
  991. if (sta_awake && ps_bit)
  992. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  993. else if (!sta_awake && !ps_bit) {
  994. iwl_sta_modify_ps_wake(priv, sta_id);
  995. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  996. }
  997. }
  998. }
  999. /* This is necessary only for a number of statistics, see the caller. */
  1000. static int iwl_is_network_packet(struct iwl_priv *priv,
  1001. struct ieee80211_hdr *header)
  1002. {
  1003. /* Filter incoming packets to determine if they are targeted toward
  1004. * this network, discarding packets coming from ourselves */
  1005. switch (priv->iw_mode) {
  1006. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1007. /* packets to our IBSS update information */
  1008. return !compare_ether_addr(header->addr3, priv->bssid);
  1009. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1010. /* packets to our IBSS update information */
  1011. return !compare_ether_addr(header->addr2, priv->bssid);
  1012. default:
  1013. return 1;
  1014. }
  1015. }
  1016. /* Called for REPLY_RX (legacy ABG frames), or
  1017. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  1018. void iwl_rx_reply_rx(struct iwl_priv *priv,
  1019. struct iwl_rx_mem_buffer *rxb)
  1020. {
  1021. struct ieee80211_hdr *header;
  1022. struct ieee80211_rx_status rx_status;
  1023. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1024. /* Use phy data (Rx signal strength, etc.) contained within
  1025. * this rx packet for legacy frames,
  1026. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  1027. int include_phy = (pkt->hdr.cmd == REPLY_RX);
  1028. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  1029. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  1030. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  1031. __le32 *rx_end;
  1032. unsigned int len = 0;
  1033. u16 fc;
  1034. u8 network_packet;
  1035. rx_status.mactime = le64_to_cpu(rx_start->timestamp);
  1036. rx_status.freq =
  1037. ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
  1038. rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  1039. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  1040. rx_status.rate_idx =
  1041. iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
  1042. if (rx_status.band == IEEE80211_BAND_5GHZ)
  1043. rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
  1044. rx_status.antenna = 0;
  1045. rx_status.flag = 0;
  1046. rx_status.flag |= RX_FLAG_TSFT;
  1047. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  1048. IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
  1049. rx_start->cfg_phy_cnt);
  1050. return;
  1051. }
  1052. if (!include_phy) {
  1053. if (priv->last_phy_res[0])
  1054. rx_start = (struct iwl4965_rx_phy_res *)
  1055. &priv->last_phy_res[1];
  1056. else
  1057. rx_start = NULL;
  1058. }
  1059. if (!rx_start) {
  1060. IWL_ERROR("MPDU frame without a PHY data\n");
  1061. return;
  1062. }
  1063. if (include_phy) {
  1064. header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
  1065. + rx_start->cfg_phy_cnt);
  1066. len = le16_to_cpu(rx_start->byte_count);
  1067. rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
  1068. sizeof(struct iwl4965_rx_phy_res) + len);
  1069. } else {
  1070. struct iwl4965_rx_mpdu_res_start *amsdu =
  1071. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  1072. header = (void *)(pkt->u.raw +
  1073. sizeof(struct iwl4965_rx_mpdu_res_start));
  1074. len = le16_to_cpu(amsdu->byte_count);
  1075. rx_end = (__le32 *) (pkt->u.raw +
  1076. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  1077. }
  1078. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  1079. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  1080. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  1081. le32_to_cpu(*rx_end));
  1082. return;
  1083. }
  1084. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  1085. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  1086. rx_status.signal = iwl_calc_rssi(priv, rx_start);
  1087. /* Meaningful noise values are available only from beacon statistics,
  1088. * which are gathered only when associated, and indicate noise
  1089. * only for the associated network channel ...
  1090. * Ignore these noise values while scanning (other channels) */
  1091. if (iwl_is_associated(priv) &&
  1092. !test_bit(STATUS_SCANNING, &priv->status)) {
  1093. rx_status.noise = priv->last_rx_noise;
  1094. rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
  1095. rx_status.noise);
  1096. } else {
  1097. rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  1098. rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
  1099. }
  1100. /* Reset beacon noise level if not associated. */
  1101. if (!iwl_is_associated(priv))
  1102. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  1103. /* Set "1" to report good data frames in groups of 100 */
  1104. /* FIXME: need to optimze the call: */
  1105. iwl_dbg_report_frame(priv, pkt, header, 1);
  1106. IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
  1107. rx_status.signal, rx_status.noise, rx_status.signal,
  1108. (unsigned long long)rx_status.mactime);
  1109. /* Take shortcut when only in monitor mode */
  1110. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  1111. iwl_pass_packet_to_mac80211(priv, include_phy,
  1112. rxb, &rx_status);
  1113. return;
  1114. }
  1115. network_packet = iwl_is_network_packet(priv, header);
  1116. if (network_packet) {
  1117. priv->last_rx_rssi = rx_status.signal;
  1118. priv->last_beacon_time = priv->ucode_beacon_time;
  1119. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  1120. }
  1121. fc = le16_to_cpu(header->frame_control);
  1122. switch (fc & IEEE80211_FCTL_FTYPE) {
  1123. case IEEE80211_FTYPE_MGMT:
  1124. case IEEE80211_FTYPE_DATA:
  1125. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  1126. iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  1127. header->addr2);
  1128. /* fall through */
  1129. default:
  1130. iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
  1131. &rx_status);
  1132. break;
  1133. }
  1134. }
  1135. EXPORT_SYMBOL(iwl_rx_reply_rx);
  1136. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  1137. * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  1138. void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
  1139. struct iwl_rx_mem_buffer *rxb)
  1140. {
  1141. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1142. priv->last_phy_res[0] = 1;
  1143. memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
  1144. sizeof(struct iwl4965_rx_phy_res));
  1145. }
  1146. EXPORT_SYMBOL(iwl_rx_reply_rx_phy);