dma.c 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221
  1. /*
  2. * DMA implementation for Hexagon
  3. *
  4. * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 and
  8. * only version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  18. * 02110-1301, USA.
  19. */
  20. #include <linux/dma-mapping.h>
  21. #include <linux/bootmem.h>
  22. #include <linux/genalloc.h>
  23. #include <asm/dma-mapping.h>
  24. struct dma_map_ops *dma_ops;
  25. EXPORT_SYMBOL(dma_ops);
  26. int bad_dma_address; /* globals are automatically initialized to zero */
  27. int dma_supported(struct device *dev, u64 mask)
  28. {
  29. if (mask == DMA_BIT_MASK(32))
  30. return 1;
  31. else
  32. return 0;
  33. }
  34. EXPORT_SYMBOL(dma_supported);
  35. int dma_set_mask(struct device *dev, u64 mask)
  36. {
  37. if (!dev->dma_mask || !dma_supported(dev, mask))
  38. return -EIO;
  39. *dev->dma_mask = mask;
  40. return 0;
  41. }
  42. EXPORT_SYMBOL(dma_set_mask);
  43. static struct gen_pool *coherent_pool;
  44. /* Allocates from a pool of uncached memory that was reserved at boot time */
  45. void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
  46. dma_addr_t *dma_addr, gfp_t flag,
  47. struct dma_attrs *attrs)
  48. {
  49. void *ret;
  50. if (coherent_pool == NULL) {
  51. coherent_pool = gen_pool_create(PAGE_SHIFT, -1);
  52. if (coherent_pool == NULL)
  53. panic("Can't create %s() memory pool!", __func__);
  54. else
  55. gen_pool_add(coherent_pool,
  56. (PAGE_OFFSET + (max_low_pfn << PAGE_SHIFT)),
  57. hexagon_coherent_pool_size, -1);
  58. }
  59. ret = (void *) gen_pool_alloc(coherent_pool, size);
  60. if (ret) {
  61. memset(ret, 0, size);
  62. *dma_addr = (dma_addr_t) (ret - PAGE_OFFSET);
  63. } else
  64. *dma_addr = ~0;
  65. return ret;
  66. }
  67. static void hexagon_free_coherent(struct device *dev, size_t size, void *vaddr,
  68. dma_addr_t dma_addr, struct dma_attrs *attrs)
  69. {
  70. gen_pool_free(coherent_pool, (unsigned long) vaddr, size);
  71. }
  72. static int check_addr(const char *name, struct device *hwdev,
  73. dma_addr_t bus, size_t size)
  74. {
  75. if (hwdev && hwdev->dma_mask && !dma_capable(hwdev, bus, size)) {
  76. if (*hwdev->dma_mask >= DMA_BIT_MASK(32))
  77. printk(KERN_ERR
  78. "%s: overflow %Lx+%zu of device mask %Lx\n",
  79. name, (long long)bus, size,
  80. (long long)*hwdev->dma_mask);
  81. return 0;
  82. }
  83. return 1;
  84. }
  85. static int hexagon_map_sg(struct device *hwdev, struct scatterlist *sg,
  86. int nents, enum dma_data_direction dir,
  87. struct dma_attrs *attrs)
  88. {
  89. struct scatterlist *s;
  90. int i;
  91. WARN_ON(nents == 0 || sg[0].length == 0);
  92. for_each_sg(sg, s, nents, i) {
  93. s->dma_address = sg_phys(s);
  94. if (!check_addr("map_sg", hwdev, s->dma_address, s->length))
  95. return 0;
  96. s->dma_length = s->length;
  97. flush_dcache_range(PAGE_OFFSET + s->dma_address,
  98. PAGE_OFFSET + s->dma_address + s->length);
  99. }
  100. return nents;
  101. }
  102. /*
  103. * address is virtual
  104. */
  105. static inline void dma_sync(void *addr, size_t size,
  106. enum dma_data_direction dir)
  107. {
  108. switch (dir) {
  109. case DMA_TO_DEVICE:
  110. hexagon_clean_dcache_range((unsigned long) addr,
  111. (unsigned long) addr + size);
  112. break;
  113. case DMA_FROM_DEVICE:
  114. hexagon_inv_dcache_range((unsigned long) addr,
  115. (unsigned long) addr + size);
  116. break;
  117. case DMA_BIDIRECTIONAL:
  118. flush_dcache_range((unsigned long) addr,
  119. (unsigned long) addr + size);
  120. break;
  121. default:
  122. BUG();
  123. }
  124. }
  125. static inline void *dma_addr_to_virt(dma_addr_t dma_addr)
  126. {
  127. return phys_to_virt((unsigned long) dma_addr);
  128. }
  129. /**
  130. * hexagon_map_page() - maps an address for device DMA
  131. * @dev: pointer to DMA device
  132. * @page: pointer to page struct of DMA memory
  133. * @offset: offset within page
  134. * @size: size of memory to map
  135. * @dir: transfer direction
  136. * @attrs: pointer to DMA attrs (not used)
  137. *
  138. * Called to map a memory address to a DMA address prior
  139. * to accesses to/from device.
  140. *
  141. * We don't particularly have many hoops to jump through
  142. * so far. Straight translation between phys and virtual.
  143. *
  144. * DMA is not cache coherent so sync is necessary; this
  145. * seems to be a convenient place to do it.
  146. *
  147. */
  148. static dma_addr_t hexagon_map_page(struct device *dev, struct page *page,
  149. unsigned long offset, size_t size,
  150. enum dma_data_direction dir,
  151. struct dma_attrs *attrs)
  152. {
  153. dma_addr_t bus = page_to_phys(page) + offset;
  154. WARN_ON(size == 0);
  155. if (!check_addr("map_single", dev, bus, size))
  156. return bad_dma_address;
  157. dma_sync(dma_addr_to_virt(bus), size, dir);
  158. return bus;
  159. }
  160. static void hexagon_sync_single_for_cpu(struct device *dev,
  161. dma_addr_t dma_handle, size_t size,
  162. enum dma_data_direction dir)
  163. {
  164. dma_sync(dma_addr_to_virt(dma_handle), size, dir);
  165. }
  166. static void hexagon_sync_single_for_device(struct device *dev,
  167. dma_addr_t dma_handle, size_t size,
  168. enum dma_data_direction dir)
  169. {
  170. dma_sync(dma_addr_to_virt(dma_handle), size, dir);
  171. }
  172. struct dma_map_ops hexagon_dma_ops = {
  173. .alloc = hexagon_dma_alloc_coherent,
  174. .free = hexagon_free_coherent,
  175. .map_sg = hexagon_map_sg,
  176. .map_page = hexagon_map_page,
  177. .sync_single_for_cpu = hexagon_sync_single_for_cpu,
  178. .sync_single_for_device = hexagon_sync_single_for_device,
  179. .is_phys = 1,
  180. };
  181. void __init hexagon_dma_init(void)
  182. {
  183. if (dma_ops)
  184. return;
  185. dma_ops = &hexagon_dma_ops;
  186. }