db8500.dtsi 6.3 KB

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  1. /*
  2. * Copyright 2012 Linaro Ltd
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. soc-u9500 {
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. compatible = "stericsson,db8500";
  17. interrupt-parent = <&intc>;
  18. ranges;
  19. intc: interrupt-controller@a0411000 {
  20. compatible = "arm,cortex-a9-gic";
  21. #interrupt-cells = <3>;
  22. #address-cells = <1>;
  23. interrupt-controller;
  24. interrupt-parent;
  25. reg = <0xa0411000 0x1000>,
  26. <0xa0410100 0x100>;
  27. };
  28. L2: l2-cache {
  29. compatible = "arm,pl310-cache";
  30. reg = <0xa0412000 0x1000>;
  31. interrupts = <0 13 4>;
  32. cache-unified;
  33. cache-level = <2>;
  34. };
  35. pmu {
  36. compatible = "arm,cortex-a9-pmu";
  37. interrupts = <0 7 0x4>;
  38. };
  39. timer@a0410600 {
  40. compatible = "arm,cortex-a9-twd-timer";
  41. reg = <0xa0410600 0x20>;
  42. interrupts = <1 13 0x304>;
  43. };
  44. rtc@80154000 {
  45. compatible = "stericsson,db8500-rtc";
  46. reg = <0x80154000 0x1000>;
  47. interrupts = <0 18 0x4>;
  48. };
  49. gpio0: gpio@8012e000 {
  50. compatible = "stericsson,db8500-gpio",
  51. "stmicroelectronics,nomadik-gpio";
  52. reg = <0x8012e000 0x80>;
  53. interrupts = <0 119 0x4>;
  54. supports-sleepmode;
  55. gpio-controller;
  56. };
  57. gpio1: gpio@8012e080 {
  58. compatible = "stericsson,db8500-gpio",
  59. "stmicroelectronics,nomadik-gpio";
  60. reg = <0x8012e080 0x80>;
  61. interrupts = <0 120 0x4>;
  62. supports-sleepmode;
  63. gpio-controller;
  64. };
  65. gpio2: gpio@8000e000 {
  66. compatible = "stericsson,db8500-gpio",
  67. "stmicroelectronics,nomadik-gpio";
  68. reg = <0x8000e000 0x80>;
  69. interrupts = <0 121 0x4>;
  70. supports-sleepmode;
  71. gpio-controller;
  72. };
  73. gpio3: gpio@8000e080 {
  74. compatible = "stericsson,db8500-gpio",
  75. "stmicroelectronics,nomadik-gpio";
  76. reg = <0x8000e080 0x80>;
  77. interrupts = <0 122 0x4>;
  78. supports-sleepmode;
  79. gpio-controller;
  80. };
  81. gpio4: gpio@8000e100 {
  82. compatible = "stericsson,db8500-gpio",
  83. "stmicroelectronics,nomadik-gpio";
  84. reg = <0x8000e100 0x80>;
  85. interrupts = <0 123 0x4>;
  86. supports-sleepmode;
  87. gpio-controller;
  88. };
  89. gpio5: gpio@8000e180 {
  90. compatible = "stericsson,db8500-gpio",
  91. "stmicroelectronics,nomadik-gpio";
  92. reg = <0x8000e180 0x80>;
  93. interrupts = <0 124 0x4>;
  94. supports-sleepmode;
  95. gpio-controller;
  96. };
  97. gpio6: gpio@8011e000 {
  98. compatible = "stericsson,db8500-gpio",
  99. "stmicroelectronics,nomadik-gpio";
  100. reg = <0x8011e000 0x80>;
  101. interrupts = <0 125 0x4>;
  102. supports-sleepmode;
  103. gpio-controller;
  104. };
  105. gpio7: gpio@8011e080 {
  106. compatible = "stericsson,db8500-gpio",
  107. "stmicroelectronics,nomadik-gpio";
  108. reg = <0x8011e080 0x80>;
  109. interrupts = <0 126 0x4>;
  110. supports-sleepmode;
  111. gpio-controller;
  112. };
  113. gpio8: gpio@a03fe000 {
  114. compatible = "stericsson,db8500-gpio",
  115. "stmicroelectronics,nomadik-gpio";
  116. reg = <0xa03fe000 0x80>;
  117. interrupts = <0 127 0x4>;
  118. supports-sleepmode;
  119. gpio-controller;
  120. };
  121. usb@a03e0000 {
  122. compatible = "stericsson,db8500-musb",
  123. "mentor,musb";
  124. reg = <0xa03e0000 0x10000>;
  125. interrupts = <0 23 0x4>;
  126. };
  127. dma-controller@801C0000 {
  128. compatible = "stericsson,db8500-dma40",
  129. "stericsson,dma40";
  130. reg = <0x801C0000 0x1000 0x40010000 0x800>;
  131. interrupts = <0 25 0x4>;
  132. };
  133. prcmu@80157000 {
  134. compatible = "stericsson,db8500-prcmu";
  135. reg = <0x80157000 0x1000>;
  136. interrupts = <46 47>;
  137. #address-cells = <1>;
  138. #size-cells = <0>;
  139. ab8500@5 {
  140. compatible = "stericsson,ab8500";
  141. reg = <5>; /* mailbox 5 is i2c */
  142. interrupts = <0 40 0x4>;
  143. };
  144. };
  145. i2c@80004000 {
  146. compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
  147. reg = <0x80004000 0x1000>;
  148. interrupts = <0 21 0x4>;
  149. #address-cells = <1>;
  150. #size-cells = <0>;
  151. };
  152. i2c@80122000 {
  153. compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
  154. reg = <0x80122000 0x1000>;
  155. interrupts = <0 22 0x4>;
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. };
  159. i2c@80128000 {
  160. compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
  161. reg = <0x80128000 0x1000>;
  162. interrupts = <0 55 0x4>;
  163. #address-cells = <1>;
  164. #size-cells = <0>;
  165. };
  166. i2c@80110000 {
  167. compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
  168. reg = <0x80110000 0x1000>;
  169. interrupts = <0 12 0x4>;
  170. #address-cells = <1>;
  171. #size-cells = <0>;
  172. };
  173. i2c@8012a000 {
  174. compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
  175. reg = <0x8012a000 0x1000>;
  176. interrupts = <0 51 0x4>;
  177. #address-cells = <1>;
  178. #size-cells = <0>;
  179. };
  180. ssp@80002000 {
  181. compatible = "arm,pl022", "arm,primecell";
  182. reg = <80002000 0x1000>;
  183. interrupts = <0 14 0x4>;
  184. #address-cells = <1>;
  185. #size-cells = <0>;
  186. status = "disabled";
  187. // Add one of these for each child device
  188. cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
  189. };
  190. uart@80120000 {
  191. compatible = "arm,pl011", "arm,primecell";
  192. reg = <0x80120000 0x1000>;
  193. interrupts = <0 11 0x4>;
  194. status = "disabled";
  195. };
  196. uart@80121000 {
  197. compatible = "arm,pl011", "arm,primecell";
  198. reg = <0x80121000 0x1000>;
  199. interrupts = <0 19 0x4>;
  200. status = "disabled";
  201. };
  202. uart@80007000 {
  203. compatible = "arm,pl011", "arm,primecell";
  204. reg = <0x80007000 0x1000>;
  205. interrupts = <0 26 0x4>;
  206. status = "disabled";
  207. };
  208. sdi@80126000 {
  209. compatible = "arm,pl18x", "arm,primecell";
  210. reg = <0x80126000 0x1000>;
  211. interrupts = <0 60 0x4>;
  212. status = "disabled";
  213. };
  214. sdi@80118000 {
  215. compatible = "arm,pl18x", "arm,primecell";
  216. reg = <0x80118000 0x1000>;
  217. interrupts = <0 50 0x4>;
  218. status = "disabled";
  219. };
  220. sdi@80005000 {
  221. compatible = "arm,pl18x", "arm,primecell";
  222. reg = <0x80005000 0x1000>;
  223. interrupts = <0 41 0x4>;
  224. status = "disabled";
  225. };
  226. sdi@80119000 {
  227. compatible = "arm,pl18x", "arm,primecell";
  228. reg = <0x80119000 0x1000>;
  229. interrupts = <0 59 0x4>;
  230. status = "disabled";
  231. };
  232. sdi@80114000 {
  233. compatible = "arm,pl18x", "arm,primecell";
  234. reg = <0x80114000 0x1000>;
  235. interrupts = <0 99 0x4>;
  236. status = "disabled";
  237. };
  238. sdi@80008000 {
  239. compatible = "arm,pl18x", "arm,primecell";
  240. reg = <0x80114000 0x1000>;
  241. interrupts = <0 100 0x4>;
  242. status = "disabled";
  243. };
  244. };
  245. };