at91sam9g45.dtsi 5.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248
  1. /*
  2. * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
  3. * applies to AT91SAM9G45, AT91SAM9M10,
  4. * AT91SAM9G46, AT91SAM9M11 SoC
  5. *
  6. * Copyright (C) 2011 Atmel,
  7. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9G45 family SoC";
  14. compatible = "atmel,at91sam9g45";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. serial4 = &usart3;
  22. gpio0 = &pioA;
  23. gpio1 = &pioB;
  24. gpio2 = &pioC;
  25. gpio3 = &pioD;
  26. gpio4 = &pioE;
  27. tcb0 = &tcb0;
  28. tcb1 = &tcb1;
  29. };
  30. cpus {
  31. cpu@0 {
  32. compatible = "arm,arm926ejs";
  33. };
  34. };
  35. memory {
  36. reg = <0x70000000 0x10000000>;
  37. };
  38. ahb {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. apb {
  44. compatible = "simple-bus";
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. ranges;
  48. aic: interrupt-controller@fffff000 {
  49. #interrupt-cells = <2>;
  50. compatible = "atmel,at91rm9200-aic";
  51. interrupt-controller;
  52. interrupt-parent;
  53. reg = <0xfffff000 0x200>;
  54. };
  55. ramc0: ramc@ffffe400 {
  56. compatible = "atmel,at91sam9g45-ddramc";
  57. reg = <0xffffe400 0x200
  58. 0xffffe600 0x200>;
  59. };
  60. pmc: pmc@fffffc00 {
  61. compatible = "atmel,at91rm9200-pmc";
  62. reg = <0xfffffc00 0x100>;
  63. };
  64. rstc@fffffd00 {
  65. compatible = "atmel,at91sam9g45-rstc";
  66. reg = <0xfffffd00 0x10>;
  67. };
  68. pit: timer@fffffd30 {
  69. compatible = "atmel,at91sam9260-pit";
  70. reg = <0xfffffd30 0xf>;
  71. interrupts = <1 4>;
  72. };
  73. shdwc@fffffd10 {
  74. compatible = "atmel,at91sam9rl-shdwc";
  75. reg = <0xfffffd10 0x10>;
  76. };
  77. tcb0: timer@fff7c000 {
  78. compatible = "atmel,at91rm9200-tcb";
  79. reg = <0xfff7c000 0x100>;
  80. interrupts = <18 4>;
  81. };
  82. tcb1: timer@fffd4000 {
  83. compatible = "atmel,at91rm9200-tcb";
  84. reg = <0xfffd4000 0x100>;
  85. interrupts = <18 4>;
  86. };
  87. dma: dma-controller@ffffec00 {
  88. compatible = "atmel,at91sam9g45-dma";
  89. reg = <0xffffec00 0x200>;
  90. interrupts = <21 4>;
  91. };
  92. pioA: gpio@fffff200 {
  93. compatible = "atmel,at91rm9200-gpio";
  94. reg = <0xfffff200 0x100>;
  95. interrupts = <2 4>;
  96. #gpio-cells = <2>;
  97. gpio-controller;
  98. interrupt-controller;
  99. };
  100. pioB: gpio@fffff400 {
  101. compatible = "atmel,at91rm9200-gpio";
  102. reg = <0xfffff400 0x100>;
  103. interrupts = <3 4>;
  104. #gpio-cells = <2>;
  105. gpio-controller;
  106. interrupt-controller;
  107. };
  108. pioC: gpio@fffff600 {
  109. compatible = "atmel,at91rm9200-gpio";
  110. reg = <0xfffff600 0x100>;
  111. interrupts = <4 4>;
  112. #gpio-cells = <2>;
  113. gpio-controller;
  114. interrupt-controller;
  115. };
  116. pioD: gpio@fffff800 {
  117. compatible = "atmel,at91rm9200-gpio";
  118. reg = <0xfffff800 0x100>;
  119. interrupts = <5 4>;
  120. #gpio-cells = <2>;
  121. gpio-controller;
  122. interrupt-controller;
  123. };
  124. pioE: gpio@fffffa00 {
  125. compatible = "atmel,at91rm9200-gpio";
  126. reg = <0xfffffa00 0x100>;
  127. interrupts = <5 4>;
  128. #gpio-cells = <2>;
  129. gpio-controller;
  130. interrupt-controller;
  131. };
  132. dbgu: serial@ffffee00 {
  133. compatible = "atmel,at91sam9260-usart";
  134. reg = <0xffffee00 0x200>;
  135. interrupts = <1 4>;
  136. status = "disabled";
  137. };
  138. usart0: serial@fff8c000 {
  139. compatible = "atmel,at91sam9260-usart";
  140. reg = <0xfff8c000 0x200>;
  141. interrupts = <7 4>;
  142. atmel,use-dma-rx;
  143. atmel,use-dma-tx;
  144. status = "disabled";
  145. };
  146. usart1: serial@fff90000 {
  147. compatible = "atmel,at91sam9260-usart";
  148. reg = <0xfff90000 0x200>;
  149. interrupts = <8 4>;
  150. atmel,use-dma-rx;
  151. atmel,use-dma-tx;
  152. status = "disabled";
  153. };
  154. usart2: serial@fff94000 {
  155. compatible = "atmel,at91sam9260-usart";
  156. reg = <0xfff94000 0x200>;
  157. interrupts = <9 4>;
  158. atmel,use-dma-rx;
  159. atmel,use-dma-tx;
  160. status = "disabled";
  161. };
  162. usart3: serial@fff98000 {
  163. compatible = "atmel,at91sam9260-usart";
  164. reg = <0xfff98000 0x200>;
  165. interrupts = <10 4>;
  166. atmel,use-dma-rx;
  167. atmel,use-dma-tx;
  168. status = "disabled";
  169. };
  170. macb0: ethernet@fffbc000 {
  171. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  172. reg = <0xfffbc000 0x100>;
  173. interrupts = <25 4>;
  174. status = "disabled";
  175. };
  176. };
  177. nand0: nand@40000000 {
  178. compatible = "atmel,at91rm9200-nand";
  179. #address-cells = <1>;
  180. #size-cells = <1>;
  181. reg = <0x40000000 0x10000000
  182. 0xffffe200 0x200
  183. >;
  184. atmel,nand-addr-offset = <21>;
  185. atmel,nand-cmd-offset = <22>;
  186. gpios = <&pioC 8 0
  187. &pioC 14 0
  188. 0
  189. >;
  190. status = "disabled";
  191. };
  192. usb0: ohci@00700000 {
  193. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  194. reg = <0x00700000 0x100000>;
  195. interrupts = <22 4>;
  196. status = "disabled";
  197. };
  198. usb1: ehci@00800000 {
  199. compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  200. reg = <0x00800000 0x100000>;
  201. interrupts = <22 4>;
  202. status = "disabled";
  203. };
  204. };
  205. i2c@0 {
  206. compatible = "i2c-gpio";
  207. gpios = <&pioA 20 0 /* sda */
  208. &pioA 21 0 /* scl */
  209. >;
  210. i2c-gpio,sda-open-drain;
  211. i2c-gpio,scl-open-drain;
  212. i2c-gpio,delay-us = <5>; /* ~100 kHz */
  213. #address-cells = <1>;
  214. #size-cells = <0>;
  215. status = "disabled";
  216. };
  217. };