DMA-attributes.txt 1.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
  1. DMA attributes
  2. ==============
  3. This document describes the semantics of the DMA attributes that are
  4. defined in linux/dma-attrs.h.
  5. DMA_ATTR_WRITE_BARRIER
  6. ----------------------
  7. DMA_ATTR_WRITE_BARRIER is a (write) barrier attribute for DMA. DMA
  8. to a memory region with the DMA_ATTR_WRITE_BARRIER attribute forces
  9. all pending DMA writes to complete, and thus provides a mechanism to
  10. strictly order DMA from a device across all intervening busses and
  11. bridges. This barrier is not specific to a particular type of
  12. interconnect, it applies to the system as a whole, and so its
  13. implementation must account for the idiosyncracies of the system all
  14. the way from the DMA device to memory.
  15. As an example of a situation where DMA_ATTR_WRITE_BARRIER would be
  16. useful, suppose that a device does a DMA write to indicate that data is
  17. ready and available in memory. The DMA of the "completion indication"
  18. could race with data DMA. Mapping the memory used for completion
  19. indications with DMA_ATTR_WRITE_BARRIER would prevent the race.
  20. DMA_ATTR_WEAK_ORDERING
  21. ----------------------
  22. DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
  23. may be weakly ordered, that is that reads and writes may pass each other.
  24. Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
  25. those that do not will simply ignore the attribute and exhibit default
  26. behavior.
  27. DMA_ATTR_WRITE_COMBINE
  28. ----------------------
  29. DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
  30. buffered to improve performance.
  31. Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
  32. those that do not will simply ignore the attribute and exhibit default
  33. behavior.
  34. DMA_ATTR_NON_CONSISTENT
  35. -----------------------
  36. DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
  37. consistent or non-consistent memory as it sees fit. By using this API,
  38. you are guaranteeing to the platform that you have all the correct and
  39. necessary sync points for this memory in the driver.