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- DMA attributes
- ==============
- This document describes the semantics of the DMA attributes that are
- defined in linux/dma-attrs.h.
- DMA_ATTR_WRITE_BARRIER
- ----------------------
- DMA_ATTR_WRITE_BARRIER is a (write) barrier attribute for DMA. DMA
- to a memory region with the DMA_ATTR_WRITE_BARRIER attribute forces
- all pending DMA writes to complete, and thus provides a mechanism to
- strictly order DMA from a device across all intervening busses and
- bridges. This barrier is not specific to a particular type of
- interconnect, it applies to the system as a whole, and so its
- implementation must account for the idiosyncracies of the system all
- the way from the DMA device to memory.
- As an example of a situation where DMA_ATTR_WRITE_BARRIER would be
- useful, suppose that a device does a DMA write to indicate that data is
- ready and available in memory. The DMA of the "completion indication"
- could race with data DMA. Mapping the memory used for completion
- indications with DMA_ATTR_WRITE_BARRIER would prevent the race.
- DMA_ATTR_WEAK_ORDERING
- ----------------------
- DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
- may be weakly ordered, that is that reads and writes may pass each other.
- Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
- those that do not will simply ignore the attribute and exhibit default
- behavior.
- DMA_ATTR_WRITE_COMBINE
- ----------------------
- DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
- buffered to improve performance.
- Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
- those that do not will simply ignore the attribute and exhibit default
- behavior.
- DMA_ATTR_NON_CONSISTENT
- -----------------------
- DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
- consistent or non-consistent memory as it sees fit. By using this API,
- you are guaranteeing to the platform that you have all the correct and
- necessary sync points for this memory in the driver.
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