mxser.c 82 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
  5. *
  6. * This code is loosely based on the Linux serial driver, written by
  7. * Linus Torvalds, Theodore T'so and others.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. * Original release 10/26/00
  24. *
  25. * 02/06/01 Support MOXA Industio family boards.
  26. * 02/06/01 Support TIOCGICOUNT.
  27. * 02/06/01 Fix the problem for connecting to serial mouse.
  28. * 02/06/01 Fix the problem for H/W flow control.
  29. * 02/06/01 Fix the compling warning when CONFIG_PCI
  30. * don't be defined.
  31. *
  32. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  33. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  34. * - Fixed x86_64 cleanness
  35. * - Fixed sleep with spinlock held in mxser_send_break
  36. */
  37. #include <linux/module.h>
  38. #include <linux/errno.h>
  39. #include <linux/signal.h>
  40. #include <linux/sched.h>
  41. #include <linux/timer.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/tty.h>
  44. #include <linux/tty_flip.h>
  45. #include <linux/serial.h>
  46. #include <linux/serial_reg.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/gfp.h>
  52. #include <linux/ioport.h>
  53. #include <linux/mm.h>
  54. #include <linux/delay.h>
  55. #include <linux/pci.h>
  56. #include <linux/bitops.h>
  57. #include <asm/system.h>
  58. #include <asm/io.h>
  59. #include <asm/irq.h>
  60. #include <asm/uaccess.h>
  61. #include "mxser.h"
  62. #define MXSER_VERSION "1.8"
  63. #define MXSERMAJOR 174
  64. #define MXSERCUMAJOR 175
  65. #define MXSER_EVENT_TXLOW 1
  66. #define MXSER_EVENT_HANGUP 2
  67. #define MXSER_BOARDS 4 /* Max. boards */
  68. #define MXSER_PORTS 32 /* Max. ports */
  69. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  70. #define MXSER_ISR_PASS_LIMIT 256
  71. #define MXSER_ERR_IOADDR -1
  72. #define MXSER_ERR_IRQ -2
  73. #define MXSER_ERR_IRQ_CONFLIT -3
  74. #define MXSER_ERR_VECTOR -4
  75. #define WAKEUP_CHARS 256
  76. #define UART_MCR_AFE 0x20
  77. #define UART_LSR_SPECIAL 0x1E
  78. #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
  79. #define C168_ASIC_ID 1
  80. #define C104_ASIC_ID 2
  81. #define C102_ASIC_ID 0xB
  82. #define CI132_ASIC_ID 4
  83. #define CI134_ASIC_ID 3
  84. #define CI104J_ASIC_ID 5
  85. enum {
  86. MXSER_BOARD_C168_ISA = 1,
  87. MXSER_BOARD_C104_ISA,
  88. MXSER_BOARD_CI104J,
  89. MXSER_BOARD_C168_PCI,
  90. MXSER_BOARD_C104_PCI,
  91. MXSER_BOARD_C102_ISA,
  92. MXSER_BOARD_CI132,
  93. MXSER_BOARD_CI134,
  94. MXSER_BOARD_CP132,
  95. MXSER_BOARD_CP114,
  96. MXSER_BOARD_CT114,
  97. MXSER_BOARD_CP102,
  98. MXSER_BOARD_CP104U,
  99. MXSER_BOARD_CP168U,
  100. MXSER_BOARD_CP132U,
  101. MXSER_BOARD_CP134U,
  102. MXSER_BOARD_CP104JU,
  103. MXSER_BOARD_RC7000,
  104. MXSER_BOARD_CP118U,
  105. MXSER_BOARD_CP102UL,
  106. MXSER_BOARD_CP102U,
  107. };
  108. static char *mxser_brdname[] = {
  109. "C168 series",
  110. "C104 series",
  111. "CI-104J series",
  112. "C168H/PCI series",
  113. "C104H/PCI series",
  114. "C102 series",
  115. "CI-132 series",
  116. "CI-134 series",
  117. "CP-132 series",
  118. "CP-114 series",
  119. "CT-114 series",
  120. "CP-102 series",
  121. "CP-104U series",
  122. "CP-168U series",
  123. "CP-132U series",
  124. "CP-134U series",
  125. "CP-104JU series",
  126. "Moxa UC7000 Serial",
  127. "CP-118U series",
  128. "CP-102UL series",
  129. "CP-102U series",
  130. };
  131. static int mxser_numports[] = {
  132. 8, /* C168-ISA */
  133. 4, /* C104-ISA */
  134. 4, /* CI104J */
  135. 8, /* C168-PCI */
  136. 4, /* C104-PCI */
  137. 2, /* C102-ISA */
  138. 2, /* CI132 */
  139. 4, /* CI134 */
  140. 2, /* CP132 */
  141. 4, /* CP114 */
  142. 4, /* CT114 */
  143. 2, /* CP102 */
  144. 4, /* CP104U */
  145. 8, /* CP168U */
  146. 2, /* CP132U */
  147. 4, /* CP134U */
  148. 4, /* CP104JU */
  149. 8, /* RC7000 */
  150. 8, /* CP118U */
  151. 2, /* CP102UL */
  152. 2, /* CP102U */
  153. };
  154. #define UART_TYPE_NUM 2
  155. static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
  156. MOXA_MUST_MU150_HWID,
  157. MOXA_MUST_MU860_HWID
  158. };
  159. /* This is only for PCI */
  160. #define UART_INFO_NUM 3
  161. struct mxpciuart_info {
  162. int type;
  163. int tx_fifo;
  164. int rx_fifo;
  165. int xmit_fifo_size;
  166. int rx_high_water;
  167. int rx_trigger;
  168. int rx_low_water;
  169. long max_baud;
  170. };
  171. static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
  172. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  173. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  174. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  175. };
  176. #ifdef CONFIG_PCI
  177. static struct pci_device_id mxser_pcibrds[] = {
  178. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
  179. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
  180. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
  181. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
  182. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
  183. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
  184. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
  185. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
  186. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
  187. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
  188. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
  189. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
  190. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
  191. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
  192. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
  193. {0}
  194. };
  195. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  196. #endif
  197. typedef struct _moxa_pci_info {
  198. unsigned short busNum;
  199. unsigned short devNum;
  200. struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
  201. } moxa_pci_info;
  202. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  203. static int ttymajor = MXSERMAJOR;
  204. static int calloutmajor = MXSERCUMAJOR;
  205. static int verbose = 0;
  206. /* Variables for insmod */
  207. MODULE_AUTHOR("Casper Yang");
  208. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  209. module_param_array(ioaddr, int, NULL, 0);
  210. module_param(ttymajor, int, 0);
  211. module_param(calloutmajor, int, 0);
  212. module_param(verbose, bool, 0);
  213. MODULE_LICENSE("GPL");
  214. struct mxser_log {
  215. int tick;
  216. unsigned long rxcnt[MXSER_PORTS];
  217. unsigned long txcnt[MXSER_PORTS];
  218. };
  219. struct mxser_mon {
  220. unsigned long rxcnt;
  221. unsigned long txcnt;
  222. unsigned long up_rxcnt;
  223. unsigned long up_txcnt;
  224. int modem_status;
  225. unsigned char hold_reason;
  226. };
  227. struct mxser_mon_ext {
  228. unsigned long rx_cnt[32];
  229. unsigned long tx_cnt[32];
  230. unsigned long up_rxcnt[32];
  231. unsigned long up_txcnt[32];
  232. int modem_status[32];
  233. long baudrate[32];
  234. int databits[32];
  235. int stopbits[32];
  236. int parity[32];
  237. int flowctrl[32];
  238. int fifo[32];
  239. int iftype[32];
  240. };
  241. struct mxser_hwconf {
  242. int board_type;
  243. int ports;
  244. int irq;
  245. int vector;
  246. int vector_mask;
  247. int uart_type;
  248. int ioaddr[MXSER_PORTS_PER_BOARD];
  249. int baud_base[MXSER_PORTS_PER_BOARD];
  250. moxa_pci_info pciInfo;
  251. int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
  252. int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
  253. int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
  254. };
  255. struct mxser_struct {
  256. int port;
  257. int base; /* port base address */
  258. int irq; /* port using irq no. */
  259. int vector; /* port irq vector */
  260. int vectormask; /* port vector mask */
  261. int rx_high_water;
  262. int rx_trigger; /* Rx fifo trigger level */
  263. int rx_low_water;
  264. int baud_base; /* max. speed */
  265. int flags; /* defined in tty.h */
  266. int type; /* UART type */
  267. struct tty_struct *tty;
  268. int read_status_mask;
  269. int ignore_status_mask;
  270. int xmit_fifo_size;
  271. int custom_divisor;
  272. int x_char; /* xon/xoff character */
  273. int close_delay;
  274. unsigned short closing_wait;
  275. int IER; /* Interrupt Enable Register */
  276. int MCR; /* Modem control register */
  277. unsigned long event;
  278. int count; /* # of fd on device */
  279. int blocked_open; /* # of blocked opens */
  280. unsigned char *xmit_buf;
  281. int xmit_head;
  282. int xmit_tail;
  283. int xmit_cnt;
  284. struct work_struct tqueue;
  285. struct ktermios normal_termios;
  286. struct ktermios callout_termios;
  287. wait_queue_head_t open_wait;
  288. wait_queue_head_t close_wait;
  289. wait_queue_head_t delta_msr_wait;
  290. struct async_icount icount; /* kernel counters for the 4 input interrupts */
  291. int timeout;
  292. int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
  293. int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
  294. int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
  295. unsigned char stop_rx;
  296. unsigned char ldisc_stop_rx;
  297. long realbaud;
  298. struct mxser_mon mon_data;
  299. unsigned char err_shadow;
  300. spinlock_t slock;
  301. };
  302. struct mxser_mstatus {
  303. tcflag_t cflag;
  304. int cts;
  305. int dsr;
  306. int ri;
  307. int dcd;
  308. };
  309. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  310. static int mxserBoardCAP[MXSER_BOARDS] = {
  311. 0, 0, 0, 0
  312. /* 0x180, 0x280, 0x200, 0x320 */
  313. };
  314. static struct tty_driver *mxvar_sdriver;
  315. static struct mxser_struct mxvar_table[MXSER_PORTS];
  316. static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
  317. static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
  318. static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
  319. static struct mxser_log mxvar_log;
  320. static int mxvar_diagflag;
  321. static unsigned char mxser_msr[MXSER_PORTS + 1];
  322. static struct mxser_mon_ext mon_data_ext;
  323. static int mxser_set_baud_method[MXSER_PORTS + 1];
  324. static spinlock_t gm_lock;
  325. /*
  326. * This is used to figure out the divisor speeds and the timeouts
  327. */
  328. static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
  329. /*
  330. * static functions:
  331. */
  332. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
  333. static int mxser_init(void);
  334. /* static void mxser_poll(unsigned long); */
  335. static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
  336. static void mxser_do_softint(struct work_struct *);
  337. static int mxser_open(struct tty_struct *, struct file *);
  338. static void mxser_close(struct tty_struct *, struct file *);
  339. static int mxser_write(struct tty_struct *, const unsigned char *, int);
  340. static int mxser_write_room(struct tty_struct *);
  341. static void mxser_flush_buffer(struct tty_struct *);
  342. static int mxser_chars_in_buffer(struct tty_struct *);
  343. static void mxser_flush_chars(struct tty_struct *);
  344. static void mxser_put_char(struct tty_struct *, unsigned char);
  345. static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
  346. static int mxser_ioctl_special(unsigned int, void __user *);
  347. static void mxser_throttle(struct tty_struct *);
  348. static void mxser_unthrottle(struct tty_struct *);
  349. static void mxser_set_termios(struct tty_struct *, struct ktermios *);
  350. static void mxser_stop(struct tty_struct *);
  351. static void mxser_start(struct tty_struct *);
  352. static void mxser_hangup(struct tty_struct *);
  353. static void mxser_rs_break(struct tty_struct *, int);
  354. static irqreturn_t mxser_interrupt(int, void *);
  355. static void mxser_receive_chars(struct mxser_struct *, int *);
  356. static void mxser_transmit_chars(struct mxser_struct *);
  357. static void mxser_check_modem_status(struct mxser_struct *, int);
  358. static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
  359. static int mxser_startup(struct mxser_struct *);
  360. static void mxser_shutdown(struct mxser_struct *);
  361. static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
  362. static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
  363. static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
  364. static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
  365. static void mxser_send_break(struct mxser_struct *, int);
  366. static int mxser_tiocmget(struct tty_struct *, struct file *);
  367. static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
  368. static int mxser_set_baud(struct mxser_struct *info, long newspd);
  369. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
  370. static void mxser_startrx(struct tty_struct *tty);
  371. static void mxser_stoprx(struct tty_struct *tty);
  372. #ifdef CONFIG_PCI
  373. static int CheckIsMoxaMust(int io)
  374. {
  375. u8 oldmcr, hwid;
  376. int i;
  377. outb(0, io + UART_LCR);
  378. DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
  379. oldmcr = inb(io + UART_MCR);
  380. outb(0, io + UART_MCR);
  381. SET_MOXA_MUST_XON1_VALUE(io, 0x11);
  382. if ((hwid = inb(io + UART_MCR)) != 0) {
  383. outb(oldmcr, io + UART_MCR);
  384. return MOXA_OTHER_UART;
  385. }
  386. GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
  387. for (i = 0; i < UART_TYPE_NUM; i++) {
  388. if (hwid == Gmoxa_uart_id[i])
  389. return (int)hwid;
  390. }
  391. return MOXA_OTHER_UART;
  392. }
  393. #endif
  394. /* above is modified by Victor Yu. 08-15-2002 */
  395. static const struct tty_operations mxser_ops = {
  396. .open = mxser_open,
  397. .close = mxser_close,
  398. .write = mxser_write,
  399. .put_char = mxser_put_char,
  400. .flush_chars = mxser_flush_chars,
  401. .write_room = mxser_write_room,
  402. .chars_in_buffer = mxser_chars_in_buffer,
  403. .flush_buffer = mxser_flush_buffer,
  404. .ioctl = mxser_ioctl,
  405. .throttle = mxser_throttle,
  406. .unthrottle = mxser_unthrottle,
  407. .set_termios = mxser_set_termios,
  408. .stop = mxser_stop,
  409. .start = mxser_start,
  410. .hangup = mxser_hangup,
  411. .break_ctl = mxser_rs_break,
  412. .wait_until_sent = mxser_wait_until_sent,
  413. .tiocmget = mxser_tiocmget,
  414. .tiocmset = mxser_tiocmset,
  415. };
  416. /*
  417. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  418. */
  419. static int __init mxser_module_init(void)
  420. {
  421. int ret;
  422. if (verbose)
  423. printk(KERN_DEBUG "Loading module mxser ...\n");
  424. ret = mxser_init();
  425. if (verbose)
  426. printk(KERN_DEBUG "Done.\n");
  427. return ret;
  428. }
  429. static void __exit mxser_module_exit(void)
  430. {
  431. int i, err;
  432. if (verbose)
  433. printk(KERN_DEBUG "Unloading module mxser ...\n");
  434. err = tty_unregister_driver(mxvar_sdriver);
  435. if (!err)
  436. put_tty_driver(mxvar_sdriver);
  437. else
  438. printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
  439. for (i = 0; i < MXSER_BOARDS; i++) {
  440. struct pci_dev *pdev;
  441. if (mxsercfg[i].board_type == -1)
  442. continue;
  443. else {
  444. pdev = mxsercfg[i].pciInfo.pdev;
  445. free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
  446. if (pdev != NULL) { /* PCI */
  447. release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
  448. release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
  449. pci_dev_put(pdev);
  450. } else {
  451. release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
  452. release_region(mxsercfg[i].vector, 1);
  453. }
  454. }
  455. }
  456. if (verbose)
  457. printk(KERN_DEBUG "Done.\n");
  458. }
  459. static void process_txrx_fifo(struct mxser_struct *info)
  460. {
  461. int i;
  462. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  463. info->rx_trigger = 1;
  464. info->rx_high_water = 1;
  465. info->rx_low_water = 1;
  466. info->xmit_fifo_size = 1;
  467. } else {
  468. for (i = 0; i < UART_INFO_NUM; i++) {
  469. if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
  470. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  471. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  472. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  473. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  474. break;
  475. }
  476. }
  477. }
  478. }
  479. static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
  480. {
  481. struct mxser_struct *info;
  482. int retval;
  483. int i, n;
  484. n = board * MXSER_PORTS_PER_BOARD;
  485. info = &mxvar_table[n];
  486. /*if (verbose) */ {
  487. printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
  488. n, n + hwconf->ports - 1);
  489. printk(" max. baud rate = %d bps.\n",
  490. hwconf->MaxCanSetBaudRate[0]);
  491. }
  492. for (i = 0; i < hwconf->ports; i++, n++, info++) {
  493. info->port = n;
  494. info->base = hwconf->ioaddr[i];
  495. info->irq = hwconf->irq;
  496. info->vector = hwconf->vector;
  497. info->vectormask = hwconf->vector_mask;
  498. info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
  499. info->stop_rx = 0;
  500. info->ldisc_stop_rx = 0;
  501. info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
  502. /* Enhance mode enabled here */
  503. if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
  504. ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
  505. }
  506. info->flags = ASYNC_SHARE_IRQ;
  507. info->type = hwconf->uart_type;
  508. info->baud_base = hwconf->baud_base[i];
  509. info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
  510. process_txrx_fifo(info);
  511. info->custom_divisor = hwconf->baud_base[i] * 16;
  512. info->close_delay = 5 * HZ / 10;
  513. info->closing_wait = 30 * HZ;
  514. INIT_WORK(&info->tqueue, mxser_do_softint);
  515. info->normal_termios = mxvar_sdriver->init_termios;
  516. init_waitqueue_head(&info->open_wait);
  517. init_waitqueue_head(&info->close_wait);
  518. init_waitqueue_head(&info->delta_msr_wait);
  519. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  520. info->err_shadow = 0;
  521. spin_lock_init(&info->slock);
  522. }
  523. /*
  524. * Allocate the IRQ if necessary
  525. */
  526. /* before set INT ISR, disable all int */
  527. for (i = 0; i < hwconf->ports; i++) {
  528. outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
  529. hwconf->ioaddr[i] + UART_IER);
  530. }
  531. n = board * MXSER_PORTS_PER_BOARD;
  532. info = &mxvar_table[n];
  533. retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
  534. "mxser", info);
  535. if (retval) {
  536. printk(KERN_ERR "Board %d: %s",
  537. board, mxser_brdname[hwconf->board_type - 1]);
  538. printk(" Request irq failed, IRQ (%d) may conflict with"
  539. " another device.\n", info->irq);
  540. return retval;
  541. }
  542. return 0;
  543. }
  544. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
  545. {
  546. mxsercfg[board] = *hwconf;
  547. }
  548. #ifdef CONFIG_PCI
  549. static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
  550. {
  551. int i, j;
  552. /* unsigned int val; */
  553. unsigned int ioaddress;
  554. struct pci_dev *pdev = hwconf->pciInfo.pdev;
  555. /* io address */
  556. hwconf->board_type = board_type;
  557. hwconf->ports = mxser_numports[board_type - 1];
  558. ioaddress = pci_resource_start(pdev, 2);
  559. request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
  560. "mxser(IO)");
  561. for (i = 0; i < hwconf->ports; i++)
  562. hwconf->ioaddr[i] = ioaddress + 8 * i;
  563. /* vector */
  564. ioaddress = pci_resource_start(pdev, 3);
  565. request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
  566. "mxser(vector)");
  567. hwconf->vector = ioaddress;
  568. /* irq */
  569. hwconf->irq = hwconf->pciInfo.pdev->irq;
  570. hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
  571. hwconf->uart_type = PORT_16550A;
  572. hwconf->vector_mask = 0;
  573. for (i = 0; i < hwconf->ports; i++) {
  574. for (j = 0; j < UART_INFO_NUM; j++) {
  575. if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
  576. hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
  577. /* exception....CP-102 */
  578. if (board_type == MXSER_BOARD_CP102)
  579. hwconf->MaxCanSetBaudRate[i] = 921600;
  580. break;
  581. }
  582. }
  583. }
  584. if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
  585. for (i = 0; i < hwconf->ports; i++) {
  586. if (i < 4)
  587. hwconf->opmode_ioaddr[i] = ioaddress + 4;
  588. else
  589. hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
  590. }
  591. outb(0, ioaddress + 4); /* default set to RS232 mode */
  592. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  593. }
  594. for (i = 0; i < hwconf->ports; i++) {
  595. hwconf->vector_mask |= (1 << i);
  596. hwconf->baud_base[i] = 921600;
  597. }
  598. return 0;
  599. }
  600. #endif
  601. static int mxser_init(void)
  602. {
  603. int i, m, retval, b, n;
  604. struct pci_dev *pdev = NULL;
  605. int index;
  606. unsigned char busnum, devnum;
  607. struct mxser_hwconf hwconf;
  608. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  609. if (!mxvar_sdriver)
  610. return -ENOMEM;
  611. spin_lock_init(&gm_lock);
  612. for (i = 0; i < MXSER_BOARDS; i++) {
  613. mxsercfg[i].board_type = -1;
  614. }
  615. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  616. MXSER_VERSION);
  617. /* Initialize the tty_driver structure */
  618. memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
  619. mxvar_sdriver->owner = THIS_MODULE;
  620. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  621. mxvar_sdriver->name = "ttyMI";
  622. mxvar_sdriver->major = ttymajor;
  623. mxvar_sdriver->minor_start = 0;
  624. mxvar_sdriver->num = MXSER_PORTS + 1;
  625. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  626. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  627. mxvar_sdriver->init_termios = tty_std_termios;
  628. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  629. mxvar_sdriver->init_termios.c_ispeed = 9600;
  630. mxvar_sdriver->init_termios.c_ospeed = 9600;
  631. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
  632. tty_set_operations(mxvar_sdriver, &mxser_ops);
  633. mxvar_sdriver->ttys = mxvar_tty;
  634. mxvar_sdriver->termios = mxvar_termios;
  635. mxvar_sdriver->termios_locked = mxvar_termios_locked;
  636. mxvar_diagflag = 0;
  637. memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
  638. memset(&mxvar_log, 0, sizeof(struct mxser_log));
  639. memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
  640. memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
  641. memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
  642. memset(&hwconf, 0, sizeof(struct mxser_hwconf));
  643. m = 0;
  644. /* Start finding ISA boards here */
  645. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  646. int cap;
  647. if (!(cap = mxserBoardCAP[b]))
  648. continue;
  649. retval = mxser_get_ISA_conf(cap, &hwconf);
  650. if (retval != 0)
  651. printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
  652. mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
  653. if (retval <= 0) {
  654. if (retval == MXSER_ERR_IRQ)
  655. printk(KERN_ERR "Invalid interrupt number, "
  656. "board not configured\n");
  657. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  658. printk(KERN_ERR "Invalid interrupt number, "
  659. "board not configured\n");
  660. else if (retval == MXSER_ERR_VECTOR)
  661. printk(KERN_ERR "Invalid interrupt vector, "
  662. "board not configured\n");
  663. else if (retval == MXSER_ERR_IOADDR)
  664. printk(KERN_ERR "Invalid I/O address, "
  665. "board not configured\n");
  666. continue;
  667. }
  668. hwconf.pciInfo.busNum = 0;
  669. hwconf.pciInfo.devNum = 0;
  670. hwconf.pciInfo.pdev = NULL;
  671. mxser_getcfg(m, &hwconf);
  672. /*
  673. * init mxsercfg first,
  674. * or mxsercfg data is not correct on ISR.
  675. */
  676. /* mxser_initbrd will hook ISR. */
  677. if (mxser_initbrd(m, &hwconf) < 0)
  678. continue;
  679. m++;
  680. }
  681. /* Start finding ISA boards from module arg */
  682. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  683. int cap;
  684. if (!(cap = ioaddr[b]))
  685. continue;
  686. retval = mxser_get_ISA_conf(cap, &hwconf);
  687. if (retval != 0)
  688. printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
  689. mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
  690. if (retval <= 0) {
  691. if (retval == MXSER_ERR_IRQ)
  692. printk(KERN_ERR "Invalid interrupt number, "
  693. "board not configured\n");
  694. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  695. printk(KERN_ERR "Invalid interrupt number, "
  696. "board not configured\n");
  697. else if (retval == MXSER_ERR_VECTOR)
  698. printk(KERN_ERR "Invalid interrupt vector, "
  699. "board not configured\n");
  700. else if (retval == MXSER_ERR_IOADDR)
  701. printk(KERN_ERR "Invalid I/O address, "
  702. "board not configured\n");
  703. continue;
  704. }
  705. hwconf.pciInfo.busNum = 0;
  706. hwconf.pciInfo.devNum = 0;
  707. hwconf.pciInfo.pdev = NULL;
  708. mxser_getcfg(m, &hwconf);
  709. /*
  710. * init mxsercfg first,
  711. * or mxsercfg data is not correct on ISR.
  712. */
  713. /* mxser_initbrd will hook ISR. */
  714. if (mxser_initbrd(m, &hwconf) < 0)
  715. continue;
  716. m++;
  717. }
  718. /* start finding PCI board here */
  719. #ifdef CONFIG_PCI
  720. n = ARRAY_SIZE(mxser_pcibrds) - 1;
  721. index = 0;
  722. b = 0;
  723. while (b < n) {
  724. pdev = pci_get_device(mxser_pcibrds[b].vendor,
  725. mxser_pcibrds[b].device, pdev);
  726. if (pdev == NULL) {
  727. b++;
  728. continue;
  729. }
  730. hwconf.pciInfo.busNum = busnum = pdev->bus->number;
  731. hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
  732. hwconf.pciInfo.pdev = pdev;
  733. printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
  734. mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
  735. busnum, devnum >> 3);
  736. index++;
  737. if (m >= MXSER_BOARDS)
  738. printk(KERN_ERR
  739. "Too many Smartio/Industio family boards find "
  740. "(maximum %d), board not configured\n",
  741. MXSER_BOARDS);
  742. else {
  743. if (pci_enable_device(pdev)) {
  744. printk(KERN_ERR "Moxa SmartI/O PCI enable "
  745. "fail !\n");
  746. continue;
  747. }
  748. retval = mxser_get_PCI_conf(busnum, devnum,
  749. (int)mxser_pcibrds[b].driver_data,
  750. &hwconf);
  751. if (retval < 0) {
  752. if (retval == MXSER_ERR_IRQ)
  753. printk(KERN_ERR
  754. "Invalid interrupt number, "
  755. "board not configured\n");
  756. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  757. printk(KERN_ERR
  758. "Invalid interrupt number, "
  759. "board not configured\n");
  760. else if (retval == MXSER_ERR_VECTOR)
  761. printk(KERN_ERR
  762. "Invalid interrupt vector, "
  763. "board not configured\n");
  764. else if (retval == MXSER_ERR_IOADDR)
  765. printk(KERN_ERR
  766. "Invalid I/O address, "
  767. "board not configured\n");
  768. continue;
  769. }
  770. mxser_getcfg(m, &hwconf);
  771. /* init mxsercfg first,
  772. * or mxsercfg data is not correct on ISR.
  773. */
  774. /* mxser_initbrd will hook ISR. */
  775. if (mxser_initbrd(m, &hwconf) < 0)
  776. continue;
  777. m++;
  778. /* Keep an extra reference if we succeeded. It will
  779. be returned at unload time */
  780. pci_dev_get(pdev);
  781. }
  782. }
  783. #endif
  784. retval = tty_register_driver(mxvar_sdriver);
  785. if (retval) {
  786. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
  787. " driver !\n");
  788. put_tty_driver(mxvar_sdriver);
  789. for (i = 0; i < MXSER_BOARDS; i++) {
  790. if (mxsercfg[i].board_type == -1)
  791. continue;
  792. else {
  793. free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
  794. /* todo: release io, vector */
  795. }
  796. }
  797. return retval;
  798. }
  799. return 0;
  800. }
  801. static void mxser_do_softint(struct work_struct *work)
  802. {
  803. struct mxser_struct *info =
  804. container_of(work, struct mxser_struct, tqueue);
  805. struct tty_struct *tty;
  806. tty = info->tty;
  807. if (tty) {
  808. if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
  809. tty_wakeup(tty);
  810. if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
  811. tty_hangup(tty);
  812. }
  813. }
  814. static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
  815. {
  816. unsigned char status = 0;
  817. status = inb(baseaddr + UART_MSR);
  818. mxser_msr[port] &= 0x0F;
  819. mxser_msr[port] |= status;
  820. status = mxser_msr[port];
  821. if (mode)
  822. mxser_msr[port] = 0;
  823. return status;
  824. }
  825. /*
  826. * This routine is called whenever a serial port is opened. It
  827. * enables interrupts for a serial port, linking in its async structure into
  828. * the IRQ chain. It also performs the serial-specific
  829. * initialization for the tty structure.
  830. */
  831. static int mxser_open(struct tty_struct *tty, struct file *filp)
  832. {
  833. struct mxser_struct *info;
  834. int retval, line;
  835. /* initialize driver_data in case something fails */
  836. tty->driver_data = NULL;
  837. line = tty->index;
  838. if (line == MXSER_PORTS)
  839. return 0;
  840. if (line < 0 || line > MXSER_PORTS)
  841. return -ENODEV;
  842. info = mxvar_table + line;
  843. if (!info->base)
  844. return -ENODEV;
  845. tty->driver_data = info;
  846. info->tty = tty;
  847. /*
  848. * Start up serial port
  849. */
  850. retval = mxser_startup(info);
  851. if (retval)
  852. return retval;
  853. retval = mxser_block_til_ready(tty, filp, info);
  854. if (retval)
  855. return retval;
  856. info->count++;
  857. if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
  858. if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
  859. *tty->termios = info->normal_termios;
  860. else
  861. *tty->termios = info->callout_termios;
  862. mxser_change_speed(info, NULL);
  863. }
  864. /*
  865. status = mxser_get_msr(info->base, 0, info->port);
  866. mxser_check_modem_status(info, status);
  867. */
  868. /* unmark here for very high baud rate (ex. 921600 bps) used */
  869. tty->low_latency = 1;
  870. return 0;
  871. }
  872. /*
  873. * This routine is called when the serial port gets closed. First, we
  874. * wait for the last remaining data to be sent. Then, we unlink its
  875. * async structure from the interrupt chain if necessary, and we free
  876. * that IRQ if nothing is left in the chain.
  877. */
  878. static void mxser_close(struct tty_struct *tty, struct file *filp)
  879. {
  880. struct mxser_struct *info = tty->driver_data;
  881. unsigned long timeout;
  882. unsigned long flags;
  883. struct tty_ldisc *ld;
  884. if (tty->index == MXSER_PORTS)
  885. return;
  886. if (!info)
  887. return;
  888. spin_lock_irqsave(&info->slock, flags);
  889. if (tty_hung_up_p(filp)) {
  890. spin_unlock_irqrestore(&info->slock, flags);
  891. return;
  892. }
  893. if ((tty->count == 1) && (info->count != 1)) {
  894. /*
  895. * Uh, oh. tty->count is 1, which means that the tty
  896. * structure will be freed. Info->count should always
  897. * be one in these conditions. If it's greater than
  898. * one, we've got real problems, since it means the
  899. * serial port won't be shutdown.
  900. */
  901. printk(KERN_ERR "mxser_close: bad serial port count; "
  902. "tty->count is 1, info->count is %d\n", info->count);
  903. info->count = 1;
  904. }
  905. if (--info->count < 0) {
  906. printk(KERN_ERR "mxser_close: bad serial port count for "
  907. "ttys%d: %d\n", info->port, info->count);
  908. info->count = 0;
  909. }
  910. if (info->count) {
  911. spin_unlock_irqrestore(&info->slock, flags);
  912. return;
  913. }
  914. info->flags |= ASYNC_CLOSING;
  915. spin_unlock_irqrestore(&info->slock, flags);
  916. /*
  917. * Save the termios structure, since this port may have
  918. * separate termios for callout and dialin.
  919. */
  920. if (info->flags & ASYNC_NORMAL_ACTIVE)
  921. info->normal_termios = *tty->termios;
  922. /*
  923. * Now we wait for the transmit buffer to clear; and we notify
  924. * the line discipline to only process XON/XOFF characters.
  925. */
  926. tty->closing = 1;
  927. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
  928. tty_wait_until_sent(tty, info->closing_wait);
  929. /*
  930. * At this point we stop accepting input. To do this, we
  931. * disable the receive line status interrupts, and tell the
  932. * interrupt driver to stop checking the data ready bit in the
  933. * line status register.
  934. */
  935. info->IER &= ~UART_IER_RLSI;
  936. if (info->IsMoxaMustChipFlag)
  937. info->IER &= ~MOXA_MUST_RECV_ISR;
  938. /* by William
  939. info->read_status_mask &= ~UART_LSR_DR;
  940. */
  941. if (info->flags & ASYNC_INITIALIZED) {
  942. outb(info->IER, info->base + UART_IER);
  943. /*
  944. * Before we drop DTR, make sure the UART transmitter
  945. * has completely drained; this is especially
  946. * important if there is a transmit FIFO!
  947. */
  948. timeout = jiffies + HZ;
  949. while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
  950. schedule_timeout_interruptible(5);
  951. if (time_after(jiffies, timeout))
  952. break;
  953. }
  954. }
  955. mxser_shutdown(info);
  956. if (tty->driver->flush_buffer)
  957. tty->driver->flush_buffer(tty);
  958. ld = tty_ldisc_ref(tty);
  959. if (ld) {
  960. if (ld->flush_buffer)
  961. ld->flush_buffer(tty);
  962. tty_ldisc_deref(ld);
  963. }
  964. tty->closing = 0;
  965. info->event = 0;
  966. info->tty = NULL;
  967. if (info->blocked_open) {
  968. if (info->close_delay)
  969. schedule_timeout_interruptible(info->close_delay);
  970. wake_up_interruptible(&info->open_wait);
  971. }
  972. info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  973. wake_up_interruptible(&info->close_wait);
  974. }
  975. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  976. {
  977. int c, total = 0;
  978. struct mxser_struct *info = tty->driver_data;
  979. unsigned long flags;
  980. if (!info->xmit_buf)
  981. return 0;
  982. while (1) {
  983. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  984. SERIAL_XMIT_SIZE - info->xmit_head));
  985. if (c <= 0)
  986. break;
  987. memcpy(info->xmit_buf + info->xmit_head, buf, c);
  988. spin_lock_irqsave(&info->slock, flags);
  989. info->xmit_head = (info->xmit_head + c) &
  990. (SERIAL_XMIT_SIZE - 1);
  991. info->xmit_cnt += c;
  992. spin_unlock_irqrestore(&info->slock, flags);
  993. buf += c;
  994. count -= c;
  995. total += c;
  996. }
  997. if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
  998. if (!tty->hw_stopped ||
  999. (info->type == PORT_16550A) ||
  1000. (info->IsMoxaMustChipFlag)) {
  1001. spin_lock_irqsave(&info->slock, flags);
  1002. info->IER |= UART_IER_THRI;
  1003. outb(info->IER, info->base + UART_IER);
  1004. spin_unlock_irqrestore(&info->slock, flags);
  1005. }
  1006. }
  1007. return total;
  1008. }
  1009. static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1010. {
  1011. struct mxser_struct *info = tty->driver_data;
  1012. unsigned long flags;
  1013. if (!info->xmit_buf)
  1014. return;
  1015. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1016. return;
  1017. spin_lock_irqsave(&info->slock, flags);
  1018. info->xmit_buf[info->xmit_head++] = ch;
  1019. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1020. info->xmit_cnt++;
  1021. spin_unlock_irqrestore(&info->slock, flags);
  1022. if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
  1023. if (!tty->hw_stopped ||
  1024. (info->type == PORT_16550A) ||
  1025. info->IsMoxaMustChipFlag) {
  1026. spin_lock_irqsave(&info->slock, flags);
  1027. info->IER |= UART_IER_THRI;
  1028. outb(info->IER, info->base + UART_IER);
  1029. spin_unlock_irqrestore(&info->slock, flags);
  1030. }
  1031. }
  1032. }
  1033. static void mxser_flush_chars(struct tty_struct *tty)
  1034. {
  1035. struct mxser_struct *info = tty->driver_data;
  1036. unsigned long flags;
  1037. if (info->xmit_cnt <= 0 ||
  1038. tty->stopped ||
  1039. !info->xmit_buf ||
  1040. (tty->hw_stopped &&
  1041. (info->type != PORT_16550A) &&
  1042. (!info->IsMoxaMustChipFlag)
  1043. ))
  1044. return;
  1045. spin_lock_irqsave(&info->slock, flags);
  1046. info->IER |= UART_IER_THRI;
  1047. outb(info->IER, info->base + UART_IER);
  1048. spin_unlock_irqrestore(&info->slock, flags);
  1049. }
  1050. static int mxser_write_room(struct tty_struct *tty)
  1051. {
  1052. struct mxser_struct *info = tty->driver_data;
  1053. int ret;
  1054. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1055. if (ret < 0)
  1056. ret = 0;
  1057. return ret;
  1058. }
  1059. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1060. {
  1061. struct mxser_struct *info = tty->driver_data;
  1062. return info->xmit_cnt;
  1063. }
  1064. static void mxser_flush_buffer(struct tty_struct *tty)
  1065. {
  1066. struct mxser_struct *info = tty->driver_data;
  1067. char fcr;
  1068. unsigned long flags;
  1069. spin_lock_irqsave(&info->slock, flags);
  1070. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  1071. /* below added by shinhay */
  1072. fcr = inb(info->base + UART_FCR);
  1073. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  1074. info->base + UART_FCR);
  1075. outb(fcr, info->base + UART_FCR);
  1076. spin_unlock_irqrestore(&info->slock, flags);
  1077. /* above added by shinhay */
  1078. tty_wakeup(tty);
  1079. }
  1080. static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
  1081. {
  1082. struct mxser_struct *info = tty->driver_data;
  1083. int retval;
  1084. struct async_icount cprev, cnow; /* kernel counter temps */
  1085. struct serial_icounter_struct __user *p_cuser;
  1086. unsigned long templ;
  1087. unsigned long flags;
  1088. void __user *argp = (void __user *)arg;
  1089. if (tty->index == MXSER_PORTS)
  1090. return mxser_ioctl_special(cmd, argp);
  1091. /* following add by Victor Yu. 01-05-2004 */
  1092. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1093. int opmode, p;
  1094. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1095. int shiftbit;
  1096. unsigned char val, mask;
  1097. p = info->port % 4;
  1098. if (cmd == MOXA_SET_OP_MODE) {
  1099. if (get_user(opmode, (int __user *) argp))
  1100. return -EFAULT;
  1101. if (opmode != RS232_MODE &&
  1102. opmode != RS485_2WIRE_MODE &&
  1103. opmode != RS422_MODE &&
  1104. opmode != RS485_4WIRE_MODE)
  1105. return -EFAULT;
  1106. mask = ModeMask[p];
  1107. shiftbit = p * 2;
  1108. val = inb(info->opmode_ioaddr);
  1109. val &= mask;
  1110. val |= (opmode << shiftbit);
  1111. outb(val, info->opmode_ioaddr);
  1112. } else {
  1113. shiftbit = p * 2;
  1114. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1115. opmode &= OP_MODE_MASK;
  1116. if (copy_to_user(argp, &opmode, sizeof(int)))
  1117. return -EFAULT;
  1118. }
  1119. return 0;
  1120. }
  1121. /* above add by Victor Yu. 01-05-2004 */
  1122. if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1123. if (tty->flags & (1 << TTY_IO_ERROR))
  1124. return -EIO;
  1125. }
  1126. switch (cmd) {
  1127. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1128. retval = tty_check_change(tty);
  1129. if (retval)
  1130. return retval;
  1131. tty_wait_until_sent(tty, 0);
  1132. if (!arg)
  1133. mxser_send_break(info, HZ / 4); /* 1/4 second */
  1134. return 0;
  1135. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1136. retval = tty_check_change(tty);
  1137. if (retval)
  1138. return retval;
  1139. tty_wait_until_sent(tty, 0);
  1140. mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
  1141. return 0;
  1142. case TIOCGSOFTCAR:
  1143. return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
  1144. case TIOCSSOFTCAR:
  1145. if (get_user(templ, (unsigned long __user *) argp))
  1146. return -EFAULT;
  1147. arg = templ;
  1148. tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
  1149. return 0;
  1150. case TIOCGSERIAL:
  1151. return mxser_get_serial_info(info, argp);
  1152. case TIOCSSERIAL:
  1153. return mxser_set_serial_info(info, argp);
  1154. case TIOCSERGETLSR: /* Get line status register */
  1155. return mxser_get_lsr_info(info, argp);
  1156. /*
  1157. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1158. * - mask passed in arg for lines of interest
  1159. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1160. * Caller should use TIOCGICOUNT to see which one it was
  1161. */
  1162. case TIOCMIWAIT:
  1163. spin_lock_irqsave(&info->slock, flags);
  1164. cnow = info->icount; /* note the counters on entry */
  1165. spin_unlock_irqrestore(&info->slock, flags);
  1166. wait_event_interruptible(info->delta_msr_wait, ({
  1167. cprev = cnow;
  1168. spin_lock_irqsave(&info->slock, flags);
  1169. cnow = info->icount; /* atomic copy */
  1170. spin_unlock_irqrestore(&info->slock, flags);
  1171. ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
  1172. ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
  1173. ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
  1174. ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
  1175. }));
  1176. break;
  1177. /*
  1178. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1179. * Return: write counters to the user passed counter struct
  1180. * NB: both 1->0 and 0->1 transitions are counted except for
  1181. * RI where only 0->1 is counted.
  1182. */
  1183. case TIOCGICOUNT:
  1184. spin_lock_irqsave(&info->slock, flags);
  1185. cnow = info->icount;
  1186. spin_unlock_irqrestore(&info->slock, flags);
  1187. p_cuser = argp;
  1188. /* modified by casper 1/11/2000 */
  1189. if (put_user(cnow.frame, &p_cuser->frame))
  1190. return -EFAULT;
  1191. if (put_user(cnow.brk, &p_cuser->brk))
  1192. return -EFAULT;
  1193. if (put_user(cnow.overrun, &p_cuser->overrun))
  1194. return -EFAULT;
  1195. if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
  1196. return -EFAULT;
  1197. if (put_user(cnow.parity, &p_cuser->parity))
  1198. return -EFAULT;
  1199. if (put_user(cnow.rx, &p_cuser->rx))
  1200. return -EFAULT;
  1201. if (put_user(cnow.tx, &p_cuser->tx))
  1202. return -EFAULT;
  1203. put_user(cnow.cts, &p_cuser->cts);
  1204. put_user(cnow.dsr, &p_cuser->dsr);
  1205. put_user(cnow.rng, &p_cuser->rng);
  1206. put_user(cnow.dcd, &p_cuser->dcd);
  1207. return 0;
  1208. case MOXA_HighSpeedOn:
  1209. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1210. case MOXA_SDS_RSTICOUNTER: {
  1211. info->mon_data.rxcnt = 0;
  1212. info->mon_data.txcnt = 0;
  1213. return 0;
  1214. }
  1215. /* (above) added by James. */
  1216. case MOXA_ASPP_SETBAUD:{
  1217. long baud;
  1218. if (get_user(baud, (long __user *)argp))
  1219. return -EFAULT;
  1220. if (mxser_set_baud(info, baud) == -1)
  1221. return -1;
  1222. return 0;
  1223. }
  1224. case MOXA_ASPP_GETBAUD:
  1225. if (copy_to_user(argp, &info->realbaud, sizeof(long)))
  1226. return -EFAULT;
  1227. return 0;
  1228. case MOXA_ASPP_OQUEUE:{
  1229. int len, lsr;
  1230. len = mxser_chars_in_buffer(tty);
  1231. lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
  1232. len += (lsr ? 0 : 1);
  1233. if (copy_to_user(argp, &len, sizeof(int)))
  1234. return -EFAULT;
  1235. return 0;
  1236. }
  1237. case MOXA_ASPP_MON: {
  1238. int mcr, status;
  1239. /* info->mon_data.ser_param = tty->termios->c_cflag; */
  1240. status = mxser_get_msr(info->base, 1, info->port, info);
  1241. mxser_check_modem_status(info, status);
  1242. mcr = inb(info->base + UART_MCR);
  1243. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1244. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1245. else
  1246. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1247. if (mcr & MOXA_MUST_MCR_TX_XON)
  1248. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1249. else
  1250. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1251. if (info->tty->hw_stopped)
  1252. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1253. else
  1254. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1255. if (copy_to_user(argp, &info->mon_data,
  1256. sizeof(struct mxser_mon)))
  1257. return -EFAULT;
  1258. return 0;
  1259. }
  1260. case MOXA_ASPP_LSTATUS: {
  1261. if (copy_to_user(argp, &info->err_shadow,
  1262. sizeof(unsigned char)))
  1263. return -EFAULT;
  1264. info->err_shadow = 0;
  1265. return 0;
  1266. }
  1267. case MOXA_SET_BAUD_METHOD: {
  1268. int method;
  1269. if (get_user(method, (int __user *)argp))
  1270. return -EFAULT;
  1271. mxser_set_baud_method[info->port] = method;
  1272. if (copy_to_user(argp, &method, sizeof(int)))
  1273. return -EFAULT;
  1274. return 0;
  1275. }
  1276. default:
  1277. return -ENOIOCTLCMD;
  1278. }
  1279. return 0;
  1280. }
  1281. #ifndef CMSPAR
  1282. #define CMSPAR 010000000000
  1283. #endif
  1284. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1285. {
  1286. int i, result, status;
  1287. switch (cmd) {
  1288. case MOXA_GET_CONF:
  1289. if (copy_to_user(argp, mxsercfg,
  1290. sizeof(struct mxser_hwconf) * 4))
  1291. return -EFAULT;
  1292. return 0;
  1293. case MOXA_GET_MAJOR:
  1294. if (copy_to_user(argp, &ttymajor, sizeof(int)))
  1295. return -EFAULT;
  1296. return 0;
  1297. case MOXA_GET_CUMAJOR:
  1298. if (copy_to_user(argp, &calloutmajor, sizeof(int)))
  1299. return -EFAULT;
  1300. return 0;
  1301. case MOXA_CHKPORTENABLE:
  1302. result = 0;
  1303. for (i = 0; i < MXSER_PORTS; i++) {
  1304. if (mxvar_table[i].base)
  1305. result |= (1 << i);
  1306. }
  1307. return put_user(result, (unsigned long __user *)argp);
  1308. case MOXA_GETDATACOUNT:
  1309. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1310. return -EFAULT;
  1311. return 0;
  1312. case MOXA_GETMSTATUS:
  1313. for (i = 0; i < MXSER_PORTS; i++) {
  1314. GMStatus[i].ri = 0;
  1315. if (!mxvar_table[i].base) {
  1316. GMStatus[i].dcd = 0;
  1317. GMStatus[i].dsr = 0;
  1318. GMStatus[i].cts = 0;
  1319. continue;
  1320. }
  1321. if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
  1322. GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
  1323. else
  1324. GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
  1325. status = inb(mxvar_table[i].base + UART_MSR);
  1326. if (status & 0x80 /*UART_MSR_DCD */ )
  1327. GMStatus[i].dcd = 1;
  1328. else
  1329. GMStatus[i].dcd = 0;
  1330. if (status & 0x20 /*UART_MSR_DSR */ )
  1331. GMStatus[i].dsr = 1;
  1332. else
  1333. GMStatus[i].dsr = 0;
  1334. if (status & 0x10 /*UART_MSR_CTS */ )
  1335. GMStatus[i].cts = 1;
  1336. else
  1337. GMStatus[i].cts = 0;
  1338. }
  1339. if (copy_to_user(argp, GMStatus,
  1340. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1341. return -EFAULT;
  1342. return 0;
  1343. case MOXA_ASPP_MON_EXT: {
  1344. int status;
  1345. int opmode, p;
  1346. int shiftbit;
  1347. unsigned cflag, iflag;
  1348. for (i = 0; i < MXSER_PORTS; i++) {
  1349. if (!mxvar_table[i].base)
  1350. continue;
  1351. status = mxser_get_msr(mxvar_table[i].base, 0,
  1352. i, &(mxvar_table[i]));
  1353. /*
  1354. mxser_check_modem_status(&mxvar_table[i],
  1355. status);
  1356. */
  1357. if (status & UART_MSR_TERI)
  1358. mxvar_table[i].icount.rng++;
  1359. if (status & UART_MSR_DDSR)
  1360. mxvar_table[i].icount.dsr++;
  1361. if (status & UART_MSR_DDCD)
  1362. mxvar_table[i].icount.dcd++;
  1363. if (status & UART_MSR_DCTS)
  1364. mxvar_table[i].icount.cts++;
  1365. mxvar_table[i].mon_data.modem_status = status;
  1366. mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
  1367. mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
  1368. mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
  1369. mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
  1370. mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
  1371. mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
  1372. if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
  1373. cflag = mxvar_table[i].normal_termios.c_cflag;
  1374. iflag = mxvar_table[i].normal_termios.c_iflag;
  1375. } else {
  1376. cflag = mxvar_table[i].tty->termios->c_cflag;
  1377. iflag = mxvar_table[i].tty->termios->c_iflag;
  1378. }
  1379. mon_data_ext.databits[i] = cflag & CSIZE;
  1380. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1381. mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
  1382. mon_data_ext.flowctrl[i] = 0x00;
  1383. if (cflag & CRTSCTS)
  1384. mon_data_ext.flowctrl[i] |= 0x03;
  1385. if (iflag & (IXON | IXOFF))
  1386. mon_data_ext.flowctrl[i] |= 0x0C;
  1387. if (mxvar_table[i].type == PORT_16550A)
  1388. mon_data_ext.fifo[i] = 1;
  1389. else
  1390. mon_data_ext.fifo[i] = 0;
  1391. p = i % 4;
  1392. shiftbit = p * 2;
  1393. opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
  1394. opmode &= OP_MODE_MASK;
  1395. mon_data_ext.iftype[i] = opmode;
  1396. }
  1397. if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
  1398. return -EFAULT;
  1399. return 0;
  1400. }
  1401. default:
  1402. return -ENOIOCTLCMD;
  1403. }
  1404. return 0;
  1405. }
  1406. static void mxser_stoprx(struct tty_struct *tty)
  1407. {
  1408. struct mxser_struct *info = tty->driver_data;
  1409. /* unsigned long flags; */
  1410. info->ldisc_stop_rx = 1;
  1411. if (I_IXOFF(tty)) {
  1412. /* MX_LOCK(&info->slock); */
  1413. /* following add by Victor Yu. 09-02-2002 */
  1414. if (info->IsMoxaMustChipFlag) {
  1415. info->IER &= ~MOXA_MUST_RECV_ISR;
  1416. outb(info->IER, info->base + UART_IER);
  1417. } else {
  1418. /* above add by Victor Yu. 09-02-2002 */
  1419. info->x_char = STOP_CHAR(tty);
  1420. /* mask by Victor Yu. 09-02-2002 */
  1421. /* outb(info->IER, 0); */
  1422. outb(0, info->base + UART_IER);
  1423. info->IER |= UART_IER_THRI;
  1424. /* force Tx interrupt */
  1425. outb(info->IER, info->base + UART_IER);
  1426. } /* add by Victor Yu. 09-02-2002 */
  1427. /* MX_UNLOCK(&info->slock); */
  1428. }
  1429. if (info->tty->termios->c_cflag & CRTSCTS) {
  1430. /* MX_LOCK(&info->slock); */
  1431. info->MCR &= ~UART_MCR_RTS;
  1432. outb(info->MCR, info->base + UART_MCR);
  1433. /* MX_UNLOCK(&info->slock); */
  1434. }
  1435. }
  1436. static void mxser_startrx(struct tty_struct *tty)
  1437. {
  1438. struct mxser_struct *info = tty->driver_data;
  1439. /* unsigned long flags; */
  1440. info->ldisc_stop_rx = 0;
  1441. if (I_IXOFF(tty)) {
  1442. if (info->x_char)
  1443. info->x_char = 0;
  1444. else {
  1445. /* MX_LOCK(&info->slock); */
  1446. /* following add by Victor Yu. 09-02-2002 */
  1447. if (info->IsMoxaMustChipFlag) {
  1448. info->IER |= MOXA_MUST_RECV_ISR;
  1449. outb(info->IER, info->base + UART_IER);
  1450. } else {
  1451. /* above add by Victor Yu. 09-02-2002 */
  1452. info->x_char = START_CHAR(tty);
  1453. /* mask by Victor Yu. 09-02-2002 */
  1454. /* outb(info->IER, 0); */
  1455. /* add by Victor Yu. 09-02-2002 */
  1456. outb(0, info->base + UART_IER);
  1457. /* force Tx interrupt */
  1458. info->IER |= UART_IER_THRI;
  1459. outb(info->IER, info->base + UART_IER);
  1460. } /* add by Victor Yu. 09-02-2002 */
  1461. /* MX_UNLOCK(&info->slock); */
  1462. }
  1463. }
  1464. if (info->tty->termios->c_cflag & CRTSCTS) {
  1465. /* MX_LOCK(&info->slock); */
  1466. info->MCR |= UART_MCR_RTS;
  1467. outb(info->MCR, info->base + UART_MCR);
  1468. /* MX_UNLOCK(&info->slock); */
  1469. }
  1470. }
  1471. /*
  1472. * This routine is called by the upper-layer tty layer to signal that
  1473. * incoming characters should be throttled.
  1474. */
  1475. static void mxser_throttle(struct tty_struct *tty)
  1476. {
  1477. /* struct mxser_struct *info = tty->driver_data; */
  1478. /* unsigned long flags; */
  1479. /* MX_LOCK(&info->slock); */
  1480. mxser_stoprx(tty);
  1481. /* MX_UNLOCK(&info->slock); */
  1482. }
  1483. static void mxser_unthrottle(struct tty_struct *tty)
  1484. {
  1485. /* struct mxser_struct *info = tty->driver_data; */
  1486. /* unsigned long flags; */
  1487. /* MX_LOCK(&info->slock); */
  1488. mxser_startrx(tty);
  1489. /* MX_UNLOCK(&info->slock); */
  1490. }
  1491. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1492. {
  1493. struct mxser_struct *info = tty->driver_data;
  1494. unsigned long flags;
  1495. mxser_change_speed(info, old_termios);
  1496. if ((old_termios->c_cflag & CRTSCTS) &&
  1497. !(tty->termios->c_cflag & CRTSCTS)) {
  1498. tty->hw_stopped = 0;
  1499. mxser_start(tty);
  1500. }
  1501. /* Handle sw stopped */
  1502. if ((old_termios->c_iflag & IXON) &&
  1503. !(tty->termios->c_iflag & IXON)) {
  1504. tty->stopped = 0;
  1505. /* following add by Victor Yu. 09-02-2002 */
  1506. if (info->IsMoxaMustChipFlag) {
  1507. spin_lock_irqsave(&info->slock, flags);
  1508. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  1509. spin_unlock_irqrestore(&info->slock, flags);
  1510. }
  1511. /* above add by Victor Yu. 09-02-2002 */
  1512. mxser_start(tty);
  1513. }
  1514. }
  1515. /*
  1516. * mxser_stop() and mxser_start()
  1517. *
  1518. * This routines are called before setting or resetting tty->stopped.
  1519. * They enable or disable transmitter interrupts, as necessary.
  1520. */
  1521. static void mxser_stop(struct tty_struct *tty)
  1522. {
  1523. struct mxser_struct *info = tty->driver_data;
  1524. unsigned long flags;
  1525. spin_lock_irqsave(&info->slock, flags);
  1526. if (info->IER & UART_IER_THRI) {
  1527. info->IER &= ~UART_IER_THRI;
  1528. outb(info->IER, info->base + UART_IER);
  1529. }
  1530. spin_unlock_irqrestore(&info->slock, flags);
  1531. }
  1532. static void mxser_start(struct tty_struct *tty)
  1533. {
  1534. struct mxser_struct *info = tty->driver_data;
  1535. unsigned long flags;
  1536. spin_lock_irqsave(&info->slock, flags);
  1537. if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
  1538. info->IER |= UART_IER_THRI;
  1539. outb(info->IER, info->base + UART_IER);
  1540. }
  1541. spin_unlock_irqrestore(&info->slock, flags);
  1542. }
  1543. /*
  1544. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1545. */
  1546. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1547. {
  1548. struct mxser_struct *info = tty->driver_data;
  1549. unsigned long orig_jiffies, char_time;
  1550. int lsr;
  1551. if (info->type == PORT_UNKNOWN)
  1552. return;
  1553. if (info->xmit_fifo_size == 0)
  1554. return; /* Just in case.... */
  1555. orig_jiffies = jiffies;
  1556. /*
  1557. * Set the check interval to be 1/5 of the estimated time to
  1558. * send a single character, and make it at least 1. The check
  1559. * interval should also be less than the timeout.
  1560. *
  1561. * Note: we have to use pretty tight timings here to satisfy
  1562. * the NIST-PCTS.
  1563. */
  1564. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1565. char_time = char_time / 5;
  1566. if (char_time == 0)
  1567. char_time = 1;
  1568. if (timeout && timeout < char_time)
  1569. char_time = timeout;
  1570. /*
  1571. * If the transmitter hasn't cleared in twice the approximate
  1572. * amount of time to send the entire FIFO, it probably won't
  1573. * ever clear. This assumes the UART isn't doing flow
  1574. * control, which is currently the case. Hence, if it ever
  1575. * takes longer than info->timeout, this is probably due to a
  1576. * UART bug of some kind. So, we clamp the timeout parameter at
  1577. * 2*info->timeout.
  1578. */
  1579. if (!timeout || timeout > 2 * info->timeout)
  1580. timeout = 2 * info->timeout;
  1581. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1582. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1583. timeout, char_time);
  1584. printk("jiff=%lu...", jiffies);
  1585. #endif
  1586. while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
  1587. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1588. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1589. #endif
  1590. schedule_timeout_interruptible(char_time);
  1591. if (signal_pending(current))
  1592. break;
  1593. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1594. break;
  1595. }
  1596. set_current_state(TASK_RUNNING);
  1597. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1598. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1599. #endif
  1600. }
  1601. /*
  1602. * This routine is called by tty_hangup() when a hangup is signaled.
  1603. */
  1604. void mxser_hangup(struct tty_struct *tty)
  1605. {
  1606. struct mxser_struct *info = tty->driver_data;
  1607. mxser_flush_buffer(tty);
  1608. mxser_shutdown(info);
  1609. info->event = 0;
  1610. info->count = 0;
  1611. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  1612. info->tty = NULL;
  1613. wake_up_interruptible(&info->open_wait);
  1614. }
  1615. /* added by James 03-12-2004. */
  1616. /*
  1617. * mxser_rs_break() --- routine which turns the break handling on or off
  1618. */
  1619. static void mxser_rs_break(struct tty_struct *tty, int break_state)
  1620. {
  1621. struct mxser_struct *info = tty->driver_data;
  1622. unsigned long flags;
  1623. spin_lock_irqsave(&info->slock, flags);
  1624. if (break_state == -1)
  1625. outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
  1626. info->base + UART_LCR);
  1627. else
  1628. outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
  1629. info->base + UART_LCR);
  1630. spin_unlock_irqrestore(&info->slock, flags);
  1631. }
  1632. /* (above) added by James. */
  1633. /*
  1634. * This is the serial driver's generic interrupt routine
  1635. */
  1636. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1637. {
  1638. int status, iir, i;
  1639. struct mxser_struct *info;
  1640. struct mxser_struct *port;
  1641. int max, irqbits, bits, msr;
  1642. int pass_counter = 0;
  1643. int handled = IRQ_NONE;
  1644. port = NULL;
  1645. /* spin_lock(&gm_lock); */
  1646. for (i = 0; i < MXSER_BOARDS; i++) {
  1647. if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
  1648. port = dev_id;
  1649. break;
  1650. }
  1651. }
  1652. if (i == MXSER_BOARDS)
  1653. goto irq_stop;
  1654. if (port == 0)
  1655. goto irq_stop;
  1656. max = mxser_numports[mxsercfg[i].board_type - 1];
  1657. while (1) {
  1658. irqbits = inb(port->vector) & port->vectormask;
  1659. if (irqbits == port->vectormask)
  1660. break;
  1661. handled = IRQ_HANDLED;
  1662. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1663. if (irqbits == port->vectormask)
  1664. break;
  1665. if (bits & irqbits)
  1666. continue;
  1667. info = port + i;
  1668. /* following add by Victor Yu. 09-13-2002 */
  1669. iir = inb(info->base + UART_IIR);
  1670. if (iir & UART_IIR_NO_INT)
  1671. continue;
  1672. iir &= MOXA_MUST_IIR_MASK;
  1673. if (!info->tty) {
  1674. status = inb(info->base + UART_LSR);
  1675. outb(0x27, info->base + UART_FCR);
  1676. inb(info->base + UART_MSR);
  1677. continue;
  1678. }
  1679. /* mask by Victor Yu. 09-13-2002
  1680. if ( !info->tty ||
  1681. (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
  1682. continue;
  1683. */
  1684. /* mask by Victor Yu. 09-02-2002
  1685. status = inb(info->base + UART_LSR) & info->read_status_mask;
  1686. */
  1687. /* following add by Victor Yu. 09-02-2002 */
  1688. status = inb(info->base + UART_LSR);
  1689. if (status & UART_LSR_PE)
  1690. info->err_shadow |= NPPI_NOTIFY_PARITY;
  1691. if (status & UART_LSR_FE)
  1692. info->err_shadow |= NPPI_NOTIFY_FRAMING;
  1693. if (status & UART_LSR_OE)
  1694. info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
  1695. if (status & UART_LSR_BI)
  1696. info->err_shadow |= NPPI_NOTIFY_BREAK;
  1697. if (info->IsMoxaMustChipFlag) {
  1698. /*
  1699. if ( (status & 0x02) && !(status & 0x01) ) {
  1700. outb(info->base+UART_FCR, 0x23);
  1701. continue;
  1702. }
  1703. */
  1704. if (iir == MOXA_MUST_IIR_GDA ||
  1705. iir == MOXA_MUST_IIR_RDA ||
  1706. iir == MOXA_MUST_IIR_RTO ||
  1707. iir == MOXA_MUST_IIR_LSR)
  1708. mxser_receive_chars(info, &status);
  1709. } else {
  1710. /* above add by Victor Yu. 09-02-2002 */
  1711. status &= info->read_status_mask;
  1712. if (status & UART_LSR_DR)
  1713. mxser_receive_chars(info, &status);
  1714. }
  1715. msr = inb(info->base + UART_MSR);
  1716. if (msr & UART_MSR_ANY_DELTA) {
  1717. mxser_check_modem_status(info, msr);
  1718. }
  1719. /* following add by Victor Yu. 09-13-2002 */
  1720. if (info->IsMoxaMustChipFlag) {
  1721. if ((iir == 0x02) && (status & UART_LSR_THRE)) {
  1722. mxser_transmit_chars(info);
  1723. }
  1724. } else {
  1725. /* above add by Victor Yu. 09-13-2002 */
  1726. if (status & UART_LSR_THRE) {
  1727. /* 8-2-99 by William
  1728. if ( info->x_char || (info->xmit_cnt > 0) )
  1729. */
  1730. mxser_transmit_chars(info);
  1731. }
  1732. }
  1733. }
  1734. if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
  1735. break; /* Prevent infinite loops */
  1736. }
  1737. }
  1738. irq_stop:
  1739. /* spin_unlock(&gm_lock); */
  1740. return handled;
  1741. }
  1742. static void mxser_receive_chars(struct mxser_struct *info, int *status)
  1743. {
  1744. struct tty_struct *tty = info->tty;
  1745. unsigned char ch, gdl;
  1746. int ignored = 0;
  1747. int cnt = 0;
  1748. int recv_room;
  1749. int max = 256;
  1750. unsigned long flags;
  1751. spin_lock_irqsave(&info->slock, flags);
  1752. recv_room = tty->receive_room;
  1753. if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
  1754. /* mxser_throttle(tty); */
  1755. mxser_stoprx(tty);
  1756. /* return; */
  1757. }
  1758. /* following add by Victor Yu. 09-02-2002 */
  1759. if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
  1760. if (*status & UART_LSR_SPECIAL) {
  1761. goto intr_old;
  1762. }
  1763. /* following add by Victor Yu. 02-11-2004 */
  1764. if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
  1765. (*status & MOXA_MUST_LSR_RERR))
  1766. goto intr_old;
  1767. /* above add by Victor Yu. 02-14-2004 */
  1768. if (*status & MOXA_MUST_LSR_RERR)
  1769. goto intr_old;
  1770. gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
  1771. /* add by Victor Yu. 02-11-2004 */
  1772. if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
  1773. gdl &= MOXA_MUST_GDL_MASK;
  1774. if (gdl >= recv_room) {
  1775. if (!info->ldisc_stop_rx) {
  1776. /* mxser_throttle(tty); */
  1777. mxser_stoprx(tty);
  1778. }
  1779. /* return; */
  1780. }
  1781. while (gdl--) {
  1782. ch = inb(info->base + UART_RX);
  1783. tty_insert_flip_char(tty, ch, 0);
  1784. cnt++;
  1785. /*
  1786. if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
  1787. mxser_stoprx(tty);
  1788. info->stop_rx = 1;
  1789. break;
  1790. } */
  1791. }
  1792. goto end_intr;
  1793. }
  1794. intr_old:
  1795. /* above add by Victor Yu. 09-02-2002 */
  1796. do {
  1797. if (max-- < 0)
  1798. break;
  1799. /*
  1800. if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
  1801. mxser_stoprx(tty);
  1802. info->stop_rx=1;
  1803. break;
  1804. }
  1805. */
  1806. ch = inb(info->base + UART_RX);
  1807. /* following add by Victor Yu. 09-02-2002 */
  1808. if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
  1809. outb(0x23, info->base + UART_FCR);
  1810. *status &= info->read_status_mask;
  1811. /* above add by Victor Yu. 09-02-2002 */
  1812. if (*status & info->ignore_status_mask) {
  1813. if (++ignored > 100)
  1814. break;
  1815. } else {
  1816. char flag = 0;
  1817. if (*status & UART_LSR_SPECIAL) {
  1818. if (*status & UART_LSR_BI) {
  1819. flag = TTY_BREAK;
  1820. /* added by casper 1/11/2000 */
  1821. info->icount.brk++;
  1822. /* */
  1823. if (info->flags & ASYNC_SAK)
  1824. do_SAK(tty);
  1825. } else if (*status & UART_LSR_PE) {
  1826. flag = TTY_PARITY;
  1827. /* added by casper 1/11/2000 */
  1828. info->icount.parity++;
  1829. /* */
  1830. } else if (*status & UART_LSR_FE) {
  1831. flag = TTY_FRAME;
  1832. /* added by casper 1/11/2000 */
  1833. info->icount.frame++;
  1834. /* */
  1835. } else if (*status & UART_LSR_OE) {
  1836. flag = TTY_OVERRUN;
  1837. /* added by casper 1/11/2000 */
  1838. info->icount.overrun++;
  1839. /* */
  1840. }
  1841. }
  1842. tty_insert_flip_char(tty, ch, flag);
  1843. cnt++;
  1844. if (cnt >= recv_room) {
  1845. if (!info->ldisc_stop_rx) {
  1846. /* mxser_throttle(tty); */
  1847. mxser_stoprx(tty);
  1848. }
  1849. break;
  1850. }
  1851. }
  1852. /* following add by Victor Yu. 09-02-2002 */
  1853. if (info->IsMoxaMustChipFlag)
  1854. break;
  1855. /* above add by Victor Yu. 09-02-2002 */
  1856. /* mask by Victor Yu. 09-02-2002
  1857. *status = inb(info->base + UART_LSR) & info->read_status_mask;
  1858. */
  1859. /* following add by Victor Yu. 09-02-2002 */
  1860. *status = inb(info->base + UART_LSR);
  1861. /* above add by Victor Yu. 09-02-2002 */
  1862. } while (*status & UART_LSR_DR);
  1863. end_intr: /* add by Victor Yu. 09-02-2002 */
  1864. mxvar_log.rxcnt[info->port] += cnt;
  1865. info->mon_data.rxcnt += cnt;
  1866. info->mon_data.up_rxcnt += cnt;
  1867. spin_unlock_irqrestore(&info->slock, flags);
  1868. tty_flip_buffer_push(tty);
  1869. }
  1870. static void mxser_transmit_chars(struct mxser_struct *info)
  1871. {
  1872. int count, cnt;
  1873. unsigned long flags;
  1874. spin_lock_irqsave(&info->slock, flags);
  1875. if (info->x_char) {
  1876. outb(info->x_char, info->base + UART_TX);
  1877. info->x_char = 0;
  1878. mxvar_log.txcnt[info->port]++;
  1879. info->mon_data.txcnt++;
  1880. info->mon_data.up_txcnt++;
  1881. /* added by casper 1/11/2000 */
  1882. info->icount.tx++;
  1883. /* */
  1884. spin_unlock_irqrestore(&info->slock, flags);
  1885. return;
  1886. }
  1887. if (info->xmit_buf == 0) {
  1888. spin_unlock_irqrestore(&info->slock, flags);
  1889. return;
  1890. }
  1891. if ((info->xmit_cnt <= 0) || info->tty->stopped ||
  1892. (info->tty->hw_stopped &&
  1893. (info->type != PORT_16550A) &&
  1894. (!info->IsMoxaMustChipFlag))) {
  1895. info->IER &= ~UART_IER_THRI;
  1896. outb(info->IER, info->base + UART_IER);
  1897. spin_unlock_irqrestore(&info->slock, flags);
  1898. return;
  1899. }
  1900. cnt = info->xmit_cnt;
  1901. count = info->xmit_fifo_size;
  1902. do {
  1903. outb(info->xmit_buf[info->xmit_tail++],
  1904. info->base + UART_TX);
  1905. info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1906. if (--info->xmit_cnt <= 0)
  1907. break;
  1908. } while (--count > 0);
  1909. mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
  1910. /* added by James 03-12-2004. */
  1911. info->mon_data.txcnt += (cnt - info->xmit_cnt);
  1912. info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
  1913. /* (above) added by James. */
  1914. /* added by casper 1/11/2000 */
  1915. info->icount.tx += (cnt - info->xmit_cnt);
  1916. /* */
  1917. if (info->xmit_cnt < WAKEUP_CHARS) {
  1918. set_bit(MXSER_EVENT_TXLOW, &info->event);
  1919. schedule_work(&info->tqueue);
  1920. }
  1921. if (info->xmit_cnt <= 0) {
  1922. info->IER &= ~UART_IER_THRI;
  1923. outb(info->IER, info->base + UART_IER);
  1924. }
  1925. spin_unlock_irqrestore(&info->slock, flags);
  1926. }
  1927. static void mxser_check_modem_status(struct mxser_struct *info, int status)
  1928. {
  1929. /* update input line counters */
  1930. if (status & UART_MSR_TERI)
  1931. info->icount.rng++;
  1932. if (status & UART_MSR_DDSR)
  1933. info->icount.dsr++;
  1934. if (status & UART_MSR_DDCD)
  1935. info->icount.dcd++;
  1936. if (status & UART_MSR_DCTS)
  1937. info->icount.cts++;
  1938. info->mon_data.modem_status = status;
  1939. wake_up_interruptible(&info->delta_msr_wait);
  1940. if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  1941. if (status & UART_MSR_DCD)
  1942. wake_up_interruptible(&info->open_wait);
  1943. schedule_work(&info->tqueue);
  1944. }
  1945. if (info->flags & ASYNC_CTS_FLOW) {
  1946. if (info->tty->hw_stopped) {
  1947. if (status & UART_MSR_CTS) {
  1948. info->tty->hw_stopped = 0;
  1949. if ((info->type != PORT_16550A) &&
  1950. (!info->IsMoxaMustChipFlag)) {
  1951. info->IER |= UART_IER_THRI;
  1952. outb(info->IER, info->base + UART_IER);
  1953. }
  1954. set_bit(MXSER_EVENT_TXLOW, &info->event);
  1955. schedule_work(&info->tqueue); }
  1956. } else {
  1957. if (!(status & UART_MSR_CTS)) {
  1958. info->tty->hw_stopped = 1;
  1959. if ((info->type != PORT_16550A) &&
  1960. (!info->IsMoxaMustChipFlag)) {
  1961. info->IER &= ~UART_IER_THRI;
  1962. outb(info->IER, info->base + UART_IER);
  1963. }
  1964. }
  1965. }
  1966. }
  1967. }
  1968. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
  1969. {
  1970. DECLARE_WAITQUEUE(wait, current);
  1971. int retval;
  1972. int do_clocal = 0;
  1973. unsigned long flags;
  1974. /*
  1975. * If non-blocking mode is set, or the port is not enabled,
  1976. * then make the check up front and then exit.
  1977. */
  1978. if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
  1979. info->flags |= ASYNC_NORMAL_ACTIVE;
  1980. return 0;
  1981. }
  1982. if (tty->termios->c_cflag & CLOCAL)
  1983. do_clocal = 1;
  1984. /*
  1985. * Block waiting for the carrier detect and the line to become
  1986. * free (i.e., not in use by the callout). While we are in
  1987. * this loop, info->count is dropped by one, so that
  1988. * mxser_close() knows when to free things. We restore it upon
  1989. * exit, either normal or abnormal.
  1990. */
  1991. retval = 0;
  1992. add_wait_queue(&info->open_wait, &wait);
  1993. spin_lock_irqsave(&info->slock, flags);
  1994. if (!tty_hung_up_p(filp))
  1995. info->count--;
  1996. spin_unlock_irqrestore(&info->slock, flags);
  1997. info->blocked_open++;
  1998. while (1) {
  1999. spin_lock_irqsave(&info->slock, flags);
  2000. outb(inb(info->base + UART_MCR) |
  2001. UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
  2002. spin_unlock_irqrestore(&info->slock, flags);
  2003. set_current_state(TASK_INTERRUPTIBLE);
  2004. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
  2005. if (info->flags & ASYNC_HUP_NOTIFY)
  2006. retval = -EAGAIN;
  2007. else
  2008. retval = -ERESTARTSYS;
  2009. break;
  2010. }
  2011. if (!(info->flags & ASYNC_CLOSING) &&
  2012. (do_clocal ||
  2013. (inb(info->base + UART_MSR) & UART_MSR_DCD)))
  2014. break;
  2015. if (signal_pending(current)) {
  2016. retval = -ERESTARTSYS;
  2017. break;
  2018. }
  2019. schedule();
  2020. }
  2021. set_current_state(TASK_RUNNING);
  2022. remove_wait_queue(&info->open_wait, &wait);
  2023. if (!tty_hung_up_p(filp))
  2024. info->count++;
  2025. info->blocked_open--;
  2026. if (retval)
  2027. return retval;
  2028. info->flags |= ASYNC_NORMAL_ACTIVE;
  2029. return 0;
  2030. }
  2031. static int mxser_startup(struct mxser_struct *info)
  2032. {
  2033. unsigned long page;
  2034. unsigned long flags;
  2035. page = __get_free_page(GFP_KERNEL);
  2036. if (!page)
  2037. return -ENOMEM;
  2038. spin_lock_irqsave(&info->slock, flags);
  2039. if (info->flags & ASYNC_INITIALIZED) {
  2040. free_page(page);
  2041. spin_unlock_irqrestore(&info->slock, flags);
  2042. return 0;
  2043. }
  2044. if (!info->base || !info->type) {
  2045. if (info->tty)
  2046. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2047. free_page(page);
  2048. spin_unlock_irqrestore(&info->slock, flags);
  2049. return 0;
  2050. }
  2051. if (info->xmit_buf)
  2052. free_page(page);
  2053. else
  2054. info->xmit_buf = (unsigned char *) page;
  2055. /*
  2056. * Clear the FIFO buffers and disable them
  2057. * (they will be reenabled in mxser_change_speed())
  2058. */
  2059. if (info->IsMoxaMustChipFlag)
  2060. outb((UART_FCR_CLEAR_RCVR |
  2061. UART_FCR_CLEAR_XMIT |
  2062. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
  2063. else
  2064. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  2065. info->base + UART_FCR);
  2066. /*
  2067. * At this point there's no way the LSR could still be 0xFF;
  2068. * if it is, then bail out, because there's likely no UART
  2069. * here.
  2070. */
  2071. if (inb(info->base + UART_LSR) == 0xff) {
  2072. spin_unlock_irqrestore(&info->slock, flags);
  2073. if (capable(CAP_SYS_ADMIN)) {
  2074. if (info->tty)
  2075. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2076. return 0;
  2077. } else
  2078. return -ENODEV;
  2079. }
  2080. /*
  2081. * Clear the interrupt registers.
  2082. */
  2083. (void) inb(info->base + UART_LSR);
  2084. (void) inb(info->base + UART_RX);
  2085. (void) inb(info->base + UART_IIR);
  2086. (void) inb(info->base + UART_MSR);
  2087. /*
  2088. * Now, initialize the UART
  2089. */
  2090. outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
  2091. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  2092. outb(info->MCR, info->base + UART_MCR);
  2093. /*
  2094. * Finally, enable interrupts
  2095. */
  2096. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  2097. /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
  2098. /* following add by Victor Yu. 08-30-2002 */
  2099. if (info->IsMoxaMustChipFlag)
  2100. info->IER |= MOXA_MUST_IER_EGDAI;
  2101. /* above add by Victor Yu. 08-30-2002 */
  2102. outb(info->IER, info->base + UART_IER); /* enable interrupts */
  2103. /*
  2104. * And clear the interrupt registers again for luck.
  2105. */
  2106. (void) inb(info->base + UART_LSR);
  2107. (void) inb(info->base + UART_RX);
  2108. (void) inb(info->base + UART_IIR);
  2109. (void) inb(info->base + UART_MSR);
  2110. if (info->tty)
  2111. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  2112. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  2113. /*
  2114. * and set the speed of the serial port
  2115. */
  2116. spin_unlock_irqrestore(&info->slock, flags);
  2117. mxser_change_speed(info, NULL);
  2118. info->flags |= ASYNC_INITIALIZED;
  2119. return 0;
  2120. }
  2121. /*
  2122. * This routine will shutdown a serial port; interrupts maybe disabled, and
  2123. * DTR is dropped if the hangup on close termio flag is on.
  2124. */
  2125. static void mxser_shutdown(struct mxser_struct *info)
  2126. {
  2127. unsigned long flags;
  2128. if (!(info->flags & ASYNC_INITIALIZED))
  2129. return;
  2130. spin_lock_irqsave(&info->slock, flags);
  2131. /*
  2132. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  2133. * here so the queue might never be waken up
  2134. */
  2135. wake_up_interruptible(&info->delta_msr_wait);
  2136. /*
  2137. * Free the IRQ, if necessary
  2138. */
  2139. if (info->xmit_buf) {
  2140. free_page((unsigned long) info->xmit_buf);
  2141. info->xmit_buf = NULL;
  2142. }
  2143. info->IER = 0;
  2144. outb(0x00, info->base + UART_IER);
  2145. if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
  2146. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  2147. outb(info->MCR, info->base + UART_MCR);
  2148. /* clear Rx/Tx FIFO's */
  2149. /* following add by Victor Yu. 08-30-2002 */
  2150. if (info->IsMoxaMustChipFlag)
  2151. outb((UART_FCR_CLEAR_RCVR |
  2152. UART_FCR_CLEAR_XMIT |
  2153. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
  2154. else
  2155. /* above add by Victor Yu. 08-30-2002 */
  2156. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  2157. info->base + UART_FCR);
  2158. /* read data port to reset things */
  2159. (void) inb(info->base + UART_RX);
  2160. if (info->tty)
  2161. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2162. info->flags &= ~ASYNC_INITIALIZED;
  2163. /* following add by Victor Yu. 09-23-2002 */
  2164. if (info->IsMoxaMustChipFlag)
  2165. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
  2166. /* above add by Victor Yu. 09-23-2002 */
  2167. spin_unlock_irqrestore(&info->slock, flags);
  2168. }
  2169. /*
  2170. * This routine is called to set the UART divisor registers to match
  2171. * the specified baud rate for a serial port.
  2172. */
  2173. static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
  2174. {
  2175. unsigned cflag, cval, fcr;
  2176. int ret = 0;
  2177. unsigned char status;
  2178. long baud;
  2179. unsigned long flags;
  2180. if (!info->tty || !info->tty->termios)
  2181. return ret;
  2182. cflag = info->tty->termios->c_cflag;
  2183. if (!(info->base))
  2184. return ret;
  2185. #ifndef B921600
  2186. #define B921600 (B460800 +1)
  2187. #endif
  2188. if (mxser_set_baud_method[info->port] == 0) {
  2189. baud = tty_get_baud_rate(info->tty);
  2190. if (mxser_set_baud(info, baud) == -1) {
  2191. /* Use previous rate on a failure */
  2192. if (old_termios) {
  2193. baud = tty_termios_baud_rate(old_termios);
  2194. tty_encode_baud_rate(info->tty, baud, baud);
  2195. }
  2196. }
  2197. }
  2198. /* byte size and parity */
  2199. switch (cflag & CSIZE) {
  2200. case CS5:
  2201. cval = 0x00;
  2202. break;
  2203. case CS6:
  2204. cval = 0x01;
  2205. break;
  2206. case CS7:
  2207. cval = 0x02;
  2208. break;
  2209. case CS8:
  2210. cval = 0x03;
  2211. break;
  2212. default:
  2213. cval = 0x00;
  2214. break; /* too keep GCC shut... */
  2215. }
  2216. if (cflag & CSTOPB)
  2217. cval |= 0x04;
  2218. if (cflag & PARENB)
  2219. cval |= UART_LCR_PARITY;
  2220. if (!(cflag & PARODD))
  2221. cval |= UART_LCR_EPAR;
  2222. if (cflag & CMSPAR)
  2223. cval |= UART_LCR_SPAR;
  2224. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  2225. if (info->IsMoxaMustChipFlag) {
  2226. fcr = UART_FCR_ENABLE_FIFO;
  2227. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  2228. SET_MOXA_MUST_FIFO_VALUE(info);
  2229. } else
  2230. fcr = 0;
  2231. } else {
  2232. fcr = UART_FCR_ENABLE_FIFO;
  2233. /* following add by Victor Yu. 08-30-2002 */
  2234. if (info->IsMoxaMustChipFlag) {
  2235. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  2236. SET_MOXA_MUST_FIFO_VALUE(info);
  2237. } else {
  2238. /* above add by Victor Yu. 08-30-2002 */
  2239. switch (info->rx_trigger) {
  2240. case 1:
  2241. fcr |= UART_FCR_TRIGGER_1;
  2242. break;
  2243. case 4:
  2244. fcr |= UART_FCR_TRIGGER_4;
  2245. break;
  2246. case 8:
  2247. fcr |= UART_FCR_TRIGGER_8;
  2248. break;
  2249. default:
  2250. fcr |= UART_FCR_TRIGGER_14;
  2251. break;
  2252. }
  2253. }
  2254. }
  2255. /* CTS flow control flag and modem status interrupts */
  2256. info->IER &= ~UART_IER_MSI;
  2257. info->MCR &= ~UART_MCR_AFE;
  2258. if (cflag & CRTSCTS) {
  2259. info->flags |= ASYNC_CTS_FLOW;
  2260. info->IER |= UART_IER_MSI;
  2261. if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
  2262. info->MCR |= UART_MCR_AFE;
  2263. } else {
  2264. status = inb(info->base + UART_MSR);
  2265. if (info->tty->hw_stopped) {
  2266. if (status & UART_MSR_CTS) {
  2267. info->tty->hw_stopped = 0;
  2268. if ((info->type != PORT_16550A) &&
  2269. (!info->IsMoxaMustChipFlag)) {
  2270. info->IER |= UART_IER_THRI;
  2271. outb(info->IER, info->base + UART_IER);
  2272. }
  2273. set_bit(MXSER_EVENT_TXLOW, &info->event);
  2274. schedule_work(&info->tqueue); }
  2275. } else {
  2276. if (!(status & UART_MSR_CTS)) {
  2277. info->tty->hw_stopped = 1;
  2278. if ((info->type != PORT_16550A) &&
  2279. (!info->IsMoxaMustChipFlag)) {
  2280. info->IER &= ~UART_IER_THRI;
  2281. outb(info->IER, info->base + UART_IER);
  2282. }
  2283. }
  2284. }
  2285. }
  2286. } else {
  2287. info->flags &= ~ASYNC_CTS_FLOW;
  2288. }
  2289. outb(info->MCR, info->base + UART_MCR);
  2290. if (cflag & CLOCAL) {
  2291. info->flags &= ~ASYNC_CHECK_CD;
  2292. } else {
  2293. info->flags |= ASYNC_CHECK_CD;
  2294. info->IER |= UART_IER_MSI;
  2295. }
  2296. outb(info->IER, info->base + UART_IER);
  2297. /*
  2298. * Set up parity check flag
  2299. */
  2300. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  2301. if (I_INPCK(info->tty))
  2302. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  2303. if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
  2304. info->read_status_mask |= UART_LSR_BI;
  2305. info->ignore_status_mask = 0;
  2306. if (I_IGNBRK(info->tty)) {
  2307. info->ignore_status_mask |= UART_LSR_BI;
  2308. info->read_status_mask |= UART_LSR_BI;
  2309. /*
  2310. * If we're ignore parity and break indicators, ignore
  2311. * overruns too. (For real raw support).
  2312. */
  2313. if (I_IGNPAR(info->tty)) {
  2314. info->ignore_status_mask |=
  2315. UART_LSR_OE |
  2316. UART_LSR_PE |
  2317. UART_LSR_FE;
  2318. info->read_status_mask |=
  2319. UART_LSR_OE |
  2320. UART_LSR_PE |
  2321. UART_LSR_FE;
  2322. }
  2323. }
  2324. /* following add by Victor Yu. 09-02-2002 */
  2325. if (info->IsMoxaMustChipFlag) {
  2326. spin_lock_irqsave(&info->slock, flags);
  2327. SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
  2328. SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
  2329. if (I_IXON(info->tty)) {
  2330. ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  2331. } else {
  2332. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  2333. }
  2334. if (I_IXOFF(info->tty)) {
  2335. ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
  2336. } else {
  2337. DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
  2338. }
  2339. /*
  2340. if ( I_IXANY(info->tty) ) {
  2341. info->MCR |= MOXA_MUST_MCR_XON_ANY;
  2342. ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
  2343. } else {
  2344. info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
  2345. DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
  2346. }
  2347. */
  2348. spin_unlock_irqrestore(&info->slock, flags);
  2349. }
  2350. /* above add by Victor Yu. 09-02-2002 */
  2351. outb(fcr, info->base + UART_FCR); /* set fcr */
  2352. outb(cval, info->base + UART_LCR);
  2353. return ret;
  2354. }
  2355. static int mxser_set_baud(struct mxser_struct *info, long newspd)
  2356. {
  2357. int quot = 0;
  2358. unsigned char cval;
  2359. unsigned long flags;
  2360. unsigned int baud;
  2361. if (!info->tty || !info->tty->termios)
  2362. return -1;
  2363. if (!(info->base))
  2364. return -1;
  2365. if (newspd > info->MaxCanSetBaudRate)
  2366. return -1;
  2367. info->realbaud = newspd;
  2368. if (newspd == 134) {
  2369. quot = (2 * info->baud_base / 269);
  2370. tty_encode_baud_rate(info->tty, 134, 134);
  2371. } else if (newspd) {
  2372. quot = info->baud_base / newspd;
  2373. if (quot == 0)
  2374. quot = 1;
  2375. baud = info->baud_base / quot;
  2376. tty_encode_baud_rate(info->tty, baud, baud);
  2377. } else {
  2378. quot = 0;
  2379. tty_encode_baud_rate(info->tty, 0, 0);
  2380. }
  2381. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  2382. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  2383. if (quot) {
  2384. spin_lock_irqsave(&info->slock, flags);
  2385. info->MCR |= UART_MCR_DTR;
  2386. outb(info->MCR, info->base + UART_MCR);
  2387. spin_unlock_irqrestore(&info->slock, flags);
  2388. } else {
  2389. spin_lock_irqsave(&info->slock, flags);
  2390. info->MCR &= ~UART_MCR_DTR;
  2391. outb(info->MCR, info->base + UART_MCR);
  2392. spin_unlock_irqrestore(&info->slock, flags);
  2393. return 0;
  2394. }
  2395. cval = inb(info->base + UART_LCR);
  2396. outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
  2397. outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
  2398. outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
  2399. outb(cval, info->base + UART_LCR); /* reset DLAB */
  2400. return 0;
  2401. }
  2402. /*
  2403. * ------------------------------------------------------------
  2404. * friends of mxser_ioctl()
  2405. * ------------------------------------------------------------
  2406. */
  2407. static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
  2408. {
  2409. struct serial_struct tmp;
  2410. if (!retinfo)
  2411. return -EFAULT;
  2412. memset(&tmp, 0, sizeof(tmp));
  2413. tmp.type = info->type;
  2414. tmp.line = info->port;
  2415. tmp.port = info->base;
  2416. tmp.irq = info->irq;
  2417. tmp.flags = info->flags;
  2418. tmp.baud_base = info->baud_base;
  2419. tmp.close_delay = info->close_delay;
  2420. tmp.closing_wait = info->closing_wait;
  2421. tmp.custom_divisor = info->custom_divisor;
  2422. tmp.hub6 = 0;
  2423. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  2424. return -EFAULT;
  2425. return 0;
  2426. }
  2427. static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
  2428. {
  2429. struct serial_struct new_serial;
  2430. unsigned int flags;
  2431. int retval = 0;
  2432. if (!new_info || !info->base)
  2433. return -EFAULT;
  2434. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  2435. return -EFAULT;
  2436. if ((new_serial.irq != info->irq) ||
  2437. (new_serial.port != info->base) ||
  2438. (new_serial.custom_divisor != info->custom_divisor) ||
  2439. (new_serial.baud_base != info->baud_base))
  2440. return -EPERM;
  2441. flags = info->flags & ASYNC_SPD_MASK;
  2442. if (!capable(CAP_SYS_ADMIN)) {
  2443. if ((new_serial.baud_base != info->baud_base) ||
  2444. (new_serial.close_delay != info->close_delay) ||
  2445. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
  2446. return -EPERM;
  2447. info->flags = ((info->flags & ~ASYNC_USR_MASK) |
  2448. (new_serial.flags & ASYNC_USR_MASK));
  2449. } else {
  2450. /*
  2451. * OK, past this point, all the error checking has been done.
  2452. * At this point, we start making changes.....
  2453. */
  2454. info->flags = ((info->flags & ~ASYNC_FLAGS) |
  2455. (new_serial.flags & ASYNC_FLAGS));
  2456. info->close_delay = new_serial.close_delay * HZ / 100;
  2457. info->closing_wait = new_serial.closing_wait * HZ / 100;
  2458. info->tty->low_latency =
  2459. (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2460. info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
  2461. }
  2462. /* added by casper, 3/17/2000, for mouse */
  2463. info->type = new_serial.type;
  2464. process_txrx_fifo(info);
  2465. if (info->flags & ASYNC_INITIALIZED) {
  2466. if (flags != (info->flags & ASYNC_SPD_MASK)) {
  2467. mxser_change_speed(info, NULL);
  2468. }
  2469. } else {
  2470. retval = mxser_startup(info);
  2471. }
  2472. return retval;
  2473. }
  2474. /*
  2475. * mxser_get_lsr_info - get line status register info
  2476. *
  2477. * Purpose: Let user call ioctl() to get info when the UART physically
  2478. * is emptied. On bus types like RS485, the transmitter must
  2479. * release the bus after transmitting. This must be done when
  2480. * the transmit shift register is empty, not be done when the
  2481. * transmit holding register is empty. This functionality
  2482. * allows an RS485 driver to be written in user space.
  2483. */
  2484. static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
  2485. {
  2486. unsigned char status;
  2487. unsigned int result;
  2488. unsigned long flags;
  2489. spin_lock_irqsave(&info->slock, flags);
  2490. status = inb(info->base + UART_LSR);
  2491. spin_unlock_irqrestore(&info->slock, flags);
  2492. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  2493. return put_user(result, value);
  2494. }
  2495. /*
  2496. * This routine sends a break character out the serial port.
  2497. */
  2498. static void mxser_send_break(struct mxser_struct *info, int duration)
  2499. {
  2500. unsigned long flags;
  2501. if (!info->base)
  2502. return;
  2503. set_current_state(TASK_INTERRUPTIBLE);
  2504. spin_lock_irqsave(&info->slock, flags);
  2505. outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
  2506. info->base + UART_LCR);
  2507. spin_unlock_irqrestore(&info->slock, flags);
  2508. schedule_timeout(duration);
  2509. spin_lock_irqsave(&info->slock, flags);
  2510. outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
  2511. info->base + UART_LCR);
  2512. spin_unlock_irqrestore(&info->slock, flags);
  2513. }
  2514. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  2515. {
  2516. struct mxser_struct *info = tty->driver_data;
  2517. unsigned char control, status;
  2518. unsigned long flags;
  2519. if (tty->index == MXSER_PORTS)
  2520. return -ENOIOCTLCMD;
  2521. if (tty->flags & (1 << TTY_IO_ERROR))
  2522. return -EIO;
  2523. control = info->MCR;
  2524. spin_lock_irqsave(&info->slock, flags);
  2525. status = inb(info->base + UART_MSR);
  2526. if (status & UART_MSR_ANY_DELTA)
  2527. mxser_check_modem_status(info, status);
  2528. spin_unlock_irqrestore(&info->slock, flags);
  2529. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  2530. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  2531. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  2532. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  2533. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  2534. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  2535. }
  2536. static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
  2537. {
  2538. struct mxser_struct *info = tty->driver_data;
  2539. unsigned long flags;
  2540. if (tty->index == MXSER_PORTS)
  2541. return -ENOIOCTLCMD;
  2542. if (tty->flags & (1 << TTY_IO_ERROR))
  2543. return -EIO;
  2544. spin_lock_irqsave(&info->slock, flags);
  2545. if (set & TIOCM_RTS)
  2546. info->MCR |= UART_MCR_RTS;
  2547. if (set & TIOCM_DTR)
  2548. info->MCR |= UART_MCR_DTR;
  2549. if (clear & TIOCM_RTS)
  2550. info->MCR &= ~UART_MCR_RTS;
  2551. if (clear & TIOCM_DTR)
  2552. info->MCR &= ~UART_MCR_DTR;
  2553. outb(info->MCR, info->base + UART_MCR);
  2554. spin_unlock_irqrestore(&info->slock, flags);
  2555. return 0;
  2556. }
  2557. static int mxser_read_register(int, unsigned short *);
  2558. static int mxser_program_mode(int);
  2559. static void mxser_normal_mode(int);
  2560. static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
  2561. {
  2562. int id, i, bits;
  2563. unsigned short regs[16], irq;
  2564. unsigned char scratch, scratch2;
  2565. hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
  2566. id = mxser_read_register(cap, regs);
  2567. if (id == C168_ASIC_ID) {
  2568. hwconf->board_type = MXSER_BOARD_C168_ISA;
  2569. hwconf->ports = 8;
  2570. } else if (id == C104_ASIC_ID) {
  2571. hwconf->board_type = MXSER_BOARD_C104_ISA;
  2572. hwconf->ports = 4;
  2573. } else if (id == C102_ASIC_ID) {
  2574. hwconf->board_type = MXSER_BOARD_C102_ISA;
  2575. hwconf->ports = 2;
  2576. } else if (id == CI132_ASIC_ID) {
  2577. hwconf->board_type = MXSER_BOARD_CI132;
  2578. hwconf->ports = 2;
  2579. } else if (id == CI134_ASIC_ID) {
  2580. hwconf->board_type = MXSER_BOARD_CI134;
  2581. hwconf->ports = 4;
  2582. } else if (id == CI104J_ASIC_ID) {
  2583. hwconf->board_type = MXSER_BOARD_CI104J;
  2584. hwconf->ports = 4;
  2585. } else
  2586. return 0;
  2587. irq = 0;
  2588. if (hwconf->ports == 2) {
  2589. irq = regs[9] & 0xF000;
  2590. irq = irq | (irq >> 4);
  2591. if (irq != (regs[9] & 0xFF00))
  2592. return MXSER_ERR_IRQ_CONFLIT;
  2593. } else if (hwconf->ports == 4) {
  2594. irq = regs[9] & 0xF000;
  2595. irq = irq | (irq >> 4);
  2596. irq = irq | (irq >> 8);
  2597. if (irq != regs[9])
  2598. return MXSER_ERR_IRQ_CONFLIT;
  2599. } else if (hwconf->ports == 8) {
  2600. irq = regs[9] & 0xF000;
  2601. irq = irq | (irq >> 4);
  2602. irq = irq | (irq >> 8);
  2603. if ((irq != regs[9]) || (irq != regs[10]))
  2604. return MXSER_ERR_IRQ_CONFLIT;
  2605. }
  2606. if (!irq)
  2607. return MXSER_ERR_IRQ;
  2608. hwconf->irq = ((int)(irq & 0xF000) >> 12);
  2609. for (i = 0; i < 8; i++)
  2610. hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
  2611. if ((regs[12] & 0x80) == 0)
  2612. return MXSER_ERR_VECTOR;
  2613. hwconf->vector = (int)regs[11]; /* interrupt vector */
  2614. if (id == 1)
  2615. hwconf->vector_mask = 0x00FF;
  2616. else
  2617. hwconf->vector_mask = 0x000F;
  2618. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2619. if (regs[12] & bits) {
  2620. hwconf->baud_base[i] = 921600;
  2621. hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
  2622. } else {
  2623. hwconf->baud_base[i] = 115200;
  2624. hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
  2625. }
  2626. }
  2627. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2628. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2629. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2630. outb(scratch2, cap + UART_LCR);
  2631. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2632. scratch = inb(cap + UART_IIR);
  2633. if (scratch & 0xC0)
  2634. hwconf->uart_type = PORT_16550A;
  2635. else
  2636. hwconf->uart_type = PORT_16450;
  2637. if (id == 1)
  2638. hwconf->ports = 8;
  2639. else
  2640. hwconf->ports = 4;
  2641. request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
  2642. request_region(hwconf->vector, 1, "mxser(vector)");
  2643. return hwconf->ports;
  2644. }
  2645. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  2646. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  2647. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  2648. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  2649. #define EN_CCMD 0x000 /* Chip's command register */
  2650. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  2651. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  2652. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  2653. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  2654. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  2655. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  2656. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  2657. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  2658. static int mxser_read_register(int port, unsigned short *regs)
  2659. {
  2660. int i, k, value, id;
  2661. unsigned int j;
  2662. id = mxser_program_mode(port);
  2663. if (id < 0)
  2664. return id;
  2665. for (i = 0; i < 14; i++) {
  2666. k = (i & 0x3F) | 0x180;
  2667. for (j = 0x100; j > 0; j >>= 1) {
  2668. outb(CHIP_CS, port);
  2669. if (k & j) {
  2670. outb(CHIP_CS | CHIP_DO, port);
  2671. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  2672. } else {
  2673. outb(CHIP_CS, port);
  2674. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  2675. }
  2676. }
  2677. (void)inb(port);
  2678. value = 0;
  2679. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  2680. outb(CHIP_CS, port);
  2681. outb(CHIP_CS | CHIP_SK, port);
  2682. if (inb(port) & CHIP_DI)
  2683. value |= j;
  2684. }
  2685. regs[i] = value;
  2686. outb(0, port);
  2687. }
  2688. mxser_normal_mode(port);
  2689. return id;
  2690. }
  2691. static int mxser_program_mode(int port)
  2692. {
  2693. int id, i, j, n;
  2694. /* unsigned long flags; */
  2695. spin_lock(&gm_lock);
  2696. outb(0, port);
  2697. outb(0, port);
  2698. outb(0, port);
  2699. (void)inb(port);
  2700. (void)inb(port);
  2701. outb(0, port);
  2702. (void)inb(port);
  2703. /* restore_flags(flags); */
  2704. spin_unlock(&gm_lock);
  2705. id = inb(port + 1) & 0x1F;
  2706. if ((id != C168_ASIC_ID) &&
  2707. (id != C104_ASIC_ID) &&
  2708. (id != C102_ASIC_ID) &&
  2709. (id != CI132_ASIC_ID) &&
  2710. (id != CI134_ASIC_ID) &&
  2711. (id != CI104J_ASIC_ID))
  2712. return -1;
  2713. for (i = 0, j = 0; i < 4; i++) {
  2714. n = inb(port + 2);
  2715. if (n == 'M') {
  2716. j = 1;
  2717. } else if ((j == 1) && (n == 1)) {
  2718. j = 2;
  2719. break;
  2720. } else
  2721. j = 0;
  2722. }
  2723. if (j != 2)
  2724. id = -2;
  2725. return id;
  2726. }
  2727. static void mxser_normal_mode(int port)
  2728. {
  2729. int i, n;
  2730. outb(0xA5, port + 1);
  2731. outb(0x80, port + 3);
  2732. outb(12, port + 0); /* 9600 bps */
  2733. outb(0, port + 1);
  2734. outb(0x03, port + 3); /* 8 data bits */
  2735. outb(0x13, port + 4); /* loop back mode */
  2736. for (i = 0; i < 16; i++) {
  2737. n = inb(port + 5);
  2738. if ((n & 0x61) == 0x60)
  2739. break;
  2740. if ((n & 1) == 1)
  2741. (void)inb(port);
  2742. }
  2743. outb(0x00, port + 4);
  2744. }
  2745. module_init(mxser_module_init);
  2746. module_exit(mxser_module_exit);