mach-qt2410.c 8.7 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
  2. *
  3. * Copyright (C) 2006 by OpenMoko, Inc.
  4. * Author: Harald Welte <laforge@openmoko.org>
  5. * All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/types.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/list.h>
  27. #include <linux/timer.h>
  28. #include <linux/init.h>
  29. #include <linux/sysdev.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/serial_core.h>
  32. #include <linux/spi/spi.h>
  33. #include <linux/spi/spi_bitbang.h>
  34. #include <linux/mtd/mtd.h>
  35. #include <linux/mtd/nand.h>
  36. #include <linux/mtd/nand_ecc.h>
  37. #include <linux/mtd/partitions.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/map.h>
  40. #include <asm/mach/irq.h>
  41. #include <asm/hardware.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/mach-types.h>
  45. #include <asm/arch/regs-gpio.h>
  46. #include <asm/arch/leds-gpio.h>
  47. #include <asm/plat-s3c/regs-serial.h>
  48. #include <asm/arch/fb.h>
  49. #include <asm/plat-s3c/nand.h>
  50. #include <asm/plat-s3c24xx/udc.h>
  51. #include <asm/arch/spi.h>
  52. #include <asm/arch/spi-gpio.h>
  53. #include <asm/plat-s3c24xx/common-smdk.h>
  54. #include <asm/plat-s3c24xx/devs.h>
  55. #include <asm/plat-s3c24xx/cpu.h>
  56. #include <asm/plat-s3c24xx/pm.h>
  57. static struct map_desc qt2410_iodesc[] __initdata = {
  58. { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
  59. };
  60. #define UCON S3C2410_UCON_DEFAULT
  61. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  62. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  63. static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
  64. [0] = {
  65. .hwport = 0,
  66. .flags = 0,
  67. .ucon = UCON,
  68. .ulcon = ULCON,
  69. .ufcon = UFCON,
  70. },
  71. [1] = {
  72. .hwport = 1,
  73. .flags = 0,
  74. .ucon = UCON,
  75. .ulcon = ULCON,
  76. .ufcon = UFCON,
  77. },
  78. [2] = {
  79. .hwport = 2,
  80. .flags = 0,
  81. .ucon = UCON,
  82. .ulcon = ULCON,
  83. .ufcon = UFCON,
  84. }
  85. };
  86. /* LCD driver info */
  87. static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
  88. {
  89. /* Configuration for 640x480 SHARP LQ080V3DG01 */
  90. .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
  91. S3C2410_LCDCON1_TFT |
  92. S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
  93. .lcdcon2 = S3C2410_LCDCON2_VBPD(18) | /* 19 */
  94. S3C2410_LCDCON2_LINEVAL(479) |
  95. S3C2410_LCDCON2_VFPD(10) | /* 11 */
  96. S3C2410_LCDCON2_VSPW(14), /* 15 */
  97. .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
  98. S3C2410_LCDCON4_HSPW(95), /* 96 */
  99. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  100. S3C2410_LCDCON5_INVVLINE |
  101. S3C2410_LCDCON5_INVVFRAME |
  102. S3C2410_LCDCON5_PWREN |
  103. S3C2410_LCDCON5_HWSWP,
  104. .type = S3C2410_LCDCON1_TFT,
  105. .width = 640,
  106. .height = 480,
  107. .xres = 640,
  108. .yres = 480,
  109. .bpp = 16,
  110. .left_margin = 44,
  111. .right_margin = 116,
  112. },
  113. {
  114. /* Configuration for 480x640 toppoly TD028TTEC1 */
  115. .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
  116. S3C2410_LCDCON1_TFT |
  117. S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
  118. .lcdcon2 = S3C2410_LCDCON2_VBPD(1) | /* 2 */
  119. S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
  120. S3C2410_LCDCON2_VFPD(3) | /* 4 */
  121. S3C2410_LCDCON2_VSPW(1), /* 2 */
  122. .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
  123. S3C2410_LCDCON4_HSPW(7), /* 8 */
  124. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  125. S3C2410_LCDCON5_INVVLINE |
  126. S3C2410_LCDCON5_INVVFRAME |
  127. S3C2410_LCDCON5_PWREN |
  128. S3C2410_LCDCON5_HWSWP,
  129. .type = S3C2410_LCDCON1_TFT,
  130. .width = 480,
  131. .height = 640,
  132. .xres = 480,
  133. .yres = 640,
  134. .bpp = 16,
  135. .left_margin = 8,
  136. .right_margin = 24,
  137. },
  138. {
  139. /* Config for 240x320 LCD */
  140. .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
  141. S3C2410_LCDCON1_TFT |
  142. S3C2410_LCDCON1_CLKVAL(0x04),
  143. .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
  144. S3C2410_LCDCON2_LINEVAL(319) |
  145. S3C2410_LCDCON2_VFPD(6) |
  146. S3C2410_LCDCON2_VSPW(3),
  147. .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
  148. S3C2410_LCDCON4_HSPW(3),
  149. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  150. S3C2410_LCDCON5_INVVLINE |
  151. S3C2410_LCDCON5_INVVFRAME |
  152. S3C2410_LCDCON5_PWREN |
  153. S3C2410_LCDCON5_HWSWP,
  154. .type = S3C2410_LCDCON1_TFT,
  155. .width = 240,
  156. .height = 320,
  157. .xres = 240,
  158. .yres = 320,
  159. .bpp = 16,
  160. .left_margin = 13,
  161. .right_margin = 8,
  162. },
  163. };
  164. static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
  165. .displays = qt2410_lcd_cfg,
  166. .num_displays = ARRAY_SIZE(qt2410_lcd_cfg),
  167. .default_display = 0,
  168. .lpcsel = ((0xCE6) & ~7) | 1<<4,
  169. };
  170. /* CS8900 */
  171. static struct resource qt2410_cs89x0_resources[] = {
  172. [0] = {
  173. .start = 0x19000000,
  174. .end = 0x19000000 + 16,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. [1] = {
  178. .start = IRQ_EINT9,
  179. .end = IRQ_EINT9,
  180. .flags = IORESOURCE_IRQ,
  181. },
  182. };
  183. static struct platform_device qt2410_cs89x0 = {
  184. .name = "cirrus-cs89x0",
  185. .num_resources = ARRAY_SIZE(qt2410_cs89x0_resources),
  186. .resource = qt2410_cs89x0_resources,
  187. };
  188. /* LED */
  189. static struct s3c24xx_led_platdata qt2410_pdata_led = {
  190. .gpio = S3C2410_GPB0,
  191. .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
  192. .name = "led",
  193. .def_trigger = "timer",
  194. };
  195. static struct platform_device qt2410_led = {
  196. .name = "s3c24xx_led",
  197. .id = 0,
  198. .dev = {
  199. .platform_data = &qt2410_pdata_led,
  200. },
  201. };
  202. /* SPI */
  203. static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
  204. {
  205. switch (cs) {
  206. case BITBANG_CS_ACTIVE:
  207. s3c2410_gpio_setpin(S3C2410_GPB5, 0);
  208. break;
  209. case BITBANG_CS_INACTIVE:
  210. s3c2410_gpio_setpin(S3C2410_GPB5, 1);
  211. break;
  212. }
  213. }
  214. static struct s3c2410_spigpio_info spi_gpio_cfg = {
  215. .pin_clk = S3C2410_GPG7,
  216. .pin_mosi = S3C2410_GPG6,
  217. .pin_miso = S3C2410_GPG5,
  218. .chip_select = &spi_gpio_cs,
  219. };
  220. static struct platform_device qt2410_spi = {
  221. .name = "s3c24xx-spi-gpio",
  222. .id = 1,
  223. .dev = {
  224. .platform_data = &spi_gpio_cfg,
  225. },
  226. };
  227. /* Board devices */
  228. static struct platform_device *qt2410_devices[] __initdata = {
  229. &s3c_device_usb,
  230. &s3c_device_lcd,
  231. &s3c_device_wdt,
  232. &s3c_device_i2c,
  233. &s3c_device_iis,
  234. &s3c_device_sdi,
  235. &s3c_device_usbgadget,
  236. &qt2410_spi,
  237. &qt2410_cs89x0,
  238. &qt2410_led,
  239. };
  240. static struct mtd_partition qt2410_nand_part[] = {
  241. [0] = {
  242. .name = "U-Boot",
  243. .size = 0x30000,
  244. .offset = 0,
  245. },
  246. [1] = {
  247. .name = "U-Boot environment",
  248. .offset = 0x30000,
  249. .size = 0x4000,
  250. },
  251. [2] = {
  252. .name = "kernel",
  253. .offset = 0x34000,
  254. .size = SZ_2M,
  255. },
  256. [3] = {
  257. .name = "initrd",
  258. .offset = 0x234000,
  259. .size = SZ_4M,
  260. },
  261. [4] = {
  262. .name = "jffs2",
  263. .offset = 0x634000,
  264. .size = 0x39cc000,
  265. },
  266. };
  267. static struct s3c2410_nand_set qt2410_nand_sets[] = {
  268. [0] = {
  269. .name = "NAND",
  270. .nr_chips = 1,
  271. .nr_partitions = ARRAY_SIZE(qt2410_nand_part),
  272. .partitions = qt2410_nand_part,
  273. },
  274. };
  275. /* choose a set of timings which should suit most 512Mbit
  276. * chips and beyond.
  277. */
  278. static struct s3c2410_platform_nand qt2410_nand_info = {
  279. .tacls = 20,
  280. .twrph0 = 60,
  281. .twrph1 = 20,
  282. .nr_sets = ARRAY_SIZE(qt2410_nand_sets),
  283. .sets = qt2410_nand_sets,
  284. };
  285. /* UDC */
  286. static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
  287. };
  288. static char tft_type = 's';
  289. static int __init qt2410_tft_setup(char *str)
  290. {
  291. tft_type = str[0];
  292. return 1;
  293. }
  294. __setup("tft=", qt2410_tft_setup);
  295. static void __init qt2410_map_io(void)
  296. {
  297. s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
  298. s3c24xx_init_clocks(12*1000*1000);
  299. s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
  300. }
  301. static void __init qt2410_machine_init(void)
  302. {
  303. s3c_device_nand.dev.platform_data = &qt2410_nand_info;
  304. switch (tft_type) {
  305. case 'p': /* production */
  306. qt2410_fb_info.default_display = 1;
  307. break;
  308. case 'b': /* big */
  309. qt2410_fb_info.default_display = 0;
  310. break;
  311. case 's': /* small */
  312. default:
  313. qt2410_fb_info.default_display = 2;
  314. break;
  315. }
  316. s3c24xx_fb_set_platdata(&qt2410_fb_info);
  317. s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
  318. s3c2410_gpio_setpin(S3C2410_GPB0, 1);
  319. s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
  320. s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
  321. platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
  322. s3c2410_pm_init();
  323. }
  324. MACHINE_START(QT2410, "QT2410")
  325. .phys_io = S3C2410_PA_UART,
  326. .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
  327. .boot_params = S3C2410_SDRAM_PA + 0x100,
  328. .map_io = qt2410_map_io,
  329. .init_irq = s3c24xx_init_irq,
  330. .init_machine = qt2410_machine_init,
  331. .timer = &s3c24xx_timer,
  332. MACHINE_END