htc_drv_txrx.c 21 KB

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  1. /*
  2. * Copyright (c) 2010 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "htc.h"
  17. /******/
  18. /* TX */
  19. /******/
  20. static const int subtype_txq_to_hwq[] = {
  21. [WME_AC_BE] = ATH_TXQ_AC_BE,
  22. [WME_AC_BK] = ATH_TXQ_AC_BK,
  23. [WME_AC_VI] = ATH_TXQ_AC_VI,
  24. [WME_AC_VO] = ATH_TXQ_AC_VO,
  25. };
  26. #define ATH9K_HTC_INIT_TXQ(subtype) do { \
  27. qi.tqi_subtype = subtype_txq_to_hwq[subtype]; \
  28. qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; \
  29. qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; \
  30. qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; \
  31. qi.tqi_physCompBuf = 0; \
  32. qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | \
  33. TXQ_FLAG_TXDESCINT_ENABLE; \
  34. } while (0)
  35. int get_hw_qnum(u16 queue, int *hwq_map)
  36. {
  37. switch (queue) {
  38. case 0:
  39. return hwq_map[WME_AC_VO];
  40. case 1:
  41. return hwq_map[WME_AC_VI];
  42. case 2:
  43. return hwq_map[WME_AC_BE];
  44. case 3:
  45. return hwq_map[WME_AC_BK];
  46. default:
  47. return hwq_map[WME_AC_BE];
  48. }
  49. }
  50. void ath9k_htc_check_stop_queues(struct ath9k_htc_priv *priv)
  51. {
  52. spin_lock_bh(&priv->tx.tx_lock);
  53. priv->tx.queued_cnt++;
  54. if ((priv->tx.queued_cnt >= ATH9K_HTC_TX_THRESHOLD) &&
  55. !(priv->tx.flags & ATH9K_HTC_OP_TX_QUEUES_STOP)) {
  56. priv->tx.flags |= ATH9K_HTC_OP_TX_QUEUES_STOP;
  57. ieee80211_stop_queues(priv->hw);
  58. }
  59. spin_unlock_bh(&priv->tx.tx_lock);
  60. }
  61. void ath9k_htc_check_wake_queues(struct ath9k_htc_priv *priv)
  62. {
  63. spin_lock_bh(&priv->tx.tx_lock);
  64. if ((priv->tx.queued_cnt < ATH9K_HTC_TX_THRESHOLD) &&
  65. (priv->tx.flags & ATH9K_HTC_OP_TX_QUEUES_STOP)) {
  66. priv->tx.flags &= ~ATH9K_HTC_OP_TX_QUEUES_STOP;
  67. ieee80211_wake_queues(priv->hw);
  68. }
  69. spin_unlock_bh(&priv->tx.tx_lock);
  70. }
  71. int ath9k_htc_tx_get_slot(struct ath9k_htc_priv *priv)
  72. {
  73. int slot;
  74. spin_lock_bh(&priv->tx.tx_lock);
  75. slot = find_first_zero_bit(priv->tx.tx_slot, MAX_TX_BUF_NUM);
  76. if (slot >= MAX_TX_BUF_NUM) {
  77. spin_unlock_bh(&priv->tx.tx_lock);
  78. return -ENOBUFS;
  79. }
  80. __set_bit(slot, priv->tx.tx_slot);
  81. spin_unlock_bh(&priv->tx.tx_lock);
  82. return slot;
  83. }
  84. void ath9k_htc_tx_clear_slot(struct ath9k_htc_priv *priv, int slot)
  85. {
  86. spin_lock_bh(&priv->tx.tx_lock);
  87. __clear_bit(slot, priv->tx.tx_slot);
  88. spin_unlock_bh(&priv->tx.tx_lock);
  89. }
  90. static enum htc_endpoint_id get_htc_epid(struct ath9k_htc_priv *priv,
  91. u16 qnum)
  92. {
  93. enum htc_endpoint_id epid;
  94. switch (qnum) {
  95. case 0:
  96. TX_QSTAT_INC(WME_AC_VO);
  97. epid = priv->data_vo_ep;
  98. break;
  99. case 1:
  100. TX_QSTAT_INC(WME_AC_VI);
  101. epid = priv->data_vi_ep;
  102. break;
  103. case 2:
  104. TX_QSTAT_INC(WME_AC_BE);
  105. epid = priv->data_be_ep;
  106. break;
  107. case 3:
  108. default:
  109. TX_QSTAT_INC(WME_AC_BK);
  110. epid = priv->data_bk_ep;
  111. break;
  112. }
  113. return epid;
  114. }
  115. /*
  116. * Removes the driver header and returns the TX slot number
  117. */
  118. static inline int strip_drv_header(struct ath9k_htc_priv *priv,
  119. struct sk_buff *skb)
  120. {
  121. struct ath_common *common = ath9k_hw_common(priv->ah);
  122. struct ath9k_htc_tx_ctl *tx_ctl;
  123. int slot;
  124. tx_ctl = HTC_SKB_CB(skb);
  125. if (tx_ctl->epid == priv->mgmt_ep) {
  126. struct tx_mgmt_hdr *tx_mhdr =
  127. (struct tx_mgmt_hdr *)skb->data;
  128. slot = tx_mhdr->cookie;
  129. skb_pull(skb, sizeof(struct tx_mgmt_hdr));
  130. } else if ((tx_ctl->epid == priv->data_bk_ep) ||
  131. (tx_ctl->epid == priv->data_be_ep) ||
  132. (tx_ctl->epid == priv->data_vi_ep) ||
  133. (tx_ctl->epid == priv->data_vo_ep) ||
  134. (tx_ctl->epid == priv->cab_ep)) {
  135. struct tx_frame_hdr *tx_fhdr =
  136. (struct tx_frame_hdr *)skb->data;
  137. slot = tx_fhdr->cookie;
  138. skb_pull(skb, sizeof(struct tx_frame_hdr));
  139. } else {
  140. ath_err(common, "Unsupported EPID: %d\n", tx_ctl->epid);
  141. slot = -EINVAL;
  142. }
  143. return slot;
  144. }
  145. int ath_htc_txq_update(struct ath9k_htc_priv *priv, int qnum,
  146. struct ath9k_tx_queue_info *qinfo)
  147. {
  148. struct ath_hw *ah = priv->ah;
  149. int error = 0;
  150. struct ath9k_tx_queue_info qi;
  151. ath9k_hw_get_txq_props(ah, qnum, &qi);
  152. qi.tqi_aifs = qinfo->tqi_aifs;
  153. qi.tqi_cwmin = qinfo->tqi_cwmin / 2; /* XXX */
  154. qi.tqi_cwmax = qinfo->tqi_cwmax;
  155. qi.tqi_burstTime = qinfo->tqi_burstTime;
  156. qi.tqi_readyTime = qinfo->tqi_readyTime;
  157. if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {
  158. ath_err(ath9k_hw_common(ah),
  159. "Unable to update hardware queue %u!\n", qnum);
  160. error = -EIO;
  161. } else {
  162. ath9k_hw_resettxqueue(ah, qnum);
  163. }
  164. return error;
  165. }
  166. int ath9k_htc_tx_start(struct ath9k_htc_priv *priv,
  167. struct sk_buff *skb,
  168. u8 slot, bool is_cab)
  169. {
  170. struct ieee80211_hdr *hdr;
  171. struct ieee80211_mgmt *mgmt;
  172. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  173. struct ieee80211_sta *sta = tx_info->control.sta;
  174. struct ieee80211_vif *vif = tx_info->control.vif;
  175. struct ath9k_htc_sta *ista;
  176. struct ath9k_htc_vif *avp = NULL;
  177. struct ath9k_htc_tx_ctl *tx_ctl;
  178. u16 qnum;
  179. __le16 fc;
  180. u8 *tx_fhdr;
  181. u8 sta_idx, vif_idx;
  182. tx_ctl = HTC_SKB_CB(skb);
  183. memset(tx_ctl, 0, sizeof(*tx_ctl));
  184. hdr = (struct ieee80211_hdr *) skb->data;
  185. fc = hdr->frame_control;
  186. /*
  187. * Find out on which interface this packet has to be
  188. * sent out.
  189. */
  190. if (vif) {
  191. avp = (struct ath9k_htc_vif *) vif->drv_priv;
  192. vif_idx = avp->index;
  193. } else {
  194. if (!priv->ah->is_monitoring) {
  195. ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_XMIT,
  196. "VIF is null, but no monitor interface !\n");
  197. return -EINVAL;
  198. }
  199. vif_idx = priv->mon_vif_idx;
  200. }
  201. /*
  202. * Find out which station this packet is destined for.
  203. */
  204. if (sta) {
  205. ista = (struct ath9k_htc_sta *) sta->drv_priv;
  206. sta_idx = ista->index;
  207. } else {
  208. sta_idx = priv->vif_sta_pos[vif_idx];
  209. }
  210. if (ieee80211_is_data(fc)) {
  211. struct tx_frame_hdr tx_hdr;
  212. u32 flags = 0;
  213. u8 *qc;
  214. memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr));
  215. tx_hdr.node_idx = sta_idx;
  216. tx_hdr.vif_idx = vif_idx;
  217. tx_hdr.cookie = slot;
  218. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
  219. tx_ctl->type = ATH9K_HTC_AMPDU;
  220. tx_hdr.data_type = ATH9K_HTC_AMPDU;
  221. } else {
  222. tx_ctl->type = ATH9K_HTC_NORMAL;
  223. tx_hdr.data_type = ATH9K_HTC_NORMAL;
  224. }
  225. if (ieee80211_is_data_qos(fc)) {
  226. qc = ieee80211_get_qos_ctl(hdr);
  227. tx_hdr.tidno = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  228. }
  229. /* Check for RTS protection */
  230. if (priv->hw->wiphy->rts_threshold != (u32) -1)
  231. if (skb->len > priv->hw->wiphy->rts_threshold)
  232. flags |= ATH9K_HTC_TX_RTSCTS;
  233. /* CTS-to-self */
  234. if (!(flags & ATH9K_HTC_TX_RTSCTS) &&
  235. (vif && vif->bss_conf.use_cts_prot))
  236. flags |= ATH9K_HTC_TX_CTSONLY;
  237. tx_hdr.flags = cpu_to_be32(flags);
  238. tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
  239. if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
  240. tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
  241. else
  242. tx_hdr.keyix = tx_info->control.hw_key->hw_key_idx;
  243. tx_fhdr = skb_push(skb, sizeof(tx_hdr));
  244. memcpy(tx_fhdr, (u8 *) &tx_hdr, sizeof(tx_hdr));
  245. if (is_cab) {
  246. CAB_STAT_INC;
  247. tx_ctl->epid = priv->cab_ep;
  248. goto send;
  249. }
  250. qnum = skb_get_queue_mapping(skb);
  251. tx_ctl->epid = get_htc_epid(priv, qnum);
  252. } else {
  253. struct tx_mgmt_hdr mgmt_hdr;
  254. memset(&mgmt_hdr, 0, sizeof(struct tx_mgmt_hdr));
  255. /*
  256. * Set the TSF adjust value for probe response
  257. * frame also.
  258. */
  259. if (avp && unlikely(ieee80211_is_probe_resp(fc))) {
  260. mgmt = (struct ieee80211_mgmt *)skb->data;
  261. mgmt->u.probe_resp.timestamp = avp->tsfadjust;
  262. }
  263. tx_ctl->type = ATH9K_HTC_MGMT;
  264. mgmt_hdr.node_idx = sta_idx;
  265. mgmt_hdr.vif_idx = vif_idx;
  266. mgmt_hdr.tidno = 0;
  267. mgmt_hdr.flags = 0;
  268. mgmt_hdr.cookie = slot;
  269. mgmt_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
  270. if (mgmt_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
  271. mgmt_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
  272. else
  273. mgmt_hdr.keyix = tx_info->control.hw_key->hw_key_idx;
  274. tx_fhdr = skb_push(skb, sizeof(mgmt_hdr));
  275. memcpy(tx_fhdr, (u8 *) &mgmt_hdr, sizeof(mgmt_hdr));
  276. tx_ctl->epid = priv->mgmt_ep;
  277. }
  278. send:
  279. return htc_send(priv->htc, skb);
  280. }
  281. static inline bool __ath9k_htc_check_tx_aggr(struct ath9k_htc_priv *priv,
  282. struct ath9k_htc_sta *ista, u8 tid)
  283. {
  284. bool ret = false;
  285. spin_lock_bh(&priv->tx.tx_lock);
  286. if ((tid < ATH9K_HTC_MAX_TID) && (ista->tid_state[tid] == AGGR_STOP))
  287. ret = true;
  288. spin_unlock_bh(&priv->tx.tx_lock);
  289. return ret;
  290. }
  291. static void ath9k_htc_check_tx_aggr(struct ath9k_htc_priv *priv,
  292. struct ieee80211_vif *vif,
  293. struct sk_buff *skb)
  294. {
  295. struct ieee80211_sta *sta;
  296. struct ieee80211_hdr *hdr;
  297. __le16 fc;
  298. hdr = (struct ieee80211_hdr *) skb->data;
  299. fc = hdr->frame_control;
  300. rcu_read_lock();
  301. sta = ieee80211_find_sta(vif, hdr->addr1);
  302. if (!sta) {
  303. rcu_read_unlock();
  304. return;
  305. }
  306. if (sta && conf_is_ht(&priv->hw->conf) &&
  307. !(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
  308. if (ieee80211_is_data_qos(fc)) {
  309. u8 *qc, tid;
  310. struct ath9k_htc_sta *ista;
  311. qc = ieee80211_get_qos_ctl(hdr);
  312. tid = qc[0] & 0xf;
  313. ista = (struct ath9k_htc_sta *)sta->drv_priv;
  314. if (__ath9k_htc_check_tx_aggr(priv, ista, tid)) {
  315. ieee80211_start_tx_ba_session(sta, tid, 0);
  316. spin_lock_bh(&priv->tx.tx_lock);
  317. ista->tid_state[tid] = AGGR_PROGRESS;
  318. spin_unlock_bh(&priv->tx.tx_lock);
  319. }
  320. }
  321. }
  322. rcu_read_unlock();
  323. }
  324. static void ath9k_htc_tx_process(struct ath9k_htc_priv *priv,
  325. struct sk_buff *skb)
  326. {
  327. struct ieee80211_vif *vif;
  328. struct ath9k_htc_tx_ctl *tx_ctl;
  329. struct ieee80211_tx_info *tx_info;
  330. bool txok;
  331. int slot;
  332. slot = strip_drv_header(priv, skb);
  333. if (slot < 0) {
  334. dev_kfree_skb_any(skb);
  335. return;
  336. }
  337. tx_ctl = HTC_SKB_CB(skb);
  338. txok = tx_ctl->txok;
  339. tx_info = IEEE80211_SKB_CB(skb);
  340. vif = tx_info->control.vif;
  341. memset(&tx_info->status, 0, sizeof(tx_info->status));
  342. /*
  343. * URB submission failed for this frame, it never reached
  344. * the target.
  345. */
  346. if (!txok || !vif)
  347. goto send_mac80211;
  348. tx_info->flags |= IEEE80211_TX_STAT_ACK;
  349. ath9k_htc_check_tx_aggr(priv, vif, skb);
  350. send_mac80211:
  351. spin_lock_bh(&priv->tx.tx_lock);
  352. if (WARN_ON(--priv->tx.queued_cnt < 0))
  353. priv->tx.queued_cnt = 0;
  354. spin_unlock_bh(&priv->tx.tx_lock);
  355. ath9k_htc_tx_clear_slot(priv, slot);
  356. /* Send status to mac80211 */
  357. ieee80211_tx_status(priv->hw, skb);
  358. }
  359. void ath9k_tx_tasklet(unsigned long data)
  360. {
  361. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
  362. struct sk_buff *skb = NULL;
  363. while ((skb = skb_dequeue(&priv->tx.tx_queue)) != NULL) {
  364. ath9k_htc_tx_process(priv, skb);
  365. }
  366. /* Wake TX queues if needed */
  367. ath9k_htc_check_wake_queues(priv);
  368. }
  369. void ath9k_htc_txep(void *drv_priv, struct sk_buff *skb,
  370. enum htc_endpoint_id ep_id, bool txok)
  371. {
  372. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) drv_priv;
  373. struct ath9k_htc_tx_ctl *tx_ctl;
  374. tx_ctl = HTC_SKB_CB(skb);
  375. tx_ctl->txok = txok;
  376. skb_queue_tail(&priv->tx.tx_queue, skb);
  377. tasklet_schedule(&priv->tx_tasklet);
  378. }
  379. int ath9k_tx_init(struct ath9k_htc_priv *priv)
  380. {
  381. skb_queue_head_init(&priv->tx.tx_queue);
  382. return 0;
  383. }
  384. void ath9k_tx_cleanup(struct ath9k_htc_priv *priv)
  385. {
  386. }
  387. bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, int subtype)
  388. {
  389. struct ath_hw *ah = priv->ah;
  390. struct ath_common *common = ath9k_hw_common(ah);
  391. struct ath9k_tx_queue_info qi;
  392. int qnum;
  393. memset(&qi, 0, sizeof(qi));
  394. ATH9K_HTC_INIT_TXQ(subtype);
  395. qnum = ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_DATA, &qi);
  396. if (qnum == -1)
  397. return false;
  398. if (qnum >= ARRAY_SIZE(priv->hwq_map)) {
  399. ath_err(common, "qnum %u out of range, max %zu!\n",
  400. qnum, ARRAY_SIZE(priv->hwq_map));
  401. ath9k_hw_releasetxqueue(ah, qnum);
  402. return false;
  403. }
  404. priv->hwq_map[subtype] = qnum;
  405. return true;
  406. }
  407. int ath9k_htc_cabq_setup(struct ath9k_htc_priv *priv)
  408. {
  409. struct ath9k_tx_queue_info qi;
  410. memset(&qi, 0, sizeof(qi));
  411. ATH9K_HTC_INIT_TXQ(0);
  412. return ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_CAB, &qi);
  413. }
  414. /******/
  415. /* RX */
  416. /******/
  417. /*
  418. * Calculate the RX filter to be set in the HW.
  419. */
  420. u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv)
  421. {
  422. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  423. struct ath_hw *ah = priv->ah;
  424. u32 rfilt;
  425. rfilt = (ath9k_hw_getrxfilter(ah) & RX_FILTER_PRESERVE)
  426. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  427. | ATH9K_RX_FILTER_MCAST;
  428. if (priv->rxfilter & FIF_PROBE_REQ)
  429. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  430. /*
  431. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  432. * mode interface or when in monitor mode. AP mode does not need this
  433. * since it receives all in-BSS frames anyway.
  434. */
  435. if (((ah->opmode != NL80211_IFTYPE_AP) &&
  436. (priv->rxfilter & FIF_PROMISC_IN_BSS)) ||
  437. ah->is_monitoring)
  438. rfilt |= ATH9K_RX_FILTER_PROM;
  439. if (priv->rxfilter & FIF_CONTROL)
  440. rfilt |= ATH9K_RX_FILTER_CONTROL;
  441. if ((ah->opmode == NL80211_IFTYPE_STATION) &&
  442. !(priv->rxfilter & FIF_BCN_PRBRESP_PROMISC))
  443. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  444. else
  445. rfilt |= ATH9K_RX_FILTER_BEACON;
  446. if (conf_is_ht(&priv->hw->conf)) {
  447. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  448. rfilt |= ATH9K_RX_FILTER_UNCOMP_BA_BAR;
  449. }
  450. if (priv->rxfilter & FIF_PSPOLL)
  451. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  452. return rfilt;
  453. #undef RX_FILTER_PRESERVE
  454. }
  455. /*
  456. * Recv initialization for opmode change.
  457. */
  458. static void ath9k_htc_opmode_init(struct ath9k_htc_priv *priv)
  459. {
  460. struct ath_hw *ah = priv->ah;
  461. u32 rfilt, mfilt[2];
  462. /* configure rx filter */
  463. rfilt = ath9k_htc_calcrxfilter(priv);
  464. ath9k_hw_setrxfilter(ah, rfilt);
  465. /* calculate and install multicast filter */
  466. mfilt[0] = mfilt[1] = ~0;
  467. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  468. }
  469. void ath9k_host_rx_init(struct ath9k_htc_priv *priv)
  470. {
  471. ath9k_hw_rxena(priv->ah);
  472. ath9k_htc_opmode_init(priv);
  473. ath9k_hw_startpcureceive(priv->ah, (priv->op_flags & OP_SCANNING));
  474. priv->rx.last_rssi = ATH_RSSI_DUMMY_MARKER;
  475. }
  476. static void ath9k_process_rate(struct ieee80211_hw *hw,
  477. struct ieee80211_rx_status *rxs,
  478. u8 rx_rate, u8 rs_flags)
  479. {
  480. struct ieee80211_supported_band *sband;
  481. enum ieee80211_band band;
  482. unsigned int i = 0;
  483. if (rx_rate & 0x80) {
  484. /* HT rate */
  485. rxs->flag |= RX_FLAG_HT;
  486. if (rs_flags & ATH9K_RX_2040)
  487. rxs->flag |= RX_FLAG_40MHZ;
  488. if (rs_flags & ATH9K_RX_GI)
  489. rxs->flag |= RX_FLAG_SHORT_GI;
  490. rxs->rate_idx = rx_rate & 0x7f;
  491. return;
  492. }
  493. band = hw->conf.channel->band;
  494. sband = hw->wiphy->bands[band];
  495. for (i = 0; i < sband->n_bitrates; i++) {
  496. if (sband->bitrates[i].hw_value == rx_rate) {
  497. rxs->rate_idx = i;
  498. return;
  499. }
  500. if (sband->bitrates[i].hw_value_short == rx_rate) {
  501. rxs->rate_idx = i;
  502. rxs->flag |= RX_FLAG_SHORTPRE;
  503. return;
  504. }
  505. }
  506. }
  507. static bool ath9k_rx_prepare(struct ath9k_htc_priv *priv,
  508. struct ath9k_htc_rxbuf *rxbuf,
  509. struct ieee80211_rx_status *rx_status)
  510. {
  511. struct ieee80211_hdr *hdr;
  512. struct ieee80211_hw *hw = priv->hw;
  513. struct sk_buff *skb = rxbuf->skb;
  514. struct ath_common *common = ath9k_hw_common(priv->ah);
  515. struct ath_htc_rx_status *rxstatus;
  516. int hdrlen, padpos, padsize;
  517. int last_rssi = ATH_RSSI_DUMMY_MARKER;
  518. __le16 fc;
  519. if (skb->len < HTC_RX_FRAME_HEADER_SIZE) {
  520. ath_err(common, "Corrupted RX frame, dropping (len: %d)\n",
  521. skb->len);
  522. goto rx_next;
  523. }
  524. rxstatus = (struct ath_htc_rx_status *)skb->data;
  525. if (be16_to_cpu(rxstatus->rs_datalen) -
  526. (skb->len - HTC_RX_FRAME_HEADER_SIZE) != 0) {
  527. ath_err(common,
  528. "Corrupted RX data len, dropping (dlen: %d, skblen: %d)\n",
  529. rxstatus->rs_datalen, skb->len);
  530. goto rx_next;
  531. }
  532. ath9k_htc_err_stat_rx(priv, rxstatus);
  533. /* Get the RX status information */
  534. memcpy(&rxbuf->rxstatus, rxstatus, HTC_RX_FRAME_HEADER_SIZE);
  535. skb_pull(skb, HTC_RX_FRAME_HEADER_SIZE);
  536. hdr = (struct ieee80211_hdr *)skb->data;
  537. fc = hdr->frame_control;
  538. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  539. padpos = ath9k_cmn_padpos(fc);
  540. padsize = padpos & 3;
  541. if (padsize && skb->len >= padpos+padsize+FCS_LEN) {
  542. memmove(skb->data + padsize, skb->data, padpos);
  543. skb_pull(skb, padsize);
  544. }
  545. memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  546. if (rxbuf->rxstatus.rs_status != 0) {
  547. if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_CRC)
  548. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  549. if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_PHY)
  550. goto rx_next;
  551. if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT) {
  552. /* FIXME */
  553. } else if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_MIC) {
  554. if (ieee80211_is_ctl(fc))
  555. /*
  556. * Sometimes, we get invalid
  557. * MIC failures on valid control frames.
  558. * Remove these mic errors.
  559. */
  560. rxbuf->rxstatus.rs_status &= ~ATH9K_RXERR_MIC;
  561. else
  562. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  563. }
  564. /*
  565. * Reject error frames with the exception of
  566. * decryption and MIC failures. For monitor mode,
  567. * we also ignore the CRC error.
  568. */
  569. if (priv->ah->opmode == NL80211_IFTYPE_MONITOR) {
  570. if (rxbuf->rxstatus.rs_status &
  571. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  572. ATH9K_RXERR_CRC))
  573. goto rx_next;
  574. } else {
  575. if (rxbuf->rxstatus.rs_status &
  576. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  577. goto rx_next;
  578. }
  579. }
  580. }
  581. if (!(rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT)) {
  582. u8 keyix;
  583. keyix = rxbuf->rxstatus.rs_keyix;
  584. if (keyix != ATH9K_RXKEYIX_INVALID) {
  585. rx_status->flag |= RX_FLAG_DECRYPTED;
  586. } else if (ieee80211_has_protected(fc) &&
  587. skb->len >= hdrlen + 4) {
  588. keyix = skb->data[hdrlen + 3] >> 6;
  589. if (test_bit(keyix, common->keymap))
  590. rx_status->flag |= RX_FLAG_DECRYPTED;
  591. }
  592. }
  593. ath9k_process_rate(hw, rx_status, rxbuf->rxstatus.rs_rate,
  594. rxbuf->rxstatus.rs_flags);
  595. if (rxbuf->rxstatus.rs_rssi != ATH9K_RSSI_BAD &&
  596. !rxbuf->rxstatus.rs_moreaggr)
  597. ATH_RSSI_LPF(priv->rx.last_rssi,
  598. rxbuf->rxstatus.rs_rssi);
  599. last_rssi = priv->rx.last_rssi;
  600. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  601. rxbuf->rxstatus.rs_rssi = ATH_EP_RND(last_rssi,
  602. ATH_RSSI_EP_MULTIPLIER);
  603. if (rxbuf->rxstatus.rs_rssi < 0)
  604. rxbuf->rxstatus.rs_rssi = 0;
  605. if (ieee80211_is_beacon(fc))
  606. priv->ah->stats.avgbrssi = rxbuf->rxstatus.rs_rssi;
  607. rx_status->mactime = be64_to_cpu(rxbuf->rxstatus.rs_tstamp);
  608. rx_status->band = hw->conf.channel->band;
  609. rx_status->freq = hw->conf.channel->center_freq;
  610. rx_status->signal = rxbuf->rxstatus.rs_rssi + ATH_DEFAULT_NOISE_FLOOR;
  611. rx_status->antenna = rxbuf->rxstatus.rs_antenna;
  612. rx_status->flag |= RX_FLAG_MACTIME_MPDU;
  613. return true;
  614. rx_next:
  615. return false;
  616. }
  617. /*
  618. * FIXME: Handle FLUSH later on.
  619. */
  620. void ath9k_rx_tasklet(unsigned long data)
  621. {
  622. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
  623. struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL;
  624. struct ieee80211_rx_status rx_status;
  625. struct sk_buff *skb;
  626. unsigned long flags;
  627. struct ieee80211_hdr *hdr;
  628. do {
  629. spin_lock_irqsave(&priv->rx.rxbuflock, flags);
  630. list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) {
  631. if (tmp_buf->in_process) {
  632. rxbuf = tmp_buf;
  633. break;
  634. }
  635. }
  636. if (rxbuf == NULL) {
  637. spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  638. break;
  639. }
  640. if (!rxbuf->skb)
  641. goto requeue;
  642. if (!ath9k_rx_prepare(priv, rxbuf, &rx_status)) {
  643. dev_kfree_skb_any(rxbuf->skb);
  644. goto requeue;
  645. }
  646. memcpy(IEEE80211_SKB_RXCB(rxbuf->skb), &rx_status,
  647. sizeof(struct ieee80211_rx_status));
  648. skb = rxbuf->skb;
  649. hdr = (struct ieee80211_hdr *) skb->data;
  650. if (ieee80211_is_beacon(hdr->frame_control) && priv->ps_enabled)
  651. ieee80211_queue_work(priv->hw, &priv->ps_work);
  652. spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  653. ieee80211_rx(priv->hw, skb);
  654. spin_lock_irqsave(&priv->rx.rxbuflock, flags);
  655. requeue:
  656. rxbuf->in_process = false;
  657. rxbuf->skb = NULL;
  658. list_move_tail(&rxbuf->list, &priv->rx.rxbuf);
  659. rxbuf = NULL;
  660. spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  661. } while (1);
  662. }
  663. void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb,
  664. enum htc_endpoint_id ep_id)
  665. {
  666. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)drv_priv;
  667. struct ath_hw *ah = priv->ah;
  668. struct ath_common *common = ath9k_hw_common(ah);
  669. struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL;
  670. spin_lock(&priv->rx.rxbuflock);
  671. list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) {
  672. if (!tmp_buf->in_process) {
  673. rxbuf = tmp_buf;
  674. break;
  675. }
  676. }
  677. spin_unlock(&priv->rx.rxbuflock);
  678. if (rxbuf == NULL) {
  679. ath_dbg(common, ATH_DBG_ANY,
  680. "No free RX buffer\n");
  681. goto err;
  682. }
  683. spin_lock(&priv->rx.rxbuflock);
  684. rxbuf->skb = skb;
  685. rxbuf->in_process = true;
  686. spin_unlock(&priv->rx.rxbuflock);
  687. tasklet_schedule(&priv->rx_tasklet);
  688. return;
  689. err:
  690. dev_kfree_skb_any(skb);
  691. }
  692. /* FIXME: Locking for cleanup/init */
  693. void ath9k_rx_cleanup(struct ath9k_htc_priv *priv)
  694. {
  695. struct ath9k_htc_rxbuf *rxbuf, *tbuf;
  696. list_for_each_entry_safe(rxbuf, tbuf, &priv->rx.rxbuf, list) {
  697. list_del(&rxbuf->list);
  698. if (rxbuf->skb)
  699. dev_kfree_skb_any(rxbuf->skb);
  700. kfree(rxbuf);
  701. }
  702. }
  703. int ath9k_rx_init(struct ath9k_htc_priv *priv)
  704. {
  705. struct ath_hw *ah = priv->ah;
  706. struct ath_common *common = ath9k_hw_common(ah);
  707. struct ath9k_htc_rxbuf *rxbuf;
  708. int i = 0;
  709. INIT_LIST_HEAD(&priv->rx.rxbuf);
  710. spin_lock_init(&priv->rx.rxbuflock);
  711. for (i = 0; i < ATH9K_HTC_RXBUF; i++) {
  712. rxbuf = kzalloc(sizeof(struct ath9k_htc_rxbuf), GFP_KERNEL);
  713. if (rxbuf == NULL) {
  714. ath_err(common, "Unable to allocate RX buffers\n");
  715. goto err;
  716. }
  717. list_add_tail(&rxbuf->list, &priv->rx.rxbuf);
  718. }
  719. return 0;
  720. err:
  721. ath9k_rx_cleanup(priv);
  722. return -ENOMEM;
  723. }