hpsa.c 114 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <asm/atomic.h>
  50. #include <linux/kthread.h>
  51. #include "hpsa_cmd.h"
  52. #include "hpsa.h"
  53. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  54. #define HPSA_DRIVER_VERSION "2.0.2-1"
  55. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  56. /* How long to wait (in milliseconds) for board to go into simple mode */
  57. #define MAX_CONFIG_WAIT 30000
  58. #define MAX_IOCTL_CONFIG_WAIT 1000
  59. /*define how many times we will try a command because of bus resets */
  60. #define MAX_CMD_RETRIES 3
  61. /* Embedded module documentation macros - see modules.h */
  62. MODULE_AUTHOR("Hewlett-Packard Company");
  63. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  64. HPSA_DRIVER_VERSION);
  65. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  66. MODULE_VERSION(HPSA_DRIVER_VERSION);
  67. MODULE_LICENSE("GPL");
  68. static int hpsa_allow_any;
  69. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  70. MODULE_PARM_DESC(hpsa_allow_any,
  71. "Allow hpsa driver to access unknown HP Smart Array hardware");
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id hpsa_pci_device_id[] = {
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  87. #define PCI_DEVICE_ID_HP_CISSF 0x333f
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
  89. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  90. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  91. {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  92. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  93. {0,}
  94. };
  95. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  96. /* board_id = Subsystem Device ID & Vendor ID
  97. * product = Marketing Name for the board
  98. * access = Address of the struct of function pointers
  99. */
  100. static struct board_type products[] = {
  101. {0x3241103C, "Smart Array P212", &SA5_access},
  102. {0x3243103C, "Smart Array P410", &SA5_access},
  103. {0x3245103C, "Smart Array P410i", &SA5_access},
  104. {0x3247103C, "Smart Array P411", &SA5_access},
  105. {0x3249103C, "Smart Array P812", &SA5_access},
  106. {0x324a103C, "Smart Array P712m", &SA5_access},
  107. {0x324b103C, "Smart Array P711m", &SA5_access},
  108. {0x3233103C, "StorageWorks P1210m", &SA5_access},
  109. {0x333F103C, "StorageWorks P1210m", &SA5_access},
  110. {0x3250103C, "Smart Array", &SA5_access},
  111. {0x3250113C, "Smart Array", &SA5_access},
  112. {0x3250123C, "Smart Array", &SA5_access},
  113. {0x3250133C, "Smart Array", &SA5_access},
  114. {0x3250143C, "Smart Array", &SA5_access},
  115. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  116. };
  117. static int number_of_controllers;
  118. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  119. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  120. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  121. static void start_io(struct ctlr_info *h);
  122. #ifdef CONFIG_COMPAT
  123. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  124. #endif
  125. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  126. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  127. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  128. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  129. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  130. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  131. int cmd_type);
  132. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  133. static void hpsa_scan_start(struct Scsi_Host *);
  134. static int hpsa_scan_finished(struct Scsi_Host *sh,
  135. unsigned long elapsed_time);
  136. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  137. int qdepth, int reason);
  138. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  139. static int hpsa_slave_alloc(struct scsi_device *sdev);
  140. static void hpsa_slave_destroy(struct scsi_device *sdev);
  141. static ssize_t raid_level_show(struct device *dev,
  142. struct device_attribute *attr, char *buf);
  143. static ssize_t lunid_show(struct device *dev,
  144. struct device_attribute *attr, char *buf);
  145. static ssize_t unique_id_show(struct device *dev,
  146. struct device_attribute *attr, char *buf);
  147. static ssize_t host_show_firmware_revision(struct device *dev,
  148. struct device_attribute *attr, char *buf);
  149. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  150. static ssize_t host_store_rescan(struct device *dev,
  151. struct device_attribute *attr, const char *buf, size_t count);
  152. static int check_for_unit_attention(struct ctlr_info *h,
  153. struct CommandList *c);
  154. static void check_ioctl_unit_attention(struct ctlr_info *h,
  155. struct CommandList *c);
  156. /* performant mode helper functions */
  157. static void calc_bucket_map(int *bucket, int num_buckets,
  158. int nsgs, int *bucket_map);
  159. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  160. static inline u32 next_command(struct ctlr_info *h);
  161. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  162. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  163. u64 *cfg_offset);
  164. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  165. unsigned long *memory_bar);
  166. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  167. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  168. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  169. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  170. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  171. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  172. host_show_firmware_revision, NULL);
  173. static struct device_attribute *hpsa_sdev_attrs[] = {
  174. &dev_attr_raid_level,
  175. &dev_attr_lunid,
  176. &dev_attr_unique_id,
  177. NULL,
  178. };
  179. static struct device_attribute *hpsa_shost_attrs[] = {
  180. &dev_attr_rescan,
  181. &dev_attr_firmware_revision,
  182. NULL,
  183. };
  184. static struct scsi_host_template hpsa_driver_template = {
  185. .module = THIS_MODULE,
  186. .name = "hpsa",
  187. .proc_name = "hpsa",
  188. .queuecommand = hpsa_scsi_queue_command,
  189. .scan_start = hpsa_scan_start,
  190. .scan_finished = hpsa_scan_finished,
  191. .change_queue_depth = hpsa_change_queue_depth,
  192. .this_id = -1,
  193. .use_clustering = ENABLE_CLUSTERING,
  194. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  195. .ioctl = hpsa_ioctl,
  196. .slave_alloc = hpsa_slave_alloc,
  197. .slave_destroy = hpsa_slave_destroy,
  198. #ifdef CONFIG_COMPAT
  199. .compat_ioctl = hpsa_compat_ioctl,
  200. #endif
  201. .sdev_attrs = hpsa_sdev_attrs,
  202. .shost_attrs = hpsa_shost_attrs,
  203. };
  204. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  205. {
  206. unsigned long *priv = shost_priv(sdev->host);
  207. return (struct ctlr_info *) *priv;
  208. }
  209. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  210. {
  211. unsigned long *priv = shost_priv(sh);
  212. return (struct ctlr_info *) *priv;
  213. }
  214. static int check_for_unit_attention(struct ctlr_info *h,
  215. struct CommandList *c)
  216. {
  217. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  218. return 0;
  219. switch (c->err_info->SenseInfo[12]) {
  220. case STATE_CHANGED:
  221. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  222. "detected, command retried\n", h->ctlr);
  223. break;
  224. case LUN_FAILED:
  225. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  226. "detected, action required\n", h->ctlr);
  227. break;
  228. case REPORT_LUNS_CHANGED:
  229. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  230. "changed, action required\n", h->ctlr);
  231. /*
  232. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  233. */
  234. break;
  235. case POWER_OR_RESET:
  236. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  237. "or device reset detected\n", h->ctlr);
  238. break;
  239. case UNIT_ATTENTION_CLEARED:
  240. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  241. "cleared by another initiator\n", h->ctlr);
  242. break;
  243. default:
  244. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  245. "unit attention detected\n", h->ctlr);
  246. break;
  247. }
  248. return 1;
  249. }
  250. static ssize_t host_store_rescan(struct device *dev,
  251. struct device_attribute *attr,
  252. const char *buf, size_t count)
  253. {
  254. struct ctlr_info *h;
  255. struct Scsi_Host *shost = class_to_shost(dev);
  256. h = shost_to_hba(shost);
  257. hpsa_scan_start(h->scsi_host);
  258. return count;
  259. }
  260. static ssize_t host_show_firmware_revision(struct device *dev,
  261. struct device_attribute *attr, char *buf)
  262. {
  263. struct ctlr_info *h;
  264. struct Scsi_Host *shost = class_to_shost(dev);
  265. unsigned char *fwrev;
  266. h = shost_to_hba(shost);
  267. if (!h->hba_inquiry_data)
  268. return 0;
  269. fwrev = &h->hba_inquiry_data[32];
  270. return snprintf(buf, 20, "%c%c%c%c\n",
  271. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  272. }
  273. /* Enqueuing and dequeuing functions for cmdlists. */
  274. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  275. {
  276. hlist_add_head(&c->list, list);
  277. }
  278. static inline u32 next_command(struct ctlr_info *h)
  279. {
  280. u32 a;
  281. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  282. return h->access.command_completed(h);
  283. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  284. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  285. (h->reply_pool_head)++;
  286. h->commands_outstanding--;
  287. } else {
  288. a = FIFO_EMPTY;
  289. }
  290. /* Check for wraparound */
  291. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  292. h->reply_pool_head = h->reply_pool;
  293. h->reply_pool_wraparound ^= 1;
  294. }
  295. return a;
  296. }
  297. /* set_performant_mode: Modify the tag for cciss performant
  298. * set bit 0 for pull model, bits 3-1 for block fetch
  299. * register number
  300. */
  301. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  302. {
  303. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  304. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  305. }
  306. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  307. struct CommandList *c)
  308. {
  309. unsigned long flags;
  310. set_performant_mode(h, c);
  311. spin_lock_irqsave(&h->lock, flags);
  312. addQ(&h->reqQ, c);
  313. h->Qdepth++;
  314. start_io(h);
  315. spin_unlock_irqrestore(&h->lock, flags);
  316. }
  317. static inline void removeQ(struct CommandList *c)
  318. {
  319. if (WARN_ON(hlist_unhashed(&c->list)))
  320. return;
  321. hlist_del_init(&c->list);
  322. }
  323. static inline int is_hba_lunid(unsigned char scsi3addr[])
  324. {
  325. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  326. }
  327. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  328. {
  329. return (scsi3addr[3] & 0xC0) == 0x40;
  330. }
  331. static inline int is_scsi_rev_5(struct ctlr_info *h)
  332. {
  333. if (!h->hba_inquiry_data)
  334. return 0;
  335. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  336. return 1;
  337. return 0;
  338. }
  339. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  340. "UNKNOWN"
  341. };
  342. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  343. static ssize_t raid_level_show(struct device *dev,
  344. struct device_attribute *attr, char *buf)
  345. {
  346. ssize_t l = 0;
  347. unsigned char rlevel;
  348. struct ctlr_info *h;
  349. struct scsi_device *sdev;
  350. struct hpsa_scsi_dev_t *hdev;
  351. unsigned long flags;
  352. sdev = to_scsi_device(dev);
  353. h = sdev_to_hba(sdev);
  354. spin_lock_irqsave(&h->lock, flags);
  355. hdev = sdev->hostdata;
  356. if (!hdev) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return -ENODEV;
  359. }
  360. /* Is this even a logical drive? */
  361. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  362. spin_unlock_irqrestore(&h->lock, flags);
  363. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  364. return l;
  365. }
  366. rlevel = hdev->raid_level;
  367. spin_unlock_irqrestore(&h->lock, flags);
  368. if (rlevel > RAID_UNKNOWN)
  369. rlevel = RAID_UNKNOWN;
  370. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  371. return l;
  372. }
  373. static ssize_t lunid_show(struct device *dev,
  374. struct device_attribute *attr, char *buf)
  375. {
  376. struct ctlr_info *h;
  377. struct scsi_device *sdev;
  378. struct hpsa_scsi_dev_t *hdev;
  379. unsigned long flags;
  380. unsigned char lunid[8];
  381. sdev = to_scsi_device(dev);
  382. h = sdev_to_hba(sdev);
  383. spin_lock_irqsave(&h->lock, flags);
  384. hdev = sdev->hostdata;
  385. if (!hdev) {
  386. spin_unlock_irqrestore(&h->lock, flags);
  387. return -ENODEV;
  388. }
  389. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  390. spin_unlock_irqrestore(&h->lock, flags);
  391. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  392. lunid[0], lunid[1], lunid[2], lunid[3],
  393. lunid[4], lunid[5], lunid[6], lunid[7]);
  394. }
  395. static ssize_t unique_id_show(struct device *dev,
  396. struct device_attribute *attr, char *buf)
  397. {
  398. struct ctlr_info *h;
  399. struct scsi_device *sdev;
  400. struct hpsa_scsi_dev_t *hdev;
  401. unsigned long flags;
  402. unsigned char sn[16];
  403. sdev = to_scsi_device(dev);
  404. h = sdev_to_hba(sdev);
  405. spin_lock_irqsave(&h->lock, flags);
  406. hdev = sdev->hostdata;
  407. if (!hdev) {
  408. spin_unlock_irqrestore(&h->lock, flags);
  409. return -ENODEV;
  410. }
  411. memcpy(sn, hdev->device_id, sizeof(sn));
  412. spin_unlock_irqrestore(&h->lock, flags);
  413. return snprintf(buf, 16 * 2 + 2,
  414. "%02X%02X%02X%02X%02X%02X%02X%02X"
  415. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  416. sn[0], sn[1], sn[2], sn[3],
  417. sn[4], sn[5], sn[6], sn[7],
  418. sn[8], sn[9], sn[10], sn[11],
  419. sn[12], sn[13], sn[14], sn[15]);
  420. }
  421. static int hpsa_find_target_lun(struct ctlr_info *h,
  422. unsigned char scsi3addr[], int bus, int *target, int *lun)
  423. {
  424. /* finds an unused bus, target, lun for a new physical device
  425. * assumes h->devlock is held
  426. */
  427. int i, found = 0;
  428. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  429. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  430. for (i = 0; i < h->ndevices; i++) {
  431. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  432. set_bit(h->dev[i]->target, lun_taken);
  433. }
  434. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  435. if (!test_bit(i, lun_taken)) {
  436. /* *bus = 1; */
  437. *target = i;
  438. *lun = 0;
  439. found = 1;
  440. break;
  441. }
  442. }
  443. return !found;
  444. }
  445. /* Add an entry into h->dev[] array. */
  446. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  447. struct hpsa_scsi_dev_t *device,
  448. struct hpsa_scsi_dev_t *added[], int *nadded)
  449. {
  450. /* assumes h->devlock is held */
  451. int n = h->ndevices;
  452. int i;
  453. unsigned char addr1[8], addr2[8];
  454. struct hpsa_scsi_dev_t *sd;
  455. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  456. dev_err(&h->pdev->dev, "too many devices, some will be "
  457. "inaccessible.\n");
  458. return -1;
  459. }
  460. /* physical devices do not have lun or target assigned until now. */
  461. if (device->lun != -1)
  462. /* Logical device, lun is already assigned. */
  463. goto lun_assigned;
  464. /* If this device a non-zero lun of a multi-lun device
  465. * byte 4 of the 8-byte LUN addr will contain the logical
  466. * unit no, zero otherise.
  467. */
  468. if (device->scsi3addr[4] == 0) {
  469. /* This is not a non-zero lun of a multi-lun device */
  470. if (hpsa_find_target_lun(h, device->scsi3addr,
  471. device->bus, &device->target, &device->lun) != 0)
  472. return -1;
  473. goto lun_assigned;
  474. }
  475. /* This is a non-zero lun of a multi-lun device.
  476. * Search through our list and find the device which
  477. * has the same 8 byte LUN address, excepting byte 4.
  478. * Assign the same bus and target for this new LUN.
  479. * Use the logical unit number from the firmware.
  480. */
  481. memcpy(addr1, device->scsi3addr, 8);
  482. addr1[4] = 0;
  483. for (i = 0; i < n; i++) {
  484. sd = h->dev[i];
  485. memcpy(addr2, sd->scsi3addr, 8);
  486. addr2[4] = 0;
  487. /* differ only in byte 4? */
  488. if (memcmp(addr1, addr2, 8) == 0) {
  489. device->bus = sd->bus;
  490. device->target = sd->target;
  491. device->lun = device->scsi3addr[4];
  492. break;
  493. }
  494. }
  495. if (device->lun == -1) {
  496. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  497. " suspect firmware bug or unsupported hardware "
  498. "configuration.\n");
  499. return -1;
  500. }
  501. lun_assigned:
  502. h->dev[n] = device;
  503. h->ndevices++;
  504. added[*nadded] = device;
  505. (*nadded)++;
  506. /* initially, (before registering with scsi layer) we don't
  507. * know our hostno and we don't want to print anything first
  508. * time anyway (the scsi layer's inquiries will show that info)
  509. */
  510. /* if (hostno != -1) */
  511. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  512. scsi_device_type(device->devtype), hostno,
  513. device->bus, device->target, device->lun);
  514. return 0;
  515. }
  516. /* Replace an entry from h->dev[] array. */
  517. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  518. int entry, struct hpsa_scsi_dev_t *new_entry,
  519. struct hpsa_scsi_dev_t *added[], int *nadded,
  520. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  521. {
  522. /* assumes h->devlock is held */
  523. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  524. removed[*nremoved] = h->dev[entry];
  525. (*nremoved)++;
  526. h->dev[entry] = new_entry;
  527. added[*nadded] = new_entry;
  528. (*nadded)++;
  529. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  530. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  531. new_entry->target, new_entry->lun);
  532. }
  533. /* Remove an entry from h->dev[] array. */
  534. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  535. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  536. {
  537. /* assumes h->devlock is held */
  538. int i;
  539. struct hpsa_scsi_dev_t *sd;
  540. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  541. sd = h->dev[entry];
  542. removed[*nremoved] = h->dev[entry];
  543. (*nremoved)++;
  544. for (i = entry; i < h->ndevices-1; i++)
  545. h->dev[i] = h->dev[i+1];
  546. h->ndevices--;
  547. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  548. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  549. sd->lun);
  550. }
  551. #define SCSI3ADDR_EQ(a, b) ( \
  552. (a)[7] == (b)[7] && \
  553. (a)[6] == (b)[6] && \
  554. (a)[5] == (b)[5] && \
  555. (a)[4] == (b)[4] && \
  556. (a)[3] == (b)[3] && \
  557. (a)[2] == (b)[2] && \
  558. (a)[1] == (b)[1] && \
  559. (a)[0] == (b)[0])
  560. static void fixup_botched_add(struct ctlr_info *h,
  561. struct hpsa_scsi_dev_t *added)
  562. {
  563. /* called when scsi_add_device fails in order to re-adjust
  564. * h->dev[] to match the mid layer's view.
  565. */
  566. unsigned long flags;
  567. int i, j;
  568. spin_lock_irqsave(&h->lock, flags);
  569. for (i = 0; i < h->ndevices; i++) {
  570. if (h->dev[i] == added) {
  571. for (j = i; j < h->ndevices-1; j++)
  572. h->dev[j] = h->dev[j+1];
  573. h->ndevices--;
  574. break;
  575. }
  576. }
  577. spin_unlock_irqrestore(&h->lock, flags);
  578. kfree(added);
  579. }
  580. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  581. struct hpsa_scsi_dev_t *dev2)
  582. {
  583. if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
  584. (dev1->lun != -1 && dev2->lun != -1)) &&
  585. dev1->devtype != 0x0C)
  586. return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
  587. /* we compare everything except lun and target as these
  588. * are not yet assigned. Compare parts likely
  589. * to differ first
  590. */
  591. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  592. sizeof(dev1->scsi3addr)) != 0)
  593. return 0;
  594. if (memcmp(dev1->device_id, dev2->device_id,
  595. sizeof(dev1->device_id)) != 0)
  596. return 0;
  597. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  598. return 0;
  599. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  600. return 0;
  601. if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
  602. return 0;
  603. if (dev1->devtype != dev2->devtype)
  604. return 0;
  605. if (dev1->raid_level != dev2->raid_level)
  606. return 0;
  607. if (dev1->bus != dev2->bus)
  608. return 0;
  609. return 1;
  610. }
  611. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  612. * and return needle location in *index. If scsi3addr matches, but not
  613. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  614. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  615. */
  616. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  617. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  618. int *index)
  619. {
  620. int i;
  621. #define DEVICE_NOT_FOUND 0
  622. #define DEVICE_CHANGED 1
  623. #define DEVICE_SAME 2
  624. for (i = 0; i < haystack_size; i++) {
  625. if (haystack[i] == NULL) /* previously removed. */
  626. continue;
  627. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  628. *index = i;
  629. if (device_is_the_same(needle, haystack[i]))
  630. return DEVICE_SAME;
  631. else
  632. return DEVICE_CHANGED;
  633. }
  634. }
  635. *index = -1;
  636. return DEVICE_NOT_FOUND;
  637. }
  638. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  639. struct hpsa_scsi_dev_t *sd[], int nsds)
  640. {
  641. /* sd contains scsi3 addresses and devtypes, and inquiry
  642. * data. This function takes what's in sd to be the current
  643. * reality and updates h->dev[] to reflect that reality.
  644. */
  645. int i, entry, device_change, changes = 0;
  646. struct hpsa_scsi_dev_t *csd;
  647. unsigned long flags;
  648. struct hpsa_scsi_dev_t **added, **removed;
  649. int nadded, nremoved;
  650. struct Scsi_Host *sh = NULL;
  651. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  652. GFP_KERNEL);
  653. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  654. GFP_KERNEL);
  655. if (!added || !removed) {
  656. dev_warn(&h->pdev->dev, "out of memory in "
  657. "adjust_hpsa_scsi_table\n");
  658. goto free_and_out;
  659. }
  660. spin_lock_irqsave(&h->devlock, flags);
  661. /* find any devices in h->dev[] that are not in
  662. * sd[] and remove them from h->dev[], and for any
  663. * devices which have changed, remove the old device
  664. * info and add the new device info.
  665. */
  666. i = 0;
  667. nremoved = 0;
  668. nadded = 0;
  669. while (i < h->ndevices) {
  670. csd = h->dev[i];
  671. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  672. if (device_change == DEVICE_NOT_FOUND) {
  673. changes++;
  674. hpsa_scsi_remove_entry(h, hostno, i,
  675. removed, &nremoved);
  676. continue; /* remove ^^^, hence i not incremented */
  677. } else if (device_change == DEVICE_CHANGED) {
  678. changes++;
  679. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  680. added, &nadded, removed, &nremoved);
  681. /* Set it to NULL to prevent it from being freed
  682. * at the bottom of hpsa_update_scsi_devices()
  683. */
  684. sd[entry] = NULL;
  685. }
  686. i++;
  687. }
  688. /* Now, make sure every device listed in sd[] is also
  689. * listed in h->dev[], adding them if they aren't found
  690. */
  691. for (i = 0; i < nsds; i++) {
  692. if (!sd[i]) /* if already added above. */
  693. continue;
  694. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  695. h->ndevices, &entry);
  696. if (device_change == DEVICE_NOT_FOUND) {
  697. changes++;
  698. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  699. added, &nadded) != 0)
  700. break;
  701. sd[i] = NULL; /* prevent from being freed later. */
  702. } else if (device_change == DEVICE_CHANGED) {
  703. /* should never happen... */
  704. changes++;
  705. dev_warn(&h->pdev->dev,
  706. "device unexpectedly changed.\n");
  707. /* but if it does happen, we just ignore that device */
  708. }
  709. }
  710. spin_unlock_irqrestore(&h->devlock, flags);
  711. /* Don't notify scsi mid layer of any changes the first time through
  712. * (or if there are no changes) scsi_scan_host will do it later the
  713. * first time through.
  714. */
  715. if (hostno == -1 || !changes)
  716. goto free_and_out;
  717. sh = h->scsi_host;
  718. /* Notify scsi mid layer of any removed devices */
  719. for (i = 0; i < nremoved; i++) {
  720. struct scsi_device *sdev =
  721. scsi_device_lookup(sh, removed[i]->bus,
  722. removed[i]->target, removed[i]->lun);
  723. if (sdev != NULL) {
  724. scsi_remove_device(sdev);
  725. scsi_device_put(sdev);
  726. } else {
  727. /* We don't expect to get here.
  728. * future cmds to this device will get selection
  729. * timeout as if the device was gone.
  730. */
  731. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  732. " for removal.", hostno, removed[i]->bus,
  733. removed[i]->target, removed[i]->lun);
  734. }
  735. kfree(removed[i]);
  736. removed[i] = NULL;
  737. }
  738. /* Notify scsi mid layer of any added devices */
  739. for (i = 0; i < nadded; i++) {
  740. if (scsi_add_device(sh, added[i]->bus,
  741. added[i]->target, added[i]->lun) == 0)
  742. continue;
  743. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  744. "device not added.\n", hostno, added[i]->bus,
  745. added[i]->target, added[i]->lun);
  746. /* now we have to remove it from h->dev,
  747. * since it didn't get added to scsi mid layer
  748. */
  749. fixup_botched_add(h, added[i]);
  750. }
  751. free_and_out:
  752. kfree(added);
  753. kfree(removed);
  754. }
  755. /*
  756. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  757. * Assume's h->devlock is held.
  758. */
  759. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  760. int bus, int target, int lun)
  761. {
  762. int i;
  763. struct hpsa_scsi_dev_t *sd;
  764. for (i = 0; i < h->ndevices; i++) {
  765. sd = h->dev[i];
  766. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  767. return sd;
  768. }
  769. return NULL;
  770. }
  771. /* link sdev->hostdata to our per-device structure. */
  772. static int hpsa_slave_alloc(struct scsi_device *sdev)
  773. {
  774. struct hpsa_scsi_dev_t *sd;
  775. unsigned long flags;
  776. struct ctlr_info *h;
  777. h = sdev_to_hba(sdev);
  778. spin_lock_irqsave(&h->devlock, flags);
  779. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  780. sdev_id(sdev), sdev->lun);
  781. if (sd != NULL)
  782. sdev->hostdata = sd;
  783. spin_unlock_irqrestore(&h->devlock, flags);
  784. return 0;
  785. }
  786. static void hpsa_slave_destroy(struct scsi_device *sdev)
  787. {
  788. /* nothing to do. */
  789. }
  790. static void hpsa_scsi_setup(struct ctlr_info *h)
  791. {
  792. h->ndevices = 0;
  793. h->scsi_host = NULL;
  794. spin_lock_init(&h->devlock);
  795. }
  796. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  797. {
  798. int i;
  799. if (!h->cmd_sg_list)
  800. return;
  801. for (i = 0; i < h->nr_cmds; i++) {
  802. kfree(h->cmd_sg_list[i]);
  803. h->cmd_sg_list[i] = NULL;
  804. }
  805. kfree(h->cmd_sg_list);
  806. h->cmd_sg_list = NULL;
  807. }
  808. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  809. {
  810. int i;
  811. if (h->chainsize <= 0)
  812. return 0;
  813. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  814. GFP_KERNEL);
  815. if (!h->cmd_sg_list)
  816. return -ENOMEM;
  817. for (i = 0; i < h->nr_cmds; i++) {
  818. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  819. h->chainsize, GFP_KERNEL);
  820. if (!h->cmd_sg_list[i])
  821. goto clean;
  822. }
  823. return 0;
  824. clean:
  825. hpsa_free_sg_chain_blocks(h);
  826. return -ENOMEM;
  827. }
  828. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  829. struct CommandList *c)
  830. {
  831. struct SGDescriptor *chain_sg, *chain_block;
  832. u64 temp64;
  833. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  834. chain_block = h->cmd_sg_list[c->cmdindex];
  835. chain_sg->Ext = HPSA_SG_CHAIN;
  836. chain_sg->Len = sizeof(*chain_sg) *
  837. (c->Header.SGTotal - h->max_cmd_sg_entries);
  838. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  839. PCI_DMA_TODEVICE);
  840. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  841. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  842. }
  843. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  844. struct CommandList *c)
  845. {
  846. struct SGDescriptor *chain_sg;
  847. union u64bit temp64;
  848. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  849. return;
  850. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  851. temp64.val32.lower = chain_sg->Addr.lower;
  852. temp64.val32.upper = chain_sg->Addr.upper;
  853. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  854. }
  855. static void complete_scsi_command(struct CommandList *cp,
  856. int timeout, u32 tag)
  857. {
  858. struct scsi_cmnd *cmd;
  859. struct ctlr_info *h;
  860. struct ErrorInfo *ei;
  861. unsigned char sense_key;
  862. unsigned char asc; /* additional sense code */
  863. unsigned char ascq; /* additional sense code qualifier */
  864. ei = cp->err_info;
  865. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  866. h = cp->h;
  867. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  868. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  869. hpsa_unmap_sg_chain_block(h, cp);
  870. cmd->result = (DID_OK << 16); /* host byte */
  871. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  872. cmd->result |= ei->ScsiStatus;
  873. /* copy the sense data whether we need to or not. */
  874. memcpy(cmd->sense_buffer, ei->SenseInfo,
  875. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  876. SCSI_SENSE_BUFFERSIZE :
  877. ei->SenseLen);
  878. scsi_set_resid(cmd, ei->ResidualCnt);
  879. if (ei->CommandStatus == 0) {
  880. cmd->scsi_done(cmd);
  881. cmd_free(h, cp);
  882. return;
  883. }
  884. /* an error has occurred */
  885. switch (ei->CommandStatus) {
  886. case CMD_TARGET_STATUS:
  887. if (ei->ScsiStatus) {
  888. /* Get sense key */
  889. sense_key = 0xf & ei->SenseInfo[2];
  890. /* Get additional sense code */
  891. asc = ei->SenseInfo[12];
  892. /* Get addition sense code qualifier */
  893. ascq = ei->SenseInfo[13];
  894. }
  895. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  896. if (check_for_unit_attention(h, cp)) {
  897. cmd->result = DID_SOFT_ERROR << 16;
  898. break;
  899. }
  900. if (sense_key == ILLEGAL_REQUEST) {
  901. /*
  902. * SCSI REPORT_LUNS is commonly unsupported on
  903. * Smart Array. Suppress noisy complaint.
  904. */
  905. if (cp->Request.CDB[0] == REPORT_LUNS)
  906. break;
  907. /* If ASC/ASCQ indicate Logical Unit
  908. * Not Supported condition,
  909. */
  910. if ((asc == 0x25) && (ascq == 0x0)) {
  911. dev_warn(&h->pdev->dev, "cp %p "
  912. "has check condition\n", cp);
  913. break;
  914. }
  915. }
  916. if (sense_key == NOT_READY) {
  917. /* If Sense is Not Ready, Logical Unit
  918. * Not ready, Manual Intervention
  919. * required
  920. */
  921. if ((asc == 0x04) && (ascq == 0x03)) {
  922. dev_warn(&h->pdev->dev, "cp %p "
  923. "has check condition: unit "
  924. "not ready, manual "
  925. "intervention required\n", cp);
  926. break;
  927. }
  928. }
  929. if (sense_key == ABORTED_COMMAND) {
  930. /* Aborted command is retryable */
  931. dev_warn(&h->pdev->dev, "cp %p "
  932. "has check condition: aborted command: "
  933. "ASC: 0x%x, ASCQ: 0x%x\n",
  934. cp, asc, ascq);
  935. cmd->result = DID_SOFT_ERROR << 16;
  936. break;
  937. }
  938. /* Must be some other type of check condition */
  939. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  940. "unknown type: "
  941. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  942. "Returning result: 0x%x, "
  943. "cmd=[%02x %02x %02x %02x %02x "
  944. "%02x %02x %02x %02x %02x %02x "
  945. "%02x %02x %02x %02x %02x]\n",
  946. cp, sense_key, asc, ascq,
  947. cmd->result,
  948. cmd->cmnd[0], cmd->cmnd[1],
  949. cmd->cmnd[2], cmd->cmnd[3],
  950. cmd->cmnd[4], cmd->cmnd[5],
  951. cmd->cmnd[6], cmd->cmnd[7],
  952. cmd->cmnd[8], cmd->cmnd[9],
  953. cmd->cmnd[10], cmd->cmnd[11],
  954. cmd->cmnd[12], cmd->cmnd[13],
  955. cmd->cmnd[14], cmd->cmnd[15]);
  956. break;
  957. }
  958. /* Problem was not a check condition
  959. * Pass it up to the upper layers...
  960. */
  961. if (ei->ScsiStatus) {
  962. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  963. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  964. "Returning result: 0x%x\n",
  965. cp, ei->ScsiStatus,
  966. sense_key, asc, ascq,
  967. cmd->result);
  968. } else { /* scsi status is zero??? How??? */
  969. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  970. "Returning no connection.\n", cp),
  971. /* Ordinarily, this case should never happen,
  972. * but there is a bug in some released firmware
  973. * revisions that allows it to happen if, for
  974. * example, a 4100 backplane loses power and
  975. * the tape drive is in it. We assume that
  976. * it's a fatal error of some kind because we
  977. * can't show that it wasn't. We will make it
  978. * look like selection timeout since that is
  979. * the most common reason for this to occur,
  980. * and it's severe enough.
  981. */
  982. cmd->result = DID_NO_CONNECT << 16;
  983. }
  984. break;
  985. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  986. break;
  987. case CMD_DATA_OVERRUN:
  988. dev_warn(&h->pdev->dev, "cp %p has"
  989. " completed with data overrun "
  990. "reported\n", cp);
  991. break;
  992. case CMD_INVALID: {
  993. /* print_bytes(cp, sizeof(*cp), 1, 0);
  994. print_cmd(cp); */
  995. /* We get CMD_INVALID if you address a non-existent device
  996. * instead of a selection timeout (no response). You will
  997. * see this if you yank out a drive, then try to access it.
  998. * This is kind of a shame because it means that any other
  999. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1000. * missing target. */
  1001. cmd->result = DID_NO_CONNECT << 16;
  1002. }
  1003. break;
  1004. case CMD_PROTOCOL_ERR:
  1005. dev_warn(&h->pdev->dev, "cp %p has "
  1006. "protocol error \n", cp);
  1007. break;
  1008. case CMD_HARDWARE_ERR:
  1009. cmd->result = DID_ERROR << 16;
  1010. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1011. break;
  1012. case CMD_CONNECTION_LOST:
  1013. cmd->result = DID_ERROR << 16;
  1014. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1015. break;
  1016. case CMD_ABORTED:
  1017. cmd->result = DID_ABORT << 16;
  1018. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1019. cp, ei->ScsiStatus);
  1020. break;
  1021. case CMD_ABORT_FAILED:
  1022. cmd->result = DID_ERROR << 16;
  1023. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1024. break;
  1025. case CMD_UNSOLICITED_ABORT:
  1026. cmd->result = DID_RESET << 16;
  1027. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1028. "abort\n", cp);
  1029. break;
  1030. case CMD_TIMEOUT:
  1031. cmd->result = DID_TIME_OUT << 16;
  1032. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1033. break;
  1034. default:
  1035. cmd->result = DID_ERROR << 16;
  1036. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1037. cp, ei->CommandStatus);
  1038. }
  1039. cmd->scsi_done(cmd);
  1040. cmd_free(h, cp);
  1041. }
  1042. static int hpsa_scsi_detect(struct ctlr_info *h)
  1043. {
  1044. struct Scsi_Host *sh;
  1045. int error;
  1046. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1047. if (sh == NULL)
  1048. goto fail;
  1049. sh->io_port = 0;
  1050. sh->n_io_port = 0;
  1051. sh->this_id = -1;
  1052. sh->max_channel = 3;
  1053. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1054. sh->max_lun = HPSA_MAX_LUN;
  1055. sh->max_id = HPSA_MAX_LUN;
  1056. sh->can_queue = h->nr_cmds;
  1057. sh->cmd_per_lun = h->nr_cmds;
  1058. sh->sg_tablesize = h->maxsgentries;
  1059. h->scsi_host = sh;
  1060. sh->hostdata[0] = (unsigned long) h;
  1061. sh->irq = h->intr[PERF_MODE_INT];
  1062. sh->unique_id = sh->irq;
  1063. error = scsi_add_host(sh, &h->pdev->dev);
  1064. if (error)
  1065. goto fail_host_put;
  1066. scsi_scan_host(sh);
  1067. return 0;
  1068. fail_host_put:
  1069. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1070. " failed for controller %d\n", h->ctlr);
  1071. scsi_host_put(sh);
  1072. return error;
  1073. fail:
  1074. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1075. " failed for controller %d\n", h->ctlr);
  1076. return -ENOMEM;
  1077. }
  1078. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1079. struct CommandList *c, int sg_used, int data_direction)
  1080. {
  1081. int i;
  1082. union u64bit addr64;
  1083. for (i = 0; i < sg_used; i++) {
  1084. addr64.val32.lower = c->SG[i].Addr.lower;
  1085. addr64.val32.upper = c->SG[i].Addr.upper;
  1086. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1087. data_direction);
  1088. }
  1089. }
  1090. static void hpsa_map_one(struct pci_dev *pdev,
  1091. struct CommandList *cp,
  1092. unsigned char *buf,
  1093. size_t buflen,
  1094. int data_direction)
  1095. {
  1096. u64 addr64;
  1097. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1098. cp->Header.SGList = 0;
  1099. cp->Header.SGTotal = 0;
  1100. return;
  1101. }
  1102. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1103. cp->SG[0].Addr.lower =
  1104. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1105. cp->SG[0].Addr.upper =
  1106. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1107. cp->SG[0].Len = buflen;
  1108. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1109. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1110. }
  1111. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1112. struct CommandList *c)
  1113. {
  1114. DECLARE_COMPLETION_ONSTACK(wait);
  1115. c->waiting = &wait;
  1116. enqueue_cmd_and_start_io(h, c);
  1117. wait_for_completion(&wait);
  1118. }
  1119. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1120. struct CommandList *c, int data_direction)
  1121. {
  1122. int retry_count = 0;
  1123. do {
  1124. memset(c->err_info, 0, sizeof(c->err_info));
  1125. hpsa_scsi_do_simple_cmd_core(h, c);
  1126. retry_count++;
  1127. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1128. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1129. }
  1130. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1131. {
  1132. struct ErrorInfo *ei;
  1133. struct device *d = &cp->h->pdev->dev;
  1134. ei = cp->err_info;
  1135. switch (ei->CommandStatus) {
  1136. case CMD_TARGET_STATUS:
  1137. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1138. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1139. ei->ScsiStatus);
  1140. if (ei->ScsiStatus == 0)
  1141. dev_warn(d, "SCSI status is abnormally zero. "
  1142. "(probably indicates selection timeout "
  1143. "reported incorrectly due to a known "
  1144. "firmware bug, circa July, 2001.)\n");
  1145. break;
  1146. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1147. dev_info(d, "UNDERRUN\n");
  1148. break;
  1149. case CMD_DATA_OVERRUN:
  1150. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1151. break;
  1152. case CMD_INVALID: {
  1153. /* controller unfortunately reports SCSI passthru's
  1154. * to non-existent targets as invalid commands.
  1155. */
  1156. dev_warn(d, "cp %p is reported invalid (probably means "
  1157. "target device no longer present)\n", cp);
  1158. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1159. print_cmd(cp); */
  1160. }
  1161. break;
  1162. case CMD_PROTOCOL_ERR:
  1163. dev_warn(d, "cp %p has protocol error \n", cp);
  1164. break;
  1165. case CMD_HARDWARE_ERR:
  1166. /* cmd->result = DID_ERROR << 16; */
  1167. dev_warn(d, "cp %p had hardware error\n", cp);
  1168. break;
  1169. case CMD_CONNECTION_LOST:
  1170. dev_warn(d, "cp %p had connection lost\n", cp);
  1171. break;
  1172. case CMD_ABORTED:
  1173. dev_warn(d, "cp %p was aborted\n", cp);
  1174. break;
  1175. case CMD_ABORT_FAILED:
  1176. dev_warn(d, "cp %p reports abort failed\n", cp);
  1177. break;
  1178. case CMD_UNSOLICITED_ABORT:
  1179. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1180. break;
  1181. case CMD_TIMEOUT:
  1182. dev_warn(d, "cp %p timed out\n", cp);
  1183. break;
  1184. default:
  1185. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1186. ei->CommandStatus);
  1187. }
  1188. }
  1189. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1190. unsigned char page, unsigned char *buf,
  1191. unsigned char bufsize)
  1192. {
  1193. int rc = IO_OK;
  1194. struct CommandList *c;
  1195. struct ErrorInfo *ei;
  1196. c = cmd_special_alloc(h);
  1197. if (c == NULL) { /* trouble... */
  1198. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1199. return -ENOMEM;
  1200. }
  1201. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1202. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1203. ei = c->err_info;
  1204. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1205. hpsa_scsi_interpret_error(c);
  1206. rc = -1;
  1207. }
  1208. cmd_special_free(h, c);
  1209. return rc;
  1210. }
  1211. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1212. {
  1213. int rc = IO_OK;
  1214. struct CommandList *c;
  1215. struct ErrorInfo *ei;
  1216. c = cmd_special_alloc(h);
  1217. if (c == NULL) { /* trouble... */
  1218. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1219. return -ENOMEM;
  1220. }
  1221. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1222. hpsa_scsi_do_simple_cmd_core(h, c);
  1223. /* no unmap needed here because no data xfer. */
  1224. ei = c->err_info;
  1225. if (ei->CommandStatus != 0) {
  1226. hpsa_scsi_interpret_error(c);
  1227. rc = -1;
  1228. }
  1229. cmd_special_free(h, c);
  1230. return rc;
  1231. }
  1232. static void hpsa_get_raid_level(struct ctlr_info *h,
  1233. unsigned char *scsi3addr, unsigned char *raid_level)
  1234. {
  1235. int rc;
  1236. unsigned char *buf;
  1237. *raid_level = RAID_UNKNOWN;
  1238. buf = kzalloc(64, GFP_KERNEL);
  1239. if (!buf)
  1240. return;
  1241. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1242. if (rc == 0)
  1243. *raid_level = buf[8];
  1244. if (*raid_level > RAID_UNKNOWN)
  1245. *raid_level = RAID_UNKNOWN;
  1246. kfree(buf);
  1247. return;
  1248. }
  1249. /* Get the device id from inquiry page 0x83 */
  1250. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1251. unsigned char *device_id, int buflen)
  1252. {
  1253. int rc;
  1254. unsigned char *buf;
  1255. if (buflen > 16)
  1256. buflen = 16;
  1257. buf = kzalloc(64, GFP_KERNEL);
  1258. if (!buf)
  1259. return -1;
  1260. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1261. if (rc == 0)
  1262. memcpy(device_id, &buf[8], buflen);
  1263. kfree(buf);
  1264. return rc != 0;
  1265. }
  1266. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1267. struct ReportLUNdata *buf, int bufsize,
  1268. int extended_response)
  1269. {
  1270. int rc = IO_OK;
  1271. struct CommandList *c;
  1272. unsigned char scsi3addr[8];
  1273. struct ErrorInfo *ei;
  1274. c = cmd_special_alloc(h);
  1275. if (c == NULL) { /* trouble... */
  1276. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1277. return -1;
  1278. }
  1279. /* address the controller */
  1280. memset(scsi3addr, 0, sizeof(scsi3addr));
  1281. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1282. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1283. if (extended_response)
  1284. c->Request.CDB[1] = extended_response;
  1285. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1286. ei = c->err_info;
  1287. if (ei->CommandStatus != 0 &&
  1288. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1289. hpsa_scsi_interpret_error(c);
  1290. rc = -1;
  1291. }
  1292. cmd_special_free(h, c);
  1293. return rc;
  1294. }
  1295. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1296. struct ReportLUNdata *buf,
  1297. int bufsize, int extended_response)
  1298. {
  1299. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1300. }
  1301. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1302. struct ReportLUNdata *buf, int bufsize)
  1303. {
  1304. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1305. }
  1306. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1307. int bus, int target, int lun)
  1308. {
  1309. device->bus = bus;
  1310. device->target = target;
  1311. device->lun = lun;
  1312. }
  1313. static int hpsa_update_device_info(struct ctlr_info *h,
  1314. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1315. {
  1316. #define OBDR_TAPE_INQ_SIZE 49
  1317. unsigned char *inq_buff;
  1318. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1319. if (!inq_buff)
  1320. goto bail_out;
  1321. /* Do an inquiry to the device to see what it is. */
  1322. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1323. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1324. /* Inquiry failed (msg printed already) */
  1325. dev_err(&h->pdev->dev,
  1326. "hpsa_update_device_info: inquiry failed\n");
  1327. goto bail_out;
  1328. }
  1329. this_device->devtype = (inq_buff[0] & 0x1f);
  1330. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1331. memcpy(this_device->vendor, &inq_buff[8],
  1332. sizeof(this_device->vendor));
  1333. memcpy(this_device->model, &inq_buff[16],
  1334. sizeof(this_device->model));
  1335. memcpy(this_device->revision, &inq_buff[32],
  1336. sizeof(this_device->revision));
  1337. memset(this_device->device_id, 0,
  1338. sizeof(this_device->device_id));
  1339. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1340. sizeof(this_device->device_id));
  1341. if (this_device->devtype == TYPE_DISK &&
  1342. is_logical_dev_addr_mode(scsi3addr))
  1343. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1344. else
  1345. this_device->raid_level = RAID_UNKNOWN;
  1346. kfree(inq_buff);
  1347. return 0;
  1348. bail_out:
  1349. kfree(inq_buff);
  1350. return 1;
  1351. }
  1352. static unsigned char *msa2xxx_model[] = {
  1353. "MSA2012",
  1354. "MSA2024",
  1355. "MSA2312",
  1356. "MSA2324",
  1357. NULL,
  1358. };
  1359. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1360. {
  1361. int i;
  1362. for (i = 0; msa2xxx_model[i]; i++)
  1363. if (strncmp(device->model, msa2xxx_model[i],
  1364. strlen(msa2xxx_model[i])) == 0)
  1365. return 1;
  1366. return 0;
  1367. }
  1368. /* Helper function to assign bus, target, lun mapping of devices.
  1369. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1370. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1371. * Logical drive target and lun are assigned at this time, but
  1372. * physical device lun and target assignment are deferred (assigned
  1373. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1374. */
  1375. static void figure_bus_target_lun(struct ctlr_info *h,
  1376. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1377. struct hpsa_scsi_dev_t *device)
  1378. {
  1379. u32 lunid;
  1380. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1381. /* logical device */
  1382. if (unlikely(is_scsi_rev_5(h))) {
  1383. /* p1210m, logical drives lun assignments
  1384. * match SCSI REPORT LUNS data.
  1385. */
  1386. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1387. *bus = 0;
  1388. *target = 0;
  1389. *lun = (lunid & 0x3fff) + 1;
  1390. } else {
  1391. /* not p1210m... */
  1392. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1393. if (is_msa2xxx(h, device)) {
  1394. /* msa2xxx way, put logicals on bus 1
  1395. * and match target/lun numbers box
  1396. * reports.
  1397. */
  1398. *bus = 1;
  1399. *target = (lunid >> 16) & 0x3fff;
  1400. *lun = lunid & 0x00ff;
  1401. } else {
  1402. /* Traditional smart array way. */
  1403. *bus = 0;
  1404. *lun = 0;
  1405. *target = lunid & 0x3fff;
  1406. }
  1407. }
  1408. } else {
  1409. /* physical device */
  1410. if (is_hba_lunid(lunaddrbytes))
  1411. if (unlikely(is_scsi_rev_5(h))) {
  1412. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1413. *target = 0;
  1414. *lun = 0;
  1415. return;
  1416. } else
  1417. *bus = 3; /* traditional smartarray */
  1418. else
  1419. *bus = 2; /* physical disk */
  1420. *target = -1;
  1421. *lun = -1; /* we will fill these in later. */
  1422. }
  1423. }
  1424. /*
  1425. * If there is no lun 0 on a target, linux won't find any devices.
  1426. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1427. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1428. * it for some reason. *tmpdevice is the target we're adding,
  1429. * this_device is a pointer into the current element of currentsd[]
  1430. * that we're building up in update_scsi_devices(), below.
  1431. * lunzerobits is a bitmap that tracks which targets already have a
  1432. * lun 0 assigned.
  1433. * Returns 1 if an enclosure was added, 0 if not.
  1434. */
  1435. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1436. struct hpsa_scsi_dev_t *tmpdevice,
  1437. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1438. int bus, int target, int lun, unsigned long lunzerobits[],
  1439. int *nmsa2xxx_enclosures)
  1440. {
  1441. unsigned char scsi3addr[8];
  1442. if (test_bit(target, lunzerobits))
  1443. return 0; /* There is already a lun 0 on this target. */
  1444. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1445. return 0; /* It's the logical targets that may lack lun 0. */
  1446. if (!is_msa2xxx(h, tmpdevice))
  1447. return 0; /* It's only the MSA2xxx that have this problem. */
  1448. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1449. return 0;
  1450. if (is_hba_lunid(scsi3addr))
  1451. return 0; /* Don't add the RAID controller here. */
  1452. if (is_scsi_rev_5(h))
  1453. return 0; /* p1210m doesn't need to do this. */
  1454. #define MAX_MSA2XXX_ENCLOSURES 32
  1455. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1456. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1457. "enclosures exceeded. Check your hardware "
  1458. "configuration.");
  1459. return 0;
  1460. }
  1461. memset(scsi3addr, 0, 8);
  1462. scsi3addr[3] = target;
  1463. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1464. return 0;
  1465. (*nmsa2xxx_enclosures)++;
  1466. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1467. set_bit(target, lunzerobits);
  1468. return 1;
  1469. }
  1470. /*
  1471. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1472. * logdev. The number of luns in physdev and logdev are returned in
  1473. * *nphysicals and *nlogicals, respectively.
  1474. * Returns 0 on success, -1 otherwise.
  1475. */
  1476. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1477. int reportlunsize,
  1478. struct ReportLUNdata *physdev, u32 *nphysicals,
  1479. struct ReportLUNdata *logdev, u32 *nlogicals)
  1480. {
  1481. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1482. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1483. return -1;
  1484. }
  1485. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1486. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1487. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1488. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1489. *nphysicals - HPSA_MAX_PHYS_LUN);
  1490. *nphysicals = HPSA_MAX_PHYS_LUN;
  1491. }
  1492. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1493. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1494. return -1;
  1495. }
  1496. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1497. /* Reject Logicals in excess of our max capability. */
  1498. if (*nlogicals > HPSA_MAX_LUN) {
  1499. dev_warn(&h->pdev->dev,
  1500. "maximum logical LUNs (%d) exceeded. "
  1501. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1502. *nlogicals - HPSA_MAX_LUN);
  1503. *nlogicals = HPSA_MAX_LUN;
  1504. }
  1505. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1506. dev_warn(&h->pdev->dev,
  1507. "maximum logical + physical LUNs (%d) exceeded. "
  1508. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1509. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1510. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1511. }
  1512. return 0;
  1513. }
  1514. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1515. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1516. struct ReportLUNdata *logdev_list)
  1517. {
  1518. /* Helper function, figure out where the LUN ID info is coming from
  1519. * given index i, lists of physical and logical devices, where in
  1520. * the list the raid controller is supposed to appear (first or last)
  1521. */
  1522. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1523. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1524. if (i == raid_ctlr_position)
  1525. return RAID_CTLR_LUNID;
  1526. if (i < logicals_start)
  1527. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1528. if (i < last_device)
  1529. return &logdev_list->LUN[i - nphysicals -
  1530. (raid_ctlr_position == 0)][0];
  1531. BUG();
  1532. return NULL;
  1533. }
  1534. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1535. {
  1536. /* the idea here is we could get notified
  1537. * that some devices have changed, so we do a report
  1538. * physical luns and report logical luns cmd, and adjust
  1539. * our list of devices accordingly.
  1540. *
  1541. * The scsi3addr's of devices won't change so long as the
  1542. * adapter is not reset. That means we can rescan and
  1543. * tell which devices we already know about, vs. new
  1544. * devices, vs. disappearing devices.
  1545. */
  1546. struct ReportLUNdata *physdev_list = NULL;
  1547. struct ReportLUNdata *logdev_list = NULL;
  1548. unsigned char *inq_buff = NULL;
  1549. u32 nphysicals = 0;
  1550. u32 nlogicals = 0;
  1551. u32 ndev_allocated = 0;
  1552. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1553. int ncurrent = 0;
  1554. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1555. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1556. int bus, target, lun;
  1557. int raid_ctlr_position;
  1558. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1559. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1560. GFP_KERNEL);
  1561. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1562. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1563. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1564. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1565. if (!currentsd || !physdev_list || !logdev_list ||
  1566. !inq_buff || !tmpdevice) {
  1567. dev_err(&h->pdev->dev, "out of memory\n");
  1568. goto out;
  1569. }
  1570. memset(lunzerobits, 0, sizeof(lunzerobits));
  1571. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1572. logdev_list, &nlogicals))
  1573. goto out;
  1574. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1575. * but each of them 4 times through different paths. The plus 1
  1576. * is for the RAID controller.
  1577. */
  1578. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1579. /* Allocate the per device structures */
  1580. for (i = 0; i < ndevs_to_allocate; i++) {
  1581. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1582. if (!currentsd[i]) {
  1583. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1584. __FILE__, __LINE__);
  1585. goto out;
  1586. }
  1587. ndev_allocated++;
  1588. }
  1589. if (unlikely(is_scsi_rev_5(h)))
  1590. raid_ctlr_position = 0;
  1591. else
  1592. raid_ctlr_position = nphysicals + nlogicals;
  1593. /* adjust our table of devices */
  1594. nmsa2xxx_enclosures = 0;
  1595. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1596. u8 *lunaddrbytes;
  1597. /* Figure out where the LUN ID info is coming from */
  1598. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1599. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1600. /* skip masked physical devices. */
  1601. if (lunaddrbytes[3] & 0xC0 &&
  1602. i < nphysicals + (raid_ctlr_position == 0))
  1603. continue;
  1604. /* Get device type, vendor, model, device id */
  1605. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1606. continue; /* skip it if we can't talk to it. */
  1607. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1608. tmpdevice);
  1609. this_device = currentsd[ncurrent];
  1610. /*
  1611. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1612. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1613. * is nonetheless an enclosure device there. We have to
  1614. * present that otherwise linux won't find anything if
  1615. * there is no lun 0.
  1616. */
  1617. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1618. lunaddrbytes, bus, target, lun, lunzerobits,
  1619. &nmsa2xxx_enclosures)) {
  1620. ncurrent++;
  1621. this_device = currentsd[ncurrent];
  1622. }
  1623. *this_device = *tmpdevice;
  1624. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1625. switch (this_device->devtype) {
  1626. case TYPE_ROM: {
  1627. /* We don't *really* support actual CD-ROM devices,
  1628. * just "One Button Disaster Recovery" tape drive
  1629. * which temporarily pretends to be a CD-ROM drive.
  1630. * So we check that the device is really an OBDR tape
  1631. * device by checking for "$DR-10" in bytes 43-48 of
  1632. * the inquiry data.
  1633. */
  1634. char obdr_sig[7];
  1635. #define OBDR_TAPE_SIG "$DR-10"
  1636. strncpy(obdr_sig, &inq_buff[43], 6);
  1637. obdr_sig[6] = '\0';
  1638. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1639. /* Not OBDR device, ignore it. */
  1640. break;
  1641. }
  1642. ncurrent++;
  1643. break;
  1644. case TYPE_DISK:
  1645. if (i < nphysicals)
  1646. break;
  1647. ncurrent++;
  1648. break;
  1649. case TYPE_TAPE:
  1650. case TYPE_MEDIUM_CHANGER:
  1651. ncurrent++;
  1652. break;
  1653. case TYPE_RAID:
  1654. /* Only present the Smartarray HBA as a RAID controller.
  1655. * If it's a RAID controller other than the HBA itself
  1656. * (an external RAID controller, MSA500 or similar)
  1657. * don't present it.
  1658. */
  1659. if (!is_hba_lunid(lunaddrbytes))
  1660. break;
  1661. ncurrent++;
  1662. break;
  1663. default:
  1664. break;
  1665. }
  1666. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1667. break;
  1668. }
  1669. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1670. out:
  1671. kfree(tmpdevice);
  1672. for (i = 0; i < ndev_allocated; i++)
  1673. kfree(currentsd[i]);
  1674. kfree(currentsd);
  1675. kfree(inq_buff);
  1676. kfree(physdev_list);
  1677. kfree(logdev_list);
  1678. }
  1679. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1680. * dma mapping and fills in the scatter gather entries of the
  1681. * hpsa command, cp.
  1682. */
  1683. static int hpsa_scatter_gather(struct ctlr_info *h,
  1684. struct CommandList *cp,
  1685. struct scsi_cmnd *cmd)
  1686. {
  1687. unsigned int len;
  1688. struct scatterlist *sg;
  1689. u64 addr64;
  1690. int use_sg, i, sg_index, chained;
  1691. struct SGDescriptor *curr_sg;
  1692. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1693. use_sg = scsi_dma_map(cmd);
  1694. if (use_sg < 0)
  1695. return use_sg;
  1696. if (!use_sg)
  1697. goto sglist_finished;
  1698. curr_sg = cp->SG;
  1699. chained = 0;
  1700. sg_index = 0;
  1701. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1702. if (i == h->max_cmd_sg_entries - 1 &&
  1703. use_sg > h->max_cmd_sg_entries) {
  1704. chained = 1;
  1705. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1706. sg_index = 0;
  1707. }
  1708. addr64 = (u64) sg_dma_address(sg);
  1709. len = sg_dma_len(sg);
  1710. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1711. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1712. curr_sg->Len = len;
  1713. curr_sg->Ext = 0; /* we are not chaining */
  1714. curr_sg++;
  1715. }
  1716. if (use_sg + chained > h->maxSG)
  1717. h->maxSG = use_sg + chained;
  1718. if (chained) {
  1719. cp->Header.SGList = h->max_cmd_sg_entries;
  1720. cp->Header.SGTotal = (u16) (use_sg + 1);
  1721. hpsa_map_sg_chain_block(h, cp);
  1722. return 0;
  1723. }
  1724. sglist_finished:
  1725. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1726. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1727. return 0;
  1728. }
  1729. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1730. void (*done)(struct scsi_cmnd *))
  1731. {
  1732. struct ctlr_info *h;
  1733. struct hpsa_scsi_dev_t *dev;
  1734. unsigned char scsi3addr[8];
  1735. struct CommandList *c;
  1736. unsigned long flags;
  1737. /* Get the ptr to our adapter structure out of cmd->host. */
  1738. h = sdev_to_hba(cmd->device);
  1739. dev = cmd->device->hostdata;
  1740. if (!dev) {
  1741. cmd->result = DID_NO_CONNECT << 16;
  1742. done(cmd);
  1743. return 0;
  1744. }
  1745. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1746. /* Need a lock as this is being allocated from the pool */
  1747. spin_lock_irqsave(&h->lock, flags);
  1748. c = cmd_alloc(h);
  1749. spin_unlock_irqrestore(&h->lock, flags);
  1750. if (c == NULL) { /* trouble... */
  1751. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1752. return SCSI_MLQUEUE_HOST_BUSY;
  1753. }
  1754. /* Fill in the command list header */
  1755. cmd->scsi_done = done; /* save this for use by completion code */
  1756. /* save c in case we have to abort it */
  1757. cmd->host_scribble = (unsigned char *) c;
  1758. c->cmd_type = CMD_SCSI;
  1759. c->scsi_cmd = cmd;
  1760. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1761. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1762. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1763. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1764. /* Fill in the request block... */
  1765. c->Request.Timeout = 0;
  1766. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1767. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1768. c->Request.CDBLen = cmd->cmd_len;
  1769. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1770. c->Request.Type.Type = TYPE_CMD;
  1771. c->Request.Type.Attribute = ATTR_SIMPLE;
  1772. switch (cmd->sc_data_direction) {
  1773. case DMA_TO_DEVICE:
  1774. c->Request.Type.Direction = XFER_WRITE;
  1775. break;
  1776. case DMA_FROM_DEVICE:
  1777. c->Request.Type.Direction = XFER_READ;
  1778. break;
  1779. case DMA_NONE:
  1780. c->Request.Type.Direction = XFER_NONE;
  1781. break;
  1782. case DMA_BIDIRECTIONAL:
  1783. /* This can happen if a buggy application does a scsi passthru
  1784. * and sets both inlen and outlen to non-zero. ( see
  1785. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1786. */
  1787. c->Request.Type.Direction = XFER_RSVD;
  1788. /* This is technically wrong, and hpsa controllers should
  1789. * reject it with CMD_INVALID, which is the most correct
  1790. * response, but non-fibre backends appear to let it
  1791. * slide by, and give the same results as if this field
  1792. * were set correctly. Either way is acceptable for
  1793. * our purposes here.
  1794. */
  1795. break;
  1796. default:
  1797. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1798. cmd->sc_data_direction);
  1799. BUG();
  1800. break;
  1801. }
  1802. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1803. cmd_free(h, c);
  1804. return SCSI_MLQUEUE_HOST_BUSY;
  1805. }
  1806. enqueue_cmd_and_start_io(h, c);
  1807. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1808. return 0;
  1809. }
  1810. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1811. static void hpsa_scan_start(struct Scsi_Host *sh)
  1812. {
  1813. struct ctlr_info *h = shost_to_hba(sh);
  1814. unsigned long flags;
  1815. /* wait until any scan already in progress is finished. */
  1816. while (1) {
  1817. spin_lock_irqsave(&h->scan_lock, flags);
  1818. if (h->scan_finished)
  1819. break;
  1820. spin_unlock_irqrestore(&h->scan_lock, flags);
  1821. wait_event(h->scan_wait_queue, h->scan_finished);
  1822. /* Note: We don't need to worry about a race between this
  1823. * thread and driver unload because the midlayer will
  1824. * have incremented the reference count, so unload won't
  1825. * happen if we're in here.
  1826. */
  1827. }
  1828. h->scan_finished = 0; /* mark scan as in progress */
  1829. spin_unlock_irqrestore(&h->scan_lock, flags);
  1830. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1831. spin_lock_irqsave(&h->scan_lock, flags);
  1832. h->scan_finished = 1; /* mark scan as finished. */
  1833. wake_up_all(&h->scan_wait_queue);
  1834. spin_unlock_irqrestore(&h->scan_lock, flags);
  1835. }
  1836. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1837. unsigned long elapsed_time)
  1838. {
  1839. struct ctlr_info *h = shost_to_hba(sh);
  1840. unsigned long flags;
  1841. int finished;
  1842. spin_lock_irqsave(&h->scan_lock, flags);
  1843. finished = h->scan_finished;
  1844. spin_unlock_irqrestore(&h->scan_lock, flags);
  1845. return finished;
  1846. }
  1847. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1848. int qdepth, int reason)
  1849. {
  1850. struct ctlr_info *h = sdev_to_hba(sdev);
  1851. if (reason != SCSI_QDEPTH_DEFAULT)
  1852. return -ENOTSUPP;
  1853. if (qdepth < 1)
  1854. qdepth = 1;
  1855. else
  1856. if (qdepth > h->nr_cmds)
  1857. qdepth = h->nr_cmds;
  1858. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1859. return sdev->queue_depth;
  1860. }
  1861. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1862. {
  1863. /* we are being forcibly unloaded, and may not refuse. */
  1864. scsi_remove_host(h->scsi_host);
  1865. scsi_host_put(h->scsi_host);
  1866. h->scsi_host = NULL;
  1867. }
  1868. static int hpsa_register_scsi(struct ctlr_info *h)
  1869. {
  1870. int rc;
  1871. rc = hpsa_scsi_detect(h);
  1872. if (rc != 0)
  1873. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1874. " hpsa_scsi_detect(), rc is %d\n", rc);
  1875. return rc;
  1876. }
  1877. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1878. unsigned char lunaddr[])
  1879. {
  1880. int rc = 0;
  1881. int count = 0;
  1882. int waittime = 1; /* seconds */
  1883. struct CommandList *c;
  1884. c = cmd_special_alloc(h);
  1885. if (!c) {
  1886. dev_warn(&h->pdev->dev, "out of memory in "
  1887. "wait_for_device_to_become_ready.\n");
  1888. return IO_ERROR;
  1889. }
  1890. /* Send test unit ready until device ready, or give up. */
  1891. while (count < HPSA_TUR_RETRY_LIMIT) {
  1892. /* Wait for a bit. do this first, because if we send
  1893. * the TUR right away, the reset will just abort it.
  1894. */
  1895. msleep(1000 * waittime);
  1896. count++;
  1897. /* Increase wait time with each try, up to a point. */
  1898. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1899. waittime = waittime * 2;
  1900. /* Send the Test Unit Ready */
  1901. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1902. hpsa_scsi_do_simple_cmd_core(h, c);
  1903. /* no unmap needed here because no data xfer. */
  1904. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1905. break;
  1906. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1907. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1908. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1909. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1910. break;
  1911. dev_warn(&h->pdev->dev, "waiting %d secs "
  1912. "for device to become ready.\n", waittime);
  1913. rc = 1; /* device not ready. */
  1914. }
  1915. if (rc)
  1916. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1917. else
  1918. dev_warn(&h->pdev->dev, "device is ready.\n");
  1919. cmd_special_free(h, c);
  1920. return rc;
  1921. }
  1922. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1923. * complaining. Doing a host- or bus-reset can't do anything good here.
  1924. */
  1925. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1926. {
  1927. int rc;
  1928. struct ctlr_info *h;
  1929. struct hpsa_scsi_dev_t *dev;
  1930. /* find the controller to which the command to be aborted was sent */
  1931. h = sdev_to_hba(scsicmd->device);
  1932. if (h == NULL) /* paranoia */
  1933. return FAILED;
  1934. dev = scsicmd->device->hostdata;
  1935. if (!dev) {
  1936. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1937. "device lookup failed.\n");
  1938. return FAILED;
  1939. }
  1940. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1941. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1942. /* send a reset to the SCSI LUN which the command was sent to */
  1943. rc = hpsa_send_reset(h, dev->scsi3addr);
  1944. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1945. return SUCCESS;
  1946. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1947. return FAILED;
  1948. }
  1949. /*
  1950. * For operations that cannot sleep, a command block is allocated at init,
  1951. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1952. * which ones are free or in use. Lock must be held when calling this.
  1953. * cmd_free() is the complement.
  1954. */
  1955. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1956. {
  1957. struct CommandList *c;
  1958. int i;
  1959. union u64bit temp64;
  1960. dma_addr_t cmd_dma_handle, err_dma_handle;
  1961. do {
  1962. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1963. if (i == h->nr_cmds)
  1964. return NULL;
  1965. } while (test_and_set_bit
  1966. (i & (BITS_PER_LONG - 1),
  1967. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1968. c = h->cmd_pool + i;
  1969. memset(c, 0, sizeof(*c));
  1970. cmd_dma_handle = h->cmd_pool_dhandle
  1971. + i * sizeof(*c);
  1972. c->err_info = h->errinfo_pool + i;
  1973. memset(c->err_info, 0, sizeof(*c->err_info));
  1974. err_dma_handle = h->errinfo_pool_dhandle
  1975. + i * sizeof(*c->err_info);
  1976. h->nr_allocs++;
  1977. c->cmdindex = i;
  1978. INIT_HLIST_NODE(&c->list);
  1979. c->busaddr = (u32) cmd_dma_handle;
  1980. temp64.val = (u64) err_dma_handle;
  1981. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1982. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1983. c->ErrDesc.Len = sizeof(*c->err_info);
  1984. c->h = h;
  1985. return c;
  1986. }
  1987. /* For operations that can wait for kmalloc to possibly sleep,
  1988. * this routine can be called. Lock need not be held to call
  1989. * cmd_special_alloc. cmd_special_free() is the complement.
  1990. */
  1991. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1992. {
  1993. struct CommandList *c;
  1994. union u64bit temp64;
  1995. dma_addr_t cmd_dma_handle, err_dma_handle;
  1996. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1997. if (c == NULL)
  1998. return NULL;
  1999. memset(c, 0, sizeof(*c));
  2000. c->cmdindex = -1;
  2001. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2002. &err_dma_handle);
  2003. if (c->err_info == NULL) {
  2004. pci_free_consistent(h->pdev,
  2005. sizeof(*c), c, cmd_dma_handle);
  2006. return NULL;
  2007. }
  2008. memset(c->err_info, 0, sizeof(*c->err_info));
  2009. INIT_HLIST_NODE(&c->list);
  2010. c->busaddr = (u32) cmd_dma_handle;
  2011. temp64.val = (u64) err_dma_handle;
  2012. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2013. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2014. c->ErrDesc.Len = sizeof(*c->err_info);
  2015. c->h = h;
  2016. return c;
  2017. }
  2018. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2019. {
  2020. int i;
  2021. i = c - h->cmd_pool;
  2022. clear_bit(i & (BITS_PER_LONG - 1),
  2023. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2024. h->nr_frees++;
  2025. }
  2026. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2027. {
  2028. union u64bit temp64;
  2029. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2030. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2031. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2032. c->err_info, (dma_addr_t) temp64.val);
  2033. pci_free_consistent(h->pdev, sizeof(*c),
  2034. c, (dma_addr_t) c->busaddr);
  2035. }
  2036. #ifdef CONFIG_COMPAT
  2037. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2038. {
  2039. IOCTL32_Command_struct __user *arg32 =
  2040. (IOCTL32_Command_struct __user *) arg;
  2041. IOCTL_Command_struct arg64;
  2042. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2043. int err;
  2044. u32 cp;
  2045. err = 0;
  2046. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2047. sizeof(arg64.LUN_info));
  2048. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2049. sizeof(arg64.Request));
  2050. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2051. sizeof(arg64.error_info));
  2052. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2053. err |= get_user(cp, &arg32->buf);
  2054. arg64.buf = compat_ptr(cp);
  2055. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2056. if (err)
  2057. return -EFAULT;
  2058. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2059. if (err)
  2060. return err;
  2061. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2062. sizeof(arg32->error_info));
  2063. if (err)
  2064. return -EFAULT;
  2065. return err;
  2066. }
  2067. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2068. int cmd, void *arg)
  2069. {
  2070. BIG_IOCTL32_Command_struct __user *arg32 =
  2071. (BIG_IOCTL32_Command_struct __user *) arg;
  2072. BIG_IOCTL_Command_struct arg64;
  2073. BIG_IOCTL_Command_struct __user *p =
  2074. compat_alloc_user_space(sizeof(arg64));
  2075. int err;
  2076. u32 cp;
  2077. err = 0;
  2078. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2079. sizeof(arg64.LUN_info));
  2080. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2081. sizeof(arg64.Request));
  2082. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2083. sizeof(arg64.error_info));
  2084. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2085. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2086. err |= get_user(cp, &arg32->buf);
  2087. arg64.buf = compat_ptr(cp);
  2088. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2089. if (err)
  2090. return -EFAULT;
  2091. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2092. if (err)
  2093. return err;
  2094. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2095. sizeof(arg32->error_info));
  2096. if (err)
  2097. return -EFAULT;
  2098. return err;
  2099. }
  2100. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2101. {
  2102. switch (cmd) {
  2103. case CCISS_GETPCIINFO:
  2104. case CCISS_GETINTINFO:
  2105. case CCISS_SETINTINFO:
  2106. case CCISS_GETNODENAME:
  2107. case CCISS_SETNODENAME:
  2108. case CCISS_GETHEARTBEAT:
  2109. case CCISS_GETBUSTYPES:
  2110. case CCISS_GETFIRMVER:
  2111. case CCISS_GETDRIVVER:
  2112. case CCISS_REVALIDVOLS:
  2113. case CCISS_DEREGDISK:
  2114. case CCISS_REGNEWDISK:
  2115. case CCISS_REGNEWD:
  2116. case CCISS_RESCANDISK:
  2117. case CCISS_GETLUNINFO:
  2118. return hpsa_ioctl(dev, cmd, arg);
  2119. case CCISS_PASSTHRU32:
  2120. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2121. case CCISS_BIG_PASSTHRU32:
  2122. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2123. default:
  2124. return -ENOIOCTLCMD;
  2125. }
  2126. }
  2127. #endif
  2128. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2129. {
  2130. struct hpsa_pci_info pciinfo;
  2131. if (!argp)
  2132. return -EINVAL;
  2133. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2134. pciinfo.bus = h->pdev->bus->number;
  2135. pciinfo.dev_fn = h->pdev->devfn;
  2136. pciinfo.board_id = h->board_id;
  2137. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2138. return -EFAULT;
  2139. return 0;
  2140. }
  2141. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2142. {
  2143. DriverVer_type DriverVer;
  2144. unsigned char vmaj, vmin, vsubmin;
  2145. int rc;
  2146. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2147. &vmaj, &vmin, &vsubmin);
  2148. if (rc != 3) {
  2149. dev_info(&h->pdev->dev, "driver version string '%s' "
  2150. "unrecognized.", HPSA_DRIVER_VERSION);
  2151. vmaj = 0;
  2152. vmin = 0;
  2153. vsubmin = 0;
  2154. }
  2155. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2156. if (!argp)
  2157. return -EINVAL;
  2158. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2159. return -EFAULT;
  2160. return 0;
  2161. }
  2162. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2163. {
  2164. IOCTL_Command_struct iocommand;
  2165. struct CommandList *c;
  2166. char *buff = NULL;
  2167. union u64bit temp64;
  2168. if (!argp)
  2169. return -EINVAL;
  2170. if (!capable(CAP_SYS_RAWIO))
  2171. return -EPERM;
  2172. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2173. return -EFAULT;
  2174. if ((iocommand.buf_size < 1) &&
  2175. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2176. return -EINVAL;
  2177. }
  2178. if (iocommand.buf_size > 0) {
  2179. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2180. if (buff == NULL)
  2181. return -EFAULT;
  2182. }
  2183. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2184. /* Copy the data into the buffer we created */
  2185. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2186. kfree(buff);
  2187. return -EFAULT;
  2188. }
  2189. } else
  2190. memset(buff, 0, iocommand.buf_size);
  2191. c = cmd_special_alloc(h);
  2192. if (c == NULL) {
  2193. kfree(buff);
  2194. return -ENOMEM;
  2195. }
  2196. /* Fill in the command type */
  2197. c->cmd_type = CMD_IOCTL_PEND;
  2198. /* Fill in Command Header */
  2199. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2200. if (iocommand.buf_size > 0) { /* buffer to fill */
  2201. c->Header.SGList = 1;
  2202. c->Header.SGTotal = 1;
  2203. } else { /* no buffers to fill */
  2204. c->Header.SGList = 0;
  2205. c->Header.SGTotal = 0;
  2206. }
  2207. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2208. /* use the kernel address the cmd block for tag */
  2209. c->Header.Tag.lower = c->busaddr;
  2210. /* Fill in Request block */
  2211. memcpy(&c->Request, &iocommand.Request,
  2212. sizeof(c->Request));
  2213. /* Fill in the scatter gather information */
  2214. if (iocommand.buf_size > 0) {
  2215. temp64.val = pci_map_single(h->pdev, buff,
  2216. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2217. c->SG[0].Addr.lower = temp64.val32.lower;
  2218. c->SG[0].Addr.upper = temp64.val32.upper;
  2219. c->SG[0].Len = iocommand.buf_size;
  2220. c->SG[0].Ext = 0; /* we are not chaining*/
  2221. }
  2222. hpsa_scsi_do_simple_cmd_core(h, c);
  2223. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2224. check_ioctl_unit_attention(h, c);
  2225. /* Copy the error information out */
  2226. memcpy(&iocommand.error_info, c->err_info,
  2227. sizeof(iocommand.error_info));
  2228. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2229. kfree(buff);
  2230. cmd_special_free(h, c);
  2231. return -EFAULT;
  2232. }
  2233. if (iocommand.Request.Type.Direction == XFER_READ) {
  2234. /* Copy the data out of the buffer we created */
  2235. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2236. kfree(buff);
  2237. cmd_special_free(h, c);
  2238. return -EFAULT;
  2239. }
  2240. }
  2241. kfree(buff);
  2242. cmd_special_free(h, c);
  2243. return 0;
  2244. }
  2245. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2246. {
  2247. BIG_IOCTL_Command_struct *ioc;
  2248. struct CommandList *c;
  2249. unsigned char **buff = NULL;
  2250. int *buff_size = NULL;
  2251. union u64bit temp64;
  2252. BYTE sg_used = 0;
  2253. int status = 0;
  2254. int i;
  2255. u32 left;
  2256. u32 sz;
  2257. BYTE __user *data_ptr;
  2258. if (!argp)
  2259. return -EINVAL;
  2260. if (!capable(CAP_SYS_RAWIO))
  2261. return -EPERM;
  2262. ioc = (BIG_IOCTL_Command_struct *)
  2263. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2264. if (!ioc) {
  2265. status = -ENOMEM;
  2266. goto cleanup1;
  2267. }
  2268. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2269. status = -EFAULT;
  2270. goto cleanup1;
  2271. }
  2272. if ((ioc->buf_size < 1) &&
  2273. (ioc->Request.Type.Direction != XFER_NONE)) {
  2274. status = -EINVAL;
  2275. goto cleanup1;
  2276. }
  2277. /* Check kmalloc limits using all SGs */
  2278. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2279. status = -EINVAL;
  2280. goto cleanup1;
  2281. }
  2282. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2283. status = -EINVAL;
  2284. goto cleanup1;
  2285. }
  2286. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2287. if (!buff) {
  2288. status = -ENOMEM;
  2289. goto cleanup1;
  2290. }
  2291. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2292. if (!buff_size) {
  2293. status = -ENOMEM;
  2294. goto cleanup1;
  2295. }
  2296. left = ioc->buf_size;
  2297. data_ptr = ioc->buf;
  2298. while (left) {
  2299. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2300. buff_size[sg_used] = sz;
  2301. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2302. if (buff[sg_used] == NULL) {
  2303. status = -ENOMEM;
  2304. goto cleanup1;
  2305. }
  2306. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2307. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2308. status = -ENOMEM;
  2309. goto cleanup1;
  2310. }
  2311. } else
  2312. memset(buff[sg_used], 0, sz);
  2313. left -= sz;
  2314. data_ptr += sz;
  2315. sg_used++;
  2316. }
  2317. c = cmd_special_alloc(h);
  2318. if (c == NULL) {
  2319. status = -ENOMEM;
  2320. goto cleanup1;
  2321. }
  2322. c->cmd_type = CMD_IOCTL_PEND;
  2323. c->Header.ReplyQueue = 0;
  2324. if (ioc->buf_size > 0) {
  2325. c->Header.SGList = sg_used;
  2326. c->Header.SGTotal = sg_used;
  2327. } else {
  2328. c->Header.SGList = 0;
  2329. c->Header.SGTotal = 0;
  2330. }
  2331. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2332. c->Header.Tag.lower = c->busaddr;
  2333. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2334. if (ioc->buf_size > 0) {
  2335. int i;
  2336. for (i = 0; i < sg_used; i++) {
  2337. temp64.val = pci_map_single(h->pdev, buff[i],
  2338. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2339. c->SG[i].Addr.lower = temp64.val32.lower;
  2340. c->SG[i].Addr.upper = temp64.val32.upper;
  2341. c->SG[i].Len = buff_size[i];
  2342. /* we are not chaining */
  2343. c->SG[i].Ext = 0;
  2344. }
  2345. }
  2346. hpsa_scsi_do_simple_cmd_core(h, c);
  2347. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2348. check_ioctl_unit_attention(h, c);
  2349. /* Copy the error information out */
  2350. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2351. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2352. cmd_special_free(h, c);
  2353. status = -EFAULT;
  2354. goto cleanup1;
  2355. }
  2356. if (ioc->Request.Type.Direction == XFER_READ) {
  2357. /* Copy the data out of the buffer we created */
  2358. BYTE __user *ptr = ioc->buf;
  2359. for (i = 0; i < sg_used; i++) {
  2360. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2361. cmd_special_free(h, c);
  2362. status = -EFAULT;
  2363. goto cleanup1;
  2364. }
  2365. ptr += buff_size[i];
  2366. }
  2367. }
  2368. cmd_special_free(h, c);
  2369. status = 0;
  2370. cleanup1:
  2371. if (buff) {
  2372. for (i = 0; i < sg_used; i++)
  2373. kfree(buff[i]);
  2374. kfree(buff);
  2375. }
  2376. kfree(buff_size);
  2377. kfree(ioc);
  2378. return status;
  2379. }
  2380. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2381. struct CommandList *c)
  2382. {
  2383. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2384. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2385. (void) check_for_unit_attention(h, c);
  2386. }
  2387. /*
  2388. * ioctl
  2389. */
  2390. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2391. {
  2392. struct ctlr_info *h;
  2393. void __user *argp = (void __user *)arg;
  2394. h = sdev_to_hba(dev);
  2395. switch (cmd) {
  2396. case CCISS_DEREGDISK:
  2397. case CCISS_REGNEWDISK:
  2398. case CCISS_REGNEWD:
  2399. hpsa_scan_start(h->scsi_host);
  2400. return 0;
  2401. case CCISS_GETPCIINFO:
  2402. return hpsa_getpciinfo_ioctl(h, argp);
  2403. case CCISS_GETDRIVVER:
  2404. return hpsa_getdrivver_ioctl(h, argp);
  2405. case CCISS_PASSTHRU:
  2406. return hpsa_passthru_ioctl(h, argp);
  2407. case CCISS_BIG_PASSTHRU:
  2408. return hpsa_big_passthru_ioctl(h, argp);
  2409. default:
  2410. return -ENOTTY;
  2411. }
  2412. }
  2413. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2414. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2415. int cmd_type)
  2416. {
  2417. int pci_dir = XFER_NONE;
  2418. c->cmd_type = CMD_IOCTL_PEND;
  2419. c->Header.ReplyQueue = 0;
  2420. if (buff != NULL && size > 0) {
  2421. c->Header.SGList = 1;
  2422. c->Header.SGTotal = 1;
  2423. } else {
  2424. c->Header.SGList = 0;
  2425. c->Header.SGTotal = 0;
  2426. }
  2427. c->Header.Tag.lower = c->busaddr;
  2428. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2429. c->Request.Type.Type = cmd_type;
  2430. if (cmd_type == TYPE_CMD) {
  2431. switch (cmd) {
  2432. case HPSA_INQUIRY:
  2433. /* are we trying to read a vital product page */
  2434. if (page_code != 0) {
  2435. c->Request.CDB[1] = 0x01;
  2436. c->Request.CDB[2] = page_code;
  2437. }
  2438. c->Request.CDBLen = 6;
  2439. c->Request.Type.Attribute = ATTR_SIMPLE;
  2440. c->Request.Type.Direction = XFER_READ;
  2441. c->Request.Timeout = 0;
  2442. c->Request.CDB[0] = HPSA_INQUIRY;
  2443. c->Request.CDB[4] = size & 0xFF;
  2444. break;
  2445. case HPSA_REPORT_LOG:
  2446. case HPSA_REPORT_PHYS:
  2447. /* Talking to controller so It's a physical command
  2448. mode = 00 target = 0. Nothing to write.
  2449. */
  2450. c->Request.CDBLen = 12;
  2451. c->Request.Type.Attribute = ATTR_SIMPLE;
  2452. c->Request.Type.Direction = XFER_READ;
  2453. c->Request.Timeout = 0;
  2454. c->Request.CDB[0] = cmd;
  2455. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2456. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2457. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2458. c->Request.CDB[9] = size & 0xFF;
  2459. break;
  2460. case HPSA_CACHE_FLUSH:
  2461. c->Request.CDBLen = 12;
  2462. c->Request.Type.Attribute = ATTR_SIMPLE;
  2463. c->Request.Type.Direction = XFER_WRITE;
  2464. c->Request.Timeout = 0;
  2465. c->Request.CDB[0] = BMIC_WRITE;
  2466. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2467. break;
  2468. case TEST_UNIT_READY:
  2469. c->Request.CDBLen = 6;
  2470. c->Request.Type.Attribute = ATTR_SIMPLE;
  2471. c->Request.Type.Direction = XFER_NONE;
  2472. c->Request.Timeout = 0;
  2473. break;
  2474. default:
  2475. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2476. BUG();
  2477. return;
  2478. }
  2479. } else if (cmd_type == TYPE_MSG) {
  2480. switch (cmd) {
  2481. case HPSA_DEVICE_RESET_MSG:
  2482. c->Request.CDBLen = 16;
  2483. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2484. c->Request.Type.Attribute = ATTR_SIMPLE;
  2485. c->Request.Type.Direction = XFER_NONE;
  2486. c->Request.Timeout = 0; /* Don't time out */
  2487. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2488. c->Request.CDB[1] = 0x03; /* Reset target above */
  2489. /* If bytes 4-7 are zero, it means reset the */
  2490. /* LunID device */
  2491. c->Request.CDB[4] = 0x00;
  2492. c->Request.CDB[5] = 0x00;
  2493. c->Request.CDB[6] = 0x00;
  2494. c->Request.CDB[7] = 0x00;
  2495. break;
  2496. default:
  2497. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2498. cmd);
  2499. BUG();
  2500. }
  2501. } else {
  2502. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2503. BUG();
  2504. }
  2505. switch (c->Request.Type.Direction) {
  2506. case XFER_READ:
  2507. pci_dir = PCI_DMA_FROMDEVICE;
  2508. break;
  2509. case XFER_WRITE:
  2510. pci_dir = PCI_DMA_TODEVICE;
  2511. break;
  2512. case XFER_NONE:
  2513. pci_dir = PCI_DMA_NONE;
  2514. break;
  2515. default:
  2516. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2517. }
  2518. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2519. return;
  2520. }
  2521. /*
  2522. * Map (physical) PCI mem into (virtual) kernel space
  2523. */
  2524. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2525. {
  2526. ulong page_base = ((ulong) base) & PAGE_MASK;
  2527. ulong page_offs = ((ulong) base) - page_base;
  2528. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2529. return page_remapped ? (page_remapped + page_offs) : NULL;
  2530. }
  2531. /* Takes cmds off the submission queue and sends them to the hardware,
  2532. * then puts them on the queue of cmds waiting for completion.
  2533. */
  2534. static void start_io(struct ctlr_info *h)
  2535. {
  2536. struct CommandList *c;
  2537. while (!hlist_empty(&h->reqQ)) {
  2538. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2539. /* can't do anything if fifo is full */
  2540. if ((h->access.fifo_full(h))) {
  2541. dev_warn(&h->pdev->dev, "fifo full\n");
  2542. break;
  2543. }
  2544. /* Get the first entry from the Request Q */
  2545. removeQ(c);
  2546. h->Qdepth--;
  2547. /* Tell the controller execute command */
  2548. h->access.submit_command(h, c);
  2549. /* Put job onto the completed Q */
  2550. addQ(&h->cmpQ, c);
  2551. }
  2552. }
  2553. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2554. {
  2555. return h->access.command_completed(h);
  2556. }
  2557. static inline bool interrupt_pending(struct ctlr_info *h)
  2558. {
  2559. return h->access.intr_pending(h);
  2560. }
  2561. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2562. {
  2563. return (h->access.intr_pending(h) == 0) ||
  2564. (h->interrupts_enabled == 0);
  2565. }
  2566. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2567. u32 raw_tag)
  2568. {
  2569. if (unlikely(tag_index >= h->nr_cmds)) {
  2570. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2571. return 1;
  2572. }
  2573. return 0;
  2574. }
  2575. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2576. {
  2577. removeQ(c);
  2578. if (likely(c->cmd_type == CMD_SCSI))
  2579. complete_scsi_command(c, 0, raw_tag);
  2580. else if (c->cmd_type == CMD_IOCTL_PEND)
  2581. complete(c->waiting);
  2582. }
  2583. static inline u32 hpsa_tag_contains_index(u32 tag)
  2584. {
  2585. #define DIRECT_LOOKUP_BIT 0x10
  2586. return tag & DIRECT_LOOKUP_BIT;
  2587. }
  2588. static inline u32 hpsa_tag_to_index(u32 tag)
  2589. {
  2590. #define DIRECT_LOOKUP_SHIFT 5
  2591. return tag >> DIRECT_LOOKUP_SHIFT;
  2592. }
  2593. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2594. {
  2595. #define HPSA_ERROR_BITS 0x03
  2596. return tag & ~HPSA_ERROR_BITS;
  2597. }
  2598. /* process completion of an indexed ("direct lookup") command */
  2599. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2600. u32 raw_tag)
  2601. {
  2602. u32 tag_index;
  2603. struct CommandList *c;
  2604. tag_index = hpsa_tag_to_index(raw_tag);
  2605. if (bad_tag(h, tag_index, raw_tag))
  2606. return next_command(h);
  2607. c = h->cmd_pool + tag_index;
  2608. finish_cmd(c, raw_tag);
  2609. return next_command(h);
  2610. }
  2611. /* process completion of a non-indexed command */
  2612. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2613. u32 raw_tag)
  2614. {
  2615. u32 tag;
  2616. struct CommandList *c = NULL;
  2617. struct hlist_node *tmp;
  2618. tag = hpsa_tag_discard_error_bits(raw_tag);
  2619. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2620. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2621. finish_cmd(c, raw_tag);
  2622. return next_command(h);
  2623. }
  2624. }
  2625. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2626. return next_command(h);
  2627. }
  2628. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2629. {
  2630. struct ctlr_info *h = dev_id;
  2631. unsigned long flags;
  2632. u32 raw_tag;
  2633. if (interrupt_not_for_us(h))
  2634. return IRQ_NONE;
  2635. spin_lock_irqsave(&h->lock, flags);
  2636. while (interrupt_pending(h)) {
  2637. raw_tag = get_next_completion(h);
  2638. while (raw_tag != FIFO_EMPTY) {
  2639. if (hpsa_tag_contains_index(raw_tag))
  2640. raw_tag = process_indexed_cmd(h, raw_tag);
  2641. else
  2642. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2643. }
  2644. }
  2645. spin_unlock_irqrestore(&h->lock, flags);
  2646. return IRQ_HANDLED;
  2647. }
  2648. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2649. {
  2650. struct ctlr_info *h = dev_id;
  2651. unsigned long flags;
  2652. u32 raw_tag;
  2653. spin_lock_irqsave(&h->lock, flags);
  2654. raw_tag = get_next_completion(h);
  2655. while (raw_tag != FIFO_EMPTY) {
  2656. if (hpsa_tag_contains_index(raw_tag))
  2657. raw_tag = process_indexed_cmd(h, raw_tag);
  2658. else
  2659. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2660. }
  2661. spin_unlock_irqrestore(&h->lock, flags);
  2662. return IRQ_HANDLED;
  2663. }
  2664. /* Send a message CDB to the firmware. */
  2665. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2666. unsigned char type)
  2667. {
  2668. struct Command {
  2669. struct CommandListHeader CommandHeader;
  2670. struct RequestBlock Request;
  2671. struct ErrDescriptor ErrorDescriptor;
  2672. };
  2673. struct Command *cmd;
  2674. static const size_t cmd_sz = sizeof(*cmd) +
  2675. sizeof(cmd->ErrorDescriptor);
  2676. dma_addr_t paddr64;
  2677. uint32_t paddr32, tag;
  2678. void __iomem *vaddr;
  2679. int i, err;
  2680. vaddr = pci_ioremap_bar(pdev, 0);
  2681. if (vaddr == NULL)
  2682. return -ENOMEM;
  2683. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2684. * CCISS commands, so they must be allocated from the lower 4GiB of
  2685. * memory.
  2686. */
  2687. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2688. if (err) {
  2689. iounmap(vaddr);
  2690. return -ENOMEM;
  2691. }
  2692. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2693. if (cmd == NULL) {
  2694. iounmap(vaddr);
  2695. return -ENOMEM;
  2696. }
  2697. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2698. * although there's no guarantee, we assume that the address is at
  2699. * least 4-byte aligned (most likely, it's page-aligned).
  2700. */
  2701. paddr32 = paddr64;
  2702. cmd->CommandHeader.ReplyQueue = 0;
  2703. cmd->CommandHeader.SGList = 0;
  2704. cmd->CommandHeader.SGTotal = 0;
  2705. cmd->CommandHeader.Tag.lower = paddr32;
  2706. cmd->CommandHeader.Tag.upper = 0;
  2707. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2708. cmd->Request.CDBLen = 16;
  2709. cmd->Request.Type.Type = TYPE_MSG;
  2710. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2711. cmd->Request.Type.Direction = XFER_NONE;
  2712. cmd->Request.Timeout = 0; /* Don't time out */
  2713. cmd->Request.CDB[0] = opcode;
  2714. cmd->Request.CDB[1] = type;
  2715. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2716. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2717. cmd->ErrorDescriptor.Addr.upper = 0;
  2718. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2719. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2720. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2721. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2722. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2723. break;
  2724. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2725. }
  2726. iounmap(vaddr);
  2727. /* we leak the DMA buffer here ... no choice since the controller could
  2728. * still complete the command.
  2729. */
  2730. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2731. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2732. opcode, type);
  2733. return -ETIMEDOUT;
  2734. }
  2735. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2736. if (tag & HPSA_ERROR_BIT) {
  2737. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2738. opcode, type);
  2739. return -EIO;
  2740. }
  2741. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2742. opcode, type);
  2743. return 0;
  2744. }
  2745. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2746. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2747. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2748. {
  2749. /* the #defines are stolen from drivers/pci/msi.h. */
  2750. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2751. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2752. int pos;
  2753. u16 control = 0;
  2754. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2755. if (pos) {
  2756. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2757. if (control & PCI_MSI_FLAGS_ENABLE) {
  2758. dev_info(&pdev->dev, "resetting MSI\n");
  2759. pci_write_config_word(pdev, msi_control_reg(pos),
  2760. control & ~PCI_MSI_FLAGS_ENABLE);
  2761. }
  2762. }
  2763. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2764. if (pos) {
  2765. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2766. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2767. dev_info(&pdev->dev, "resetting MSI-X\n");
  2768. pci_write_config_word(pdev, msi_control_reg(pos),
  2769. control & ~PCI_MSIX_FLAGS_ENABLE);
  2770. }
  2771. }
  2772. return 0;
  2773. }
  2774. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2775. void * __iomem vaddr, bool use_doorbell)
  2776. {
  2777. u16 pmcsr;
  2778. int pos;
  2779. if (use_doorbell) {
  2780. /* For everything after the P600, the PCI power state method
  2781. * of resetting the controller doesn't work, so we have this
  2782. * other way using the doorbell register.
  2783. */
  2784. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2785. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2786. msleep(1000);
  2787. } else { /* Try to do it the PCI power state way */
  2788. /* Quoting from the Open CISS Specification: "The Power
  2789. * Management Control/Status Register (CSR) controls the power
  2790. * state of the device. The normal operating state is D0,
  2791. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2792. * the controller, place the interface device in D3 then to D0,
  2793. * this causes a secondary PCI reset which will reset the
  2794. * controller." */
  2795. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2796. if (pos == 0) {
  2797. dev_err(&pdev->dev,
  2798. "hpsa_reset_controller: "
  2799. "PCI PM not supported\n");
  2800. return -ENODEV;
  2801. }
  2802. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2803. /* enter the D3hot power management state */
  2804. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2805. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2806. pmcsr |= PCI_D3hot;
  2807. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2808. msleep(500);
  2809. /* enter the D0 power management state */
  2810. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2811. pmcsr |= PCI_D0;
  2812. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2813. msleep(500);
  2814. }
  2815. return 0;
  2816. }
  2817. /* This does a hard reset of the controller using PCI power management
  2818. * states or the using the doorbell register.
  2819. */
  2820. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2821. {
  2822. u16 saved_config_space[32];
  2823. u64 cfg_offset;
  2824. u32 cfg_base_addr;
  2825. u64 cfg_base_addr_index;
  2826. void __iomem *vaddr;
  2827. unsigned long paddr;
  2828. u32 misc_fw_support, active_transport;
  2829. int rc, i;
  2830. struct CfgTable __iomem *cfgtable;
  2831. bool use_doorbell;
  2832. u32 board_id;
  2833. /* For controllers as old as the P600, this is very nearly
  2834. * the same thing as
  2835. *
  2836. * pci_save_state(pci_dev);
  2837. * pci_set_power_state(pci_dev, PCI_D3hot);
  2838. * pci_set_power_state(pci_dev, PCI_D0);
  2839. * pci_restore_state(pci_dev);
  2840. *
  2841. * but we can't use these nice canned kernel routines on
  2842. * kexec, because they also check the MSI/MSI-X state in PCI
  2843. * configuration space and do the wrong thing when it is
  2844. * set/cleared. Also, the pci_save/restore_state functions
  2845. * violate the ordering requirements for restoring the
  2846. * configuration space from the CCISS document (see the
  2847. * comment below). So we roll our own ....
  2848. *
  2849. * For controllers newer than the P600, the pci power state
  2850. * method of resetting doesn't work so we have another way
  2851. * using the doorbell register.
  2852. */
  2853. /* Exclude 640x boards. These are two pci devices in one slot
  2854. * which share a battery backed cache module. One controls the
  2855. * cache, the other accesses the cache through the one that controls
  2856. * it. If we reset the one controlling the cache, the other will
  2857. * likely not be happy. Just forbid resetting this conjoined mess.
  2858. * The 640x isn't really supported by hpsa anyway.
  2859. */
  2860. hpsa_lookup_board_id(pdev, &board_id);
  2861. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2862. return -ENOTSUPP;
  2863. for (i = 0; i < 32; i++)
  2864. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2865. /* find the first memory BAR, so we can find the cfg table */
  2866. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2867. if (rc)
  2868. return rc;
  2869. vaddr = remap_pci_mem(paddr, 0x250);
  2870. if (!vaddr)
  2871. return -ENOMEM;
  2872. /* find cfgtable in order to check if reset via doorbell is supported */
  2873. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2874. &cfg_base_addr_index, &cfg_offset);
  2875. if (rc)
  2876. goto unmap_vaddr;
  2877. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2878. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2879. if (!cfgtable) {
  2880. rc = -ENOMEM;
  2881. goto unmap_vaddr;
  2882. }
  2883. /* If reset via doorbell register is supported, use that. */
  2884. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2885. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2886. /* The doorbell reset seems to cause lockups on some Smart
  2887. * Arrays (e.g. P410, P410i, maybe others). Until this is
  2888. * fixed or at least isolated, avoid the doorbell reset.
  2889. */
  2890. use_doorbell = 0;
  2891. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2892. if (rc)
  2893. goto unmap_cfgtable;
  2894. /* Restore the PCI configuration space. The Open CISS
  2895. * Specification says, "Restore the PCI Configuration
  2896. * Registers, offsets 00h through 60h. It is important to
  2897. * restore the command register, 16-bits at offset 04h,
  2898. * last. Do not restore the configuration status register,
  2899. * 16-bits at offset 06h." Note that the offset is 2*i.
  2900. */
  2901. for (i = 0; i < 32; i++) {
  2902. if (i == 2 || i == 3)
  2903. continue;
  2904. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2905. }
  2906. wmb();
  2907. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2908. /* Some devices (notably the HP Smart Array 5i Controller)
  2909. need a little pause here */
  2910. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2911. /* Controller should be in simple mode at this point. If it's not,
  2912. * It means we're on one of those controllers which doesn't support
  2913. * the doorbell reset method and on which the PCI power management reset
  2914. * method doesn't work (P800, for example.)
  2915. * In those cases, pretend the reset worked and hope for the best.
  2916. */
  2917. active_transport = readl(&cfgtable->TransportActive);
  2918. if (active_transport & PERFORMANT_MODE) {
  2919. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2920. " proceeding anyway.\n");
  2921. rc = -ENOTSUPP;
  2922. }
  2923. unmap_cfgtable:
  2924. iounmap(cfgtable);
  2925. unmap_vaddr:
  2926. iounmap(vaddr);
  2927. return rc;
  2928. }
  2929. /*
  2930. * We cannot read the structure directly, for portability we must use
  2931. * the io functions.
  2932. * This is for debug only.
  2933. */
  2934. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2935. {
  2936. #ifdef HPSA_DEBUG
  2937. int i;
  2938. char temp_name[17];
  2939. dev_info(dev, "Controller Configuration information\n");
  2940. dev_info(dev, "------------------------------------\n");
  2941. for (i = 0; i < 4; i++)
  2942. temp_name[i] = readb(&(tb->Signature[i]));
  2943. temp_name[4] = '\0';
  2944. dev_info(dev, " Signature = %s\n", temp_name);
  2945. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2946. dev_info(dev, " Transport methods supported = 0x%x\n",
  2947. readl(&(tb->TransportSupport)));
  2948. dev_info(dev, " Transport methods active = 0x%x\n",
  2949. readl(&(tb->TransportActive)));
  2950. dev_info(dev, " Requested transport Method = 0x%x\n",
  2951. readl(&(tb->HostWrite.TransportRequest)));
  2952. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2953. readl(&(tb->HostWrite.CoalIntDelay)));
  2954. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2955. readl(&(tb->HostWrite.CoalIntCount)));
  2956. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2957. readl(&(tb->CmdsOutMax)));
  2958. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2959. for (i = 0; i < 16; i++)
  2960. temp_name[i] = readb(&(tb->ServerName[i]));
  2961. temp_name[16] = '\0';
  2962. dev_info(dev, " Server Name = %s\n", temp_name);
  2963. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2964. readl(&(tb->HeartBeat)));
  2965. #endif /* HPSA_DEBUG */
  2966. }
  2967. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2968. {
  2969. int i, offset, mem_type, bar_type;
  2970. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2971. return 0;
  2972. offset = 0;
  2973. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2974. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2975. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2976. offset += 4;
  2977. else {
  2978. mem_type = pci_resource_flags(pdev, i) &
  2979. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2980. switch (mem_type) {
  2981. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2982. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2983. offset += 4; /* 32 bit */
  2984. break;
  2985. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2986. offset += 8;
  2987. break;
  2988. default: /* reserved in PCI 2.2 */
  2989. dev_warn(&pdev->dev,
  2990. "base address is invalid\n");
  2991. return -1;
  2992. break;
  2993. }
  2994. }
  2995. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2996. return i + 1;
  2997. }
  2998. return -1;
  2999. }
  3000. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3001. * controllers that are capable. If not, we use IO-APIC mode.
  3002. */
  3003. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3004. {
  3005. #ifdef CONFIG_PCI_MSI
  3006. int err;
  3007. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3008. {0, 2}, {0, 3}
  3009. };
  3010. /* Some boards advertise MSI but don't really support it */
  3011. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3012. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3013. goto default_int_mode;
  3014. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3015. dev_info(&h->pdev->dev, "MSIX\n");
  3016. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3017. if (!err) {
  3018. h->intr[0] = hpsa_msix_entries[0].vector;
  3019. h->intr[1] = hpsa_msix_entries[1].vector;
  3020. h->intr[2] = hpsa_msix_entries[2].vector;
  3021. h->intr[3] = hpsa_msix_entries[3].vector;
  3022. h->msix_vector = 1;
  3023. return;
  3024. }
  3025. if (err > 0) {
  3026. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3027. "available\n", err);
  3028. goto default_int_mode;
  3029. } else {
  3030. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3031. err);
  3032. goto default_int_mode;
  3033. }
  3034. }
  3035. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3036. dev_info(&h->pdev->dev, "MSI\n");
  3037. if (!pci_enable_msi(h->pdev))
  3038. h->msi_vector = 1;
  3039. else
  3040. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3041. }
  3042. default_int_mode:
  3043. #endif /* CONFIG_PCI_MSI */
  3044. /* if we get here we're going to use the default interrupt mode */
  3045. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3046. }
  3047. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3048. {
  3049. int i;
  3050. u32 subsystem_vendor_id, subsystem_device_id;
  3051. subsystem_vendor_id = pdev->subsystem_vendor;
  3052. subsystem_device_id = pdev->subsystem_device;
  3053. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3054. subsystem_vendor_id;
  3055. for (i = 0; i < ARRAY_SIZE(products); i++)
  3056. if (*board_id == products[i].board_id)
  3057. return i;
  3058. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3059. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3060. !hpsa_allow_any) {
  3061. dev_warn(&pdev->dev, "unrecognized board ID: "
  3062. "0x%08x, ignoring.\n", *board_id);
  3063. return -ENODEV;
  3064. }
  3065. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3066. }
  3067. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3068. {
  3069. u16 command;
  3070. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3071. return ((command & PCI_COMMAND_MEMORY) == 0);
  3072. }
  3073. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3074. unsigned long *memory_bar)
  3075. {
  3076. int i;
  3077. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3078. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3079. /* addressing mode bits already removed */
  3080. *memory_bar = pci_resource_start(pdev, i);
  3081. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3082. *memory_bar);
  3083. return 0;
  3084. }
  3085. dev_warn(&pdev->dev, "no memory BAR found\n");
  3086. return -ENODEV;
  3087. }
  3088. static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
  3089. {
  3090. int i;
  3091. u32 scratchpad;
  3092. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  3093. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3094. if (scratchpad == HPSA_FIRMWARE_READY)
  3095. return 0;
  3096. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3097. }
  3098. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  3099. return -ENODEV;
  3100. }
  3101. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3102. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3103. u64 *cfg_offset)
  3104. {
  3105. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3106. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3107. *cfg_base_addr &= (u32) 0x0000ffff;
  3108. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3109. if (*cfg_base_addr_index == -1) {
  3110. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3111. return -ENODEV;
  3112. }
  3113. return 0;
  3114. }
  3115. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3116. {
  3117. u64 cfg_offset;
  3118. u32 cfg_base_addr;
  3119. u64 cfg_base_addr_index;
  3120. u32 trans_offset;
  3121. int rc;
  3122. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3123. &cfg_base_addr_index, &cfg_offset);
  3124. if (rc)
  3125. return rc;
  3126. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3127. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3128. if (!h->cfgtable)
  3129. return -ENOMEM;
  3130. /* Find performant mode table. */
  3131. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3132. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3133. cfg_base_addr_index)+cfg_offset+trans_offset,
  3134. sizeof(*h->transtable));
  3135. if (!h->transtable)
  3136. return -ENOMEM;
  3137. return 0;
  3138. }
  3139. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3140. {
  3141. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3142. if (h->max_commands < 16) {
  3143. dev_warn(&h->pdev->dev, "Controller reports "
  3144. "max supported commands of %d, an obvious lie. "
  3145. "Using 16. Ensure that firmware is up to date.\n",
  3146. h->max_commands);
  3147. h->max_commands = 16;
  3148. }
  3149. }
  3150. /* Interrogate the hardware for some limits:
  3151. * max commands, max SG elements without chaining, and with chaining,
  3152. * SG chain block size, etc.
  3153. */
  3154. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3155. {
  3156. hpsa_get_max_perf_mode_cmds(h);
  3157. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3158. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3159. /*
  3160. * Limit in-command s/g elements to 32 save dma'able memory.
  3161. * Howvever spec says if 0, use 31
  3162. */
  3163. h->max_cmd_sg_entries = 31;
  3164. if (h->maxsgentries > 512) {
  3165. h->max_cmd_sg_entries = 32;
  3166. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3167. h->maxsgentries--; /* save one for chain pointer */
  3168. } else {
  3169. h->maxsgentries = 31; /* default to traditional values */
  3170. h->chainsize = 0;
  3171. }
  3172. }
  3173. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3174. {
  3175. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3176. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3177. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3178. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3179. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3180. return false;
  3181. }
  3182. return true;
  3183. }
  3184. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3185. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3186. {
  3187. #ifdef CONFIG_X86
  3188. u32 prefetch;
  3189. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3190. prefetch |= 0x100;
  3191. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3192. #endif
  3193. }
  3194. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3195. * in a prefetch beyond physical memory.
  3196. */
  3197. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3198. {
  3199. u32 dma_prefetch;
  3200. if (h->board_id != 0x3225103C)
  3201. return;
  3202. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3203. dma_prefetch |= 0x8000;
  3204. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3205. }
  3206. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3207. {
  3208. int i;
  3209. /* under certain very rare conditions, this can take awhile.
  3210. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3211. * as we enter this code.)
  3212. */
  3213. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3214. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3215. break;
  3216. /* delay and try again */
  3217. msleep(10);
  3218. }
  3219. }
  3220. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3221. {
  3222. u32 trans_support;
  3223. trans_support = readl(&(h->cfgtable->TransportSupport));
  3224. if (!(trans_support & SIMPLE_MODE))
  3225. return -ENOTSUPP;
  3226. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3227. /* Update the field, and then ring the doorbell */
  3228. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3229. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3230. hpsa_wait_for_mode_change_ack(h);
  3231. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3232. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3233. dev_warn(&h->pdev->dev,
  3234. "unable to get board into simple mode\n");
  3235. return -ENODEV;
  3236. }
  3237. return 0;
  3238. }
  3239. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3240. {
  3241. int prod_index, err;
  3242. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3243. if (prod_index < 0)
  3244. return -ENODEV;
  3245. h->product_name = products[prod_index].product_name;
  3246. h->access = *(products[prod_index].access);
  3247. if (hpsa_board_disabled(h->pdev)) {
  3248. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3249. return -ENODEV;
  3250. }
  3251. err = pci_enable_device(h->pdev);
  3252. if (err) {
  3253. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3254. return err;
  3255. }
  3256. err = pci_request_regions(h->pdev, "hpsa");
  3257. if (err) {
  3258. dev_err(&h->pdev->dev,
  3259. "cannot obtain PCI resources, aborting\n");
  3260. return err;
  3261. }
  3262. hpsa_interrupt_mode(h);
  3263. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3264. if (err)
  3265. goto err_out_free_res;
  3266. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3267. if (!h->vaddr) {
  3268. err = -ENOMEM;
  3269. goto err_out_free_res;
  3270. }
  3271. err = hpsa_wait_for_board_ready(h);
  3272. if (err)
  3273. goto err_out_free_res;
  3274. err = hpsa_find_cfgtables(h);
  3275. if (err)
  3276. goto err_out_free_res;
  3277. hpsa_find_board_params(h);
  3278. if (!hpsa_CISS_signature_present(h)) {
  3279. err = -ENODEV;
  3280. goto err_out_free_res;
  3281. }
  3282. hpsa_enable_scsi_prefetch(h);
  3283. hpsa_p600_dma_prefetch_quirk(h);
  3284. err = hpsa_enter_simple_mode(h);
  3285. if (err)
  3286. goto err_out_free_res;
  3287. return 0;
  3288. err_out_free_res:
  3289. if (h->transtable)
  3290. iounmap(h->transtable);
  3291. if (h->cfgtable)
  3292. iounmap(h->cfgtable);
  3293. if (h->vaddr)
  3294. iounmap(h->vaddr);
  3295. /*
  3296. * Deliberately omit pci_disable_device(): it does something nasty to
  3297. * Smart Array controllers that pci_enable_device does not undo
  3298. */
  3299. pci_release_regions(h->pdev);
  3300. return err;
  3301. }
  3302. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3303. {
  3304. int rc;
  3305. #define HBA_INQUIRY_BYTE_COUNT 64
  3306. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3307. if (!h->hba_inquiry_data)
  3308. return;
  3309. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3310. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3311. if (rc != 0) {
  3312. kfree(h->hba_inquiry_data);
  3313. h->hba_inquiry_data = NULL;
  3314. }
  3315. }
  3316. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3317. {
  3318. int rc, i;
  3319. if (!reset_devices)
  3320. return 0;
  3321. /* Reset the controller with a PCI power-cycle or via doorbell */
  3322. rc = hpsa_kdump_hard_reset_controller(pdev);
  3323. /* -ENOTSUPP here means we cannot reset the controller
  3324. * but it's already (and still) up and running in
  3325. * "performant mode". Or, it might be 640x, which can't reset
  3326. * due to concerns about shared bbwc between 6402/6404 pair.
  3327. */
  3328. if (rc == -ENOTSUPP)
  3329. return 0; /* just try to do the kdump anyhow. */
  3330. if (rc)
  3331. return -ENODEV;
  3332. if (hpsa_reset_msi(pdev))
  3333. return -ENODEV;
  3334. /* Now try to get the controller to respond to a no-op */
  3335. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3336. if (hpsa_noop(pdev) == 0)
  3337. break;
  3338. else
  3339. dev_warn(&pdev->dev, "no-op failed%s\n",
  3340. (i < 11 ? "; re-trying" : ""));
  3341. }
  3342. return 0;
  3343. }
  3344. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3345. const struct pci_device_id *ent)
  3346. {
  3347. int dac, rc;
  3348. struct ctlr_info *h;
  3349. if (number_of_controllers == 0)
  3350. printk(KERN_INFO DRIVER_NAME "\n");
  3351. rc = hpsa_init_reset_devices(pdev);
  3352. if (rc)
  3353. return rc;
  3354. /* Command structures must be aligned on a 32-byte boundary because
  3355. * the 5 lower bits of the address are used by the hardware. and by
  3356. * the driver. See comments in hpsa.h for more info.
  3357. */
  3358. #define COMMANDLIST_ALIGNMENT 32
  3359. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3360. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3361. if (!h)
  3362. return -ENOMEM;
  3363. h->pdev = pdev;
  3364. h->busy_initializing = 1;
  3365. INIT_HLIST_HEAD(&h->cmpQ);
  3366. INIT_HLIST_HEAD(&h->reqQ);
  3367. rc = hpsa_pci_init(h);
  3368. if (rc != 0)
  3369. goto clean1;
  3370. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3371. h->ctlr = number_of_controllers;
  3372. number_of_controllers++;
  3373. /* configure PCI DMA stuff */
  3374. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3375. if (rc == 0) {
  3376. dac = 1;
  3377. } else {
  3378. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3379. if (rc == 0) {
  3380. dac = 0;
  3381. } else {
  3382. dev_err(&pdev->dev, "no suitable DMA available\n");
  3383. goto clean1;
  3384. }
  3385. }
  3386. /* make sure the board interrupts are off */
  3387. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3388. if (h->msix_vector || h->msi_vector)
  3389. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
  3390. IRQF_DISABLED, h->devname, h);
  3391. else
  3392. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
  3393. IRQF_DISABLED, h->devname, h);
  3394. if (rc) {
  3395. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3396. h->intr[PERF_MODE_INT], h->devname);
  3397. goto clean2;
  3398. }
  3399. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3400. h->devname, pdev->device,
  3401. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3402. h->cmd_pool_bits =
  3403. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3404. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3405. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3406. h->nr_cmds * sizeof(*h->cmd_pool),
  3407. &(h->cmd_pool_dhandle));
  3408. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3409. h->nr_cmds * sizeof(*h->errinfo_pool),
  3410. &(h->errinfo_pool_dhandle));
  3411. if ((h->cmd_pool_bits == NULL)
  3412. || (h->cmd_pool == NULL)
  3413. || (h->errinfo_pool == NULL)) {
  3414. dev_err(&pdev->dev, "out of memory");
  3415. rc = -ENOMEM;
  3416. goto clean4;
  3417. }
  3418. if (hpsa_allocate_sg_chain_blocks(h))
  3419. goto clean4;
  3420. spin_lock_init(&h->lock);
  3421. spin_lock_init(&h->scan_lock);
  3422. init_waitqueue_head(&h->scan_wait_queue);
  3423. h->scan_finished = 1; /* no scan currently in progress */
  3424. pci_set_drvdata(pdev, h);
  3425. memset(h->cmd_pool_bits, 0,
  3426. ((h->nr_cmds + BITS_PER_LONG -
  3427. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3428. hpsa_scsi_setup(h);
  3429. /* Turn the interrupts on so we can service requests */
  3430. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3431. hpsa_put_ctlr_into_performant_mode(h);
  3432. hpsa_hba_inquiry(h);
  3433. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3434. h->busy_initializing = 0;
  3435. return 1;
  3436. clean4:
  3437. hpsa_free_sg_chain_blocks(h);
  3438. kfree(h->cmd_pool_bits);
  3439. if (h->cmd_pool)
  3440. pci_free_consistent(h->pdev,
  3441. h->nr_cmds * sizeof(struct CommandList),
  3442. h->cmd_pool, h->cmd_pool_dhandle);
  3443. if (h->errinfo_pool)
  3444. pci_free_consistent(h->pdev,
  3445. h->nr_cmds * sizeof(struct ErrorInfo),
  3446. h->errinfo_pool,
  3447. h->errinfo_pool_dhandle);
  3448. free_irq(h->intr[PERF_MODE_INT], h);
  3449. clean2:
  3450. clean1:
  3451. h->busy_initializing = 0;
  3452. kfree(h);
  3453. return rc;
  3454. }
  3455. static void hpsa_flush_cache(struct ctlr_info *h)
  3456. {
  3457. char *flush_buf;
  3458. struct CommandList *c;
  3459. flush_buf = kzalloc(4, GFP_KERNEL);
  3460. if (!flush_buf)
  3461. return;
  3462. c = cmd_special_alloc(h);
  3463. if (!c) {
  3464. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3465. goto out_of_memory;
  3466. }
  3467. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3468. RAID_CTLR_LUNID, TYPE_CMD);
  3469. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3470. if (c->err_info->CommandStatus != 0)
  3471. dev_warn(&h->pdev->dev,
  3472. "error flushing cache on controller\n");
  3473. cmd_special_free(h, c);
  3474. out_of_memory:
  3475. kfree(flush_buf);
  3476. }
  3477. static void hpsa_shutdown(struct pci_dev *pdev)
  3478. {
  3479. struct ctlr_info *h;
  3480. h = pci_get_drvdata(pdev);
  3481. /* Turn board interrupts off and send the flush cache command
  3482. * sendcmd will turn off interrupt, and send the flush...
  3483. * To write all data in the battery backed cache to disks
  3484. */
  3485. hpsa_flush_cache(h);
  3486. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3487. free_irq(h->intr[PERF_MODE_INT], h);
  3488. #ifdef CONFIG_PCI_MSI
  3489. if (h->msix_vector)
  3490. pci_disable_msix(h->pdev);
  3491. else if (h->msi_vector)
  3492. pci_disable_msi(h->pdev);
  3493. #endif /* CONFIG_PCI_MSI */
  3494. }
  3495. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3496. {
  3497. struct ctlr_info *h;
  3498. if (pci_get_drvdata(pdev) == NULL) {
  3499. dev_err(&pdev->dev, "unable to remove device \n");
  3500. return;
  3501. }
  3502. h = pci_get_drvdata(pdev);
  3503. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3504. hpsa_shutdown(pdev);
  3505. iounmap(h->vaddr);
  3506. iounmap(h->transtable);
  3507. iounmap(h->cfgtable);
  3508. hpsa_free_sg_chain_blocks(h);
  3509. pci_free_consistent(h->pdev,
  3510. h->nr_cmds * sizeof(struct CommandList),
  3511. h->cmd_pool, h->cmd_pool_dhandle);
  3512. pci_free_consistent(h->pdev,
  3513. h->nr_cmds * sizeof(struct ErrorInfo),
  3514. h->errinfo_pool, h->errinfo_pool_dhandle);
  3515. pci_free_consistent(h->pdev, h->reply_pool_size,
  3516. h->reply_pool, h->reply_pool_dhandle);
  3517. kfree(h->cmd_pool_bits);
  3518. kfree(h->blockFetchTable);
  3519. kfree(h->hba_inquiry_data);
  3520. /*
  3521. * Deliberately omit pci_disable_device(): it does something nasty to
  3522. * Smart Array controllers that pci_enable_device does not undo
  3523. */
  3524. pci_release_regions(pdev);
  3525. pci_set_drvdata(pdev, NULL);
  3526. kfree(h);
  3527. }
  3528. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3529. __attribute__((unused)) pm_message_t state)
  3530. {
  3531. return -ENOSYS;
  3532. }
  3533. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3534. {
  3535. return -ENOSYS;
  3536. }
  3537. static struct pci_driver hpsa_pci_driver = {
  3538. .name = "hpsa",
  3539. .probe = hpsa_init_one,
  3540. .remove = __devexit_p(hpsa_remove_one),
  3541. .id_table = hpsa_pci_device_id, /* id_table */
  3542. .shutdown = hpsa_shutdown,
  3543. .suspend = hpsa_suspend,
  3544. .resume = hpsa_resume,
  3545. };
  3546. /* Fill in bucket_map[], given nsgs (the max number of
  3547. * scatter gather elements supported) and bucket[],
  3548. * which is an array of 8 integers. The bucket[] array
  3549. * contains 8 different DMA transfer sizes (in 16
  3550. * byte increments) which the controller uses to fetch
  3551. * commands. This function fills in bucket_map[], which
  3552. * maps a given number of scatter gather elements to one of
  3553. * the 8 DMA transfer sizes. The point of it is to allow the
  3554. * controller to only do as much DMA as needed to fetch the
  3555. * command, with the DMA transfer size encoded in the lower
  3556. * bits of the command address.
  3557. */
  3558. static void calc_bucket_map(int bucket[], int num_buckets,
  3559. int nsgs, int *bucket_map)
  3560. {
  3561. int i, j, b, size;
  3562. /* even a command with 0 SGs requires 4 blocks */
  3563. #define MINIMUM_TRANSFER_BLOCKS 4
  3564. #define NUM_BUCKETS 8
  3565. /* Note, bucket_map must have nsgs+1 entries. */
  3566. for (i = 0; i <= nsgs; i++) {
  3567. /* Compute size of a command with i SG entries */
  3568. size = i + MINIMUM_TRANSFER_BLOCKS;
  3569. b = num_buckets; /* Assume the biggest bucket */
  3570. /* Find the bucket that is just big enough */
  3571. for (j = 0; j < 8; j++) {
  3572. if (bucket[j] >= size) {
  3573. b = j;
  3574. break;
  3575. }
  3576. }
  3577. /* for a command with i SG entries, use bucket b. */
  3578. bucket_map[i] = b;
  3579. }
  3580. }
  3581. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3582. {
  3583. int i;
  3584. unsigned long register_value;
  3585. /* This is a bit complicated. There are 8 registers on
  3586. * the controller which we write to to tell it 8 different
  3587. * sizes of commands which there may be. It's a way of
  3588. * reducing the DMA done to fetch each command. Encoded into
  3589. * each command's tag are 3 bits which communicate to the controller
  3590. * which of the eight sizes that command fits within. The size of
  3591. * each command depends on how many scatter gather entries there are.
  3592. * Each SG entry requires 16 bytes. The eight registers are programmed
  3593. * with the number of 16-byte blocks a command of that size requires.
  3594. * The smallest command possible requires 5 such 16 byte blocks.
  3595. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3596. * blocks. Note, this only extends to the SG entries contained
  3597. * within the command block, and does not extend to chained blocks
  3598. * of SG elements. bft[] contains the eight values we write to
  3599. * the registers. They are not evenly distributed, but have more
  3600. * sizes for small commands, and fewer sizes for larger commands.
  3601. */
  3602. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3603. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3604. /* 5 = 1 s/g entry or 4k
  3605. * 6 = 2 s/g entry or 8k
  3606. * 8 = 4 s/g entry or 16k
  3607. * 10 = 6 s/g entry or 24k
  3608. */
  3609. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3610. /* Controller spec: zero out this buffer. */
  3611. memset(h->reply_pool, 0, h->reply_pool_size);
  3612. h->reply_pool_head = h->reply_pool;
  3613. bft[7] = h->max_sg_entries + 4;
  3614. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3615. for (i = 0; i < 8; i++)
  3616. writel(bft[i], &h->transtable->BlockFetch[i]);
  3617. /* size of controller ring buffer */
  3618. writel(h->max_commands, &h->transtable->RepQSize);
  3619. writel(1, &h->transtable->RepQCount);
  3620. writel(0, &h->transtable->RepQCtrAddrLow32);
  3621. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3622. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3623. writel(0, &h->transtable->RepQAddr0High32);
  3624. writel(CFGTBL_Trans_Performant,
  3625. &(h->cfgtable->HostWrite.TransportRequest));
  3626. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3627. hpsa_wait_for_mode_change_ack(h);
  3628. register_value = readl(&(h->cfgtable->TransportActive));
  3629. if (!(register_value & CFGTBL_Trans_Performant)) {
  3630. dev_warn(&h->pdev->dev, "unable to get board into"
  3631. " performant mode\n");
  3632. return;
  3633. }
  3634. }
  3635. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3636. {
  3637. u32 trans_support;
  3638. trans_support = readl(&(h->cfgtable->TransportSupport));
  3639. if (!(trans_support & PERFORMANT_MODE))
  3640. return;
  3641. hpsa_get_max_perf_mode_cmds(h);
  3642. h->max_sg_entries = 32;
  3643. /* Performant mode ring buffer and supporting data structures */
  3644. h->reply_pool_size = h->max_commands * sizeof(u64);
  3645. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3646. &(h->reply_pool_dhandle));
  3647. /* Need a block fetch table for performant mode */
  3648. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3649. sizeof(u32)), GFP_KERNEL);
  3650. if ((h->reply_pool == NULL)
  3651. || (h->blockFetchTable == NULL))
  3652. goto clean_up;
  3653. hpsa_enter_performant_mode(h);
  3654. /* Change the access methods to the performant access methods */
  3655. h->access = SA5_performant_access;
  3656. h->transMethod = CFGTBL_Trans_Performant;
  3657. return;
  3658. clean_up:
  3659. if (h->reply_pool)
  3660. pci_free_consistent(h->pdev, h->reply_pool_size,
  3661. h->reply_pool, h->reply_pool_dhandle);
  3662. kfree(h->blockFetchTable);
  3663. }
  3664. /*
  3665. * This is it. Register the PCI driver information for the cards we control
  3666. * the OS will call our registered routines when it finds one of our cards.
  3667. */
  3668. static int __init hpsa_init(void)
  3669. {
  3670. return pci_register_driver(&hpsa_pci_driver);
  3671. }
  3672. static void __exit hpsa_cleanup(void)
  3673. {
  3674. pci_unregister_driver(&hpsa_pci_driver);
  3675. }
  3676. module_init(hpsa_init);
  3677. module_exit(hpsa_cleanup);