uhci-hub.c 10 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
  13. */
  14. static __u8 root_hub_hub_des[] =
  15. {
  16. 0x09, /* __u8 bLength; */
  17. 0x29, /* __u8 bDescriptorType; Hub-descriptor */
  18. 0x02, /* __u8 bNbrPorts; */
  19. 0x0a, /* __u16 wHubCharacteristics; */
  20. 0x00, /* (per-port OC, no power switching) */
  21. 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
  22. 0x00, /* __u8 bHubContrCurrent; 0 mA */
  23. 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
  24. 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
  25. };
  26. #define UHCI_RH_MAXCHILD 7
  27. /* must write as zeroes */
  28. #define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
  29. /* status change bits: nonzero writes will clear */
  30. #define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
  31. /* A port that either is connected or has a changed-bit set will prevent
  32. * us from AUTO_STOPPING.
  33. */
  34. static int any_ports_active(struct uhci_hcd *uhci)
  35. {
  36. int port;
  37. for (port = 0; port < uhci->rh_numports; ++port) {
  38. if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  39. (USBPORTSC_CCS | RWC_BITS)) ||
  40. test_bit(port, &uhci->port_c_suspend))
  41. return 1;
  42. }
  43. return 0;
  44. }
  45. static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
  46. {
  47. int port;
  48. *buf = 0;
  49. for (port = 0; port < uhci->rh_numports; ++port) {
  50. if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & RWC_BITS) ||
  51. test_bit(port, &uhci->port_c_suspend))
  52. *buf |= (1 << (port + 1));
  53. }
  54. return !!*buf;
  55. }
  56. #define OK(x) len = (x); break
  57. #define CLR_RH_PORTSTAT(x) \
  58. status = inw(port_addr); \
  59. status &= ~(RWC_BITS|WZ_BITS); \
  60. status &= ~(x); \
  61. status |= RWC_BITS & (x); \
  62. outw(status, port_addr)
  63. #define SET_RH_PORTSTAT(x) \
  64. status = inw(port_addr); \
  65. status |= (x); \
  66. status &= ~(RWC_BITS|WZ_BITS); \
  67. outw(status, port_addr)
  68. /* UHCI controllers don't automatically stop resume signalling after 20 msec,
  69. * so we have to poll and check timeouts in order to take care of it.
  70. */
  71. static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
  72. unsigned long port_addr)
  73. {
  74. int status;
  75. if (inw(port_addr) & (USBPORTSC_SUSP | USBPORTSC_RD)) {
  76. CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD);
  77. if (test_bit(port, &uhci->resuming_ports))
  78. set_bit(port, &uhci->port_c_suspend);
  79. /* The controller won't actually turn off the RD bit until
  80. * it has had a chance to send a low-speed EOP sequence,
  81. * which takes 3 bit times (= 2 microseconds). We'll delay
  82. * slightly longer for good luck. */
  83. udelay(4);
  84. }
  85. clear_bit(port, &uhci->resuming_ports);
  86. }
  87. /* Wait for the UHCI controller in HP's iLO2 server management chip.
  88. * It can take up to 250 us to finish a reset and set the CSC bit.
  89. */
  90. static void wait_for_HP(unsigned long port_addr)
  91. {
  92. int i;
  93. for (i = 10; i < 250; i += 10) {
  94. if (inw(port_addr) & USBPORTSC_CSC)
  95. return;
  96. udelay(10);
  97. }
  98. /* Log a warning? */
  99. }
  100. static void uhci_check_ports(struct uhci_hcd *uhci)
  101. {
  102. unsigned int port;
  103. unsigned long port_addr;
  104. int status;
  105. for (port = 0; port < uhci->rh_numports; ++port) {
  106. port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
  107. status = inw(port_addr);
  108. if (unlikely(status & USBPORTSC_PR)) {
  109. if (time_after_eq(jiffies, uhci->ports_timeout)) {
  110. CLR_RH_PORTSTAT(USBPORTSC_PR);
  111. udelay(10);
  112. /* HP's server management chip requires
  113. * a longer delay. */
  114. if (to_pci_dev(uhci_dev(uhci))->vendor ==
  115. PCI_VENDOR_ID_HP)
  116. wait_for_HP(port_addr);
  117. /* If the port was enabled before, turning
  118. * reset on caused a port enable change.
  119. * Turning reset off causes a port connect
  120. * status change. Clear these changes. */
  121. CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
  122. SET_RH_PORTSTAT(USBPORTSC_PE);
  123. }
  124. }
  125. if (unlikely(status & USBPORTSC_RD)) {
  126. if (!test_bit(port, &uhci->resuming_ports)) {
  127. /* Port received a wakeup request */
  128. set_bit(port, &uhci->resuming_ports);
  129. uhci->ports_timeout = jiffies +
  130. msecs_to_jiffies(20);
  131. /* Make sure we see the port again
  132. * after the resuming period is over. */
  133. mod_timer(&uhci_to_hcd(uhci)->rh_timer,
  134. uhci->ports_timeout);
  135. } else if (time_after_eq(jiffies,
  136. uhci->ports_timeout)) {
  137. uhci_finish_suspend(uhci, port, port_addr);
  138. }
  139. }
  140. }
  141. }
  142. static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
  143. {
  144. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  145. unsigned long flags;
  146. int status = 0;
  147. spin_lock_irqsave(&uhci->lock, flags);
  148. uhci_scan_schedule(uhci, NULL);
  149. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
  150. goto done;
  151. uhci_check_ports(uhci);
  152. status = get_hub_status_data(uhci, buf);
  153. switch (uhci->rh_state) {
  154. case UHCI_RH_SUSPENDING:
  155. case UHCI_RH_SUSPENDED:
  156. /* if port change, ask to be resumed */
  157. if (status)
  158. usb_hcd_resume_root_hub(hcd);
  159. break;
  160. case UHCI_RH_AUTO_STOPPED:
  161. /* if port change, auto start */
  162. if (status)
  163. wakeup_rh(uhci);
  164. break;
  165. case UHCI_RH_RUNNING:
  166. /* are any devices attached? */
  167. if (!any_ports_active(uhci)) {
  168. uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
  169. uhci->auto_stop_time = jiffies + HZ;
  170. }
  171. break;
  172. case UHCI_RH_RUNNING_NODEVS:
  173. /* auto-stop if nothing connected for 1 second */
  174. if (any_ports_active(uhci))
  175. uhci->rh_state = UHCI_RH_RUNNING;
  176. else if (time_after_eq(jiffies, uhci->auto_stop_time))
  177. suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
  178. break;
  179. default:
  180. break;
  181. }
  182. done:
  183. spin_unlock_irqrestore(&uhci->lock, flags);
  184. return status;
  185. }
  186. /* size of returned buffer is part of USB spec */
  187. static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
  188. u16 wIndex, char *buf, u16 wLength)
  189. {
  190. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  191. int status, lstatus, retval = 0, len = 0;
  192. unsigned int port = wIndex - 1;
  193. unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
  194. u16 wPortChange, wPortStatus;
  195. unsigned long flags;
  196. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
  197. return -ETIMEDOUT;
  198. spin_lock_irqsave(&uhci->lock, flags);
  199. switch (typeReq) {
  200. case GetHubStatus:
  201. *(__le32 *)buf = cpu_to_le32(0);
  202. OK(4); /* hub power */
  203. case GetPortStatus:
  204. if (port >= uhci->rh_numports)
  205. goto err;
  206. uhci_check_ports(uhci);
  207. status = inw(port_addr);
  208. /* Intel controllers report the OverCurrent bit active on.
  209. * VIA controllers report it active off, so we'll adjust the
  210. * bit value. (It's not standardized in the UHCI spec.)
  211. */
  212. if (to_pci_dev(hcd->self.controller)->vendor ==
  213. PCI_VENDOR_ID_VIA)
  214. status ^= USBPORTSC_OC;
  215. /* UHCI doesn't support C_RESET (always false) */
  216. wPortChange = lstatus = 0;
  217. if (status & USBPORTSC_CSC)
  218. wPortChange |= USB_PORT_STAT_C_CONNECTION;
  219. if (status & USBPORTSC_PEC)
  220. wPortChange |= USB_PORT_STAT_C_ENABLE;
  221. if (status & USBPORTSC_OCC)
  222. wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
  223. if (test_bit(port, &uhci->port_c_suspend)) {
  224. wPortChange |= USB_PORT_STAT_C_SUSPEND;
  225. lstatus |= 1;
  226. }
  227. if (test_bit(port, &uhci->resuming_ports))
  228. lstatus |= 4;
  229. /* UHCI has no power switching (always on) */
  230. wPortStatus = USB_PORT_STAT_POWER;
  231. if (status & USBPORTSC_CCS)
  232. wPortStatus |= USB_PORT_STAT_CONNECTION;
  233. if (status & USBPORTSC_PE) {
  234. wPortStatus |= USB_PORT_STAT_ENABLE;
  235. if (status & (USBPORTSC_SUSP | USBPORTSC_RD))
  236. wPortStatus |= USB_PORT_STAT_SUSPEND;
  237. }
  238. if (status & USBPORTSC_OC)
  239. wPortStatus |= USB_PORT_STAT_OVERCURRENT;
  240. if (status & USBPORTSC_PR)
  241. wPortStatus |= USB_PORT_STAT_RESET;
  242. if (status & USBPORTSC_LSDA)
  243. wPortStatus |= USB_PORT_STAT_LOW_SPEED;
  244. if (wPortChange)
  245. dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
  246. wIndex, status, lstatus);
  247. *(__le16 *)buf = cpu_to_le16(wPortStatus);
  248. *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
  249. OK(4);
  250. case SetHubFeature: /* We don't implement these */
  251. case ClearHubFeature:
  252. switch (wValue) {
  253. case C_HUB_OVER_CURRENT:
  254. case C_HUB_LOCAL_POWER:
  255. OK(0);
  256. default:
  257. goto err;
  258. }
  259. break;
  260. case SetPortFeature:
  261. if (port >= uhci->rh_numports)
  262. goto err;
  263. switch (wValue) {
  264. case USB_PORT_FEAT_SUSPEND:
  265. SET_RH_PORTSTAT(USBPORTSC_SUSP);
  266. OK(0);
  267. case USB_PORT_FEAT_RESET:
  268. SET_RH_PORTSTAT(USBPORTSC_PR);
  269. /* Reset terminates Resume signalling */
  270. uhci_finish_suspend(uhci, port, port_addr);
  271. /* USB v2.0 7.1.7.5 */
  272. uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
  273. OK(0);
  274. case USB_PORT_FEAT_POWER:
  275. /* UHCI has no power switching */
  276. OK(0);
  277. default:
  278. goto err;
  279. }
  280. break;
  281. case ClearPortFeature:
  282. if (port >= uhci->rh_numports)
  283. goto err;
  284. switch (wValue) {
  285. case USB_PORT_FEAT_ENABLE:
  286. CLR_RH_PORTSTAT(USBPORTSC_PE);
  287. /* Disable terminates Resume signalling */
  288. uhci_finish_suspend(uhci, port, port_addr);
  289. OK(0);
  290. case USB_PORT_FEAT_C_ENABLE:
  291. CLR_RH_PORTSTAT(USBPORTSC_PEC);
  292. OK(0);
  293. case USB_PORT_FEAT_SUSPEND:
  294. if (!(inw(port_addr) & USBPORTSC_SUSP)) {
  295. /* Make certain the port isn't suspended */
  296. uhci_finish_suspend(uhci, port, port_addr);
  297. } else if (!test_and_set_bit(port,
  298. &uhci->resuming_ports)) {
  299. SET_RH_PORTSTAT(USBPORTSC_RD);
  300. /* The controller won't allow RD to be set
  301. * if the port is disabled. When this happens
  302. * just skip the Resume signalling.
  303. */
  304. if (!(inw(port_addr) & USBPORTSC_RD))
  305. uhci_finish_suspend(uhci, port,
  306. port_addr);
  307. else
  308. /* USB v2.0 7.1.7.7 */
  309. uhci->ports_timeout = jiffies +
  310. msecs_to_jiffies(20);
  311. }
  312. OK(0);
  313. case USB_PORT_FEAT_C_SUSPEND:
  314. clear_bit(port, &uhci->port_c_suspend);
  315. OK(0);
  316. case USB_PORT_FEAT_POWER:
  317. /* UHCI has no power switching */
  318. goto err;
  319. case USB_PORT_FEAT_C_CONNECTION:
  320. CLR_RH_PORTSTAT(USBPORTSC_CSC);
  321. OK(0);
  322. case USB_PORT_FEAT_C_OVER_CURRENT:
  323. CLR_RH_PORTSTAT(USBPORTSC_OCC);
  324. OK(0);
  325. case USB_PORT_FEAT_C_RESET:
  326. /* this driver won't report these */
  327. OK(0);
  328. default:
  329. goto err;
  330. }
  331. break;
  332. case GetHubDescriptor:
  333. len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
  334. memcpy(buf, root_hub_hub_des, len);
  335. if (len > 2)
  336. buf[2] = uhci->rh_numports;
  337. OK(len);
  338. default:
  339. err:
  340. retval = -EPIPE;
  341. }
  342. spin_unlock_irqrestore(&uhci->lock, flags);
  343. return retval;
  344. }