time.c 33 KB

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  1. /*
  2. * linux/arch/x86-64/kernel/time.c
  3. *
  4. * "High Precision Event Timer" based timekeeping.
  5. *
  6. * Copyright (c) 1991,1992,1995 Linus Torvalds
  7. * Copyright (c) 1994 Alan Modra
  8. * Copyright (c) 1995 Markus Kuhn
  9. * Copyright (c) 1996 Ingo Molnar
  10. * Copyright (c) 1998 Andrea Arcangeli
  11. * Copyright (c) 2002,2006 Vojtech Pavlik
  12. * Copyright (c) 2003 Andi Kleen
  13. * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/sched.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/init.h>
  19. #include <linux/mc146818rtc.h>
  20. #include <linux/time.h>
  21. #include <linux/ioport.h>
  22. #include <linux/module.h>
  23. #include <linux/device.h>
  24. #include <linux/sysdev.h>
  25. #include <linux/bcd.h>
  26. #include <linux/kallsyms.h>
  27. #include <linux/acpi.h>
  28. #ifdef CONFIG_ACPI
  29. #include <acpi/achware.h> /* for PM timer frequency */
  30. #include <acpi/acpi_bus.h>
  31. #endif
  32. #include <asm/8253pit.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/vsyscall.h>
  35. #include <asm/timex.h>
  36. #include <asm/proto.h>
  37. #include <asm/hpet.h>
  38. #include <asm/sections.h>
  39. #include <linux/cpufreq.h>
  40. #include <linux/hpet.h>
  41. #ifdef CONFIG_X86_LOCAL_APIC
  42. #include <asm/apic.h>
  43. #endif
  44. #ifdef CONFIG_CPU_FREQ
  45. static void cpufreq_delayed_get(void);
  46. #endif
  47. extern void i8254_timer_resume(void);
  48. extern int using_apic_timer;
  49. static char *time_init_gtod(void);
  50. DEFINE_SPINLOCK(rtc_lock);
  51. EXPORT_SYMBOL(rtc_lock);
  52. DEFINE_SPINLOCK(i8253_lock);
  53. int nohpet __initdata = 0;
  54. static int notsc __initdata = 0;
  55. #define USEC_PER_TICK (USEC_PER_SEC / HZ)
  56. #define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
  57. #define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
  58. #define NS_SCALE 10 /* 2^10, carefully chosen */
  59. #define US_SCALE 32 /* 2^32, arbitralrily chosen */
  60. unsigned int cpu_khz; /* TSC clocks / usec, not used here */
  61. EXPORT_SYMBOL(cpu_khz);
  62. static unsigned long hpet_period; /* fsecs / HPET clock */
  63. unsigned long hpet_tick; /* HPET clocks / interrupt */
  64. int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
  65. unsigned long vxtime_hz = PIT_TICK_RATE;
  66. int report_lost_ticks; /* command line option */
  67. unsigned long long monotonic_base;
  68. struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
  69. volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
  70. unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
  71. struct timespec __xtime __section_xtime;
  72. struct timezone __sys_tz __section_sys_tz;
  73. /*
  74. * do_gettimeoffset() returns microseconds since last timer interrupt was
  75. * triggered by hardware. A memory read of HPET is slower than a register read
  76. * of TSC, but much more reliable. It's also synchronized to the timer
  77. * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
  78. * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
  79. * This is not a problem, because jiffies hasn't updated either. They are bound
  80. * together by xtime_lock.
  81. */
  82. static inline unsigned int do_gettimeoffset_tsc(void)
  83. {
  84. unsigned long t;
  85. unsigned long x;
  86. t = get_cycles_sync();
  87. if (t < vxtime.last_tsc)
  88. t = vxtime.last_tsc; /* hack */
  89. x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE;
  90. return x;
  91. }
  92. static inline unsigned int do_gettimeoffset_hpet(void)
  93. {
  94. /* cap counter read to one tick to avoid inconsistencies */
  95. unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
  96. return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE;
  97. }
  98. unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
  99. /*
  100. * This version of gettimeofday() has microsecond resolution and better than
  101. * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
  102. * MHz) HPET timer.
  103. */
  104. void do_gettimeofday(struct timeval *tv)
  105. {
  106. unsigned long seq, t;
  107. unsigned int sec, usec;
  108. do {
  109. seq = read_seqbegin(&xtime_lock);
  110. sec = xtime.tv_sec;
  111. usec = xtime.tv_nsec / NSEC_PER_USEC;
  112. /* i386 does some correction here to keep the clock
  113. monotonous even when ntpd is fixing drift.
  114. But they didn't work for me, there is a non monotonic
  115. clock anyways with ntp.
  116. I dropped all corrections now until a real solution can
  117. be found. Note when you fix it here you need to do the same
  118. in arch/x86_64/kernel/vsyscall.c and export all needed
  119. variables in vmlinux.lds. -AK */
  120. t = (jiffies - wall_jiffies) * USEC_PER_TICK +
  121. do_gettimeoffset();
  122. usec += t;
  123. } while (read_seqretry(&xtime_lock, seq));
  124. tv->tv_sec = sec + usec / USEC_PER_SEC;
  125. tv->tv_usec = usec % USEC_PER_SEC;
  126. }
  127. EXPORT_SYMBOL(do_gettimeofday);
  128. /*
  129. * settimeofday() first undoes the correction that gettimeofday would do
  130. * on the time, and then saves it. This is ugly, but has been like this for
  131. * ages already.
  132. */
  133. int do_settimeofday(struct timespec *tv)
  134. {
  135. time_t wtm_sec, sec = tv->tv_sec;
  136. long wtm_nsec, nsec = tv->tv_nsec;
  137. if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
  138. return -EINVAL;
  139. write_seqlock_irq(&xtime_lock);
  140. nsec -= do_gettimeoffset() * NSEC_PER_USEC +
  141. (jiffies - wall_jiffies) * NSEC_PER_TICK;
  142. wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
  143. wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
  144. set_normalized_timespec(&xtime, sec, nsec);
  145. set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
  146. ntp_clear();
  147. write_sequnlock_irq(&xtime_lock);
  148. clock_was_set();
  149. return 0;
  150. }
  151. EXPORT_SYMBOL(do_settimeofday);
  152. unsigned long profile_pc(struct pt_regs *regs)
  153. {
  154. unsigned long pc = instruction_pointer(regs);
  155. /* Assume the lock function has either no stack frame or only a single
  156. word. This checks if the address on the stack looks like a kernel
  157. text address.
  158. There is a small window for false hits, but in that case the tick
  159. is just accounted to the spinlock function.
  160. Better would be to write these functions in assembler again
  161. and check exactly. */
  162. if (!user_mode(regs) && in_lock_functions(pc)) {
  163. char *v = *(char **)regs->rsp;
  164. if ((v >= _stext && v <= _etext) ||
  165. (v >= _sinittext && v <= _einittext) ||
  166. (v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END))
  167. return (unsigned long)v;
  168. return ((unsigned long *)regs->rsp)[1];
  169. }
  170. return pc;
  171. }
  172. EXPORT_SYMBOL(profile_pc);
  173. /*
  174. * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
  175. * ms after the second nowtime has started, because when nowtime is written
  176. * into the registers of the CMOS clock, it will jump to the next second
  177. * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
  178. * sheet for details.
  179. */
  180. static void set_rtc_mmss(unsigned long nowtime)
  181. {
  182. int real_seconds, real_minutes, cmos_minutes;
  183. unsigned char control, freq_select;
  184. /*
  185. * IRQs are disabled when we're called from the timer interrupt,
  186. * no need for spin_lock_irqsave()
  187. */
  188. spin_lock(&rtc_lock);
  189. /*
  190. * Tell the clock it's being set and stop it.
  191. */
  192. control = CMOS_READ(RTC_CONTROL);
  193. CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
  194. freq_select = CMOS_READ(RTC_FREQ_SELECT);
  195. CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
  196. cmos_minutes = CMOS_READ(RTC_MINUTES);
  197. BCD_TO_BIN(cmos_minutes);
  198. /*
  199. * since we're only adjusting minutes and seconds, don't interfere with hour
  200. * overflow. This avoids messing with unknown time zones but requires your RTC
  201. * not to be off by more than 15 minutes. Since we're calling it only when
  202. * our clock is externally synchronized using NTP, this shouldn't be a problem.
  203. */
  204. real_seconds = nowtime % 60;
  205. real_minutes = nowtime / 60;
  206. if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
  207. real_minutes += 30; /* correct for half hour time zone */
  208. real_minutes %= 60;
  209. if (abs(real_minutes - cmos_minutes) >= 30) {
  210. printk(KERN_WARNING "time.c: can't update CMOS clock "
  211. "from %d to %d\n", cmos_minutes, real_minutes);
  212. } else {
  213. BIN_TO_BCD(real_seconds);
  214. BIN_TO_BCD(real_minutes);
  215. CMOS_WRITE(real_seconds, RTC_SECONDS);
  216. CMOS_WRITE(real_minutes, RTC_MINUTES);
  217. }
  218. /*
  219. * The following flags have to be released exactly in this order, otherwise the
  220. * DS12887 (popular MC146818A clone with integrated battery and quartz) will
  221. * not reset the oscillator and will not update precisely 500 ms later. You
  222. * won't find this mentioned in the Dallas Semiconductor data sheets, but who
  223. * believes data sheets anyway ... -- Markus Kuhn
  224. */
  225. CMOS_WRITE(control, RTC_CONTROL);
  226. CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
  227. spin_unlock(&rtc_lock);
  228. }
  229. /* monotonic_clock(): returns # of nanoseconds passed since time_init()
  230. * Note: This function is required to return accurate
  231. * time even in the absence of multiple timer ticks.
  232. */
  233. unsigned long long monotonic_clock(void)
  234. {
  235. unsigned long seq;
  236. u32 last_offset, this_offset, offset;
  237. unsigned long long base;
  238. if (vxtime.mode == VXTIME_HPET) {
  239. do {
  240. seq = read_seqbegin(&xtime_lock);
  241. last_offset = vxtime.last;
  242. base = monotonic_base;
  243. this_offset = hpet_readl(HPET_COUNTER);
  244. } while (read_seqretry(&xtime_lock, seq));
  245. offset = (this_offset - last_offset);
  246. offset *= NSEC_PER_TICK / hpet_tick;
  247. } else {
  248. do {
  249. seq = read_seqbegin(&xtime_lock);
  250. last_offset = vxtime.last_tsc;
  251. base = monotonic_base;
  252. } while (read_seqretry(&xtime_lock, seq));
  253. this_offset = get_cycles_sync();
  254. /* FIXME: 1000 or 1000000? */
  255. offset = (this_offset - last_offset)*1000 / cpu_khz;
  256. }
  257. return base + offset;
  258. }
  259. EXPORT_SYMBOL(monotonic_clock);
  260. static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
  261. {
  262. static long lost_count;
  263. static int warned;
  264. if (report_lost_ticks) {
  265. printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
  266. print_symbol("rip %s)\n", regs->rip);
  267. }
  268. if (lost_count == 1000 && !warned) {
  269. printk(KERN_WARNING "warning: many lost ticks.\n"
  270. KERN_WARNING "Your time source seems to be instable or "
  271. "some driver is hogging interupts\n");
  272. print_symbol("rip %s\n", regs->rip);
  273. if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
  274. printk(KERN_WARNING "Falling back to HPET\n");
  275. if (hpet_use_timer)
  276. vxtime.last = hpet_readl(HPET_T0_CMP) -
  277. hpet_tick;
  278. else
  279. vxtime.last = hpet_readl(HPET_COUNTER);
  280. vxtime.mode = VXTIME_HPET;
  281. do_gettimeoffset = do_gettimeoffset_hpet;
  282. }
  283. /* else should fall back to PIT, but code missing. */
  284. warned = 1;
  285. } else
  286. lost_count++;
  287. #ifdef CONFIG_CPU_FREQ
  288. /* In some cases the CPU can change frequency without us noticing
  289. Give cpufreq a change to catch up. */
  290. if ((lost_count+1) % 25 == 0)
  291. cpufreq_delayed_get();
  292. #endif
  293. }
  294. void main_timer_handler(struct pt_regs *regs)
  295. {
  296. static unsigned long rtc_update = 0;
  297. unsigned long tsc;
  298. int delay = 0, offset = 0, lost = 0;
  299. /*
  300. * Here we are in the timer irq handler. We have irqs locally disabled (so we
  301. * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
  302. * on the other CPU, so we need a lock. We also need to lock the vsyscall
  303. * variables, because both do_timer() and us change them -arca+vojtech
  304. */
  305. write_seqlock(&xtime_lock);
  306. if (vxtime.hpet_address)
  307. offset = hpet_readl(HPET_COUNTER);
  308. if (hpet_use_timer) {
  309. /* if we're using the hpet timer functionality,
  310. * we can more accurately know the counter value
  311. * when the timer interrupt occured.
  312. */
  313. offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
  314. delay = hpet_readl(HPET_COUNTER) - offset;
  315. } else if (!pmtmr_ioport) {
  316. spin_lock(&i8253_lock);
  317. outb_p(0x00, 0x43);
  318. delay = inb_p(0x40);
  319. delay |= inb(0x40) << 8;
  320. spin_unlock(&i8253_lock);
  321. delay = LATCH - 1 - delay;
  322. }
  323. tsc = get_cycles_sync();
  324. if (vxtime.mode == VXTIME_HPET) {
  325. if (offset - vxtime.last > hpet_tick) {
  326. lost = (offset - vxtime.last) / hpet_tick - 1;
  327. }
  328. monotonic_base +=
  329. (offset - vxtime.last) * NSEC_PER_TICK / hpet_tick;
  330. vxtime.last = offset;
  331. #ifdef CONFIG_X86_PM_TIMER
  332. } else if (vxtime.mode == VXTIME_PMTMR) {
  333. lost = pmtimer_mark_offset();
  334. #endif
  335. } else {
  336. offset = (((tsc - vxtime.last_tsc) *
  337. vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK;
  338. if (offset < 0)
  339. offset = 0;
  340. if (offset > USEC_PER_TICK) {
  341. lost = offset / USEC_PER_TICK;
  342. offset %= USEC_PER_TICK;
  343. }
  344. /* FIXME: 1000 or 1000000? */
  345. monotonic_base += (tsc - vxtime.last_tsc) * 1000000 / cpu_khz;
  346. vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
  347. if ((((tsc - vxtime.last_tsc) *
  348. vxtime.tsc_quot) >> US_SCALE) < offset)
  349. vxtime.last_tsc = tsc -
  350. (((long) offset << US_SCALE) / vxtime.tsc_quot) - 1;
  351. }
  352. if (lost > 0) {
  353. handle_lost_ticks(lost, regs);
  354. jiffies += lost;
  355. }
  356. /*
  357. * Do the timer stuff.
  358. */
  359. do_timer(regs);
  360. #ifndef CONFIG_SMP
  361. update_process_times(user_mode(regs));
  362. #endif
  363. /*
  364. * In the SMP case we use the local APIC timer interrupt to do the profiling,
  365. * except when we simulate SMP mode on a uniprocessor system, in that case we
  366. * have to call the local interrupt handler.
  367. */
  368. #ifndef CONFIG_X86_LOCAL_APIC
  369. profile_tick(CPU_PROFILING, regs);
  370. #else
  371. if (!using_apic_timer)
  372. smp_local_timer_interrupt(regs);
  373. #endif
  374. /*
  375. * If we have an externally synchronized Linux clock, then update CMOS clock
  376. * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
  377. * closest to exactly 500 ms before the next second. If the update fails, we
  378. * don't care, as it'll be updated on the next turn, and the problem (time way
  379. * off) isn't likely to go away much sooner anyway.
  380. */
  381. if (ntp_synced() && xtime.tv_sec > rtc_update &&
  382. abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
  383. set_rtc_mmss(xtime.tv_sec);
  384. rtc_update = xtime.tv_sec + 660;
  385. }
  386. write_sequnlock(&xtime_lock);
  387. }
  388. static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  389. {
  390. if (apic_runs_main_timer > 1)
  391. return IRQ_HANDLED;
  392. main_timer_handler(regs);
  393. #ifdef CONFIG_X86_LOCAL_APIC
  394. if (using_apic_timer)
  395. smp_send_timer_broadcast_ipi();
  396. #endif
  397. return IRQ_HANDLED;
  398. }
  399. static unsigned int cyc2ns_scale __read_mostly;
  400. static inline void set_cyc2ns_scale(unsigned long cpu_khz)
  401. {
  402. cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz;
  403. }
  404. static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  405. {
  406. return (cyc * cyc2ns_scale) >> NS_SCALE;
  407. }
  408. unsigned long long sched_clock(void)
  409. {
  410. unsigned long a = 0;
  411. #if 0
  412. /* Don't do a HPET read here. Using TSC always is much faster
  413. and HPET may not be mapped yet when the scheduler first runs.
  414. Disadvantage is a small drift between CPUs in some configurations,
  415. but that should be tolerable. */
  416. if (__vxtime.mode == VXTIME_HPET)
  417. return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE;
  418. #endif
  419. /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
  420. which means it is not completely exact and may not be monotonous between
  421. CPUs. But the errors should be too small to matter for scheduling
  422. purposes. */
  423. rdtscll(a);
  424. return cycles_2_ns(a);
  425. }
  426. static unsigned long get_cmos_time(void)
  427. {
  428. unsigned int year, mon, day, hour, min, sec;
  429. unsigned long flags;
  430. unsigned extyear = 0;
  431. spin_lock_irqsave(&rtc_lock, flags);
  432. do {
  433. sec = CMOS_READ(RTC_SECONDS);
  434. min = CMOS_READ(RTC_MINUTES);
  435. hour = CMOS_READ(RTC_HOURS);
  436. day = CMOS_READ(RTC_DAY_OF_MONTH);
  437. mon = CMOS_READ(RTC_MONTH);
  438. year = CMOS_READ(RTC_YEAR);
  439. #ifdef CONFIG_ACPI
  440. if (acpi_fadt.revision >= FADT2_REVISION_ID &&
  441. acpi_fadt.century)
  442. extyear = CMOS_READ(acpi_fadt.century);
  443. #endif
  444. } while (sec != CMOS_READ(RTC_SECONDS));
  445. spin_unlock_irqrestore(&rtc_lock, flags);
  446. /*
  447. * We know that x86-64 always uses BCD format, no need to check the
  448. * config register.
  449. */
  450. BCD_TO_BIN(sec);
  451. BCD_TO_BIN(min);
  452. BCD_TO_BIN(hour);
  453. BCD_TO_BIN(day);
  454. BCD_TO_BIN(mon);
  455. BCD_TO_BIN(year);
  456. if (extyear) {
  457. BCD_TO_BIN(extyear);
  458. year += extyear;
  459. printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
  460. } else {
  461. /*
  462. * x86-64 systems only exists since 2002.
  463. * This will work up to Dec 31, 2100
  464. */
  465. year += 2000;
  466. }
  467. return mktime(year, mon, day, hour, min, sec);
  468. }
  469. #ifdef CONFIG_CPU_FREQ
  470. /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
  471. changes.
  472. RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
  473. not that important because current Opteron setups do not support
  474. scaling on SMP anyroads.
  475. Should fix up last_tsc too. Currently gettimeofday in the
  476. first tick after the change will be slightly wrong. */
  477. #include <linux/workqueue.h>
  478. static unsigned int cpufreq_delayed_issched = 0;
  479. static unsigned int cpufreq_init = 0;
  480. static struct work_struct cpufreq_delayed_get_work;
  481. static void handle_cpufreq_delayed_get(void *v)
  482. {
  483. unsigned int cpu;
  484. for_each_online_cpu(cpu) {
  485. cpufreq_get(cpu);
  486. }
  487. cpufreq_delayed_issched = 0;
  488. }
  489. /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
  490. * to verify the CPU frequency the timing core thinks the CPU is running
  491. * at is still correct.
  492. */
  493. static void cpufreq_delayed_get(void)
  494. {
  495. static int warned;
  496. if (cpufreq_init && !cpufreq_delayed_issched) {
  497. cpufreq_delayed_issched = 1;
  498. if (!warned) {
  499. warned = 1;
  500. printk(KERN_DEBUG
  501. "Losing some ticks... checking if CPU frequency changed.\n");
  502. }
  503. schedule_work(&cpufreq_delayed_get_work);
  504. }
  505. }
  506. static unsigned int ref_freq = 0;
  507. static unsigned long loops_per_jiffy_ref = 0;
  508. static unsigned long cpu_khz_ref = 0;
  509. static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
  510. void *data)
  511. {
  512. struct cpufreq_freqs *freq = data;
  513. unsigned long *lpj, dummy;
  514. if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
  515. return 0;
  516. lpj = &dummy;
  517. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  518. #ifdef CONFIG_SMP
  519. lpj = &cpu_data[freq->cpu].loops_per_jiffy;
  520. #else
  521. lpj = &boot_cpu_data.loops_per_jiffy;
  522. #endif
  523. if (!ref_freq) {
  524. ref_freq = freq->old;
  525. loops_per_jiffy_ref = *lpj;
  526. cpu_khz_ref = cpu_khz;
  527. }
  528. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  529. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
  530. (val == CPUFREQ_RESUMECHANGE)) {
  531. *lpj =
  532. cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
  533. cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
  534. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  535. vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
  536. }
  537. set_cyc2ns_scale(cpu_khz_ref);
  538. return 0;
  539. }
  540. static struct notifier_block time_cpufreq_notifier_block = {
  541. .notifier_call = time_cpufreq_notifier
  542. };
  543. static int __init cpufreq_tsc(void)
  544. {
  545. INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
  546. if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
  547. CPUFREQ_TRANSITION_NOTIFIER))
  548. cpufreq_init = 1;
  549. return 0;
  550. }
  551. core_initcall(cpufreq_tsc);
  552. #endif
  553. /*
  554. * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
  555. * it to the HPET timer of known frequency.
  556. */
  557. #define TICK_COUNT 100000000
  558. static unsigned int __init hpet_calibrate_tsc(void)
  559. {
  560. int tsc_start, hpet_start;
  561. int tsc_now, hpet_now;
  562. unsigned long flags;
  563. local_irq_save(flags);
  564. local_irq_disable();
  565. hpet_start = hpet_readl(HPET_COUNTER);
  566. rdtscl(tsc_start);
  567. do {
  568. local_irq_disable();
  569. hpet_now = hpet_readl(HPET_COUNTER);
  570. tsc_now = get_cycles_sync();
  571. local_irq_restore(flags);
  572. } while ((tsc_now - tsc_start) < TICK_COUNT &&
  573. (hpet_now - hpet_start) < TICK_COUNT);
  574. return (tsc_now - tsc_start) * 1000000000L
  575. / ((hpet_now - hpet_start) * hpet_period / 1000);
  576. }
  577. /*
  578. * pit_calibrate_tsc() uses the speaker output (channel 2) of
  579. * the PIT. This is better than using the timer interrupt output,
  580. * because we can read the value of the speaker with just one inb(),
  581. * where we need three i/o operations for the interrupt channel.
  582. * We count how many ticks the TSC does in 50 ms.
  583. */
  584. static unsigned int __init pit_calibrate_tsc(void)
  585. {
  586. unsigned long start, end;
  587. unsigned long flags;
  588. spin_lock_irqsave(&i8253_lock, flags);
  589. outb((inb(0x61) & ~0x02) | 0x01, 0x61);
  590. outb(0xb0, 0x43);
  591. outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
  592. outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
  593. start = get_cycles_sync();
  594. while ((inb(0x61) & 0x20) == 0);
  595. end = get_cycles_sync();
  596. spin_unlock_irqrestore(&i8253_lock, flags);
  597. return (end - start) / 50;
  598. }
  599. #ifdef CONFIG_HPET
  600. static __init int late_hpet_init(void)
  601. {
  602. struct hpet_data hd;
  603. unsigned int ntimer;
  604. if (!vxtime.hpet_address)
  605. return 0;
  606. memset(&hd, 0, sizeof (hd));
  607. ntimer = hpet_readl(HPET_ID);
  608. ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
  609. ntimer++;
  610. /*
  611. * Register with driver.
  612. * Timer0 and Timer1 is used by platform.
  613. */
  614. hd.hd_phys_address = vxtime.hpet_address;
  615. hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
  616. hd.hd_nirqs = ntimer;
  617. hd.hd_flags = HPET_DATA_PLATFORM;
  618. hpet_reserve_timer(&hd, 0);
  619. #ifdef CONFIG_HPET_EMULATE_RTC
  620. hpet_reserve_timer(&hd, 1);
  621. #endif
  622. hd.hd_irq[0] = HPET_LEGACY_8254;
  623. hd.hd_irq[1] = HPET_LEGACY_RTC;
  624. if (ntimer > 2) {
  625. struct hpet *hpet;
  626. struct hpet_timer *timer;
  627. int i;
  628. hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
  629. timer = &hpet->hpet_timers[2];
  630. for (i = 2; i < ntimer; timer++, i++)
  631. hd.hd_irq[i] = (timer->hpet_config &
  632. Tn_INT_ROUTE_CNF_MASK) >>
  633. Tn_INT_ROUTE_CNF_SHIFT;
  634. }
  635. hpet_alloc(&hd);
  636. return 0;
  637. }
  638. fs_initcall(late_hpet_init);
  639. #endif
  640. static int hpet_timer_stop_set_go(unsigned long tick)
  641. {
  642. unsigned int cfg;
  643. /*
  644. * Stop the timers and reset the main counter.
  645. */
  646. cfg = hpet_readl(HPET_CFG);
  647. cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
  648. hpet_writel(cfg, HPET_CFG);
  649. hpet_writel(0, HPET_COUNTER);
  650. hpet_writel(0, HPET_COUNTER + 4);
  651. /*
  652. * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
  653. * and period also hpet_tick.
  654. */
  655. if (hpet_use_timer) {
  656. hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
  657. HPET_TN_32BIT, HPET_T0_CFG);
  658. hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
  659. hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
  660. cfg |= HPET_CFG_LEGACY;
  661. }
  662. /*
  663. * Go!
  664. */
  665. cfg |= HPET_CFG_ENABLE;
  666. hpet_writel(cfg, HPET_CFG);
  667. return 0;
  668. }
  669. static int hpet_init(void)
  670. {
  671. unsigned int id;
  672. if (!vxtime.hpet_address)
  673. return -1;
  674. set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
  675. __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
  676. /*
  677. * Read the period, compute tick and quotient.
  678. */
  679. id = hpet_readl(HPET_ID);
  680. if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
  681. return -1;
  682. hpet_period = hpet_readl(HPET_PERIOD);
  683. if (hpet_period < 100000 || hpet_period > 100000000)
  684. return -1;
  685. hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
  686. hpet_use_timer = (id & HPET_ID_LEGSUP);
  687. return hpet_timer_stop_set_go(hpet_tick);
  688. }
  689. static int hpet_reenable(void)
  690. {
  691. return hpet_timer_stop_set_go(hpet_tick);
  692. }
  693. #define PIT_MODE 0x43
  694. #define PIT_CH0 0x40
  695. static void __init __pit_init(int val, u8 mode)
  696. {
  697. unsigned long flags;
  698. spin_lock_irqsave(&i8253_lock, flags);
  699. outb_p(mode, PIT_MODE);
  700. outb_p(val & 0xff, PIT_CH0); /* LSB */
  701. outb_p(val >> 8, PIT_CH0); /* MSB */
  702. spin_unlock_irqrestore(&i8253_lock, flags);
  703. }
  704. void __init pit_init(void)
  705. {
  706. __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
  707. }
  708. void __init pit_stop_interrupt(void)
  709. {
  710. __pit_init(0, 0x30); /* mode 0 */
  711. }
  712. void __init stop_timer_interrupt(void)
  713. {
  714. char *name;
  715. if (vxtime.hpet_address) {
  716. name = "HPET";
  717. hpet_timer_stop_set_go(0);
  718. } else {
  719. name = "PIT";
  720. pit_stop_interrupt();
  721. }
  722. printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
  723. }
  724. int __init time_setup(char *str)
  725. {
  726. report_lost_ticks = 1;
  727. return 1;
  728. }
  729. static struct irqaction irq0 = {
  730. timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
  731. };
  732. void __init time_init(void)
  733. {
  734. char *timename;
  735. char *gtod;
  736. if (nohpet)
  737. vxtime.hpet_address = 0;
  738. xtime.tv_sec = get_cmos_time();
  739. xtime.tv_nsec = 0;
  740. set_normalized_timespec(&wall_to_monotonic,
  741. -xtime.tv_sec, -xtime.tv_nsec);
  742. if (!hpet_init())
  743. vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period;
  744. else
  745. vxtime.hpet_address = 0;
  746. if (hpet_use_timer) {
  747. /* set tick_nsec to use the proper rate for HPET */
  748. tick_nsec = TICK_NSEC_HPET;
  749. cpu_khz = hpet_calibrate_tsc();
  750. timename = "HPET";
  751. #ifdef CONFIG_X86_PM_TIMER
  752. } else if (pmtmr_ioport && !vxtime.hpet_address) {
  753. vxtime_hz = PM_TIMER_FREQUENCY;
  754. timename = "PM";
  755. pit_init();
  756. cpu_khz = pit_calibrate_tsc();
  757. #endif
  758. } else {
  759. pit_init();
  760. cpu_khz = pit_calibrate_tsc();
  761. timename = "PIT";
  762. }
  763. vxtime.mode = VXTIME_TSC;
  764. gtod = time_init_gtod();
  765. printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
  766. vxtime_hz / 1000000, vxtime_hz % 1000000, timename, gtod);
  767. printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
  768. cpu_khz / 1000, cpu_khz % 1000);
  769. vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
  770. vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
  771. vxtime.last_tsc = get_cycles_sync();
  772. setup_irq(0, &irq0);
  773. set_cyc2ns_scale(cpu_khz);
  774. }
  775. /*
  776. * Make an educated guess if the TSC is trustworthy and synchronized
  777. * over all CPUs.
  778. */
  779. __cpuinit int unsynchronized_tsc(void)
  780. {
  781. #ifdef CONFIG_SMP
  782. if (apic_is_clustered_box())
  783. return 1;
  784. #endif
  785. /* Most intel systems have synchronized TSCs except for
  786. multi node systems */
  787. if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
  788. #ifdef CONFIG_ACPI
  789. /* But TSC doesn't tick in C3 so don't use it there */
  790. if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
  791. return 1;
  792. #endif
  793. return 0;
  794. }
  795. /* Assume multi socket systems are not synchronized */
  796. return num_present_cpus() > 1;
  797. }
  798. /*
  799. * Decide what mode gettimeofday should use.
  800. */
  801. __init static char *time_init_gtod(void)
  802. {
  803. char *timetype;
  804. if (unsynchronized_tsc())
  805. notsc = 1;
  806. if (vxtime.hpet_address && notsc) {
  807. timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
  808. if (hpet_use_timer)
  809. vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
  810. else
  811. vxtime.last = hpet_readl(HPET_COUNTER);
  812. vxtime.mode = VXTIME_HPET;
  813. do_gettimeoffset = do_gettimeoffset_hpet;
  814. #ifdef CONFIG_X86_PM_TIMER
  815. /* Using PM for gettimeofday is quite slow, but we have no other
  816. choice because the TSC is too unreliable on some systems. */
  817. } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
  818. timetype = "PM";
  819. do_gettimeoffset = do_gettimeoffset_pm;
  820. vxtime.mode = VXTIME_PMTMR;
  821. sysctl_vsyscall = 0;
  822. printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
  823. #endif
  824. } else {
  825. timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
  826. vxtime.mode = VXTIME_TSC;
  827. }
  828. return timetype;
  829. }
  830. __setup("report_lost_ticks", time_setup);
  831. static long clock_cmos_diff;
  832. static unsigned long sleep_start;
  833. /*
  834. * sysfs support for the timer.
  835. */
  836. static int timer_suspend(struct sys_device *dev, pm_message_t state)
  837. {
  838. /*
  839. * Estimate time zone so that set_time can update the clock
  840. */
  841. long cmos_time = get_cmos_time();
  842. clock_cmos_diff = -cmos_time;
  843. clock_cmos_diff += get_seconds();
  844. sleep_start = cmos_time;
  845. return 0;
  846. }
  847. static int timer_resume(struct sys_device *dev)
  848. {
  849. unsigned long flags;
  850. unsigned long sec;
  851. unsigned long ctime = get_cmos_time();
  852. unsigned long sleep_length = (ctime - sleep_start) * HZ;
  853. if (vxtime.hpet_address)
  854. hpet_reenable();
  855. else
  856. i8254_timer_resume();
  857. sec = ctime + clock_cmos_diff;
  858. write_seqlock_irqsave(&xtime_lock,flags);
  859. xtime.tv_sec = sec;
  860. xtime.tv_nsec = 0;
  861. if (vxtime.mode == VXTIME_HPET) {
  862. if (hpet_use_timer)
  863. vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
  864. else
  865. vxtime.last = hpet_readl(HPET_COUNTER);
  866. #ifdef CONFIG_X86_PM_TIMER
  867. } else if (vxtime.mode == VXTIME_PMTMR) {
  868. pmtimer_resume();
  869. #endif
  870. } else
  871. vxtime.last_tsc = get_cycles_sync();
  872. write_sequnlock_irqrestore(&xtime_lock,flags);
  873. jiffies += sleep_length;
  874. wall_jiffies += sleep_length;
  875. monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
  876. touch_softlockup_watchdog();
  877. return 0;
  878. }
  879. static struct sysdev_class timer_sysclass = {
  880. .resume = timer_resume,
  881. .suspend = timer_suspend,
  882. set_kset_name("timer"),
  883. };
  884. /* XXX this driverfs stuff should probably go elsewhere later -john */
  885. static struct sys_device device_timer = {
  886. .id = 0,
  887. .cls = &timer_sysclass,
  888. };
  889. static int time_init_device(void)
  890. {
  891. int error = sysdev_class_register(&timer_sysclass);
  892. if (!error)
  893. error = sysdev_register(&device_timer);
  894. return error;
  895. }
  896. device_initcall(time_init_device);
  897. #ifdef CONFIG_HPET_EMULATE_RTC
  898. /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
  899. * is enabled, we support RTC interrupt functionality in software.
  900. * RTC has 3 kinds of interrupts:
  901. * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
  902. * is updated
  903. * 2) Alarm Interrupt - generate an interrupt at a specific time of day
  904. * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
  905. * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
  906. * (1) and (2) above are implemented using polling at a frequency of
  907. * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
  908. * overhead. (DEFAULT_RTC_INT_FREQ)
  909. * For (3), we use interrupts at 64Hz or user specified periodic
  910. * frequency, whichever is higher.
  911. */
  912. #include <linux/rtc.h>
  913. #define DEFAULT_RTC_INT_FREQ 64
  914. #define RTC_NUM_INTS 1
  915. static unsigned long UIE_on;
  916. static unsigned long prev_update_sec;
  917. static unsigned long AIE_on;
  918. static struct rtc_time alarm_time;
  919. static unsigned long PIE_on;
  920. static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
  921. static unsigned long PIE_count;
  922. static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
  923. static unsigned int hpet_t1_cmp; /* cached comparator register */
  924. int is_hpet_enabled(void)
  925. {
  926. return vxtime.hpet_address != 0;
  927. }
  928. /*
  929. * Timer 1 for RTC, we do not use periodic interrupt feature,
  930. * even if HPET supports periodic interrupts on Timer 1.
  931. * The reason being, to set up a periodic interrupt in HPET, we need to
  932. * stop the main counter. And if we do that everytime someone diables/enables
  933. * RTC, we will have adverse effect on main kernel timer running on Timer 0.
  934. * So, for the time being, simulate the periodic interrupt in software.
  935. *
  936. * hpet_rtc_timer_init() is called for the first time and during subsequent
  937. * interuppts reinit happens through hpet_rtc_timer_reinit().
  938. */
  939. int hpet_rtc_timer_init(void)
  940. {
  941. unsigned int cfg, cnt;
  942. unsigned long flags;
  943. if (!is_hpet_enabled())
  944. return 0;
  945. /*
  946. * Set the counter 1 and enable the interrupts.
  947. */
  948. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  949. hpet_rtc_int_freq = PIE_freq;
  950. else
  951. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  952. local_irq_save(flags);
  953. cnt = hpet_readl(HPET_COUNTER);
  954. cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
  955. hpet_writel(cnt, HPET_T1_CMP);
  956. hpet_t1_cmp = cnt;
  957. local_irq_restore(flags);
  958. cfg = hpet_readl(HPET_T1_CFG);
  959. cfg &= ~HPET_TN_PERIODIC;
  960. cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
  961. hpet_writel(cfg, HPET_T1_CFG);
  962. return 1;
  963. }
  964. static void hpet_rtc_timer_reinit(void)
  965. {
  966. unsigned int cfg, cnt;
  967. if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
  968. cfg = hpet_readl(HPET_T1_CFG);
  969. cfg &= ~HPET_TN_ENABLE;
  970. hpet_writel(cfg, HPET_T1_CFG);
  971. return;
  972. }
  973. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  974. hpet_rtc_int_freq = PIE_freq;
  975. else
  976. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  977. /* It is more accurate to use the comparator value than current count.*/
  978. cnt = hpet_t1_cmp;
  979. cnt += hpet_tick*HZ/hpet_rtc_int_freq;
  980. hpet_writel(cnt, HPET_T1_CMP);
  981. hpet_t1_cmp = cnt;
  982. }
  983. /*
  984. * The functions below are called from rtc driver.
  985. * Return 0 if HPET is not being used.
  986. * Otherwise do the necessary changes and return 1.
  987. */
  988. int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
  989. {
  990. if (!is_hpet_enabled())
  991. return 0;
  992. if (bit_mask & RTC_UIE)
  993. UIE_on = 0;
  994. if (bit_mask & RTC_PIE)
  995. PIE_on = 0;
  996. if (bit_mask & RTC_AIE)
  997. AIE_on = 0;
  998. return 1;
  999. }
  1000. int hpet_set_rtc_irq_bit(unsigned long bit_mask)
  1001. {
  1002. int timer_init_reqd = 0;
  1003. if (!is_hpet_enabled())
  1004. return 0;
  1005. if (!(PIE_on | AIE_on | UIE_on))
  1006. timer_init_reqd = 1;
  1007. if (bit_mask & RTC_UIE) {
  1008. UIE_on = 1;
  1009. }
  1010. if (bit_mask & RTC_PIE) {
  1011. PIE_on = 1;
  1012. PIE_count = 0;
  1013. }
  1014. if (bit_mask & RTC_AIE) {
  1015. AIE_on = 1;
  1016. }
  1017. if (timer_init_reqd)
  1018. hpet_rtc_timer_init();
  1019. return 1;
  1020. }
  1021. int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  1022. {
  1023. if (!is_hpet_enabled())
  1024. return 0;
  1025. alarm_time.tm_hour = hrs;
  1026. alarm_time.tm_min = min;
  1027. alarm_time.tm_sec = sec;
  1028. return 1;
  1029. }
  1030. int hpet_set_periodic_freq(unsigned long freq)
  1031. {
  1032. if (!is_hpet_enabled())
  1033. return 0;
  1034. PIE_freq = freq;
  1035. PIE_count = 0;
  1036. return 1;
  1037. }
  1038. int hpet_rtc_dropped_irq(void)
  1039. {
  1040. if (!is_hpet_enabled())
  1041. return 0;
  1042. return 1;
  1043. }
  1044. irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1045. {
  1046. struct rtc_time curr_time;
  1047. unsigned long rtc_int_flag = 0;
  1048. int call_rtc_interrupt = 0;
  1049. hpet_rtc_timer_reinit();
  1050. if (UIE_on | AIE_on) {
  1051. rtc_get_rtc_time(&curr_time);
  1052. }
  1053. if (UIE_on) {
  1054. if (curr_time.tm_sec != prev_update_sec) {
  1055. /* Set update int info, call real rtc int routine */
  1056. call_rtc_interrupt = 1;
  1057. rtc_int_flag = RTC_UF;
  1058. prev_update_sec = curr_time.tm_sec;
  1059. }
  1060. }
  1061. if (PIE_on) {
  1062. PIE_count++;
  1063. if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
  1064. /* Set periodic int info, call real rtc int routine */
  1065. call_rtc_interrupt = 1;
  1066. rtc_int_flag |= RTC_PF;
  1067. PIE_count = 0;
  1068. }
  1069. }
  1070. if (AIE_on) {
  1071. if ((curr_time.tm_sec == alarm_time.tm_sec) &&
  1072. (curr_time.tm_min == alarm_time.tm_min) &&
  1073. (curr_time.tm_hour == alarm_time.tm_hour)) {
  1074. /* Set alarm int info, call real rtc int routine */
  1075. call_rtc_interrupt = 1;
  1076. rtc_int_flag |= RTC_AF;
  1077. }
  1078. }
  1079. if (call_rtc_interrupt) {
  1080. rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
  1081. rtc_interrupt(rtc_int_flag, dev_id, regs);
  1082. }
  1083. return IRQ_HANDLED;
  1084. }
  1085. #endif
  1086. static int __init nohpet_setup(char *s)
  1087. {
  1088. nohpet = 1;
  1089. return 1;
  1090. }
  1091. __setup("nohpet", nohpet_setup);
  1092. int __init notsc_setup(char *s)
  1093. {
  1094. notsc = 1;
  1095. return 1;
  1096. }
  1097. __setup("notsc", notsc_setup);