setup.c 35 KB

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  1. /*
  2. * linux/arch/x86-64/kernel/setup.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. *
  6. * Nov 2001 Dave Jones <davej@suse.de>
  7. * Forked from i386 setup code.
  8. */
  9. /*
  10. * This file handles the architecture-dependent parts of initialization
  11. */
  12. #include <linux/errno.h>
  13. #include <linux/sched.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mm.h>
  16. #include <linux/stddef.h>
  17. #include <linux/unistd.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/slab.h>
  20. #include <linux/user.h>
  21. #include <linux/a.out.h>
  22. #include <linux/screen_info.h>
  23. #include <linux/ioport.h>
  24. #include <linux/delay.h>
  25. #include <linux/init.h>
  26. #include <linux/initrd.h>
  27. #include <linux/highmem.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/module.h>
  30. #include <asm/processor.h>
  31. #include <linux/console.h>
  32. #include <linux/seq_file.h>
  33. #include <linux/crash_dump.h>
  34. #include <linux/root_dev.h>
  35. #include <linux/pci.h>
  36. #include <linux/acpi.h>
  37. #include <linux/kallsyms.h>
  38. #include <linux/edd.h>
  39. #include <linux/mmzone.h>
  40. #include <linux/kexec.h>
  41. #include <linux/cpufreq.h>
  42. #include <linux/dmi.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/ctype.h>
  45. #include <asm/mtrr.h>
  46. #include <asm/uaccess.h>
  47. #include <asm/system.h>
  48. #include <asm/io.h>
  49. #include <asm/smp.h>
  50. #include <asm/msr.h>
  51. #include <asm/desc.h>
  52. #include <video/edid.h>
  53. #include <asm/e820.h>
  54. #include <asm/dma.h>
  55. #include <asm/mpspec.h>
  56. #include <asm/mmu_context.h>
  57. #include <asm/bootsetup.h>
  58. #include <asm/proto.h>
  59. #include <asm/setup.h>
  60. #include <asm/mach_apic.h>
  61. #include <asm/numa.h>
  62. #include <asm/sections.h>
  63. #include <asm/dmi.h>
  64. /*
  65. * Machine setup..
  66. */
  67. struct cpuinfo_x86 boot_cpu_data __read_mostly;
  68. EXPORT_SYMBOL(boot_cpu_data);
  69. unsigned long mmu_cr4_features;
  70. int acpi_disabled;
  71. EXPORT_SYMBOL(acpi_disabled);
  72. #ifdef CONFIG_ACPI
  73. extern int __initdata acpi_ht;
  74. extern acpi_interrupt_flags acpi_sci_flags;
  75. int __initdata acpi_force = 0;
  76. #endif
  77. int acpi_numa __initdata;
  78. /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  79. int bootloader_type;
  80. unsigned long saved_video_mode;
  81. /*
  82. * Early DMI memory
  83. */
  84. int dmi_alloc_index;
  85. char dmi_alloc_data[DMI_MAX_DATA];
  86. /*
  87. * Setup options
  88. */
  89. struct screen_info screen_info;
  90. EXPORT_SYMBOL(screen_info);
  91. struct sys_desc_table_struct {
  92. unsigned short length;
  93. unsigned char table[0];
  94. };
  95. struct edid_info edid_info;
  96. EXPORT_SYMBOL_GPL(edid_info);
  97. struct e820map e820;
  98. extern int root_mountflags;
  99. char command_line[COMMAND_LINE_SIZE];
  100. struct resource standard_io_resources[] = {
  101. { .name = "dma1", .start = 0x00, .end = 0x1f,
  102. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  103. { .name = "pic1", .start = 0x20, .end = 0x21,
  104. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  105. { .name = "timer0", .start = 0x40, .end = 0x43,
  106. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  107. { .name = "timer1", .start = 0x50, .end = 0x53,
  108. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  109. { .name = "keyboard", .start = 0x60, .end = 0x6f,
  110. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  111. { .name = "dma page reg", .start = 0x80, .end = 0x8f,
  112. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  113. { .name = "pic2", .start = 0xa0, .end = 0xa1,
  114. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  115. { .name = "dma2", .start = 0xc0, .end = 0xdf,
  116. .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  117. { .name = "fpu", .start = 0xf0, .end = 0xff,
  118. .flags = IORESOURCE_BUSY | IORESOURCE_IO }
  119. };
  120. #define STANDARD_IO_RESOURCES \
  121. (sizeof standard_io_resources / sizeof standard_io_resources[0])
  122. #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
  123. struct resource data_resource = {
  124. .name = "Kernel data",
  125. .start = 0,
  126. .end = 0,
  127. .flags = IORESOURCE_RAM,
  128. };
  129. struct resource code_resource = {
  130. .name = "Kernel code",
  131. .start = 0,
  132. .end = 0,
  133. .flags = IORESOURCE_RAM,
  134. };
  135. #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
  136. static struct resource system_rom_resource = {
  137. .name = "System ROM",
  138. .start = 0xf0000,
  139. .end = 0xfffff,
  140. .flags = IORESOURCE_ROM,
  141. };
  142. static struct resource extension_rom_resource = {
  143. .name = "Extension ROM",
  144. .start = 0xe0000,
  145. .end = 0xeffff,
  146. .flags = IORESOURCE_ROM,
  147. };
  148. static struct resource adapter_rom_resources[] = {
  149. { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
  150. .flags = IORESOURCE_ROM },
  151. { .name = "Adapter ROM", .start = 0, .end = 0,
  152. .flags = IORESOURCE_ROM },
  153. { .name = "Adapter ROM", .start = 0, .end = 0,
  154. .flags = IORESOURCE_ROM },
  155. { .name = "Adapter ROM", .start = 0, .end = 0,
  156. .flags = IORESOURCE_ROM },
  157. { .name = "Adapter ROM", .start = 0, .end = 0,
  158. .flags = IORESOURCE_ROM },
  159. { .name = "Adapter ROM", .start = 0, .end = 0,
  160. .flags = IORESOURCE_ROM }
  161. };
  162. #define ADAPTER_ROM_RESOURCES \
  163. (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
  164. static struct resource video_rom_resource = {
  165. .name = "Video ROM",
  166. .start = 0xc0000,
  167. .end = 0xc7fff,
  168. .flags = IORESOURCE_ROM,
  169. };
  170. static struct resource video_ram_resource = {
  171. .name = "Video RAM area",
  172. .start = 0xa0000,
  173. .end = 0xbffff,
  174. .flags = IORESOURCE_RAM,
  175. };
  176. #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
  177. static int __init romchecksum(unsigned char *rom, unsigned long length)
  178. {
  179. unsigned char *p, sum = 0;
  180. for (p = rom; p < rom + length; p++)
  181. sum += *p;
  182. return sum == 0;
  183. }
  184. static void __init probe_roms(void)
  185. {
  186. unsigned long start, length, upper;
  187. unsigned char *rom;
  188. int i;
  189. /* video rom */
  190. upper = adapter_rom_resources[0].start;
  191. for (start = video_rom_resource.start; start < upper; start += 2048) {
  192. rom = isa_bus_to_virt(start);
  193. if (!romsignature(rom))
  194. continue;
  195. video_rom_resource.start = start;
  196. /* 0 < length <= 0x7f * 512, historically */
  197. length = rom[2] * 512;
  198. /* if checksum okay, trust length byte */
  199. if (length && romchecksum(rom, length))
  200. video_rom_resource.end = start + length - 1;
  201. request_resource(&iomem_resource, &video_rom_resource);
  202. break;
  203. }
  204. start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
  205. if (start < upper)
  206. start = upper;
  207. /* system rom */
  208. request_resource(&iomem_resource, &system_rom_resource);
  209. upper = system_rom_resource.start;
  210. /* check for extension rom (ignore length byte!) */
  211. rom = isa_bus_to_virt(extension_rom_resource.start);
  212. if (romsignature(rom)) {
  213. length = extension_rom_resource.end - extension_rom_resource.start + 1;
  214. if (romchecksum(rom, length)) {
  215. request_resource(&iomem_resource, &extension_rom_resource);
  216. upper = extension_rom_resource.start;
  217. }
  218. }
  219. /* check for adapter roms on 2k boundaries */
  220. for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
  221. rom = isa_bus_to_virt(start);
  222. if (!romsignature(rom))
  223. continue;
  224. /* 0 < length <= 0x7f * 512, historically */
  225. length = rom[2] * 512;
  226. /* but accept any length that fits if checksum okay */
  227. if (!length || start + length > upper || !romchecksum(rom, length))
  228. continue;
  229. adapter_rom_resources[i].start = start;
  230. adapter_rom_resources[i].end = start + length - 1;
  231. request_resource(&iomem_resource, &adapter_rom_resources[i]);
  232. start = adapter_rom_resources[i++].end & ~2047UL;
  233. }
  234. }
  235. /* Check for full argument with no trailing characters */
  236. static int fullarg(char *p, char *arg)
  237. {
  238. int l = strlen(arg);
  239. return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
  240. }
  241. static __init void parse_cmdline_early (char ** cmdline_p)
  242. {
  243. char c = ' ', *to = command_line, *from = COMMAND_LINE;
  244. int len = 0;
  245. int userdef = 0;
  246. for (;;) {
  247. if (c != ' ')
  248. goto next_char;
  249. #ifdef CONFIG_SMP
  250. /*
  251. * If the BIOS enumerates physical processors before logical,
  252. * maxcpus=N at enumeration-time can be used to disable HT.
  253. */
  254. else if (!memcmp(from, "maxcpus=", 8)) {
  255. extern unsigned int maxcpus;
  256. maxcpus = simple_strtoul(from + 8, NULL, 0);
  257. }
  258. #endif
  259. #ifdef CONFIG_ACPI
  260. /* "acpi=off" disables both ACPI table parsing and interpreter init */
  261. if (fullarg(from,"acpi=off"))
  262. disable_acpi();
  263. if (fullarg(from, "acpi=force")) {
  264. /* add later when we do DMI horrors: */
  265. acpi_force = 1;
  266. acpi_disabled = 0;
  267. }
  268. /* acpi=ht just means: do ACPI MADT parsing
  269. at bootup, but don't enable the full ACPI interpreter */
  270. if (fullarg(from, "acpi=ht")) {
  271. if (!acpi_force)
  272. disable_acpi();
  273. acpi_ht = 1;
  274. }
  275. else if (fullarg(from, "pci=noacpi"))
  276. acpi_disable_pci();
  277. else if (fullarg(from, "acpi=noirq"))
  278. acpi_noirq_set();
  279. else if (fullarg(from, "acpi_sci=edge"))
  280. acpi_sci_flags.trigger = 1;
  281. else if (fullarg(from, "acpi_sci=level"))
  282. acpi_sci_flags.trigger = 3;
  283. else if (fullarg(from, "acpi_sci=high"))
  284. acpi_sci_flags.polarity = 1;
  285. else if (fullarg(from, "acpi_sci=low"))
  286. acpi_sci_flags.polarity = 3;
  287. /* acpi=strict disables out-of-spec workarounds */
  288. else if (fullarg(from, "acpi=strict")) {
  289. acpi_strict = 1;
  290. }
  291. #ifdef CONFIG_X86_IO_APIC
  292. else if (fullarg(from, "acpi_skip_timer_override"))
  293. acpi_skip_timer_override = 1;
  294. #endif
  295. #endif
  296. if (fullarg(from, "disable_timer_pin_1"))
  297. disable_timer_pin_1 = 1;
  298. if (fullarg(from, "enable_timer_pin_1"))
  299. disable_timer_pin_1 = -1;
  300. if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
  301. clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
  302. disable_apic = 1;
  303. }
  304. if (fullarg(from, "noapic"))
  305. skip_ioapic_setup = 1;
  306. if (fullarg(from,"apic")) {
  307. skip_ioapic_setup = 0;
  308. ioapic_force = 1;
  309. }
  310. if (!memcmp(from, "mem=", 4))
  311. parse_memopt(from+4, &from);
  312. if (!memcmp(from, "memmap=", 7)) {
  313. /* exactmap option is for used defined memory */
  314. if (!memcmp(from+7, "exactmap", 8)) {
  315. #ifdef CONFIG_CRASH_DUMP
  316. /* If we are doing a crash dump, we
  317. * still need to know the real mem
  318. * size before original memory map is
  319. * reset.
  320. */
  321. saved_max_pfn = e820_end_of_ram();
  322. #endif
  323. from += 8+7;
  324. end_pfn_map = 0;
  325. e820.nr_map = 0;
  326. userdef = 1;
  327. }
  328. else {
  329. parse_memmapopt(from+7, &from);
  330. userdef = 1;
  331. }
  332. }
  333. #ifdef CONFIG_NUMA
  334. if (!memcmp(from, "numa=", 5))
  335. numa_setup(from+5);
  336. #endif
  337. if (!memcmp(from,"iommu=",6)) {
  338. iommu_setup(from+6);
  339. }
  340. if (fullarg(from,"oops=panic"))
  341. panic_on_oops = 1;
  342. if (!memcmp(from, "noexec=", 7))
  343. nonx_setup(from + 7);
  344. #ifdef CONFIG_KEXEC
  345. /* crashkernel=size@addr specifies the location to reserve for
  346. * a crash kernel. By reserving this memory we guarantee
  347. * that linux never set's it up as a DMA target.
  348. * Useful for holding code to do something appropriate
  349. * after a kernel panic.
  350. */
  351. else if (!memcmp(from, "crashkernel=", 12)) {
  352. unsigned long size, base;
  353. size = memparse(from+12, &from);
  354. if (*from == '@') {
  355. base = memparse(from+1, &from);
  356. /* FIXME: Do I want a sanity check
  357. * to validate the memory range?
  358. */
  359. crashk_res.start = base;
  360. crashk_res.end = base + size - 1;
  361. }
  362. }
  363. #endif
  364. #ifdef CONFIG_PROC_VMCORE
  365. /* elfcorehdr= specifies the location of elf core header
  366. * stored by the crashed kernel. This option will be passed
  367. * by kexec loader to the capture kernel.
  368. */
  369. else if(!memcmp(from, "elfcorehdr=", 11))
  370. elfcorehdr_addr = memparse(from+11, &from);
  371. #endif
  372. #ifdef CONFIG_HOTPLUG_CPU
  373. else if (!memcmp(from, "additional_cpus=", 16))
  374. setup_additional_cpus(from+16);
  375. #endif
  376. next_char:
  377. c = *(from++);
  378. if (!c)
  379. break;
  380. if (COMMAND_LINE_SIZE <= ++len)
  381. break;
  382. *(to++) = c;
  383. }
  384. if (userdef) {
  385. printk(KERN_INFO "user-defined physical RAM map:\n");
  386. e820_print_map("user");
  387. }
  388. *to = '\0';
  389. *cmdline_p = command_line;
  390. }
  391. #ifndef CONFIG_NUMA
  392. static void __init
  393. contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
  394. {
  395. unsigned long bootmap_size, bootmap;
  396. bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
  397. bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
  398. if (bootmap == -1L)
  399. panic("Cannot find bootmem map of size %ld\n",bootmap_size);
  400. bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
  401. e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
  402. reserve_bootmem(bootmap, bootmap_size);
  403. }
  404. #endif
  405. #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
  406. struct edd edd;
  407. #ifdef CONFIG_EDD_MODULE
  408. EXPORT_SYMBOL(edd);
  409. #endif
  410. /**
  411. * copy_edd() - Copy the BIOS EDD information
  412. * from boot_params into a safe place.
  413. *
  414. */
  415. static inline void copy_edd(void)
  416. {
  417. memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
  418. memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
  419. edd.mbr_signature_nr = EDD_MBR_SIG_NR;
  420. edd.edd_info_nr = EDD_NR;
  421. }
  422. #else
  423. static inline void copy_edd(void)
  424. {
  425. }
  426. #endif
  427. #define EBDA_ADDR_POINTER 0x40E
  428. unsigned __initdata ebda_addr;
  429. unsigned __initdata ebda_size;
  430. static void discover_ebda(void)
  431. {
  432. /*
  433. * there is a real-mode segmented pointer pointing to the
  434. * 4K EBDA area at 0x40E
  435. */
  436. ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
  437. ebda_addr <<= 4;
  438. ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
  439. /* Round EBDA up to pages */
  440. if (ebda_size == 0)
  441. ebda_size = 1;
  442. ebda_size <<= 10;
  443. ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
  444. if (ebda_size > 64*1024)
  445. ebda_size = 64*1024;
  446. }
  447. void __init setup_arch(char **cmdline_p)
  448. {
  449. ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
  450. screen_info = SCREEN_INFO;
  451. edid_info = EDID_INFO;
  452. saved_video_mode = SAVED_VIDEO_MODE;
  453. bootloader_type = LOADER_TYPE;
  454. #ifdef CONFIG_BLK_DEV_RAM
  455. rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
  456. rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
  457. rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
  458. #endif
  459. setup_memory_region();
  460. copy_edd();
  461. if (!MOUNT_ROOT_RDONLY)
  462. root_mountflags &= ~MS_RDONLY;
  463. init_mm.start_code = (unsigned long) &_text;
  464. init_mm.end_code = (unsigned long) &_etext;
  465. init_mm.end_data = (unsigned long) &_edata;
  466. init_mm.brk = (unsigned long) &_end;
  467. code_resource.start = virt_to_phys(&_text);
  468. code_resource.end = virt_to_phys(&_etext)-1;
  469. data_resource.start = virt_to_phys(&_etext);
  470. data_resource.end = virt_to_phys(&_edata)-1;
  471. parse_cmdline_early(cmdline_p);
  472. early_identify_cpu(&boot_cpu_data);
  473. /*
  474. * partially used pages are not usable - thus
  475. * we are rounding upwards:
  476. */
  477. end_pfn = e820_end_of_ram();
  478. num_physpages = end_pfn; /* for pfn_valid */
  479. check_efer();
  480. discover_ebda();
  481. init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
  482. dmi_scan_machine();
  483. zap_low_mappings(0);
  484. #ifdef CONFIG_ACPI
  485. /*
  486. * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
  487. * Call this early for SRAT node setup.
  488. */
  489. acpi_boot_table_init();
  490. #endif
  491. #ifdef CONFIG_ACPI_NUMA
  492. /*
  493. * Parse SRAT to discover nodes.
  494. */
  495. acpi_numa_init();
  496. #endif
  497. #ifdef CONFIG_NUMA
  498. numa_initmem_init(0, end_pfn);
  499. #else
  500. contig_initmem_init(0, end_pfn);
  501. #endif
  502. /* Reserve direct mapping */
  503. reserve_bootmem_generic(table_start << PAGE_SHIFT,
  504. (table_end - table_start) << PAGE_SHIFT);
  505. /* reserve kernel */
  506. reserve_bootmem_generic(__pa_symbol(&_text),
  507. __pa_symbol(&_end) - __pa_symbol(&_text));
  508. /*
  509. * reserve physical page 0 - it's a special BIOS page on many boxes,
  510. * enabling clean reboots, SMP operation, laptop functions.
  511. */
  512. reserve_bootmem_generic(0, PAGE_SIZE);
  513. /* reserve ebda region */
  514. if (ebda_addr)
  515. reserve_bootmem_generic(ebda_addr, ebda_size);
  516. #ifdef CONFIG_SMP
  517. /*
  518. * But first pinch a few for the stack/trampoline stuff
  519. * FIXME: Don't need the extra page at 4K, but need to fix
  520. * trampoline before removing it. (see the GDT stuff)
  521. */
  522. reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
  523. /* Reserve SMP trampoline */
  524. reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
  525. #endif
  526. #ifdef CONFIG_ACPI_SLEEP
  527. /*
  528. * Reserve low memory region for sleep support.
  529. */
  530. acpi_reserve_bootmem();
  531. #endif
  532. #ifdef CONFIG_X86_LOCAL_APIC
  533. /*
  534. * Find and reserve possible boot-time SMP configuration:
  535. */
  536. find_smp_config();
  537. #endif
  538. #ifdef CONFIG_BLK_DEV_INITRD
  539. if (LOADER_TYPE && INITRD_START) {
  540. if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
  541. reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
  542. initrd_start =
  543. INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
  544. initrd_end = initrd_start+INITRD_SIZE;
  545. }
  546. else {
  547. printk(KERN_ERR "initrd extends beyond end of memory "
  548. "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
  549. (unsigned long)(INITRD_START + INITRD_SIZE),
  550. (unsigned long)(end_pfn << PAGE_SHIFT));
  551. initrd_start = 0;
  552. }
  553. }
  554. #endif
  555. #ifdef CONFIG_KEXEC
  556. if (crashk_res.start != crashk_res.end) {
  557. reserve_bootmem_generic(crashk_res.start,
  558. crashk_res.end - crashk_res.start + 1);
  559. }
  560. #endif
  561. paging_init();
  562. check_ioapic();
  563. /*
  564. * set this early, so we dont allocate cpu0
  565. * if MADT list doesnt list BSP first
  566. * mpparse.c/MP_processor_info() allocates logical cpu numbers.
  567. */
  568. cpu_set(0, cpu_present_map);
  569. #ifdef CONFIG_ACPI
  570. /*
  571. * Read APIC and some other early information from ACPI tables.
  572. */
  573. acpi_boot_init();
  574. #endif
  575. init_cpu_to_node();
  576. #ifdef CONFIG_X86_LOCAL_APIC
  577. /*
  578. * get boot-time SMP configuration:
  579. */
  580. if (smp_found_config)
  581. get_smp_config();
  582. init_apic_mappings();
  583. #endif
  584. /*
  585. * Request address space for all standard RAM and ROM resources
  586. * and also for regions reported as reserved by the e820.
  587. */
  588. probe_roms();
  589. e820_reserve_resources();
  590. request_resource(&iomem_resource, &video_ram_resource);
  591. {
  592. unsigned i;
  593. /* request I/O space for devices used on all i[345]86 PCs */
  594. for (i = 0; i < STANDARD_IO_RESOURCES; i++)
  595. request_resource(&ioport_resource, &standard_io_resources[i]);
  596. }
  597. e820_setup_gap();
  598. #ifdef CONFIG_VT
  599. #if defined(CONFIG_VGA_CONSOLE)
  600. conswitchp = &vga_con;
  601. #elif defined(CONFIG_DUMMY_CONSOLE)
  602. conswitchp = &dummy_con;
  603. #endif
  604. #endif
  605. }
  606. static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
  607. {
  608. unsigned int *v;
  609. if (c->extended_cpuid_level < 0x80000004)
  610. return 0;
  611. v = (unsigned int *) c->x86_model_id;
  612. cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
  613. cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
  614. cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
  615. c->x86_model_id[48] = 0;
  616. return 1;
  617. }
  618. static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
  619. {
  620. unsigned int n, dummy, eax, ebx, ecx, edx;
  621. n = c->extended_cpuid_level;
  622. if (n >= 0x80000005) {
  623. cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
  624. printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
  625. edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
  626. c->x86_cache_size=(ecx>>24)+(edx>>24);
  627. /* On K8 L1 TLB is inclusive, so don't count it */
  628. c->x86_tlbsize = 0;
  629. }
  630. if (n >= 0x80000006) {
  631. cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
  632. ecx = cpuid_ecx(0x80000006);
  633. c->x86_cache_size = ecx >> 16;
  634. c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
  635. printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
  636. c->x86_cache_size, ecx & 0xFF);
  637. }
  638. if (n >= 0x80000007)
  639. cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
  640. if (n >= 0x80000008) {
  641. cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
  642. c->x86_virt_bits = (eax >> 8) & 0xff;
  643. c->x86_phys_bits = eax & 0xff;
  644. }
  645. }
  646. #ifdef CONFIG_NUMA
  647. static int nearby_node(int apicid)
  648. {
  649. int i;
  650. for (i = apicid - 1; i >= 0; i--) {
  651. int node = apicid_to_node[i];
  652. if (node != NUMA_NO_NODE && node_online(node))
  653. return node;
  654. }
  655. for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
  656. int node = apicid_to_node[i];
  657. if (node != NUMA_NO_NODE && node_online(node))
  658. return node;
  659. }
  660. return first_node(node_online_map); /* Shouldn't happen */
  661. }
  662. #endif
  663. /*
  664. * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
  665. * Assumes number of cores is a power of two.
  666. */
  667. static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
  668. {
  669. #ifdef CONFIG_SMP
  670. unsigned bits;
  671. #ifdef CONFIG_NUMA
  672. int cpu = smp_processor_id();
  673. int node = 0;
  674. unsigned apicid = hard_smp_processor_id();
  675. #endif
  676. unsigned ecx = cpuid_ecx(0x80000008);
  677. c->x86_max_cores = (ecx & 0xff) + 1;
  678. /* CPU telling us the core id bits shift? */
  679. bits = (ecx >> 12) & 0xF;
  680. /* Otherwise recompute */
  681. if (bits == 0) {
  682. while ((1 << bits) < c->x86_max_cores)
  683. bits++;
  684. }
  685. /* Low order bits define the core id (index of core in socket) */
  686. c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
  687. /* Convert the APIC ID into the socket ID */
  688. c->phys_proc_id = phys_pkg_id(bits);
  689. #ifdef CONFIG_NUMA
  690. node = c->phys_proc_id;
  691. if (apicid_to_node[apicid] != NUMA_NO_NODE)
  692. node = apicid_to_node[apicid];
  693. if (!node_online(node)) {
  694. /* Two possibilities here:
  695. - The CPU is missing memory and no node was created.
  696. In that case try picking one from a nearby CPU
  697. - The APIC IDs differ from the HyperTransport node IDs
  698. which the K8 northbridge parsing fills in.
  699. Assume they are all increased by a constant offset,
  700. but in the same order as the HT nodeids.
  701. If that doesn't result in a usable node fall back to the
  702. path for the previous case. */
  703. int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
  704. if (ht_nodeid >= 0 &&
  705. apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
  706. node = apicid_to_node[ht_nodeid];
  707. /* Pick a nearby node */
  708. if (!node_online(node))
  709. node = nearby_node(apicid);
  710. }
  711. numa_set_node(cpu, node);
  712. printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
  713. #endif
  714. #endif
  715. }
  716. static void __init init_amd(struct cpuinfo_x86 *c)
  717. {
  718. unsigned level;
  719. #ifdef CONFIG_SMP
  720. unsigned long value;
  721. /*
  722. * Disable TLB flush filter by setting HWCR.FFDIS on K8
  723. * bit 6 of msr C001_0015
  724. *
  725. * Errata 63 for SH-B3 steppings
  726. * Errata 122 for all steppings (F+ have it disabled by default)
  727. */
  728. if (c->x86 == 15) {
  729. rdmsrl(MSR_K8_HWCR, value);
  730. value |= 1 << 6;
  731. wrmsrl(MSR_K8_HWCR, value);
  732. }
  733. #endif
  734. /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
  735. 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
  736. clear_bit(0*32+31, &c->x86_capability);
  737. /* On C+ stepping K8 rep microcode works well for copy/memset */
  738. level = cpuid_eax(1);
  739. if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
  740. set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
  741. /* Enable workaround for FXSAVE leak */
  742. if (c->x86 >= 6)
  743. set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
  744. level = get_model_name(c);
  745. if (!level) {
  746. switch (c->x86) {
  747. case 15:
  748. /* Should distinguish Models here, but this is only
  749. a fallback anyways. */
  750. strcpy(c->x86_model_id, "Hammer");
  751. break;
  752. }
  753. }
  754. display_cacheinfo(c);
  755. /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
  756. if (c->x86_power & (1<<8))
  757. set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
  758. /* Multi core CPU? */
  759. if (c->extended_cpuid_level >= 0x80000008)
  760. amd_detect_cmp(c);
  761. /* Fix cpuid4 emulation for more */
  762. num_cache_leaves = 3;
  763. }
  764. static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
  765. {
  766. #ifdef CONFIG_SMP
  767. u32 eax, ebx, ecx, edx;
  768. int index_msb, core_bits;
  769. cpuid(1, &eax, &ebx, &ecx, &edx);
  770. if (!cpu_has(c, X86_FEATURE_HT))
  771. return;
  772. if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
  773. goto out;
  774. smp_num_siblings = (ebx & 0xff0000) >> 16;
  775. if (smp_num_siblings == 1) {
  776. printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
  777. } else if (smp_num_siblings > 1 ) {
  778. if (smp_num_siblings > NR_CPUS) {
  779. printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
  780. smp_num_siblings = 1;
  781. return;
  782. }
  783. index_msb = get_count_order(smp_num_siblings);
  784. c->phys_proc_id = phys_pkg_id(index_msb);
  785. smp_num_siblings = smp_num_siblings / c->x86_max_cores;
  786. index_msb = get_count_order(smp_num_siblings) ;
  787. core_bits = get_count_order(c->x86_max_cores);
  788. c->cpu_core_id = phys_pkg_id(index_msb) &
  789. ((1 << core_bits) - 1);
  790. }
  791. out:
  792. if ((c->x86_max_cores * smp_num_siblings) > 1) {
  793. printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
  794. printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
  795. }
  796. #endif
  797. }
  798. /*
  799. * find out the number of processor cores on the die
  800. */
  801. static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
  802. {
  803. unsigned int eax, t;
  804. if (c->cpuid_level < 4)
  805. return 1;
  806. cpuid_count(4, 0, &eax, &t, &t, &t);
  807. if (eax & 0x1f)
  808. return ((eax >> 26) + 1);
  809. else
  810. return 1;
  811. }
  812. static void srat_detect_node(void)
  813. {
  814. #ifdef CONFIG_NUMA
  815. unsigned node;
  816. int cpu = smp_processor_id();
  817. int apicid = hard_smp_processor_id();
  818. /* Don't do the funky fallback heuristics the AMD version employs
  819. for now. */
  820. node = apicid_to_node[apicid];
  821. if (node == NUMA_NO_NODE)
  822. node = first_node(node_online_map);
  823. numa_set_node(cpu, node);
  824. if (acpi_numa > 0)
  825. printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
  826. #endif
  827. }
  828. static void __cpuinit init_intel(struct cpuinfo_x86 *c)
  829. {
  830. /* Cache sizes */
  831. unsigned n;
  832. init_intel_cacheinfo(c);
  833. if (c->cpuid_level > 9 ) {
  834. unsigned eax = cpuid_eax(10);
  835. /* Check for version and the number of counters */
  836. if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
  837. set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
  838. }
  839. n = c->extended_cpuid_level;
  840. if (n >= 0x80000008) {
  841. unsigned eax = cpuid_eax(0x80000008);
  842. c->x86_virt_bits = (eax >> 8) & 0xff;
  843. c->x86_phys_bits = eax & 0xff;
  844. /* CPUID workaround for Intel 0F34 CPU */
  845. if (c->x86_vendor == X86_VENDOR_INTEL &&
  846. c->x86 == 0xF && c->x86_model == 0x3 &&
  847. c->x86_mask == 0x4)
  848. c->x86_phys_bits = 36;
  849. }
  850. if (c->x86 == 15)
  851. c->x86_cache_alignment = c->x86_clflush_size * 2;
  852. if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
  853. (c->x86 == 0x6 && c->x86_model >= 0x0e))
  854. set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
  855. set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
  856. c->x86_max_cores = intel_num_cpu_cores(c);
  857. srat_detect_node();
  858. }
  859. static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
  860. {
  861. char *v = c->x86_vendor_id;
  862. if (!strcmp(v, "AuthenticAMD"))
  863. c->x86_vendor = X86_VENDOR_AMD;
  864. else if (!strcmp(v, "GenuineIntel"))
  865. c->x86_vendor = X86_VENDOR_INTEL;
  866. else
  867. c->x86_vendor = X86_VENDOR_UNKNOWN;
  868. }
  869. struct cpu_model_info {
  870. int vendor;
  871. int family;
  872. char *model_names[16];
  873. };
  874. /* Do some early cpuid on the boot CPU to get some parameter that are
  875. needed before check_bugs. Everything advanced is in identify_cpu
  876. below. */
  877. void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
  878. {
  879. u32 tfms;
  880. c->loops_per_jiffy = loops_per_jiffy;
  881. c->x86_cache_size = -1;
  882. c->x86_vendor = X86_VENDOR_UNKNOWN;
  883. c->x86_model = c->x86_mask = 0; /* So far unknown... */
  884. c->x86_vendor_id[0] = '\0'; /* Unset */
  885. c->x86_model_id[0] = '\0'; /* Unset */
  886. c->x86_clflush_size = 64;
  887. c->x86_cache_alignment = c->x86_clflush_size;
  888. c->x86_max_cores = 1;
  889. c->extended_cpuid_level = 0;
  890. memset(&c->x86_capability, 0, sizeof c->x86_capability);
  891. /* Get vendor name */
  892. cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
  893. (unsigned int *)&c->x86_vendor_id[0],
  894. (unsigned int *)&c->x86_vendor_id[8],
  895. (unsigned int *)&c->x86_vendor_id[4]);
  896. get_cpu_vendor(c);
  897. /* Initialize the standard set of capabilities */
  898. /* Note that the vendor-specific code below might override */
  899. /* Intel-defined flags: level 0x00000001 */
  900. if (c->cpuid_level >= 0x00000001) {
  901. __u32 misc;
  902. cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
  903. &c->x86_capability[0]);
  904. c->x86 = (tfms >> 8) & 0xf;
  905. c->x86_model = (tfms >> 4) & 0xf;
  906. c->x86_mask = tfms & 0xf;
  907. if (c->x86 == 0xf)
  908. c->x86 += (tfms >> 20) & 0xff;
  909. if (c->x86 >= 0x6)
  910. c->x86_model += ((tfms >> 16) & 0xF) << 4;
  911. if (c->x86_capability[0] & (1<<19))
  912. c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
  913. } else {
  914. /* Have CPUID level 0 only - unheard of */
  915. c->x86 = 4;
  916. }
  917. #ifdef CONFIG_SMP
  918. c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
  919. #endif
  920. }
  921. /*
  922. * This does the hard work of actually picking apart the CPU stuff...
  923. */
  924. void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
  925. {
  926. int i;
  927. u32 xlvl;
  928. early_identify_cpu(c);
  929. /* AMD-defined flags: level 0x80000001 */
  930. xlvl = cpuid_eax(0x80000000);
  931. c->extended_cpuid_level = xlvl;
  932. if ((xlvl & 0xffff0000) == 0x80000000) {
  933. if (xlvl >= 0x80000001) {
  934. c->x86_capability[1] = cpuid_edx(0x80000001);
  935. c->x86_capability[6] = cpuid_ecx(0x80000001);
  936. }
  937. if (xlvl >= 0x80000004)
  938. get_model_name(c); /* Default name */
  939. }
  940. /* Transmeta-defined flags: level 0x80860001 */
  941. xlvl = cpuid_eax(0x80860000);
  942. if ((xlvl & 0xffff0000) == 0x80860000) {
  943. /* Don't set x86_cpuid_level here for now to not confuse. */
  944. if (xlvl >= 0x80860001)
  945. c->x86_capability[2] = cpuid_edx(0x80860001);
  946. }
  947. c->apicid = phys_pkg_id(0);
  948. /*
  949. * Vendor-specific initialization. In this section we
  950. * canonicalize the feature flags, meaning if there are
  951. * features a certain CPU supports which CPUID doesn't
  952. * tell us, CPUID claiming incorrect flags, or other bugs,
  953. * we handle them here.
  954. *
  955. * At the end of this section, c->x86_capability better
  956. * indicate the features this CPU genuinely supports!
  957. */
  958. switch (c->x86_vendor) {
  959. case X86_VENDOR_AMD:
  960. init_amd(c);
  961. break;
  962. case X86_VENDOR_INTEL:
  963. init_intel(c);
  964. break;
  965. case X86_VENDOR_UNKNOWN:
  966. default:
  967. display_cacheinfo(c);
  968. break;
  969. }
  970. select_idle_routine(c);
  971. detect_ht(c);
  972. /*
  973. * On SMP, boot_cpu_data holds the common feature set between
  974. * all CPUs; so make sure that we indicate which features are
  975. * common between the CPUs. The first time this routine gets
  976. * executed, c == &boot_cpu_data.
  977. */
  978. if (c != &boot_cpu_data) {
  979. /* AND the already accumulated flags with these */
  980. for (i = 0 ; i < NCAPINTS ; i++)
  981. boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
  982. }
  983. #ifdef CONFIG_X86_MCE
  984. mcheck_init(c);
  985. #endif
  986. if (c == &boot_cpu_data)
  987. mtrr_bp_init();
  988. else
  989. mtrr_ap_init();
  990. #ifdef CONFIG_NUMA
  991. numa_add_cpu(smp_processor_id());
  992. #endif
  993. }
  994. void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
  995. {
  996. if (c->x86_model_id[0])
  997. printk("%s", c->x86_model_id);
  998. if (c->x86_mask || c->cpuid_level >= 0)
  999. printk(" stepping %02x\n", c->x86_mask);
  1000. else
  1001. printk("\n");
  1002. }
  1003. /*
  1004. * Get CPU information for use by the procfs.
  1005. */
  1006. static int show_cpuinfo(struct seq_file *m, void *v)
  1007. {
  1008. struct cpuinfo_x86 *c = v;
  1009. /*
  1010. * These flag bits must match the definitions in <asm/cpufeature.h>.
  1011. * NULL means this bit is undefined or reserved; either way it doesn't
  1012. * have meaning as far as Linux is concerned. Note that it's important
  1013. * to realize there is a difference between this table and CPUID -- if
  1014. * applications want to get the raw CPUID data, they should access
  1015. * /dev/cpu/<cpu_nr>/cpuid instead.
  1016. */
  1017. static char *x86_cap_flags[] = {
  1018. /* Intel-defined */
  1019. "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
  1020. "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
  1021. "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
  1022. "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
  1023. /* AMD-defined */
  1024. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1025. NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
  1026. NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
  1027. NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
  1028. /* Transmeta-defined */
  1029. "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
  1030. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1031. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1032. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1033. /* Other (Linux-defined) */
  1034. "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
  1035. "constant_tsc", NULL, NULL,
  1036. "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1037. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1038. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1039. /* Intel-defined (#2) */
  1040. "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
  1041. "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
  1042. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1043. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1044. /* VIA/Cyrix/Centaur-defined */
  1045. NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
  1046. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1047. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1048. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1049. /* AMD-defined (#2) */
  1050. "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
  1051. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1052. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1053. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  1054. };
  1055. static char *x86_power_flags[] = {
  1056. "ts", /* temperature sensor */
  1057. "fid", /* frequency id control */
  1058. "vid", /* voltage id control */
  1059. "ttp", /* thermal trip */
  1060. "tm",
  1061. "stc",
  1062. NULL,
  1063. /* nothing */ /* constant_tsc - moved to flags */
  1064. };
  1065. #ifdef CONFIG_SMP
  1066. if (!cpu_online(c-cpu_data))
  1067. return 0;
  1068. #endif
  1069. seq_printf(m,"processor\t: %u\n"
  1070. "vendor_id\t: %s\n"
  1071. "cpu family\t: %d\n"
  1072. "model\t\t: %d\n"
  1073. "model name\t: %s\n",
  1074. (unsigned)(c-cpu_data),
  1075. c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
  1076. c->x86,
  1077. (int)c->x86_model,
  1078. c->x86_model_id[0] ? c->x86_model_id : "unknown");
  1079. if (c->x86_mask || c->cpuid_level >= 0)
  1080. seq_printf(m, "stepping\t: %d\n", c->x86_mask);
  1081. else
  1082. seq_printf(m, "stepping\t: unknown\n");
  1083. if (cpu_has(c,X86_FEATURE_TSC)) {
  1084. unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
  1085. if (!freq)
  1086. freq = cpu_khz;
  1087. seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
  1088. freq / 1000, (freq % 1000));
  1089. }
  1090. /* Cache size */
  1091. if (c->x86_cache_size >= 0)
  1092. seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
  1093. #ifdef CONFIG_SMP
  1094. if (smp_num_siblings * c->x86_max_cores > 1) {
  1095. int cpu = c - cpu_data;
  1096. seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
  1097. seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
  1098. seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
  1099. seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
  1100. }
  1101. #endif
  1102. seq_printf(m,
  1103. "fpu\t\t: yes\n"
  1104. "fpu_exception\t: yes\n"
  1105. "cpuid level\t: %d\n"
  1106. "wp\t\t: yes\n"
  1107. "flags\t\t:",
  1108. c->cpuid_level);
  1109. {
  1110. int i;
  1111. for ( i = 0 ; i < 32*NCAPINTS ; i++ )
  1112. if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
  1113. seq_printf(m, " %s", x86_cap_flags[i]);
  1114. }
  1115. seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
  1116. c->loops_per_jiffy/(500000/HZ),
  1117. (c->loops_per_jiffy/(5000/HZ)) % 100);
  1118. if (c->x86_tlbsize > 0)
  1119. seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
  1120. seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
  1121. seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
  1122. seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
  1123. c->x86_phys_bits, c->x86_virt_bits);
  1124. seq_printf(m, "power management:");
  1125. {
  1126. unsigned i;
  1127. for (i = 0; i < 32; i++)
  1128. if (c->x86_power & (1 << i)) {
  1129. if (i < ARRAY_SIZE(x86_power_flags) &&
  1130. x86_power_flags[i])
  1131. seq_printf(m, "%s%s",
  1132. x86_power_flags[i][0]?" ":"",
  1133. x86_power_flags[i]);
  1134. else
  1135. seq_printf(m, " [%d]", i);
  1136. }
  1137. }
  1138. seq_printf(m, "\n\n");
  1139. return 0;
  1140. }
  1141. static void *c_start(struct seq_file *m, loff_t *pos)
  1142. {
  1143. return *pos < NR_CPUS ? cpu_data + *pos : NULL;
  1144. }
  1145. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  1146. {
  1147. ++*pos;
  1148. return c_start(m, pos);
  1149. }
  1150. static void c_stop(struct seq_file *m, void *v)
  1151. {
  1152. }
  1153. struct seq_operations cpuinfo_op = {
  1154. .start =c_start,
  1155. .next = c_next,
  1156. .stop = c_stop,
  1157. .show = show_cpuinfo,
  1158. };
  1159. #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
  1160. #include <linux/platform_device.h>
  1161. static __init int add_pcspkr(void)
  1162. {
  1163. struct platform_device *pd;
  1164. int ret;
  1165. pd = platform_device_alloc("pcspkr", -1);
  1166. if (!pd)
  1167. return -ENOMEM;
  1168. ret = platform_device_add(pd);
  1169. if (ret)
  1170. platform_device_put(pd);
  1171. return ret;
  1172. }
  1173. device_initcall(add_pcspkr);
  1174. #endif