ops-bigsur.c 2.1 KB

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  1. /*
  2. * linux/arch/sh/kernel/pci-bigsur.c
  3. *
  4. * By Dustin McIntire (dustin@sensoria.com) (c)2001
  5. *
  6. * Ported to new API by Paul Mundt <lethal@linux-sh.org>.
  7. *
  8. * May be copied or modified under the terms of the GNU General Public
  9. * License. See linux/COPYING for more information.
  10. *
  11. * PCI initialization for the Hitachi Big Sur Evaluation Board
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pci.h>
  18. #include <asm/io.h>
  19. #include "pci-sh7751.h"
  20. #include <asm/bigsur/bigsur.h>
  21. #define BIGSUR_PCI_IO 0x4000
  22. #define BIGSUR_PCI_MEM 0xfd000000
  23. static struct resource sh7751_io_resource = {
  24. .name = "SH7751 IO",
  25. .start = BIGSUR_PCI_IO,
  26. .end = BIGSUR_PCI_IO + (64*1024) - 1,
  27. .flags = IORESOURCE_IO,
  28. };
  29. static struct resource sh7751_mem_resource = {
  30. .name = "SH7751 mem",
  31. .start = BIGSUR_PCI_MEM,
  32. .end = BIGSUR_PCI_MEM + (64*1024*1024) - 1,
  33. .flags = IORESOURCE_MEM,
  34. };
  35. extern struct pci_ops sh7751_pci_ops;
  36. struct pci_channel board_pci_channels[] = {
  37. { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
  38. { 0, }
  39. };
  40. static struct sh7751_pci_address_map sh7751_pci_map = {
  41. .window0 = {
  42. .base = SH7751_CS3_BASE_ADDR,
  43. .size = BIGSUR_LSR0_SIZE,
  44. },
  45. .window1 = {
  46. .base = SH7751_CS3_BASE_ADDR,
  47. .size = BIGSUR_LSR1_SIZE,
  48. },
  49. };
  50. /*
  51. * Initialize the Big Sur PCI interface
  52. * Setup hardware to be Central Funtion
  53. * Copy the BSR regs to the PCI interface
  54. * Setup PCI windows into local RAM
  55. */
  56. int __init pcibios_init_platform(void)
  57. {
  58. return sh7751_pcic_init(&sh7751_pci_map);
  59. }
  60. int pcibios_map_platform_irq(u8 slot, u8 pin)
  61. {
  62. /*
  63. * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
  64. * interface is on the wrong end of the board so that it can also
  65. * support a V320 CPI interface chip... Therefor the IRQ mapping is
  66. * somewhat use dependent... I'l assume a linear map for now, i.e.
  67. * INTA=slot0,pin0... INTD=slot3,pin0...
  68. */
  69. int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
  70. PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
  71. slot, pin-1+'A', irq);
  72. return irq;
  73. }